adv_pci.c revision 1.3
1 /* $NetBSD: adv_pci.c,v 1.3 1998/08/29 13:54:50 dante Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * Author: Baldassare Dante Profeta <dante (at) mclink.it> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 27 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR 28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 29 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 31 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 32 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 33 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 /* 37 * Device probe and attach routines for the following 38 * Advanced Systems Inc. SCSI controllers: 39 * 40 * Connectivity Products: 41 * ABP510/5150 - Bus-Master ISA (240 CDB) (Footnote 1) 42 * ABP5140 - Bus-Master ISA PnP (16 CDB) (Footnote 1, 3) 43 * ABP5142 - Bus-Master ISA PnP with floppy (16 CDB) (Footnote 4) 44 * ABP920 - Bus-Master PCI (16 CDB) 45 * ABP930 - Bus-Master PCI (16 CDB) (Footnote 5) 46 * ABP930U - Bus-Master PCI Ultra (16 CDB) 47 * ABP930UA - Bus-Master PCI Ultra (16 CDB) 48 * ABP960 - Bus-Master PCI MAC/PC (16 CDB) (Footnote 2) 49 * ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB) (Footnote 2) 50 * 51 * Single Channel Products: 52 * ABP542 - Bus-Master ISA with floppy (240 CDB) 53 * ABP742 - Bus-Master EISA (240 CDB) 54 * ABP842 - Bus-Master VL (240 CDB) 55 * ABP940 - Bus-Master PCI (240 CDB) 56 * ABP940U - Bus-Master PCI Ultra (240 CDB) 57 * ABP970 - Bus-Master PCI MAC/PC (240 CDB) 58 * ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB) 59 * ABP940UW - Bus-Master PCI Ultra-Wide (240 CDB) 60 * 61 * Multi Channel Products: 62 * ABP752 - Dual Channel Bus-Master EISA (240 CDB Per Channel) 63 * ABP852 - Dual Channel Bus-Master VL (240 CDB Per Channel) 64 * ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel) 65 * ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel) 66 * ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel) 67 * 68 * Footnotes: 69 * 1. This board has been shipped by HP with the 4020i CD-R drive. 70 * The board has no BIOS so it cannot control a boot device, but 71 * it can control any secondary SCSI device. 72 * 2. This board has been sold by Iomega as a Jaz Jet PCI adapter. 73 * 3. This board has been sold by SIIG as the i540 SpeedMaster. 74 * 4. This board has been sold by SIIG as the i542 SpeedMaster. 75 * 5. This board has been sold by SIIG as the Fast SCSI Pro PCI. 76 * 77 */ 78 79 #include <sys/types.h> 80 #include <sys/param.h> 81 #include <sys/systm.h> 82 #include <sys/malloc.h> 83 #include <sys/kernel.h> 84 #include <sys/queue.h> 85 #include <sys/device.h> 86 87 #include <machine/bus.h> 88 #include <machine/intr.h> 89 90 #include <dev/scsipi/scsi_all.h> 91 #include <dev/scsipi/scsipi_all.h> 92 #include <dev/scsipi/scsiconf.h> 93 94 #include <dev/pci/pcireg.h> 95 #include <dev/pci/pcivar.h> 96 #include <dev/pci/pcidevs.h> 97 98 #include <dev/ic/adv.h> 99 #include <dev/ic/advlib.h> 100 101 /******************************************************************************/ 102 103 #define PCI_BASEADR_IO 0x10 104 105 /******************************************************************************/ 106 107 #ifdef __BROKEN_INDIRECT_CONFIG 108 int adv_pci_probe __P((struct device *, void *, void *)); 109 #else 110 int adv_pci_probe __P((struct device *, struct cfdata *, void *)); 111 #endif 112 void adv_pci_attach __P((struct device *, struct device *, void *)); 113 114 struct cfattach adv_pci_ca = 115 { 116 sizeof(ASC_SOFTC), adv_pci_probe, adv_pci_attach 117 }; 118 119 /******************************************************************************/ 120 /* 121 * Check the slots looking for a board we recognise 122 * If we find one, note it's address (slot) and call 123 * the actual probe routine to check it out. 124 */ 125 #ifdef __BROKEN_INDIRECT_CONFIG 126 int 127 adv_pci_probe(struct device * parent, void *match, void *aux) 128 #else 129 int 130 adv_pci_probe(struct device * parent, struct cfdata * match, void *aux) 131 #endif 132 { 133 struct pci_attach_args *pa = aux; 134 135 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS) 136 switch (PCI_PRODUCT(pa->pa_id)) { 137 case PCI_PRODUCT_ADVSYS_1200A: 138 case PCI_PRODUCT_ADVSYS_1200B: 139 case PCI_PRODUCT_ADVSYS_ULTRA: 140 return (1); 141 case PCI_PRODUCT_ADVSYS_2300: 142 return (0); 143 } 144 145 return 0; 146 } 147 148 149 void 150 adv_pci_attach(struct device * parent, struct device * self, void *aux) 151 { 152 struct pci_attach_args *pa = aux; 153 ASC_SOFTC *sc = (void *) self; 154 bus_space_tag_t iot; 155 bus_space_handle_t ioh; 156 pci_intr_handle_t ih; 157 pci_chipset_tag_t pc = pa->pa_pc; 158 u_int32_t command; 159 const char *intrstr; 160 161 162 sc->sc_flags = 0x0; 163 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS) 164 switch (PCI_PRODUCT(pa->pa_id)) { 165 case PCI_PRODUCT_ADVSYS_1200A: 166 printf(": AdvanSys ASC1200A SCSI\n"); 167 break; 168 169 case PCI_PRODUCT_ADVSYS_1200B: 170 printf(": AdvanSys ASC1200B SCSI\n"); 171 break; 172 173 case PCI_PRODUCT_ADVSYS_ULTRA: 174 switch (PCI_REVISION(pa->pa_class)) { 175 case ASC_PCI_REVISION_3050: 176 printf(": AdvanSys ASC3150 Ultra SCSI\n"); 177 break; 178 179 case ASC_PCI_REVISION_3150: 180 printf(": AdvanSys ASC3050 Ultra SCSI\n"); 181 break; 182 } 183 break; 184 185 case PCI_PRODUCT_ADVSYS_2300: 186 sc->sc_flags |= ASC_WIDE_BOARD; 187 printf("adv_pci_attach: Wide boards are not" 188 " supported yet"); 189 break; 190 191 default: 192 printf(": unknown model!\n"); 193 return; 194 } 195 196 197 /* 198 * Make sure IO/MEM/MASTER are enabled 199 */ 200 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 201 if ((command & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 202 PCI_COMMAND_MASTER_ENABLE)) != 203 (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 204 PCI_COMMAND_MASTER_ENABLE)) { 205 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 206 command | (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 207 PCI_COMMAND_MASTER_ENABLE)); 208 } 209 /* 210 * Latency timer settings. 211 */ 212 { 213 u_int32_t bhlcr; 214 215 bhlcr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG); 216 217 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200A || 218 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200B) { 219 bhlcr &= 0xFFFF00FFul; 220 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, bhlcr); 221 } else if ((PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_ULTRA) && 222 (PCI_LATTIMER(bhlcr) < 0x20)) { 223 bhlcr &= 0xFFFF00FFul; 224 bhlcr |= 0x00002000ul; 225 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, bhlcr); 226 } 227 } 228 229 230 /* 231 * Map Device Registers for I/O 232 */ 233 if (pci_mapreg_map(pa, PCI_BASEADR_IO, PCI_MAPREG_TYPE_IO, 0, 234 &iot, &ioh, NULL, NULL)) { 235 printf("%s: unable to map device registers\n", 236 sc->sc_dev.dv_xname); 237 return; 238 } 239 sc->sc_iot = iot; 240 sc->sc_ioh = ioh; 241 sc->sc_dmat = pa->pa_dmat; 242 sc->pci_device_id = pa->pa_id; 243 sc->bus_type = ASC_IS_PCI; 244 245 /* 246 * Initialize the board 247 */ 248 if (adv_init(sc)) 249 panic("adv_pci_attach: adv_init failed"); 250 251 /* 252 * Map Interrupt line 253 */ 254 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 255 pa->pa_intrline, &ih)) { 256 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 257 return; 258 } 259 intrstr = pci_intr_string(pc, ih); 260 261 /* 262 * Establish Interrupt handler 263 */ 264 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, adv_intr, sc); 265 if (sc->sc_ih == NULL) { 266 printf("%s: couldn't establish interrupt", sc->sc_dev.dv_xname); 267 if (intrstr != NULL) 268 printf(" at %s", intrstr); 269 printf("\n"); 270 return; 271 } 272 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 273 274 /* 275 * Attach all the sub-devices we can find 276 */ 277 adv_attach(sc); 278 } 279 /******************************************************************************/ 280
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