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adw_pci.c revision 1.8.4.1
      1  1.8.4.1   thorpej /* $NetBSD: adw_pci.c,v 1.8.4.1 2002/01/10 19:56:24 thorpej Exp $	 */
      2      1.1     dante 
      3      1.1     dante /*
      4      1.3     dante  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
      5      1.3     dante  * All rights reserved.
      6      1.2     dante  *
      7      1.1     dante  * Author: Baldassare Dante Profeta <dante (at) mclink.it>
      8      1.2     dante  *
      9      1.1     dante  * Redistribution and use in source and binary forms, with or without
     10      1.1     dante  * modification, are permitted provided that the following conditions
     11      1.1     dante  * are met:
     12      1.1     dante  * 1. Redistributions of source code must retain the above copyright
     13      1.1     dante  *    notice, this list of conditions and the following disclaimer.
     14      1.1     dante  * 2. Redistributions in binary form must reproduce the above copyright
     15      1.1     dante  *    notice, this list of conditions and the following disclaimer in the
     16      1.1     dante  *    documentation and/or other materials provided with the distribution.
     17      1.1     dante  * 3. All advertising materials mentioning features or use of this software
     18      1.1     dante  *    must display the following acknowledgement:
     19      1.1     dante  *        This product includes software developed by the NetBSD
     20      1.1     dante  *        Foundation, Inc. and its contributors.
     21      1.1     dante  * 4. Neither the name of The NetBSD Foundation nor the names of its
     22      1.1     dante  *    contributors may be used to endorse or promote products derived
     23      1.1     dante  *    from this software without specific prior written permission.
     24      1.1     dante  *
     25      1.1     dante  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     26      1.1     dante  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27      1.1     dante  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28      1.1     dante  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     29      1.1     dante  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30      1.1     dante  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31      1.1     dante  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32      1.1     dante  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33      1.1     dante  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34      1.1     dante  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35      1.1     dante  * POSSIBILITY OF SUCH DAMAGE.
     36      1.1     dante  */
     37      1.1     dante /*
     38      1.1     dante  * Device probe and attach routines for the following
     39      1.1     dante  * Advanced Systems Inc. SCSI controllers:
     40      1.1     dante  *
     41      1.5     dante  *      ABP-940UW	- Bus-Master PCI Ultra-Wide (253 CDB)
     42      1.5     dante  *	ABP-940UW (68)	- Bus-Master PCI Ultra-Wide (253 CDB)
     43      1.5     dante  *	ABP-940UWD	- Bus-Master PCI Ultra-Wide (253 CDB)
     44      1.5     dante  *	ABP-970UW	- Bus-Master PCI Ultra-Wide (253 CDB)
     45      1.5     dante  *	ASB-3940UW	- Bus-Master PCI Ultra-Wide (253 CDB)
     46      1.5     dante  *	ASB-3940U2W-00	- Bus-Master PCI Ultra2-Wide (253 CDB)
     47      1.5     dante  *	ASB-3940U3W-00	- Bus-Master PCI Ultra3-Wide (253 CDB)
     48      1.1     dante  */
     49      1.1     dante 
     50  1.8.4.1   thorpej #include <sys/cdefs.h>
     51  1.8.4.1   thorpej __KERNEL_RCSID(0, "$NetBSD: adw_pci.c,v 1.8.4.1 2002/01/10 19:56:24 thorpej Exp $");
     52  1.8.4.1   thorpej 
     53      1.1     dante #include <sys/param.h>
     54      1.1     dante #include <sys/systm.h>
     55      1.1     dante #include <sys/malloc.h>
     56      1.1     dante #include <sys/kernel.h>
     57      1.1     dante #include <sys/queue.h>
     58      1.1     dante #include <sys/device.h>
     59      1.1     dante 
     60      1.1     dante #include <machine/bus.h>
     61      1.1     dante #include <machine/intr.h>
     62      1.1     dante 
     63      1.1     dante #include <dev/scsipi/scsi_all.h>
     64      1.1     dante #include <dev/scsipi/scsipi_all.h>
     65      1.1     dante #include <dev/scsipi/scsiconf.h>
     66      1.1     dante 
     67      1.1     dante #include <dev/pci/pcireg.h>
     68      1.1     dante #include <dev/pci/pcivar.h>
     69      1.1     dante #include <dev/pci/pcidevs.h>
     70      1.1     dante 
     71      1.1     dante #include <dev/ic/adwlib.h>
     72      1.7     dante #include <dev/ic/adwmcode.h>
     73      1.1     dante #include <dev/ic/adw.h>
     74      1.1     dante 
     75      1.1     dante /******************************************************************************/
     76      1.1     dante 
     77      1.1     dante #define PCI_BASEADR_IO        0x10
     78      1.1     dante 
     79      1.1     dante /******************************************************************************/
     80      1.1     dante 
     81      1.6     dante static int adw_pci_match __P((struct device *, struct cfdata *, void *));
     82      1.6     dante static void adw_pci_attach __P((struct device *, struct device *, void *));
     83      1.1     dante 
     84      1.1     dante struct cfattach adw_pci_ca =
     85      1.1     dante {
     86      1.1     dante 	sizeof(ADW_SOFTC), adw_pci_match, adw_pci_attach
     87      1.1     dante };
     88      1.1     dante 
     89      1.1     dante /******************************************************************************/
     90      1.1     dante /*
     91      1.1     dante  * Check the slots looking for a board we recognise
     92      1.1     dante  * If we find one, note it's address (slot) and call
     93      1.1     dante  * the actual probe routine to check it out.
     94      1.1     dante  */
     95      1.6     dante static int
     96      1.1     dante adw_pci_match(parent, match, aux)
     97      1.2     dante 	struct device  *parent;
     98      1.2     dante 	struct cfdata  *match;
     99      1.2     dante 	void           *aux;
    100      1.1     dante {
    101      1.1     dante 	struct pci_attach_args *pa = aux;
    102      1.1     dante 
    103      1.1     dante 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS)
    104      1.1     dante 		switch (PCI_PRODUCT(pa->pa_id)) {
    105      1.1     dante 		case PCI_PRODUCT_ADVSYS_WIDE:
    106      1.3     dante 		case PCI_PRODUCT_ADVSYS_U2W:
    107      1.5     dante 		case PCI_PRODUCT_ADVSYS_U3W:
    108      1.5     dante 			return (1);
    109      1.1     dante 		}
    110      1.1     dante 
    111      1.1     dante 	return 0;
    112      1.1     dante }
    113      1.1     dante 
    114      1.1     dante 
    115      1.6     dante static void
    116      1.1     dante adw_pci_attach(parent, self, aux)
    117      1.2     dante 	struct device  *parent, *self;
    118      1.2     dante 	void           *aux;
    119      1.1     dante {
    120      1.1     dante 	struct pci_attach_args *pa = aux;
    121      1.1     dante 	ADW_SOFTC      *sc = (void *) self;
    122      1.1     dante 	bus_space_tag_t iot;
    123      1.1     dante 	bus_space_handle_t ioh;
    124      1.1     dante 	pci_intr_handle_t ih;
    125      1.1     dante 	pci_chipset_tag_t pc = pa->pa_pc;
    126      1.1     dante 	u_int32_t       command;
    127      1.1     dante 	const char     *intrstr;
    128      1.1     dante 
    129      1.1     dante 
    130      1.1     dante 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS)
    131      1.1     dante 		switch (PCI_PRODUCT(pa->pa_id)) {
    132      1.1     dante 		case PCI_PRODUCT_ADVSYS_WIDE:
    133      1.7     dante 			sc->chip_type = ADW_CHIP_ASC3550;
    134      1.3     dante 			printf(": AdvanSys ASB-3940UW-00 SCSI adapter\n");
    135      1.3     dante 			break;
    136      1.3     dante 
    137      1.3     dante 		case PCI_PRODUCT_ADVSYS_U2W:
    138      1.7     dante 			sc->chip_type = ADW_CHIP_ASC38C0800;
    139      1.6     dante 			printf(": AdvanSys ASB-3940U2W-00 SCSI adapter\n");
    140      1.1     dante 			break;
    141      1.1     dante 
    142      1.5     dante 		case PCI_PRODUCT_ADVSYS_U3W:
    143      1.7     dante 			sc->chip_type = ADW_CHIP_ASC38C1600;
    144      1.6     dante 			printf(": AdvanSys ASB-3940U3W-00 SCSI adapter\n");
    145      1.5     dante 			break;
    146      1.5     dante 
    147      1.1     dante 		default:
    148      1.1     dante 			printf(": unknown model!\n");
    149      1.1     dante 			return;
    150      1.1     dante 		}
    151      1.1     dante 
    152      1.1     dante 
    153      1.1     dante 	/*
    154      1.1     dante 	 * Make sure IO/MEM/MASTER are enabled
    155      1.1     dante 	 */
    156      1.1     dante 	command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    157      1.6     dante 	command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
    158      1.6     dante 			PCI_COMMAND_MASTER_ENABLE;
    159      1.6     dante 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
    160      1.1     dante 
    161      1.6     dante 	if ( (command & PCI_COMMAND_PARITY_ENABLE) == 0) {
    162      1.1     dante 		sc->cfg.control_flag |= CONTROL_FLAG_IGNORE_PERR;
    163      1.1     dante 	}
    164      1.1     dante 	/*
    165      1.1     dante 	 * Map Device Registers for I/O
    166      1.1     dante 	 */
    167      1.1     dante 	if (pci_mapreg_map(pa, PCI_BASEADR_IO, PCI_MAPREG_TYPE_IO, 0,
    168      1.2     dante 			   &iot, &ioh, NULL, NULL)) {
    169      1.1     dante 		printf("%s: unable to map device registers\n",
    170      1.1     dante 		       sc->sc_dev.dv_xname);
    171      1.1     dante 		return;
    172      1.1     dante 	}
    173      1.1     dante 	sc->sc_iot = iot;
    174      1.1     dante 	sc->sc_ioh = ioh;
    175      1.1     dante 	sc->sc_dmat = pa->pa_dmat;
    176      1.1     dante 
    177      1.1     dante 	/*
    178      1.1     dante 	 * Initialize the board
    179      1.1     dante 	 */
    180      1.6     dante 	if (adw_init(sc)) {
    181      1.6     dante 		printf("%s: adw_init failed", sc->sc_dev.dv_xname);
    182      1.6     dante 		return;
    183      1.6     dante 	}
    184      1.1     dante 
    185      1.1     dante 	/*
    186      1.1     dante 	 * Map Interrupt line
    187      1.1     dante 	 */
    188      1.8  sommerfe 	if (pci_intr_map(pa, &ih)) {
    189      1.1     dante 		printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
    190      1.1     dante 		return;
    191      1.1     dante 	}
    192      1.1     dante 	intrstr = pci_intr_string(pc, ih);
    193      1.1     dante 
    194      1.1     dante 	/*
    195      1.1     dante 	 * Establish Interrupt handler
    196      1.1     dante 	 */
    197      1.1     dante 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, adw_intr, sc);
    198      1.1     dante 	if (sc->sc_ih == NULL) {
    199      1.1     dante 		printf("%s: couldn't establish interrupt", sc->sc_dev.dv_xname);
    200      1.1     dante 		if (intrstr != NULL)
    201      1.1     dante 			printf(" at %s", intrstr);
    202      1.1     dante 		printf("\n");
    203      1.1     dante 		return;
    204      1.1     dante 	}
    205      1.1     dante 	printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
    206      1.1     dante 
    207      1.1     dante 	/*
    208      1.1     dante 	 * Attach all the sub-devices we can find
    209      1.1     dante 	 */
    210      1.1     dante 	adw_attach(sc);
    211      1.1     dante }
    212      1.1     dante /******************************************************************************/
    213