adw_pci.c revision 1.4
1 /* $NetBSD: adw_pci.c,v 1.4 2000/02/04 13:16:22 dante Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Author: Baldassare Dante Profeta <dante (at) mclink.it> 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 /* 38 * Device probe and attach routines for the following 39 * Advanced Systems Inc. SCSI controllers: 40 * 41 * ABP-940UW - Bus-Master PCI Ultra-Wide (240 CDB) 42 * ABP-940UW (68) - Bus-Master PCI Ultra-Wide (240 CDB) 43 * ABP-940UWD - Bus-Master PCI Ultra-Wide (240 CDB) 44 * ABP-970UW - Bus-Master PCI Ultra-Wide (240 CDB) 45 * ASB-3940UW - Bus-Master PCI Ultra-Wide (240 CDB) 46 * ASB-3940U2W-00 - Bus-Master PCI Ultra2-Wide (240 CDB) 47 */ 48 49 #include <sys/types.h> 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/queue.h> 55 #include <sys/device.h> 56 57 #include <machine/bus.h> 58 #include <machine/intr.h> 59 60 #include <dev/scsipi/scsi_all.h> 61 #include <dev/scsipi/scsipi_all.h> 62 #include <dev/scsipi/scsiconf.h> 63 64 #include <dev/pci/pcireg.h> 65 #include <dev/pci/pcivar.h> 66 #include <dev/pci/pcidevs.h> 67 68 #include <dev/ic/adwlib.h> 69 #include <dev/ic/adw.h> 70 71 /******************************************************************************/ 72 73 #define PCI_BASEADR_IO 0x10 74 75 /******************************************************************************/ 76 77 int adw_pci_match __P((struct device *, struct cfdata *, void *)); 78 void adw_pci_attach __P((struct device *, struct device *, void *)); 79 80 struct cfattach adw_pci_ca = 81 { 82 sizeof(ADW_SOFTC), adw_pci_match, adw_pci_attach 83 }; 84 85 /******************************************************************************/ 86 /* 87 * Check the slots looking for a board we recognise 88 * If we find one, note it's address (slot) and call 89 * the actual probe routine to check it out. 90 */ 91 int 92 adw_pci_match(parent, match, aux) 93 struct device *parent; 94 struct cfdata *match; 95 void *aux; 96 { 97 struct pci_attach_args *pa = aux; 98 99 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS) 100 switch (PCI_PRODUCT(pa->pa_id)) { 101 case PCI_PRODUCT_ADVSYS_WIDE: 102 return (1); 103 case PCI_PRODUCT_ADVSYS_U2W: 104 return (1); 105 } 106 107 return 0; 108 } 109 110 111 void 112 adw_pci_attach(parent, self, aux) 113 struct device *parent, *self; 114 void *aux; 115 { 116 struct pci_attach_args *pa = aux; 117 ADW_SOFTC *sc = (void *) self; 118 bus_space_tag_t iot; 119 bus_space_handle_t ioh; 120 pci_intr_handle_t ih; 121 pci_chipset_tag_t pc = pa->pa_pc; 122 u_int32_t command; 123 const char *intrstr; 124 125 126 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS) 127 switch (PCI_PRODUCT(pa->pa_id)) { 128 case PCI_PRODUCT_ADVSYS_WIDE: 129 sc->chip_type = ADV_CHIP_ASC3550; 130 printf(": AdvanSys ASB-3940UW-00 SCSI adapter\n"); 131 break; 132 133 case PCI_PRODUCT_ADVSYS_U2W: 134 sc->chip_type = ADV_CHIP_ASC38C0800; 135 printf(": AdvanSys ASB-3940U2W SCSI adapter\n"); 136 break; 137 138 default: 139 printf(": unknown model!\n"); 140 return; 141 } 142 143 144 /* 145 * Make sure IO/MEM/MASTER are enabled 146 */ 147 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 148 if ((command & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 149 PCI_COMMAND_MASTER_ENABLE)) != 150 (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 151 PCI_COMMAND_MASTER_ENABLE)) { 152 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 153 command | (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 154 PCI_COMMAND_MASTER_ENABLE)); 155 } 156 /* 157 * Latency timer settings. 158 */ 159 { 160 u_int32_t bhlcr; 161 162 bhlcr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG); 163 164 if( ((PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_WIDE) || 165 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_U2W)) && 166 (PCI_LATTIMER(bhlcr) < 0x20)) { 167 bhlcr &= 0xFFFF00FFUL; 168 bhlcr |= 0x00002000UL; 169 pci_conf_write(pa->pa_pc, pa->pa_tag, 170 PCI_BHLC_REG, bhlcr); 171 } 172 } 173 174 175 if (((PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_WIDE) || 176 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_U2W)) && 177 (command & PCI_COMMAND_PARITY_ENABLE) == 0) { 178 sc->cfg.control_flag |= CONTROL_FLAG_IGNORE_PERR; 179 } 180 /* 181 * Map Device Registers for I/O 182 */ 183 if (pci_mapreg_map(pa, PCI_BASEADR_IO, PCI_MAPREG_TYPE_IO, 0, 184 &iot, &ioh, NULL, NULL)) { 185 printf("%s: unable to map device registers\n", 186 sc->sc_dev.dv_xname); 187 return; 188 } 189 sc->sc_iot = iot; 190 sc->sc_ioh = ioh; 191 sc->sc_dmat = pa->pa_dmat; 192 193 /* 194 * Initialize the board 195 */ 196 if (adw_init(sc)) 197 panic("adw_pci_attach: adw_init failed"); 198 199 /* 200 * Map Interrupt line 201 */ 202 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 203 pa->pa_intrline, &ih)) { 204 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 205 return; 206 } 207 intrstr = pci_intr_string(pc, ih); 208 209 /* 210 * Establish Interrupt handler 211 */ 212 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, adw_intr, sc); 213 if (sc->sc_ih == NULL) { 214 printf("%s: couldn't establish interrupt", sc->sc_dev.dv_xname); 215 if (intrstr != NULL) 216 printf(" at %s", intrstr); 217 printf("\n"); 218 return; 219 } 220 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 221 222 /* 223 * Attach all the sub-devices we can find 224 */ 225 adw_attach(sc); 226 } 227 /******************************************************************************/ 228
Indexes created Thu Oct 02 14:10:14 GMT 2025