agp.c revision 1.69
1 /* $NetBSD: agp.c,v 1.69 2010/06/16 03:35:01 riz Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/pci/agp.c,v 1.12 2001/05/19 01:28:07 alfred Exp $ 29 */ 30 31 /* 32 * Copyright (c) 2001 Wasabi Systems, Inc. 33 * All rights reserved. 34 * 35 * Written by Frank van der Linden for Wasabi Systems, Inc. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed for the NetBSD Project by 48 * Wasabi Systems, Inc. 49 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 50 * or promote products derived from this software without specific prior 51 * written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.69 2010/06/16 03:35:01 riz Exp $"); 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/malloc.h> 73 #include <sys/kernel.h> 74 #include <sys/device.h> 75 #include <sys/conf.h> 76 #include <sys/ioctl.h> 77 #include <sys/fcntl.h> 78 #include <sys/agpio.h> 79 #include <sys/proc.h> 80 #include <sys/mutex.h> 81 82 #include <uvm/uvm_extern.h> 83 84 #include <dev/pci/pcireg.h> 85 #include <dev/pci/pcivar.h> 86 #include <dev/pci/agpvar.h> 87 #include <dev/pci/agpreg.h> 88 #include <dev/pci/pcidevs.h> 89 90 #include <sys/bus.h> 91 92 MALLOC_DEFINE(M_AGP, "AGP", "AGP memory"); 93 94 /* Helper functions for implementing chipset mini drivers. */ 95 /* XXXfvdl get rid of this one. */ 96 97 extern struct cfdriver agp_cd; 98 99 static int agp_info_user(struct agp_softc *, agp_info *); 100 static int agp_setup_user(struct agp_softc *, agp_setup *); 101 static int agp_allocate_user(struct agp_softc *, agp_allocate *); 102 static int agp_deallocate_user(struct agp_softc *, int); 103 static int agp_bind_user(struct agp_softc *, agp_bind *); 104 static int agp_unbind_user(struct agp_softc *, agp_unbind *); 105 static int agpdev_match(struct pci_attach_args *); 106 static bool agp_resume(device_t, const pmf_qual_t *); 107 108 #include "agp_ali.h" 109 #include "agp_amd.h" 110 #include "agp_i810.h" 111 #include "agp_intel.h" 112 #include "agp_sis.h" 113 #include "agp_via.h" 114 #include "agp_amd64.h" 115 116 const struct agp_product { 117 uint32_t ap_vendor; 118 uint32_t ap_product; 119 int (*ap_match)(const struct pci_attach_args *); 120 int (*ap_attach)(device_t, device_t, void *); 121 } agp_products[] = { 122 #if NAGP_AMD64 > 0 123 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1689, 124 agp_amd64_match, agp_amd64_attach }, 125 #endif 126 127 #if NAGP_ALI > 0 128 { PCI_VENDOR_ALI, -1, 129 NULL, agp_ali_attach }, 130 #endif 131 132 #if NAGP_AMD64 > 0 133 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_DEV, 134 agp_amd64_match, agp_amd64_attach }, 135 #endif 136 137 #if NAGP_AMD > 0 138 { PCI_VENDOR_AMD, -1, 139 agp_amd_match, agp_amd_attach }, 140 #endif 141 142 #if NAGP_I810 > 0 143 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_MCH, 144 NULL, agp_i810_attach }, 145 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_MCH, 146 NULL, agp_i810_attach }, 147 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_MCH, 148 NULL, agp_i810_attach }, 149 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_HUB, 150 NULL, agp_i810_attach }, 151 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_HB, 152 NULL, agp_i810_attach }, 153 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_1, 154 NULL, agp_i810_attach }, 155 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_DRAM, 156 NULL, agp_i810_attach }, 157 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MCH, 158 NULL, agp_i810_attach }, 159 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_HB, 160 NULL, agp_i810_attach }, 161 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB, 162 NULL, agp_i810_attach }, 163 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB, 164 NULL, agp_i810_attach }, 165 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_MCH, 166 NULL, agp_i810_attach }, 167 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_HB, 168 NULL, agp_i810_attach }, 169 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_HB, 170 NULL, agp_i810_attach }, 171 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HB, 172 NULL, agp_i810_attach }, 173 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_HB, 174 NULL, agp_i810_attach }, 175 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_HB, 176 NULL, agp_i810_attach }, 177 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_HB, 178 NULL, agp_i810_attach }, 179 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_HB, 180 NULL, agp_i810_attach }, 181 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_HB, 182 NULL, agp_i810_attach }, 183 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HB, 184 NULL, agp_i810_attach }, 185 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_HB, 186 NULL, agp_i810_attach }, 187 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_HB, 188 NULL, agp_i810_attach }, 189 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_HB, 190 NULL, agp_i810_attach }, 191 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HB, 192 NULL, agp_i810_attach }, 193 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_HB, 194 NULL, agp_i810_attach }, 195 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_HB, 196 NULL, agp_i810_attach }, 197 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_HB, 198 NULL, agp_i810_attach }, 199 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_HB, 200 NULL, agp_i810_attach }, 201 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_HB, 202 NULL, agp_i810_attach }, 203 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_HB, 204 NULL, agp_i810_attach }, 205 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_HB, 206 NULL, agp_i810_attach }, 207 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MA_HB, 208 NULL, agp_i810_attach }, 209 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MC2_HB, 210 NULL, agp_i810_attach }, 211 #endif 212 213 #if NAGP_INTEL > 0 214 { PCI_VENDOR_INTEL, -1, 215 NULL, agp_intel_attach }, 216 #endif 217 218 #if NAGP_AMD64 > 0 219 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCHB, 220 agp_amd64_match, agp_amd64_attach }, 221 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCHB, 222 agp_amd64_match, agp_amd64_attach }, 223 #endif 224 225 #if NAGP_AMD64 > 0 226 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_755, 227 agp_amd64_match, agp_amd64_attach }, 228 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_760, 229 agp_amd64_match, agp_amd64_attach }, 230 #endif 231 232 #if NAGP_SIS > 0 233 { PCI_VENDOR_SIS, -1, 234 NULL, agp_sis_attach }, 235 #endif 236 237 #if NAGP_AMD64 > 0 238 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M800_0, 239 agp_amd64_match, agp_amd64_attach }, 240 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_0, 241 agp_amd64_match, agp_amd64_attach }, 242 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_0, 243 agp_amd64_match, agp_amd64_attach }, 244 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB, 245 agp_amd64_match, agp_amd64_attach }, 246 #endif 247 248 #if NAGP_VIA > 0 249 { PCI_VENDOR_VIATECH, -1, 250 NULL, agp_via_attach }, 251 #endif 252 253 { 0, 0, 254 NULL, NULL }, 255 }; 256 257 static const struct agp_product * 258 agp_lookup(const struct pci_attach_args *pa) 259 { 260 const struct agp_product *ap; 261 262 /* First find the vendor. */ 263 for (ap = agp_products; ap->ap_attach != NULL; ap++) { 264 if (PCI_VENDOR(pa->pa_id) == ap->ap_vendor) 265 break; 266 } 267 268 if (ap->ap_attach == NULL) 269 return (NULL); 270 271 /* Now find the product within the vendor's domain. */ 272 for (; ap->ap_attach != NULL; ap++) { 273 if (PCI_VENDOR(pa->pa_id) != ap->ap_vendor) { 274 /* Ran out of this vendor's section of the table. */ 275 return (NULL); 276 } 277 if (ap->ap_product == PCI_PRODUCT(pa->pa_id)) { 278 /* Exact match. */ 279 break; 280 } 281 if (ap->ap_product == (uint32_t) -1) { 282 /* Wildcard match. */ 283 break; 284 } 285 } 286 287 if (ap->ap_attach == NULL) 288 return (NULL); 289 290 /* Now let the product-specific driver filter the match. */ 291 if (ap->ap_match != NULL && (*ap->ap_match)(pa) == 0) 292 return (NULL); 293 294 return (ap); 295 } 296 297 static int 298 agpmatch(device_t parent, cfdata_t match, void *aux) 299 { 300 struct agpbus_attach_args *apa = aux; 301 struct pci_attach_args *pa = &apa->apa_pci_args; 302 303 if (agp_lookup(pa) == NULL) 304 return (0); 305 306 return (1); 307 } 308 309 static const int agp_max[][2] = { 310 {0, 0}, 311 {32, 4}, 312 {64, 28}, 313 {128, 96}, 314 {256, 204}, 315 {512, 440}, 316 {1024, 942}, 317 {2048, 1920}, 318 {4096, 3932} 319 }; 320 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 321 322 static void 323 agpattach(device_t parent, device_t self, void *aux) 324 { 325 struct agpbus_attach_args *apa = aux; 326 struct pci_attach_args *pa = &apa->apa_pci_args; 327 struct agp_softc *sc = device_private(self); 328 const struct agp_product *ap; 329 int memsize, i, ret; 330 331 ap = agp_lookup(pa); 332 KASSERT(ap != NULL); 333 334 aprint_naive(": AGP controller\n"); 335 336 sc->as_dev = self; 337 sc->as_dmat = pa->pa_dmat; 338 sc->as_pc = pa->pa_pc; 339 sc->as_tag = pa->pa_tag; 340 sc->as_id = pa->pa_id; 341 342 /* 343 * Work out an upper bound for agp memory allocation. This 344 * uses a heuristic table from the Linux driver. 345 */ 346 memsize = physmem >> (20 - PAGE_SHIFT); /* memsize is in MB */ 347 for (i = 0; i < agp_max_size; i++) { 348 if (memsize <= agp_max[i][0]) 349 break; 350 } 351 if (i == agp_max_size) 352 i = agp_max_size - 1; 353 sc->as_maxmem = agp_max[i][1] << 20U; 354 355 /* 356 * The mutex is used to prevent re-entry to 357 * agp_generic_bind_memory() since that function can sleep. 358 */ 359 mutex_init(&sc->as_mtx, MUTEX_DEFAULT, IPL_NONE); 360 361 TAILQ_INIT(&sc->as_memory); 362 363 ret = (*ap->ap_attach)(parent, self, pa); 364 if (ret == 0) 365 aprint_normal(": aperture at 0x%lx, size 0x%lx\n", 366 (unsigned long)sc->as_apaddr, 367 (unsigned long)AGP_GET_APERTURE(sc)); 368 else 369 sc->as_chipc = NULL; 370 371 if (!device_pmf_is_registered(self)) { 372 if (!pmf_device_register(self, NULL, agp_resume)) 373 aprint_error_dev(self, "couldn't establish power " 374 "handler\n"); 375 } 376 } 377 378 CFATTACH_DECL_NEW(agp, sizeof(struct agp_softc), 379 agpmatch, agpattach, NULL, NULL); 380 381 int 382 agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 383 { 384 /* 385 * Find the aperture. Don't map it (yet), this would 386 * eat KVA. 387 */ 388 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 389 PCI_MAPREG_TYPE_MEM, &sc->as_apaddr, &sc->as_apsize, 390 &sc->as_apflags) != 0) 391 return ENXIO; 392 393 sc->as_apt = pa->pa_memt; 394 395 return 0; 396 } 397 398 struct agp_gatt * 399 agp_alloc_gatt(struct agp_softc *sc) 400 { 401 u_int32_t apsize = AGP_GET_APERTURE(sc); 402 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 403 struct agp_gatt *gatt; 404 void *virtual; 405 int dummyseg; 406 407 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 408 if (!gatt) 409 return NULL; 410 gatt->ag_entries = entries; 411 412 if (agp_alloc_dmamem(sc->as_dmat, entries * sizeof(u_int32_t), 413 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 414 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 415 free(gatt, M_AGP); 416 return NULL; 417 } 418 gatt->ag_virtual = (uint32_t *)virtual; 419 420 gatt->ag_size = entries * sizeof(u_int32_t); 421 memset(gatt->ag_virtual, 0, gatt->ag_size); 422 agp_flush_cache(); 423 424 return gatt; 425 } 426 427 void 428 agp_free_gatt(struct agp_softc *sc, struct agp_gatt *gatt) 429 { 430 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 431 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 432 free(gatt, M_AGP); 433 } 434 435 436 int 437 agp_generic_detach(struct agp_softc *sc) 438 { 439 mutex_destroy(&sc->as_mtx); 440 agp_flush_cache(); 441 return 0; 442 } 443 444 static int 445 agpdev_match(struct pci_attach_args *pa) 446 { 447 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 448 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 449 if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, 450 NULL, NULL)) 451 return 1; 452 453 return 0; 454 } 455 456 int 457 agp_generic_enable(struct agp_softc *sc, u_int32_t mode) 458 { 459 struct pci_attach_args pa; 460 pcireg_t tstatus, mstatus; 461 pcireg_t command; 462 int rq, sba, fw, rate, capoff; 463 464 if (pci_find_device(&pa, agpdev_match) == 0 || 465 pci_get_capability(pa.pa_pc, pa.pa_tag, PCI_CAP_AGP, 466 &capoff, NULL) == 0) { 467 aprint_error_dev(sc->as_dev, "can't find display\n"); 468 return ENXIO; 469 } 470 471 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 472 sc->as_capoff + AGP_STATUS); 473 mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag, 474 capoff + AGP_STATUS); 475 476 /* Set RQ to the min of mode, tstatus and mstatus */ 477 rq = AGP_MODE_GET_RQ(mode); 478 if (AGP_MODE_GET_RQ(tstatus) < rq) 479 rq = AGP_MODE_GET_RQ(tstatus); 480 if (AGP_MODE_GET_RQ(mstatus) < rq) 481 rq = AGP_MODE_GET_RQ(mstatus); 482 483 /* Set SBA if all three can deal with SBA */ 484 sba = (AGP_MODE_GET_SBA(tstatus) 485 & AGP_MODE_GET_SBA(mstatus) 486 & AGP_MODE_GET_SBA(mode)); 487 488 /* Similar for FW */ 489 fw = (AGP_MODE_GET_FW(tstatus) 490 & AGP_MODE_GET_FW(mstatus) 491 & AGP_MODE_GET_FW(mode)); 492 493 /* Figure out the max rate */ 494 rate = (AGP_MODE_GET_RATE(tstatus) 495 & AGP_MODE_GET_RATE(mstatus) 496 & AGP_MODE_GET_RATE(mode)); 497 if (rate & AGP_MODE_RATE_4x) 498 rate = AGP_MODE_RATE_4x; 499 else if (rate & AGP_MODE_RATE_2x) 500 rate = AGP_MODE_RATE_2x; 501 else 502 rate = AGP_MODE_RATE_1x; 503 504 /* Construct the new mode word and tell the hardware */ 505 command = AGP_MODE_SET_RQ(0, rq); 506 command = AGP_MODE_SET_SBA(command, sba); 507 command = AGP_MODE_SET_FW(command, fw); 508 command = AGP_MODE_SET_RATE(command, rate); 509 command = AGP_MODE_SET_AGP(command, 1); 510 pci_conf_write(sc->as_pc, sc->as_tag, 511 sc->as_capoff + AGP_COMMAND, command); 512 pci_conf_write(pa.pa_pc, pa.pa_tag, capoff + AGP_COMMAND, command); 513 514 return 0; 515 } 516 517 struct agp_memory * 518 agp_generic_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 519 { 520 struct agp_memory *mem; 521 522 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 523 return 0; 524 525 if (sc->as_allocated + size > sc->as_maxmem) 526 return 0; 527 528 if (type != 0) { 529 printf("agp_generic_alloc_memory: unsupported type %d\n", 530 type); 531 return 0; 532 } 533 534 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 535 if (mem == NULL) 536 return NULL; 537 538 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 539 size, 0, BUS_DMA_NOWAIT, &mem->am_dmamap) != 0) { 540 free(mem, M_AGP); 541 return NULL; 542 } 543 544 mem->am_id = sc->as_nextid++; 545 mem->am_size = size; 546 mem->am_type = 0; 547 mem->am_physical = 0; 548 mem->am_offset = 0; 549 mem->am_is_bound = 0; 550 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 551 sc->as_allocated += size; 552 553 return mem; 554 } 555 556 int 557 agp_generic_free_memory(struct agp_softc *sc, struct agp_memory *mem) 558 { 559 if (mem->am_is_bound) 560 return EBUSY; 561 562 sc->as_allocated -= mem->am_size; 563 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 564 bus_dmamap_destroy(sc->as_dmat, mem->am_dmamap); 565 free(mem, M_AGP); 566 return 0; 567 } 568 569 int 570 agp_generic_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 571 off_t offset) 572 { 573 off_t i, k; 574 bus_size_t done, j; 575 int error; 576 bus_dma_segment_t *segs, *seg; 577 bus_addr_t pa; 578 int contigpages, nseg; 579 580 mutex_enter(&sc->as_mtx); 581 582 if (mem->am_is_bound) { 583 aprint_error_dev(sc->as_dev, "memory already bound\n"); 584 mutex_exit(&sc->as_mtx); 585 return EINVAL; 586 } 587 588 if (offset < 0 589 || (offset & (AGP_PAGE_SIZE - 1)) != 0 590 || offset + mem->am_size > AGP_GET_APERTURE(sc)) { 591 aprint_error_dev(sc->as_dev, 592 "binding memory at bad offset %#lx\n", 593 (unsigned long) offset); 594 mutex_exit(&sc->as_mtx); 595 return EINVAL; 596 } 597 598 /* 599 * XXXfvdl 600 * The memory here needs to be directly accessable from the 601 * AGP video card, so it should be allocated using bus_dma. 602 * However, it need not be contiguous, since individual pages 603 * are translated using the GATT. 604 * 605 * Using a large chunk of contiguous memory may get in the way 606 * of other subsystems that may need one, so we try to be friendly 607 * and ask for allocation in chunks of a minimum of 8 pages 608 * of contiguous memory on average, falling back to 4, 2 and 1 609 * if really needed. Larger chunks are preferred, since allocating 610 * a bus_dma_segment per page would be overkill. 611 */ 612 613 for (contigpages = 8; contigpages > 0; contigpages >>= 1) { 614 nseg = (mem->am_size / (contigpages * PAGE_SIZE)) + 1; 615 segs = malloc(nseg * sizeof *segs, M_AGP, M_WAITOK); 616 if (segs == NULL) { 617 mutex_exit(&sc->as_mtx); 618 return ENOMEM; 619 } 620 if (bus_dmamem_alloc(sc->as_dmat, mem->am_size, PAGE_SIZE, 0, 621 segs, nseg, &mem->am_nseg, 622 contigpages > 1 ? 623 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) != 0) { 624 free(segs, M_AGP); 625 continue; 626 } 627 if (bus_dmamem_map(sc->as_dmat, segs, mem->am_nseg, 628 mem->am_size, &mem->am_virtual, BUS_DMA_WAITOK) != 0) { 629 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 630 free(segs, M_AGP); 631 continue; 632 } 633 if (bus_dmamap_load(sc->as_dmat, mem->am_dmamap, 634 mem->am_virtual, mem->am_size, NULL, BUS_DMA_WAITOK) != 0) { 635 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 636 mem->am_size); 637 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 638 free(segs, M_AGP); 639 continue; 640 } 641 mem->am_dmaseg = segs; 642 break; 643 } 644 645 if (contigpages == 0) { 646 mutex_exit(&sc->as_mtx); 647 return ENOMEM; 648 } 649 650 651 /* 652 * Bind the individual pages and flush the chipset's 653 * TLB. 654 */ 655 done = 0; 656 for (i = 0; i < mem->am_dmamap->dm_nsegs; i++) { 657 seg = &mem->am_dmamap->dm_segs[i]; 658 /* 659 * Install entries in the GATT, making sure that if 660 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 661 * aligned to PAGE_SIZE, we don't modify too many GATT 662 * entries. 663 */ 664 for (j = 0; j < seg->ds_len && (done + j) < mem->am_size; 665 j += AGP_PAGE_SIZE) { 666 pa = seg->ds_addr + j; 667 AGP_DPF(("binding offset %#lx to pa %#lx\n", 668 (unsigned long)(offset + done + j), 669 (unsigned long)pa)); 670 error = AGP_BIND_PAGE(sc, offset + done + j, pa); 671 if (error) { 672 /* 673 * Bail out. Reverse all the mappings 674 * and unwire the pages. 675 */ 676 for (k = 0; k < done + j; k += AGP_PAGE_SIZE) 677 AGP_UNBIND_PAGE(sc, offset + k); 678 679 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 680 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 681 mem->am_size); 682 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, 683 mem->am_nseg); 684 free(mem->am_dmaseg, M_AGP); 685 mutex_exit(&sc->as_mtx); 686 return error; 687 } 688 } 689 done += seg->ds_len; 690 } 691 692 /* 693 * Flush the CPU cache since we are providing a new mapping 694 * for these pages. 695 */ 696 agp_flush_cache(); 697 698 /* 699 * Make sure the chipset gets the new mappings. 700 */ 701 AGP_FLUSH_TLB(sc); 702 703 mem->am_offset = offset; 704 mem->am_is_bound = 1; 705 706 mutex_exit(&sc->as_mtx); 707 708 return 0; 709 } 710 711 int 712 agp_generic_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 713 { 714 int i; 715 716 mutex_enter(&sc->as_mtx); 717 718 if (!mem->am_is_bound) { 719 aprint_error_dev(sc->as_dev, "memory is not bound\n"); 720 mutex_exit(&sc->as_mtx); 721 return EINVAL; 722 } 723 724 725 /* 726 * Unbind the individual pages and flush the chipset's 727 * TLB. Unwire the pages so they can be swapped. 728 */ 729 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 730 AGP_UNBIND_PAGE(sc, mem->am_offset + i); 731 732 agp_flush_cache(); 733 AGP_FLUSH_TLB(sc); 734 735 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 736 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, mem->am_size); 737 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, mem->am_nseg); 738 739 free(mem->am_dmaseg, M_AGP); 740 741 mem->am_offset = 0; 742 mem->am_is_bound = 0; 743 744 mutex_exit(&sc->as_mtx); 745 746 return 0; 747 } 748 749 /* Helper functions for implementing user/kernel api */ 750 751 static int 752 agp_acquire_helper(struct agp_softc *sc, enum agp_acquire_state state) 753 { 754 if (sc->as_state != AGP_ACQUIRE_FREE) 755 return EBUSY; 756 sc->as_state = state; 757 758 return 0; 759 } 760 761 static int 762 agp_release_helper(struct agp_softc *sc, enum agp_acquire_state state) 763 { 764 765 if (sc->as_state == AGP_ACQUIRE_FREE) 766 return 0; 767 768 if (sc->as_state != state) 769 return EBUSY; 770 771 sc->as_state = AGP_ACQUIRE_FREE; 772 return 0; 773 } 774 775 static struct agp_memory * 776 agp_find_memory(struct agp_softc *sc, int id) 777 { 778 struct agp_memory *mem; 779 780 AGP_DPF(("searching for memory block %d\n", id)); 781 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 782 AGP_DPF(("considering memory block %d\n", mem->am_id)); 783 if (mem->am_id == id) 784 return mem; 785 } 786 return 0; 787 } 788 789 /* Implementation of the userland ioctl api */ 790 791 static int 792 agp_info_user(struct agp_softc *sc, agp_info *info) 793 { 794 memset(info, 0, sizeof *info); 795 info->bridge_id = sc->as_id; 796 if (sc->as_capoff != 0) 797 info->agp_mode = pci_conf_read(sc->as_pc, sc->as_tag, 798 sc->as_capoff + AGP_STATUS); 799 else 800 info->agp_mode = 0; /* i810 doesn't have real AGP */ 801 info->aper_base = sc->as_apaddr; 802 info->aper_size = AGP_GET_APERTURE(sc) >> 20; 803 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 804 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 805 806 return 0; 807 } 808 809 static int 810 agp_setup_user(struct agp_softc *sc, agp_setup *setup) 811 { 812 return AGP_ENABLE(sc, setup->agp_mode); 813 } 814 815 static int 816 agp_allocate_user(struct agp_softc *sc, agp_allocate *alloc) 817 { 818 struct agp_memory *mem; 819 820 mem = AGP_ALLOC_MEMORY(sc, 821 alloc->type, 822 alloc->pg_count << AGP_PAGE_SHIFT); 823 if (mem) { 824 alloc->key = mem->am_id; 825 alloc->physical = mem->am_physical; 826 return 0; 827 } else { 828 return ENOMEM; 829 } 830 } 831 832 static int 833 agp_deallocate_user(struct agp_softc *sc, int id) 834 { 835 struct agp_memory *mem = agp_find_memory(sc, id); 836 837 if (mem) { 838 AGP_FREE_MEMORY(sc, mem); 839 return 0; 840 } else { 841 return ENOENT; 842 } 843 } 844 845 static int 846 agp_bind_user(struct agp_softc *sc, agp_bind *bind) 847 { 848 struct agp_memory *mem = agp_find_memory(sc, bind->key); 849 850 if (!mem) 851 return ENOENT; 852 853 return AGP_BIND_MEMORY(sc, mem, bind->pg_start << AGP_PAGE_SHIFT); 854 } 855 856 static int 857 agp_unbind_user(struct agp_softc *sc, agp_unbind *unbind) 858 { 859 struct agp_memory *mem = agp_find_memory(sc, unbind->key); 860 861 if (!mem) 862 return ENOENT; 863 864 return AGP_UNBIND_MEMORY(sc, mem); 865 } 866 867 static int 868 agpopen(dev_t dev, int oflags, int devtype, struct lwp *l) 869 { 870 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 871 872 if (sc == NULL) 873 return ENXIO; 874 875 if (sc->as_chipc == NULL) 876 return ENXIO; 877 878 if (!sc->as_isopen) 879 sc->as_isopen = 1; 880 else 881 return EBUSY; 882 883 return 0; 884 } 885 886 static int 887 agpclose(dev_t dev, int fflag, int devtype, struct lwp *l) 888 { 889 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 890 struct agp_memory *mem; 891 892 if (sc == NULL) 893 return ENODEV; 894 895 /* 896 * Clear the GATT and force release on last close 897 */ 898 if (sc->as_state == AGP_ACQUIRE_USER) { 899 while ((mem = TAILQ_FIRST(&sc->as_memory))) { 900 if (mem->am_is_bound) { 901 printf("agpclose: mem %d is bound\n", 902 mem->am_id); 903 AGP_UNBIND_MEMORY(sc, mem); 904 } 905 /* 906 * XXX it is not documented, but if the protocol allows 907 * allocate->acquire->bind, it would be possible that 908 * memory ranges are allocated by the kernel here, 909 * which we shouldn't free. We'd have to keep track of 910 * the memory range's owner. 911 * The kernel API is unsed yet, so we get away with 912 * freeing all. 913 */ 914 AGP_FREE_MEMORY(sc, mem); 915 } 916 agp_release_helper(sc, AGP_ACQUIRE_USER); 917 } 918 sc->as_isopen = 0; 919 920 return 0; 921 } 922 923 static int 924 agpioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *l) 925 { 926 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 927 928 if (sc == NULL) 929 return ENODEV; 930 931 if ((fflag & FWRITE) == 0 && cmd != AGPIOC_INFO) 932 return EPERM; 933 934 switch (cmd) { 935 case AGPIOC_INFO: 936 return agp_info_user(sc, (agp_info *) data); 937 938 case AGPIOC_ACQUIRE: 939 return agp_acquire_helper(sc, AGP_ACQUIRE_USER); 940 941 case AGPIOC_RELEASE: 942 return agp_release_helper(sc, AGP_ACQUIRE_USER); 943 944 case AGPIOC_SETUP: 945 return agp_setup_user(sc, (agp_setup *)data); 946 947 case AGPIOC_ALLOCATE: 948 return agp_allocate_user(sc, (agp_allocate *)data); 949 950 case AGPIOC_DEALLOCATE: 951 return agp_deallocate_user(sc, *(int *) data); 952 953 case AGPIOC_BIND: 954 return agp_bind_user(sc, (agp_bind *)data); 955 956 case AGPIOC_UNBIND: 957 return agp_unbind_user(sc, (agp_unbind *)data); 958 959 } 960 961 return EINVAL; 962 } 963 964 static paddr_t 965 agpmmap(dev_t dev, off_t offset, int prot) 966 { 967 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 968 969 if (sc == NULL) 970 return ENODEV; 971 972 if (offset > AGP_GET_APERTURE(sc)) 973 return -1; 974 975 return (bus_space_mmap(sc->as_apt, sc->as_apaddr, offset, prot, 976 BUS_SPACE_MAP_LINEAR)); 977 } 978 979 const struct cdevsw agp_cdevsw = { 980 agpopen, agpclose, noread, nowrite, agpioctl, 981 nostop, notty, nopoll, agpmmap, nokqfilter, D_OTHER 982 }; 983 984 /* Implementation of the kernel api */ 985 986 void * 987 agp_find_device(int unit) 988 { 989 return device_lookup_private(&agp_cd, unit); 990 } 991 992 enum agp_acquire_state 993 agp_state(void *devcookie) 994 { 995 struct agp_softc *sc = devcookie; 996 997 return sc->as_state; 998 } 999 1000 void 1001 agp_get_info(void *devcookie, struct agp_info *info) 1002 { 1003 struct agp_softc *sc = devcookie; 1004 1005 info->ai_mode = pci_conf_read(sc->as_pc, sc->as_tag, 1006 sc->as_capoff + AGP_STATUS); 1007 info->ai_aperture_base = sc->as_apaddr; 1008 info->ai_aperture_size = sc->as_apsize; /* XXXfvdl inconsistent */ 1009 info->ai_memory_allowed = sc->as_maxmem; 1010 info->ai_memory_used = sc->as_allocated; 1011 } 1012 1013 int 1014 agp_acquire(void *dev) 1015 { 1016 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 1017 } 1018 1019 int 1020 agp_release(void *dev) 1021 { 1022 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 1023 } 1024 1025 int 1026 agp_enable(void *dev, u_int32_t mode) 1027 { 1028 struct agp_softc *sc = dev; 1029 1030 return AGP_ENABLE(sc, mode); 1031 } 1032 1033 void * 1034 agp_alloc_memory(void *dev, int type, vsize_t bytes) 1035 { 1036 struct agp_softc *sc = dev; 1037 1038 return (void *)AGP_ALLOC_MEMORY(sc, type, bytes); 1039 } 1040 1041 void 1042 agp_free_memory(void *dev, void *handle) 1043 { 1044 struct agp_softc *sc = dev; 1045 struct agp_memory *mem = handle; 1046 1047 AGP_FREE_MEMORY(sc, mem); 1048 } 1049 1050 int 1051 agp_bind_memory(void *dev, void *handle, off_t offset) 1052 { 1053 struct agp_softc *sc = dev; 1054 struct agp_memory *mem = handle; 1055 1056 return AGP_BIND_MEMORY(sc, mem, offset); 1057 } 1058 1059 int 1060 agp_unbind_memory(void *dev, void *handle) 1061 { 1062 struct agp_softc *sc = dev; 1063 struct agp_memory *mem = handle; 1064 1065 return AGP_UNBIND_MEMORY(sc, mem); 1066 } 1067 1068 void 1069 agp_memory_info(void *dev, void *handle, struct agp_memory_info *mi) 1070 { 1071 struct agp_memory *mem = handle; 1072 1073 mi->ami_size = mem->am_size; 1074 mi->ami_physical = mem->am_physical; 1075 mi->ami_offset = mem->am_offset; 1076 mi->ami_is_bound = mem->am_is_bound; 1077 } 1078 1079 int 1080 agp_alloc_dmamem(bus_dma_tag_t tag, size_t size, int flags, 1081 bus_dmamap_t *mapp, void **vaddr, bus_addr_t *baddr, 1082 bus_dma_segment_t *seg, int nseg, int *rseg) 1083 1084 { 1085 int error, level = 0; 1086 1087 if ((error = bus_dmamem_alloc(tag, size, PAGE_SIZE, 0, 1088 seg, nseg, rseg, BUS_DMA_NOWAIT)) != 0) 1089 goto out; 1090 level++; 1091 1092 if ((error = bus_dmamem_map(tag, seg, *rseg, size, vaddr, 1093 BUS_DMA_NOWAIT | flags)) != 0) 1094 goto out; 1095 level++; 1096 1097 if ((error = bus_dmamap_create(tag, size, *rseg, size, 0, 1098 BUS_DMA_NOWAIT, mapp)) != 0) 1099 goto out; 1100 level++; 1101 1102 if ((error = bus_dmamap_load(tag, *mapp, *vaddr, size, NULL, 1103 BUS_DMA_NOWAIT)) != 0) 1104 goto out; 1105 1106 *baddr = (*mapp)->dm_segs[0].ds_addr; 1107 1108 return 0; 1109 out: 1110 switch (level) { 1111 case 3: 1112 bus_dmamap_destroy(tag, *mapp); 1113 /* FALLTHROUGH */ 1114 case 2: 1115 bus_dmamem_unmap(tag, *vaddr, size); 1116 /* FALLTHROUGH */ 1117 case 1: 1118 bus_dmamem_free(tag, seg, *rseg); 1119 break; 1120 default: 1121 break; 1122 } 1123 1124 return error; 1125 } 1126 1127 void 1128 agp_free_dmamem(bus_dma_tag_t tag, size_t size, bus_dmamap_t map, 1129 void *vaddr, bus_dma_segment_t *seg, int nseg) 1130 { 1131 bus_dmamap_unload(tag, map); 1132 bus_dmamap_destroy(tag, map); 1133 bus_dmamem_unmap(tag, vaddr, size); 1134 bus_dmamem_free(tag, seg, nseg); 1135 } 1136 1137 static bool 1138 agp_resume(device_t dv, const pmf_qual_t *qual) 1139 { 1140 agp_flush_cache(); 1141 1142 return true; 1143 } 1144
Indexes created Wed Sep 24 02:09:48 GMT 2025