agp.c revision 1.76
1 /* $NetBSD: agp.c,v 1.76 2010/11/13 13:52:04 uebayasi Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/pci/agp.c,v 1.12 2001/05/19 01:28:07 alfred Exp $ 29 */ 30 31 /* 32 * Copyright (c) 2001 Wasabi Systems, Inc. 33 * All rights reserved. 34 * 35 * Written by Frank van der Linden for Wasabi Systems, Inc. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed for the NetBSD Project by 48 * Wasabi Systems, Inc. 49 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 50 * or promote products derived from this software without specific prior 51 * written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.76 2010/11/13 13:52:04 uebayasi Exp $"); 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/malloc.h> 73 #include <sys/kernel.h> 74 #include <sys/device.h> 75 #include <sys/conf.h> 76 #include <sys/ioctl.h> 77 #include <sys/fcntl.h> 78 #include <sys/agpio.h> 79 #include <sys/proc.h> 80 #include <sys/mutex.h> 81 82 #include <dev/pci/pcireg.h> 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/agpvar.h> 85 #include <dev/pci/agpreg.h> 86 #include <dev/pci/pcidevs.h> 87 88 #include <sys/bus.h> 89 90 MALLOC_DEFINE(M_AGP, "AGP", "AGP memory"); 91 92 /* Helper functions for implementing chipset mini drivers. */ 93 /* XXXfvdl get rid of this one. */ 94 95 extern struct cfdriver agp_cd; 96 97 static int agp_info_user(struct agp_softc *, agp_info *); 98 static int agp_setup_user(struct agp_softc *, agp_setup *); 99 static int agp_allocate_user(struct agp_softc *, agp_allocate *); 100 static int agp_deallocate_user(struct agp_softc *, int); 101 static int agp_bind_user(struct agp_softc *, agp_bind *); 102 static int agp_unbind_user(struct agp_softc *, agp_unbind *); 103 static int agpdev_match(struct pci_attach_args *); 104 static bool agp_resume(device_t, const pmf_qual_t *); 105 106 #include "agp_ali.h" 107 #include "agp_amd.h" 108 #include "agp_i810.h" 109 #include "agp_intel.h" 110 #include "agp_sis.h" 111 #include "agp_via.h" 112 #include "agp_amd64.h" 113 114 const struct agp_product { 115 uint32_t ap_vendor; 116 uint32_t ap_product; 117 int (*ap_match)(const struct pci_attach_args *); 118 int (*ap_attach)(device_t, device_t, void *); 119 } agp_products[] = { 120 #if NAGP_AMD64 > 0 121 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1689, 122 agp_amd64_match, agp_amd64_attach }, 123 #endif 124 125 #if NAGP_ALI > 0 126 { PCI_VENDOR_ALI, -1, 127 NULL, agp_ali_attach }, 128 #endif 129 130 #if NAGP_AMD64 > 0 131 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_DEV, 132 agp_amd64_match, agp_amd64_attach }, 133 #endif 134 135 #if NAGP_AMD > 0 136 { PCI_VENDOR_AMD, -1, 137 agp_amd_match, agp_amd_attach }, 138 #endif 139 140 #if NAGP_I810 > 0 141 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_MCH, 142 NULL, agp_i810_attach }, 143 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_MCH, 144 NULL, agp_i810_attach }, 145 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_MCH, 146 NULL, agp_i810_attach }, 147 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_HUB, 148 NULL, agp_i810_attach }, 149 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_HB, 150 NULL, agp_i810_attach }, 151 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_1, 152 NULL, agp_i810_attach }, 153 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_DRAM, 154 NULL, agp_i810_attach }, 155 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MCH, 156 NULL, agp_i810_attach }, 157 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_HB, 158 NULL, agp_i810_attach }, 159 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB, 160 NULL, agp_i810_attach }, 161 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB, 162 NULL, agp_i810_attach }, 163 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_MCH, 164 NULL, agp_i810_attach }, 165 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_HB, 166 NULL, agp_i810_attach }, 167 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_HB, 168 NULL, agp_i810_attach }, 169 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HB, 170 NULL, agp_i810_attach }, 171 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_HB, 172 NULL, agp_i810_attach }, 173 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_HB, 174 NULL, agp_i810_attach }, 175 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_HB, 176 NULL, agp_i810_attach }, 177 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_HB, 178 NULL, agp_i810_attach }, 179 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_HB, 180 NULL, agp_i810_attach }, 181 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HB, 182 NULL, agp_i810_attach }, 183 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_HB, 184 NULL, agp_i810_attach }, 185 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_HB, 186 NULL, agp_i810_attach }, 187 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_HB, 188 NULL, agp_i810_attach }, 189 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HB, 190 NULL, agp_i810_attach }, 191 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_HB, 192 NULL, agp_i810_attach }, 193 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_HB, 194 NULL, agp_i810_attach }, 195 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_HB, 196 NULL, agp_i810_attach }, 197 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_HB, 198 NULL, agp_i810_attach }, 199 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_HB, 200 NULL, agp_i810_attach }, 201 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_HB, 202 NULL, agp_i810_attach }, 203 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_HB, 204 NULL, agp_i810_attach }, 205 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MA_HB, 206 NULL, agp_i810_attach }, 207 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MC2_HB, 208 NULL, agp_i810_attach }, 209 #endif 210 211 #if NAGP_INTEL > 0 212 { PCI_VENDOR_INTEL, -1, 213 NULL, agp_intel_attach }, 214 #endif 215 216 #if NAGP_AMD64 > 0 217 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCHB, 218 agp_amd64_match, agp_amd64_attach }, 219 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCHB, 220 agp_amd64_match, agp_amd64_attach }, 221 #endif 222 223 #if NAGP_AMD64 > 0 224 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_755, 225 agp_amd64_match, agp_amd64_attach }, 226 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_760, 227 agp_amd64_match, agp_amd64_attach }, 228 #endif 229 230 #if NAGP_SIS > 0 231 { PCI_VENDOR_SIS, -1, 232 NULL, agp_sis_attach }, 233 #endif 234 235 #if NAGP_AMD64 > 0 236 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M800_0, 237 agp_amd64_match, agp_amd64_attach }, 238 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_0, 239 agp_amd64_match, agp_amd64_attach }, 240 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_0, 241 agp_amd64_match, agp_amd64_attach }, 242 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB, 243 agp_amd64_match, agp_amd64_attach }, 244 #endif 245 246 #if NAGP_VIA > 0 247 { PCI_VENDOR_VIATECH, -1, 248 NULL, agp_via_attach }, 249 #endif 250 251 { 0, 0, 252 NULL, NULL }, 253 }; 254 255 static const struct agp_product * 256 agp_lookup(const struct pci_attach_args *pa) 257 { 258 const struct agp_product *ap; 259 260 /* First find the vendor. */ 261 for (ap = agp_products; ap->ap_attach != NULL; ap++) { 262 if (PCI_VENDOR(pa->pa_id) == ap->ap_vendor) 263 break; 264 } 265 266 if (ap->ap_attach == NULL) 267 return (NULL); 268 269 /* Now find the product within the vendor's domain. */ 270 for (; ap->ap_attach != NULL; ap++) { 271 if (PCI_VENDOR(pa->pa_id) != ap->ap_vendor) { 272 /* Ran out of this vendor's section of the table. */ 273 return (NULL); 274 } 275 if (ap->ap_product == PCI_PRODUCT(pa->pa_id)) { 276 /* Exact match. */ 277 break; 278 } 279 if (ap->ap_product == (uint32_t) -1) { 280 /* Wildcard match. */ 281 break; 282 } 283 } 284 285 if (ap->ap_attach == NULL) 286 return (NULL); 287 288 /* Now let the product-specific driver filter the match. */ 289 if (ap->ap_match != NULL && (*ap->ap_match)(pa) == 0) 290 return (NULL); 291 292 return (ap); 293 } 294 295 static int 296 agpmatch(device_t parent, cfdata_t match, void *aux) 297 { 298 struct agpbus_attach_args *apa = aux; 299 struct pci_attach_args *pa = &apa->apa_pci_args; 300 301 if (agp_lookup(pa) == NULL) 302 return (0); 303 304 return (1); 305 } 306 307 static const int agp_max[][2] = { 308 {0, 0}, 309 {32, 4}, 310 {64, 28}, 311 {128, 96}, 312 {256, 204}, 313 {512, 440}, 314 {1024, 942}, 315 {2048, 1920}, 316 {4096, 3932} 317 }; 318 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 319 320 static void 321 agpattach(device_t parent, device_t self, void *aux) 322 { 323 struct agpbus_attach_args *apa = aux; 324 struct pci_attach_args *pa = &apa->apa_pci_args; 325 struct agp_softc *sc = device_private(self); 326 const struct agp_product *ap; 327 int memsize, i, ret; 328 329 ap = agp_lookup(pa); 330 KASSERT(ap != NULL); 331 332 aprint_naive(": AGP controller\n"); 333 334 sc->as_dev = self; 335 sc->as_dmat = pa->pa_dmat; 336 sc->as_pc = pa->pa_pc; 337 sc->as_tag = pa->pa_tag; 338 sc->as_id = pa->pa_id; 339 340 /* 341 * Work out an upper bound for agp memory allocation. This 342 * uses a heuristic table from the Linux driver. 343 */ 344 memsize = physmem >> (20 - PAGE_SHIFT); /* memsize is in MB */ 345 for (i = 0; i < agp_max_size; i++) { 346 if (memsize <= agp_max[i][0]) 347 break; 348 } 349 if (i == agp_max_size) 350 i = agp_max_size - 1; 351 sc->as_maxmem = agp_max[i][1] << 20U; 352 353 /* 354 * The mutex is used to prevent re-entry to 355 * agp_generic_bind_memory() since that function can sleep. 356 */ 357 mutex_init(&sc->as_mtx, MUTEX_DEFAULT, IPL_NONE); 358 359 TAILQ_INIT(&sc->as_memory); 360 361 ret = (*ap->ap_attach)(parent, self, pa); 362 if (ret == 0) 363 aprint_normal(": aperture at 0x%lx, size 0x%lx\n", 364 (unsigned long)sc->as_apaddr, 365 (unsigned long)AGP_GET_APERTURE(sc)); 366 else 367 sc->as_chipc = NULL; 368 369 if (!device_pmf_is_registered(self)) { 370 if (!pmf_device_register(self, NULL, agp_resume)) 371 aprint_error_dev(self, "couldn't establish power " 372 "handler\n"); 373 } 374 } 375 376 CFATTACH_DECL_NEW(agp, sizeof(struct agp_softc), 377 agpmatch, agpattach, NULL, NULL); 378 379 int 380 agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 381 { 382 /* 383 * Find the aperture. Don't map it (yet), this would 384 * eat KVA. 385 */ 386 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 387 PCI_MAPREG_TYPE_MEM, &sc->as_apaddr, &sc->as_apsize, 388 &sc->as_apflags) != 0) 389 return ENXIO; 390 391 sc->as_apt = pa->pa_memt; 392 393 return 0; 394 } 395 396 struct agp_gatt * 397 agp_alloc_gatt(struct agp_softc *sc) 398 { 399 u_int32_t apsize = AGP_GET_APERTURE(sc); 400 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 401 struct agp_gatt *gatt; 402 void *virtual; 403 int dummyseg; 404 405 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 406 if (!gatt) 407 return NULL; 408 gatt->ag_entries = entries; 409 410 if (agp_alloc_dmamem(sc->as_dmat, entries * sizeof(u_int32_t), 411 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 412 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 413 free(gatt, M_AGP); 414 return NULL; 415 } 416 gatt->ag_virtual = (uint32_t *)virtual; 417 418 gatt->ag_size = entries * sizeof(u_int32_t); 419 memset(gatt->ag_virtual, 0, gatt->ag_size); 420 agp_flush_cache(); 421 422 return gatt; 423 } 424 425 void 426 agp_free_gatt(struct agp_softc *sc, struct agp_gatt *gatt) 427 { 428 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 429 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 430 free(gatt, M_AGP); 431 } 432 433 434 int 435 agp_generic_detach(struct agp_softc *sc) 436 { 437 mutex_destroy(&sc->as_mtx); 438 agp_flush_cache(); 439 return 0; 440 } 441 442 static int 443 agpdev_match(struct pci_attach_args *pa) 444 { 445 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 446 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 447 if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, 448 NULL, NULL)) 449 return 1; 450 451 return 0; 452 } 453 454 int 455 agp_generic_enable(struct agp_softc *sc, u_int32_t mode) 456 { 457 struct pci_attach_args pa; 458 pcireg_t tstatus, mstatus; 459 pcireg_t command; 460 int rq, sba, fw, rate, capoff; 461 462 if (pci_find_device(&pa, agpdev_match) == 0 || 463 pci_get_capability(pa.pa_pc, pa.pa_tag, PCI_CAP_AGP, 464 &capoff, NULL) == 0) { 465 aprint_error_dev(sc->as_dev, "can't find display\n"); 466 return ENXIO; 467 } 468 469 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 470 sc->as_capoff + AGP_STATUS); 471 mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag, 472 capoff + AGP_STATUS); 473 474 /* Set RQ to the min of mode, tstatus and mstatus */ 475 rq = AGP_MODE_GET_RQ(mode); 476 if (AGP_MODE_GET_RQ(tstatus) < rq) 477 rq = AGP_MODE_GET_RQ(tstatus); 478 if (AGP_MODE_GET_RQ(mstatus) < rq) 479 rq = AGP_MODE_GET_RQ(mstatus); 480 481 /* Set SBA if all three can deal with SBA */ 482 sba = (AGP_MODE_GET_SBA(tstatus) 483 & AGP_MODE_GET_SBA(mstatus) 484 & AGP_MODE_GET_SBA(mode)); 485 486 /* Similar for FW */ 487 fw = (AGP_MODE_GET_FW(tstatus) 488 & AGP_MODE_GET_FW(mstatus) 489 & AGP_MODE_GET_FW(mode)); 490 491 /* Figure out the max rate */ 492 rate = (AGP_MODE_GET_RATE(tstatus) 493 & AGP_MODE_GET_RATE(mstatus) 494 & AGP_MODE_GET_RATE(mode)); 495 if (rate & AGP_MODE_RATE_4x) 496 rate = AGP_MODE_RATE_4x; 497 else if (rate & AGP_MODE_RATE_2x) 498 rate = AGP_MODE_RATE_2x; 499 else 500 rate = AGP_MODE_RATE_1x; 501 502 /* Construct the new mode word and tell the hardware */ 503 command = AGP_MODE_SET_RQ(0, rq); 504 command = AGP_MODE_SET_SBA(command, sba); 505 command = AGP_MODE_SET_FW(command, fw); 506 command = AGP_MODE_SET_RATE(command, rate); 507 command = AGP_MODE_SET_AGP(command, 1); 508 pci_conf_write(sc->as_pc, sc->as_tag, 509 sc->as_capoff + AGP_COMMAND, command); 510 pci_conf_write(pa.pa_pc, pa.pa_tag, capoff + AGP_COMMAND, command); 511 512 return 0; 513 } 514 515 struct agp_memory * 516 agp_generic_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 517 { 518 struct agp_memory *mem; 519 520 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 521 return 0; 522 523 if (sc->as_allocated + size > sc->as_maxmem) 524 return 0; 525 526 if (type != 0) { 527 printf("agp_generic_alloc_memory: unsupported type %d\n", 528 type); 529 return 0; 530 } 531 532 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 533 if (mem == NULL) 534 return NULL; 535 536 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 537 size, 0, BUS_DMA_NOWAIT, &mem->am_dmamap) != 0) { 538 free(mem, M_AGP); 539 return NULL; 540 } 541 542 mem->am_id = sc->as_nextid++; 543 mem->am_size = size; 544 mem->am_type = 0; 545 mem->am_physical = 0; 546 mem->am_offset = 0; 547 mem->am_is_bound = 0; 548 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 549 sc->as_allocated += size; 550 551 return mem; 552 } 553 554 int 555 agp_generic_free_memory(struct agp_softc *sc, struct agp_memory *mem) 556 { 557 if (mem->am_is_bound) 558 return EBUSY; 559 560 sc->as_allocated -= mem->am_size; 561 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 562 bus_dmamap_destroy(sc->as_dmat, mem->am_dmamap); 563 free(mem, M_AGP); 564 return 0; 565 } 566 567 int 568 agp_generic_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 569 off_t offset) 570 { 571 off_t i, k; 572 bus_size_t done, j; 573 int error; 574 bus_dma_segment_t *segs, *seg; 575 bus_addr_t pa; 576 int contigpages, nseg; 577 578 mutex_enter(&sc->as_mtx); 579 580 if (mem->am_is_bound) { 581 aprint_error_dev(sc->as_dev, "memory already bound\n"); 582 mutex_exit(&sc->as_mtx); 583 return EINVAL; 584 } 585 586 if (offset < 0 587 || (offset & (AGP_PAGE_SIZE - 1)) != 0 588 || offset + mem->am_size > AGP_GET_APERTURE(sc)) { 589 aprint_error_dev(sc->as_dev, 590 "binding memory at bad offset %#lx\n", 591 (unsigned long) offset); 592 mutex_exit(&sc->as_mtx); 593 return EINVAL; 594 } 595 596 /* 597 * XXXfvdl 598 * The memory here needs to be directly accessable from the 599 * AGP video card, so it should be allocated using bus_dma. 600 * However, it need not be contiguous, since individual pages 601 * are translated using the GATT. 602 * 603 * Using a large chunk of contiguous memory may get in the way 604 * of other subsystems that may need one, so we try to be friendly 605 * and ask for allocation in chunks of a minimum of 8 pages 606 * of contiguous memory on average, falling back to 4, 2 and 1 607 * if really needed. Larger chunks are preferred, since allocating 608 * a bus_dma_segment per page would be overkill. 609 */ 610 611 for (contigpages = 8; contigpages > 0; contigpages >>= 1) { 612 nseg = (mem->am_size / (contigpages * PAGE_SIZE)) + 1; 613 segs = malloc(nseg * sizeof *segs, M_AGP, M_WAITOK); 614 if (segs == NULL) { 615 mutex_exit(&sc->as_mtx); 616 return ENOMEM; 617 } 618 if (bus_dmamem_alloc(sc->as_dmat, mem->am_size, PAGE_SIZE, 0, 619 segs, nseg, &mem->am_nseg, 620 contigpages > 1 ? 621 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) != 0) { 622 free(segs, M_AGP); 623 continue; 624 } 625 if (bus_dmamem_map(sc->as_dmat, segs, mem->am_nseg, 626 mem->am_size, &mem->am_virtual, BUS_DMA_WAITOK) != 0) { 627 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 628 free(segs, M_AGP); 629 continue; 630 } 631 if (bus_dmamap_load(sc->as_dmat, mem->am_dmamap, 632 mem->am_virtual, mem->am_size, NULL, BUS_DMA_WAITOK) != 0) { 633 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 634 mem->am_size); 635 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 636 free(segs, M_AGP); 637 continue; 638 } 639 mem->am_dmaseg = segs; 640 break; 641 } 642 643 if (contigpages == 0) { 644 mutex_exit(&sc->as_mtx); 645 return ENOMEM; 646 } 647 648 649 /* 650 * Bind the individual pages and flush the chipset's 651 * TLB. 652 */ 653 done = 0; 654 for (i = 0; i < mem->am_dmamap->dm_nsegs; i++) { 655 seg = &mem->am_dmamap->dm_segs[i]; 656 /* 657 * Install entries in the GATT, making sure that if 658 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 659 * aligned to PAGE_SIZE, we don't modify too many GATT 660 * entries. 661 */ 662 for (j = 0; j < seg->ds_len && (done + j) < mem->am_size; 663 j += AGP_PAGE_SIZE) { 664 pa = seg->ds_addr + j; 665 AGP_DPF(("binding offset %#lx to pa %#lx\n", 666 (unsigned long)(offset + done + j), 667 (unsigned long)pa)); 668 error = AGP_BIND_PAGE(sc, offset + done + j, pa); 669 if (error) { 670 /* 671 * Bail out. Reverse all the mappings 672 * and unwire the pages. 673 */ 674 for (k = 0; k < done + j; k += AGP_PAGE_SIZE) 675 AGP_UNBIND_PAGE(sc, offset + k); 676 677 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 678 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 679 mem->am_size); 680 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, 681 mem->am_nseg); 682 free(mem->am_dmaseg, M_AGP); 683 mutex_exit(&sc->as_mtx); 684 return error; 685 } 686 } 687 done += seg->ds_len; 688 } 689 690 /* 691 * Flush the CPU cache since we are providing a new mapping 692 * for these pages. 693 */ 694 agp_flush_cache(); 695 696 /* 697 * Make sure the chipset gets the new mappings. 698 */ 699 AGP_FLUSH_TLB(sc); 700 701 mem->am_offset = offset; 702 mem->am_is_bound = 1; 703 704 mutex_exit(&sc->as_mtx); 705 706 return 0; 707 } 708 709 int 710 agp_generic_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 711 { 712 int i; 713 714 mutex_enter(&sc->as_mtx); 715 716 if (!mem->am_is_bound) { 717 aprint_error_dev(sc->as_dev, "memory is not bound\n"); 718 mutex_exit(&sc->as_mtx); 719 return EINVAL; 720 } 721 722 723 /* 724 * Unbind the individual pages and flush the chipset's 725 * TLB. Unwire the pages so they can be swapped. 726 */ 727 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 728 AGP_UNBIND_PAGE(sc, mem->am_offset + i); 729 730 agp_flush_cache(); 731 AGP_FLUSH_TLB(sc); 732 733 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 734 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, mem->am_size); 735 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, mem->am_nseg); 736 737 free(mem->am_dmaseg, M_AGP); 738 739 mem->am_offset = 0; 740 mem->am_is_bound = 0; 741 742 mutex_exit(&sc->as_mtx); 743 744 return 0; 745 } 746 747 /* Helper functions for implementing user/kernel api */ 748 749 static int 750 agp_acquire_helper(struct agp_softc *sc, enum agp_acquire_state state) 751 { 752 if (sc->as_state != AGP_ACQUIRE_FREE) 753 return EBUSY; 754 sc->as_state = state; 755 756 return 0; 757 } 758 759 static int 760 agp_release_helper(struct agp_softc *sc, enum agp_acquire_state state) 761 { 762 763 if (sc->as_state == AGP_ACQUIRE_FREE) 764 return 0; 765 766 if (sc->as_state != state) 767 return EBUSY; 768 769 sc->as_state = AGP_ACQUIRE_FREE; 770 return 0; 771 } 772 773 static struct agp_memory * 774 agp_find_memory(struct agp_softc *sc, int id) 775 { 776 struct agp_memory *mem; 777 778 AGP_DPF(("searching for memory block %d\n", id)); 779 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 780 AGP_DPF(("considering memory block %d\n", mem->am_id)); 781 if (mem->am_id == id) 782 return mem; 783 } 784 return 0; 785 } 786 787 /* Implementation of the userland ioctl api */ 788 789 static int 790 agp_info_user(struct agp_softc *sc, agp_info *info) 791 { 792 memset(info, 0, sizeof *info); 793 info->bridge_id = sc->as_id; 794 if (sc->as_capoff != 0) 795 info->agp_mode = pci_conf_read(sc->as_pc, sc->as_tag, 796 sc->as_capoff + AGP_STATUS); 797 else 798 info->agp_mode = 0; /* i810 doesn't have real AGP */ 799 info->aper_base = sc->as_apaddr; 800 info->aper_size = AGP_GET_APERTURE(sc) >> 20; 801 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 802 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 803 804 return 0; 805 } 806 807 static int 808 agp_setup_user(struct agp_softc *sc, agp_setup *setup) 809 { 810 return AGP_ENABLE(sc, setup->agp_mode); 811 } 812 813 static int 814 agp_allocate_user(struct agp_softc *sc, agp_allocate *alloc) 815 { 816 struct agp_memory *mem; 817 818 mem = AGP_ALLOC_MEMORY(sc, 819 alloc->type, 820 alloc->pg_count << AGP_PAGE_SHIFT); 821 if (mem) { 822 alloc->key = mem->am_id; 823 alloc->physical = mem->am_physical; 824 return 0; 825 } else { 826 return ENOMEM; 827 } 828 } 829 830 static int 831 agp_deallocate_user(struct agp_softc *sc, int id) 832 { 833 struct agp_memory *mem = agp_find_memory(sc, id); 834 835 if (mem) { 836 AGP_FREE_MEMORY(sc, mem); 837 return 0; 838 } else { 839 return ENOENT; 840 } 841 } 842 843 static int 844 agp_bind_user(struct agp_softc *sc, agp_bind *bind) 845 { 846 struct agp_memory *mem = agp_find_memory(sc, bind->key); 847 848 if (!mem) 849 return ENOENT; 850 851 return AGP_BIND_MEMORY(sc, mem, bind->pg_start << AGP_PAGE_SHIFT); 852 } 853 854 static int 855 agp_unbind_user(struct agp_softc *sc, agp_unbind *unbind) 856 { 857 struct agp_memory *mem = agp_find_memory(sc, unbind->key); 858 859 if (!mem) 860 return ENOENT; 861 862 return AGP_UNBIND_MEMORY(sc, mem); 863 } 864 865 static int 866 agpopen(dev_t dev, int oflags, int devtype, struct lwp *l) 867 { 868 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 869 870 if (sc == NULL) 871 return ENXIO; 872 873 if (sc->as_chipc == NULL) 874 return ENXIO; 875 876 if (!sc->as_isopen) 877 sc->as_isopen = 1; 878 else 879 return EBUSY; 880 881 return 0; 882 } 883 884 static int 885 agpclose(dev_t dev, int fflag, int devtype, struct lwp *l) 886 { 887 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 888 struct agp_memory *mem; 889 890 if (sc == NULL) 891 return ENODEV; 892 893 /* 894 * Clear the GATT and force release on last close 895 */ 896 if (sc->as_state == AGP_ACQUIRE_USER) { 897 while ((mem = TAILQ_FIRST(&sc->as_memory))) { 898 if (mem->am_is_bound) { 899 printf("agpclose: mem %d is bound\n", 900 mem->am_id); 901 AGP_UNBIND_MEMORY(sc, mem); 902 } 903 /* 904 * XXX it is not documented, but if the protocol allows 905 * allocate->acquire->bind, it would be possible that 906 * memory ranges are allocated by the kernel here, 907 * which we shouldn't free. We'd have to keep track of 908 * the memory range's owner. 909 * The kernel API is unsed yet, so we get away with 910 * freeing all. 911 */ 912 AGP_FREE_MEMORY(sc, mem); 913 } 914 agp_release_helper(sc, AGP_ACQUIRE_USER); 915 } 916 sc->as_isopen = 0; 917 918 return 0; 919 } 920 921 static int 922 agpioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *l) 923 { 924 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 925 926 if (sc == NULL) 927 return ENODEV; 928 929 if ((fflag & FWRITE) == 0 && cmd != AGPIOC_INFO) 930 return EPERM; 931 932 switch (cmd) { 933 case AGPIOC_INFO: 934 return agp_info_user(sc, (agp_info *) data); 935 936 case AGPIOC_ACQUIRE: 937 return agp_acquire_helper(sc, AGP_ACQUIRE_USER); 938 939 case AGPIOC_RELEASE: 940 return agp_release_helper(sc, AGP_ACQUIRE_USER); 941 942 case AGPIOC_SETUP: 943 return agp_setup_user(sc, (agp_setup *)data); 944 945 #ifdef __x86_64__ 946 { 947 /* 948 * Handle paddr_t change from 32 bit for non PAE kernels 949 * to 64 bit. 950 */ 951 #define AGPIOC_OALLOCATE _IOWR(AGPIOC_BASE, 6, agp_oallocate) 952 953 typedef struct _agp_oallocate { 954 int key; /* tag of allocation */ 955 size_t pg_count; /* number of pages */ 956 uint32_t type; /* 0 == normal, other devspec */ 957 u_long physical; /* device specific (some devices 958 * need a phys address of the 959 * actual page behind the gatt 960 * table) */ 961 } agp_oallocate; 962 963 case AGPIOC_OALLOCATE: { 964 int ret; 965 agp_allocate aga; 966 agp_oallocate *oaga = data; 967 968 aga.type = oaga->type; 969 aga.pg_count = oaga->pg_count; 970 971 if ((ret = agp_allocate_user(sc, &aga)) == 0) { 972 oaga->key = aga.key; 973 oaga->physical = (u_long)aga.physical; 974 } 975 976 return ret; 977 } 978 } 979 #endif 980 case AGPIOC_ALLOCATE: 981 return agp_allocate_user(sc, (agp_allocate *)data); 982 983 case AGPIOC_DEALLOCATE: 984 return agp_deallocate_user(sc, *(int *) data); 985 986 case AGPIOC_BIND: 987 return agp_bind_user(sc, (agp_bind *)data); 988 989 case AGPIOC_UNBIND: 990 return agp_unbind_user(sc, (agp_unbind *)data); 991 992 } 993 994 return EINVAL; 995 } 996 997 static paddr_t 998 agpmmap(dev_t dev, off_t offset, int prot) 999 { 1000 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1001 1002 if (sc == NULL) 1003 return ENODEV; 1004 1005 if (offset > AGP_GET_APERTURE(sc)) 1006 return -1; 1007 1008 return (bus_space_mmap(sc->as_apt, sc->as_apaddr, offset, prot, 1009 BUS_SPACE_MAP_LINEAR)); 1010 } 1011 1012 const struct cdevsw agp_cdevsw = { 1013 agpopen, agpclose, noread, nowrite, agpioctl, 1014 nostop, notty, nopoll, agpmmap, nokqfilter, D_OTHER 1015 }; 1016 1017 /* Implementation of the kernel api */ 1018 1019 void * 1020 agp_find_device(int unit) 1021 { 1022 return device_lookup_private(&agp_cd, unit); 1023 } 1024 1025 enum agp_acquire_state 1026 agp_state(void *devcookie) 1027 { 1028 struct agp_softc *sc = devcookie; 1029 1030 return sc->as_state; 1031 } 1032 1033 void 1034 agp_get_info(void *devcookie, struct agp_info *info) 1035 { 1036 struct agp_softc *sc = devcookie; 1037 1038 info->ai_mode = pci_conf_read(sc->as_pc, sc->as_tag, 1039 sc->as_capoff + AGP_STATUS); 1040 info->ai_aperture_base = sc->as_apaddr; 1041 info->ai_aperture_size = sc->as_apsize; /* XXXfvdl inconsistent */ 1042 info->ai_memory_allowed = sc->as_maxmem; 1043 info->ai_memory_used = sc->as_allocated; 1044 } 1045 1046 int 1047 agp_acquire(void *dev) 1048 { 1049 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 1050 } 1051 1052 int 1053 agp_release(void *dev) 1054 { 1055 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 1056 } 1057 1058 int 1059 agp_enable(void *dev, u_int32_t mode) 1060 { 1061 struct agp_softc *sc = dev; 1062 1063 return AGP_ENABLE(sc, mode); 1064 } 1065 1066 void * 1067 agp_alloc_memory(void *dev, int type, vsize_t bytes) 1068 { 1069 struct agp_softc *sc = dev; 1070 1071 return (void *)AGP_ALLOC_MEMORY(sc, type, bytes); 1072 } 1073 1074 void 1075 agp_free_memory(void *dev, void *handle) 1076 { 1077 struct agp_softc *sc = dev; 1078 struct agp_memory *mem = handle; 1079 1080 AGP_FREE_MEMORY(sc, mem); 1081 } 1082 1083 int 1084 agp_bind_memory(void *dev, void *handle, off_t offset) 1085 { 1086 struct agp_softc *sc = dev; 1087 struct agp_memory *mem = handle; 1088 1089 return AGP_BIND_MEMORY(sc, mem, offset); 1090 } 1091 1092 int 1093 agp_unbind_memory(void *dev, void *handle) 1094 { 1095 struct agp_softc *sc = dev; 1096 struct agp_memory *mem = handle; 1097 1098 return AGP_UNBIND_MEMORY(sc, mem); 1099 } 1100 1101 void 1102 agp_memory_info(void *dev, void *handle, struct agp_memory_info *mi) 1103 { 1104 struct agp_memory *mem = handle; 1105 1106 mi->ami_size = mem->am_size; 1107 mi->ami_physical = mem->am_physical; 1108 mi->ami_offset = mem->am_offset; 1109 mi->ami_is_bound = mem->am_is_bound; 1110 } 1111 1112 int 1113 agp_alloc_dmamem(bus_dma_tag_t tag, size_t size, int flags, 1114 bus_dmamap_t *mapp, void **vaddr, bus_addr_t *baddr, 1115 bus_dma_segment_t *seg, int nseg, int *rseg) 1116 1117 { 1118 int error, level = 0; 1119 1120 if ((error = bus_dmamem_alloc(tag, size, PAGE_SIZE, 0, 1121 seg, nseg, rseg, BUS_DMA_NOWAIT)) != 0) 1122 goto out; 1123 level++; 1124 1125 if ((error = bus_dmamem_map(tag, seg, *rseg, size, vaddr, 1126 BUS_DMA_NOWAIT | flags)) != 0) 1127 goto out; 1128 level++; 1129 1130 if ((error = bus_dmamap_create(tag, size, *rseg, size, 0, 1131 BUS_DMA_NOWAIT, mapp)) != 0) 1132 goto out; 1133 level++; 1134 1135 if ((error = bus_dmamap_load(tag, *mapp, *vaddr, size, NULL, 1136 BUS_DMA_NOWAIT)) != 0) 1137 goto out; 1138 1139 *baddr = (*mapp)->dm_segs[0].ds_addr; 1140 1141 return 0; 1142 out: 1143 switch (level) { 1144 case 3: 1145 bus_dmamap_destroy(tag, *mapp); 1146 /* FALLTHROUGH */ 1147 case 2: 1148 bus_dmamem_unmap(tag, *vaddr, size); 1149 /* FALLTHROUGH */ 1150 case 1: 1151 bus_dmamem_free(tag, seg, *rseg); 1152 break; 1153 default: 1154 break; 1155 } 1156 1157 return error; 1158 } 1159 1160 void 1161 agp_free_dmamem(bus_dma_tag_t tag, size_t size, bus_dmamap_t map, 1162 void *vaddr, bus_dma_segment_t *seg, int nseg) 1163 { 1164 bus_dmamap_unload(tag, map); 1165 bus_dmamap_destroy(tag, map); 1166 bus_dmamem_unmap(tag, vaddr, size); 1167 bus_dmamem_free(tag, seg, nseg); 1168 } 1169 1170 static bool 1171 agp_resume(device_t dv, const pmf_qual_t *qual) 1172 { 1173 agp_flush_cache(); 1174 1175 return true; 1176 } 1177
Indexes created Tue Oct 14 11:09:46 GMT 2025