agp.c revision 1.79
1 /* $NetBSD: agp.c,v 1.79 2011/04/04 20:37:56 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/pci/agp.c,v 1.12 2001/05/19 01:28:07 alfred Exp $ 29 */ 30 31 /* 32 * Copyright (c) 2001 Wasabi Systems, Inc. 33 * All rights reserved. 34 * 35 * Written by Frank van der Linden for Wasabi Systems, Inc. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed for the NetBSD Project by 48 * Wasabi Systems, Inc. 49 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 50 * or promote products derived from this software without specific prior 51 * written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.79 2011/04/04 20:37:56 dyoung Exp $"); 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/malloc.h> 73 #include <sys/kernel.h> 74 #include <sys/device.h> 75 #include <sys/conf.h> 76 #include <sys/ioctl.h> 77 #include <sys/fcntl.h> 78 #include <sys/agpio.h> 79 #include <sys/proc.h> 80 #include <sys/mutex.h> 81 82 #include <dev/pci/pcireg.h> 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/agpvar.h> 85 #include <dev/pci/agpreg.h> 86 #include <dev/pci/pcidevs.h> 87 88 #include <sys/bus.h> 89 90 MALLOC_DEFINE(M_AGP, "AGP", "AGP memory"); 91 92 /* Helper functions for implementing chipset mini drivers. */ 93 /* XXXfvdl get rid of this one. */ 94 95 extern struct cfdriver agp_cd; 96 97 static int agp_info_user(struct agp_softc *, agp_info *); 98 static int agp_setup_user(struct agp_softc *, agp_setup *); 99 static int agp_allocate_user(struct agp_softc *, agp_allocate *); 100 static int agp_deallocate_user(struct agp_softc *, int); 101 static int agp_bind_user(struct agp_softc *, agp_bind *); 102 static int agp_unbind_user(struct agp_softc *, agp_unbind *); 103 static int agp_generic_enable_v2(struct agp_softc *, 104 const struct pci_attach_args *, int, u_int32_t); 105 static int agp_generic_enable_v3(struct agp_softc *, 106 const struct pci_attach_args *, int, u_int32_t); 107 static int agpdev_match(const struct pci_attach_args *); 108 static bool agp_resume(device_t, const pmf_qual_t *); 109 110 #include "agp_ali.h" 111 #include "agp_amd.h" 112 #include "agp_i810.h" 113 #include "agp_intel.h" 114 #include "agp_sis.h" 115 #include "agp_via.h" 116 #include "agp_amd64.h" 117 118 const struct agp_product { 119 uint32_t ap_vendor; 120 uint32_t ap_product; 121 int (*ap_match)(const struct pci_attach_args *); 122 int (*ap_attach)(device_t, device_t, void *); 123 } agp_products[] = { 124 #if NAGP_AMD64 > 0 125 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1689, 126 agp_amd64_match, agp_amd64_attach }, 127 #endif 128 129 #if NAGP_ALI > 0 130 { PCI_VENDOR_ALI, -1, 131 NULL, agp_ali_attach }, 132 #endif 133 134 #if NAGP_AMD64 > 0 135 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_DEV, 136 agp_amd64_match, agp_amd64_attach }, 137 #endif 138 139 #if NAGP_AMD > 0 140 { PCI_VENDOR_AMD, -1, 141 agp_amd_match, agp_amd_attach }, 142 #endif 143 144 #if NAGP_I810 > 0 145 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_MCH, 146 NULL, agp_i810_attach }, 147 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_MCH, 148 NULL, agp_i810_attach }, 149 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_MCH, 150 NULL, agp_i810_attach }, 151 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_HUB, 152 NULL, agp_i810_attach }, 153 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_HB, 154 NULL, agp_i810_attach }, 155 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_1, 156 NULL, agp_i810_attach }, 157 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_DRAM, 158 NULL, agp_i810_attach }, 159 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MCH, 160 NULL, agp_i810_attach }, 161 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_HB, 162 NULL, agp_i810_attach }, 163 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB, 164 NULL, agp_i810_attach }, 165 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB, 166 NULL, agp_i810_attach }, 167 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_MCH, 168 NULL, agp_i810_attach }, 169 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_HB, 170 NULL, agp_i810_attach }, 171 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_HB, 172 NULL, agp_i810_attach }, 173 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HB, 174 NULL, agp_i810_attach }, 175 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_HB, 176 NULL, agp_i810_attach }, 177 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_HB, 178 NULL, agp_i810_attach }, 179 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_HB, 180 NULL, agp_i810_attach }, 181 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_HB, 182 NULL, agp_i810_attach }, 183 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_HB, 184 NULL, agp_i810_attach }, 185 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HB, 186 NULL, agp_i810_attach }, 187 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_HB, 188 NULL, agp_i810_attach }, 189 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_HB, 190 NULL, agp_i810_attach }, 191 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_HB, 192 NULL, agp_i810_attach }, 193 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HB, 194 NULL, agp_i810_attach }, 195 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_HB, 196 NULL, agp_i810_attach }, 197 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_HB, 198 NULL, agp_i810_attach }, 199 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_HB, 200 NULL, agp_i810_attach }, 201 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_HB, 202 NULL, agp_i810_attach }, 203 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_HB, 204 NULL, agp_i810_attach }, 205 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_HB, 206 NULL, agp_i810_attach }, 207 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_HB, 208 NULL, agp_i810_attach }, 209 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MA_HB, 210 NULL, agp_i810_attach }, 211 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MC2_HB, 212 NULL, agp_i810_attach }, 213 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_HB, 214 NULL, agp_i810_attach }, 215 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_M_HB, 216 NULL, agp_i810_attach }, 217 #endif 218 219 #if NAGP_INTEL > 0 220 { PCI_VENDOR_INTEL, -1, 221 NULL, agp_intel_attach }, 222 #endif 223 224 #if NAGP_AMD64 > 0 225 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCHB, 226 agp_amd64_match, agp_amd64_attach }, 227 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCHB, 228 agp_amd64_match, agp_amd64_attach }, 229 #endif 230 231 #if NAGP_AMD64 > 0 232 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_755, 233 agp_amd64_match, agp_amd64_attach }, 234 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_760, 235 agp_amd64_match, agp_amd64_attach }, 236 #endif 237 238 #if NAGP_SIS > 0 239 { PCI_VENDOR_SIS, -1, 240 NULL, agp_sis_attach }, 241 #endif 242 243 #if NAGP_AMD64 > 0 244 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M800_0, 245 agp_amd64_match, agp_amd64_attach }, 246 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_0, 247 agp_amd64_match, agp_amd64_attach }, 248 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_0, 249 agp_amd64_match, agp_amd64_attach }, 250 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB, 251 agp_amd64_match, agp_amd64_attach }, 252 #endif 253 254 #if NAGP_VIA > 0 255 { PCI_VENDOR_VIATECH, -1, 256 NULL, agp_via_attach }, 257 #endif 258 259 { 0, 0, 260 NULL, NULL }, 261 }; 262 263 static const struct agp_product * 264 agp_lookup(const struct pci_attach_args *pa) 265 { 266 const struct agp_product *ap; 267 268 /* First find the vendor. */ 269 for (ap = agp_products; ap->ap_attach != NULL; ap++) { 270 if (PCI_VENDOR(pa->pa_id) == ap->ap_vendor) 271 break; 272 } 273 274 if (ap->ap_attach == NULL) 275 return (NULL); 276 277 /* Now find the product within the vendor's domain. */ 278 for (; ap->ap_attach != NULL; ap++) { 279 if (PCI_VENDOR(pa->pa_id) != ap->ap_vendor) { 280 /* Ran out of this vendor's section of the table. */ 281 return (NULL); 282 } 283 if (ap->ap_product == PCI_PRODUCT(pa->pa_id)) { 284 /* Exact match. */ 285 break; 286 } 287 if (ap->ap_product == (uint32_t) -1) { 288 /* Wildcard match. */ 289 break; 290 } 291 } 292 293 if (ap->ap_attach == NULL) 294 return (NULL); 295 296 /* Now let the product-specific driver filter the match. */ 297 if (ap->ap_match != NULL && (*ap->ap_match)(pa) == 0) 298 return (NULL); 299 300 return (ap); 301 } 302 303 static int 304 agpmatch(device_t parent, cfdata_t match, void *aux) 305 { 306 struct agpbus_attach_args *apa = aux; 307 struct pci_attach_args *pa = &apa->apa_pci_args; 308 309 if (agp_lookup(pa) == NULL) 310 return (0); 311 312 return (1); 313 } 314 315 static const int agp_max[][2] = { 316 {0, 0}, 317 {32, 4}, 318 {64, 28}, 319 {128, 96}, 320 {256, 204}, 321 {512, 440}, 322 {1024, 942}, 323 {2048, 1920}, 324 {4096, 3932} 325 }; 326 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 327 328 static void 329 agpattach(device_t parent, device_t self, void *aux) 330 { 331 struct agpbus_attach_args *apa = aux; 332 struct pci_attach_args *pa = &apa->apa_pci_args; 333 struct agp_softc *sc = device_private(self); 334 const struct agp_product *ap; 335 int memsize, i, ret; 336 337 ap = agp_lookup(pa); 338 KASSERT(ap != NULL); 339 340 aprint_naive(": AGP controller\n"); 341 342 sc->as_dev = self; 343 sc->as_dmat = pa->pa_dmat; 344 sc->as_pc = pa->pa_pc; 345 sc->as_tag = pa->pa_tag; 346 sc->as_id = pa->pa_id; 347 348 /* 349 * Work out an upper bound for agp memory allocation. This 350 * uses a heuristic table from the Linux driver. 351 */ 352 memsize = physmem >> (20 - PAGE_SHIFT); /* memsize is in MB */ 353 for (i = 0; i < agp_max_size; i++) { 354 if (memsize <= agp_max[i][0]) 355 break; 356 } 357 if (i == agp_max_size) 358 i = agp_max_size - 1; 359 sc->as_maxmem = agp_max[i][1] << 20U; 360 361 /* 362 * The mutex is used to prevent re-entry to 363 * agp_generic_bind_memory() since that function can sleep. 364 */ 365 mutex_init(&sc->as_mtx, MUTEX_DEFAULT, IPL_NONE); 366 367 TAILQ_INIT(&sc->as_memory); 368 369 ret = (*ap->ap_attach)(parent, self, pa); 370 if (ret == 0) 371 aprint_normal(": aperture at 0x%lx, size 0x%lx\n", 372 (unsigned long)sc->as_apaddr, 373 (unsigned long)AGP_GET_APERTURE(sc)); 374 else 375 sc->as_chipc = NULL; 376 377 if (!device_pmf_is_registered(self)) { 378 if (!pmf_device_register(self, NULL, agp_resume)) 379 aprint_error_dev(self, "couldn't establish power " 380 "handler\n"); 381 } 382 } 383 384 CFATTACH_DECL_NEW(agp, sizeof(struct agp_softc), 385 agpmatch, agpattach, NULL, NULL); 386 387 int 388 agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 389 { 390 /* 391 * Find the aperture. Don't map it (yet), this would 392 * eat KVA. 393 */ 394 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 395 PCI_MAPREG_TYPE_MEM, &sc->as_apaddr, &sc->as_apsize, 396 &sc->as_apflags) != 0) 397 return ENXIO; 398 399 sc->as_apt = pa->pa_memt; 400 401 return 0; 402 } 403 404 struct agp_gatt * 405 agp_alloc_gatt(struct agp_softc *sc) 406 { 407 u_int32_t apsize = AGP_GET_APERTURE(sc); 408 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 409 struct agp_gatt *gatt; 410 void *virtual; 411 int dummyseg; 412 413 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 414 if (!gatt) 415 return NULL; 416 gatt->ag_entries = entries; 417 418 if (agp_alloc_dmamem(sc->as_dmat, entries * sizeof(u_int32_t), 419 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 420 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 421 free(gatt, M_AGP); 422 return NULL; 423 } 424 gatt->ag_virtual = (uint32_t *)virtual; 425 426 gatt->ag_size = entries * sizeof(u_int32_t); 427 memset(gatt->ag_virtual, 0, gatt->ag_size); 428 agp_flush_cache(); 429 430 return gatt; 431 } 432 433 void 434 agp_free_gatt(struct agp_softc *sc, struct agp_gatt *gatt) 435 { 436 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 437 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 438 free(gatt, M_AGP); 439 } 440 441 442 int 443 agp_generic_detach(struct agp_softc *sc) 444 { 445 mutex_destroy(&sc->as_mtx); 446 agp_flush_cache(); 447 return 0; 448 } 449 450 static int 451 agpdev_match(const struct pci_attach_args *pa) 452 { 453 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 454 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 455 if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, 456 NULL, NULL)) 457 return 1; 458 459 return 0; 460 } 461 462 int 463 agp_generic_enable(struct agp_softc *sc, u_int32_t mode) 464 { 465 struct pci_attach_args pa; 466 pcireg_t tstatus, mstatus; 467 int capoff; 468 469 if (pci_find_device(&pa, agpdev_match) == 0 || 470 pci_get_capability(pa.pa_pc, pa.pa_tag, PCI_CAP_AGP, 471 &capoff, NULL) == 0) { 472 aprint_error_dev(sc->as_dev, "can't find display\n"); 473 return ENXIO; 474 } 475 476 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 477 sc->as_capoff + AGP_STATUS); 478 mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag, 479 capoff + AGP_STATUS); 480 481 if (AGP_MODE_GET_MODE_3(mode) && 482 AGP_MODE_GET_MODE_3(tstatus) && 483 AGP_MODE_GET_MODE_3(mstatus)) 484 return agp_generic_enable_v3(sc, &pa, capoff, mode); 485 else 486 return agp_generic_enable_v2(sc, &pa, capoff, mode); 487 } 488 489 static int 490 agp_generic_enable_v2(struct agp_softc *sc, const struct pci_attach_args *pa, 491 int capoff, u_int32_t mode) 492 { 493 pcireg_t tstatus, mstatus; 494 pcireg_t command; 495 int rq, sba, fw, rate; 496 497 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 498 sc->as_capoff + AGP_STATUS); 499 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 500 capoff + AGP_STATUS); 501 502 /* Set RQ to the min of mode, tstatus and mstatus */ 503 rq = AGP_MODE_GET_RQ(mode); 504 if (AGP_MODE_GET_RQ(tstatus) < rq) 505 rq = AGP_MODE_GET_RQ(tstatus); 506 if (AGP_MODE_GET_RQ(mstatus) < rq) 507 rq = AGP_MODE_GET_RQ(mstatus); 508 509 /* Set SBA if all three can deal with SBA */ 510 sba = (AGP_MODE_GET_SBA(tstatus) 511 & AGP_MODE_GET_SBA(mstatus) 512 & AGP_MODE_GET_SBA(mode)); 513 514 /* Similar for FW */ 515 fw = (AGP_MODE_GET_FW(tstatus) 516 & AGP_MODE_GET_FW(mstatus) 517 & AGP_MODE_GET_FW(mode)); 518 519 /* Figure out the max rate */ 520 rate = (AGP_MODE_GET_RATE(tstatus) 521 & AGP_MODE_GET_RATE(mstatus) 522 & AGP_MODE_GET_RATE(mode)); 523 if (rate & AGP_MODE_V2_RATE_4x) 524 rate = AGP_MODE_V2_RATE_4x; 525 else if (rate & AGP_MODE_V2_RATE_2x) 526 rate = AGP_MODE_V2_RATE_2x; 527 else 528 rate = AGP_MODE_V2_RATE_1x; 529 530 /* Construct the new mode word and tell the hardware */ 531 command = AGP_MODE_SET_RQ(0, rq); 532 command = AGP_MODE_SET_SBA(command, sba); 533 command = AGP_MODE_SET_FW(command, fw); 534 command = AGP_MODE_SET_RATE(command, rate); 535 command = AGP_MODE_SET_AGP(command, 1); 536 pci_conf_write(sc->as_pc, sc->as_tag, 537 sc->as_capoff + AGP_COMMAND, command); 538 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + AGP_COMMAND, command); 539 540 return 0; 541 } 542 543 static int 544 agp_generic_enable_v3(struct agp_softc *sc, const struct pci_attach_args *pa, 545 int capoff, u_int32_t mode) 546 { 547 pcireg_t tstatus, mstatus; 548 pcireg_t command; 549 int rq, sba, fw, rate, arqsz, cal; 550 551 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 552 sc->as_capoff + AGP_STATUS); 553 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 554 capoff + AGP_STATUS); 555 556 /* Set RQ to the min of mode, tstatus and mstatus */ 557 rq = AGP_MODE_GET_RQ(mode); 558 if (AGP_MODE_GET_RQ(tstatus) < rq) 559 rq = AGP_MODE_GET_RQ(tstatus); 560 if (AGP_MODE_GET_RQ(mstatus) < rq) 561 rq = AGP_MODE_GET_RQ(mstatus); 562 563 /* 564 * ARQSZ - Set the value to the maximum one. 565 * Don't allow the mode register to override values. 566 */ 567 arqsz = AGP_MODE_GET_ARQSZ(mode); 568 if (AGP_MODE_GET_ARQSZ(tstatus) > arqsz) 569 arqsz = AGP_MODE_GET_ARQSZ(tstatus); 570 if (AGP_MODE_GET_ARQSZ(mstatus) > arqsz) 571 arqsz = AGP_MODE_GET_ARQSZ(mstatus); 572 573 /* Calibration cycle - don't allow override by mode register */ 574 cal = AGP_MODE_GET_CAL(tstatus); 575 if (AGP_MODE_GET_CAL(mstatus) < cal) 576 cal = AGP_MODE_GET_CAL(mstatus); 577 578 /* SBA must be supported for AGP v3. */ 579 sba = 1; 580 581 /* Set FW if all three support it. */ 582 fw = (AGP_MODE_GET_FW(tstatus) 583 & AGP_MODE_GET_FW(mstatus) 584 & AGP_MODE_GET_FW(mode)); 585 586 /* Figure out the max rate */ 587 rate = (AGP_MODE_GET_RATE(tstatus) 588 & AGP_MODE_GET_RATE(mstatus) 589 & AGP_MODE_GET_RATE(mode)); 590 if (rate & AGP_MODE_V3_RATE_8x) 591 rate = AGP_MODE_V3_RATE_8x; 592 else 593 rate = AGP_MODE_V3_RATE_4x; 594 595 /* Construct the new mode word and tell the hardware */ 596 command = AGP_MODE_SET_RQ(0, rq); 597 command = AGP_MODE_SET_ARQSZ(command, arqsz); 598 command = AGP_MODE_SET_CAL(command, cal); 599 command = AGP_MODE_SET_SBA(command, sba); 600 command = AGP_MODE_SET_FW(command, fw); 601 command = AGP_MODE_SET_RATE(command, rate); 602 command = AGP_MODE_SET_AGP(command, 1); 603 pci_conf_write(sc->as_pc, sc->as_tag, 604 sc->as_capoff + AGP_COMMAND, command); 605 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + AGP_COMMAND, command); 606 607 return 0; 608 } 609 610 struct agp_memory * 611 agp_generic_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 612 { 613 struct agp_memory *mem; 614 615 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 616 return 0; 617 618 if (sc->as_allocated + size > sc->as_maxmem) 619 return 0; 620 621 if (type != 0) { 622 printf("agp_generic_alloc_memory: unsupported type %d\n", 623 type); 624 return 0; 625 } 626 627 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 628 if (mem == NULL) 629 return NULL; 630 631 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 632 size, 0, BUS_DMA_NOWAIT, &mem->am_dmamap) != 0) { 633 free(mem, M_AGP); 634 return NULL; 635 } 636 637 mem->am_id = sc->as_nextid++; 638 mem->am_size = size; 639 mem->am_type = 0; 640 mem->am_physical = 0; 641 mem->am_offset = 0; 642 mem->am_is_bound = 0; 643 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 644 sc->as_allocated += size; 645 646 return mem; 647 } 648 649 int 650 agp_generic_free_memory(struct agp_softc *sc, struct agp_memory *mem) 651 { 652 if (mem->am_is_bound) 653 return EBUSY; 654 655 sc->as_allocated -= mem->am_size; 656 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 657 bus_dmamap_destroy(sc->as_dmat, mem->am_dmamap); 658 free(mem, M_AGP); 659 return 0; 660 } 661 662 int 663 agp_generic_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 664 off_t offset) 665 { 666 off_t i, k; 667 bus_size_t done, j; 668 int error; 669 bus_dma_segment_t *segs, *seg; 670 bus_addr_t pa; 671 int contigpages, nseg; 672 673 mutex_enter(&sc->as_mtx); 674 675 if (mem->am_is_bound) { 676 aprint_error_dev(sc->as_dev, "memory already bound\n"); 677 mutex_exit(&sc->as_mtx); 678 return EINVAL; 679 } 680 681 if (offset < 0 682 || (offset & (AGP_PAGE_SIZE - 1)) != 0 683 || offset + mem->am_size > AGP_GET_APERTURE(sc)) { 684 aprint_error_dev(sc->as_dev, 685 "binding memory at bad offset %#lx\n", 686 (unsigned long) offset); 687 mutex_exit(&sc->as_mtx); 688 return EINVAL; 689 } 690 691 /* 692 * XXXfvdl 693 * The memory here needs to be directly accessable from the 694 * AGP video card, so it should be allocated using bus_dma. 695 * However, it need not be contiguous, since individual pages 696 * are translated using the GATT. 697 * 698 * Using a large chunk of contiguous memory may get in the way 699 * of other subsystems that may need one, so we try to be friendly 700 * and ask for allocation in chunks of a minimum of 8 pages 701 * of contiguous memory on average, falling back to 4, 2 and 1 702 * if really needed. Larger chunks are preferred, since allocating 703 * a bus_dma_segment per page would be overkill. 704 */ 705 706 for (contigpages = 8; contigpages > 0; contigpages >>= 1) { 707 nseg = (mem->am_size / (contigpages * PAGE_SIZE)) + 1; 708 segs = malloc(nseg * sizeof *segs, M_AGP, M_WAITOK); 709 if (segs == NULL) { 710 mutex_exit(&sc->as_mtx); 711 return ENOMEM; 712 } 713 if (bus_dmamem_alloc(sc->as_dmat, mem->am_size, PAGE_SIZE, 0, 714 segs, nseg, &mem->am_nseg, 715 contigpages > 1 ? 716 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) != 0) { 717 free(segs, M_AGP); 718 continue; 719 } 720 if (bus_dmamem_map(sc->as_dmat, segs, mem->am_nseg, 721 mem->am_size, &mem->am_virtual, BUS_DMA_WAITOK) != 0) { 722 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 723 free(segs, M_AGP); 724 continue; 725 } 726 if (bus_dmamap_load(sc->as_dmat, mem->am_dmamap, 727 mem->am_virtual, mem->am_size, NULL, BUS_DMA_WAITOK) != 0) { 728 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 729 mem->am_size); 730 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 731 free(segs, M_AGP); 732 continue; 733 } 734 mem->am_dmaseg = segs; 735 break; 736 } 737 738 if (contigpages == 0) { 739 mutex_exit(&sc->as_mtx); 740 return ENOMEM; 741 } 742 743 744 /* 745 * Bind the individual pages and flush the chipset's 746 * TLB. 747 */ 748 done = 0; 749 for (i = 0; i < mem->am_dmamap->dm_nsegs; i++) { 750 seg = &mem->am_dmamap->dm_segs[i]; 751 /* 752 * Install entries in the GATT, making sure that if 753 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 754 * aligned to PAGE_SIZE, we don't modify too many GATT 755 * entries. 756 */ 757 for (j = 0; j < seg->ds_len && (done + j) < mem->am_size; 758 j += AGP_PAGE_SIZE) { 759 pa = seg->ds_addr + j; 760 AGP_DPF(("binding offset %#lx to pa %#lx\n", 761 (unsigned long)(offset + done + j), 762 (unsigned long)pa)); 763 error = AGP_BIND_PAGE(sc, offset + done + j, pa); 764 if (error) { 765 /* 766 * Bail out. Reverse all the mappings 767 * and unwire the pages. 768 */ 769 for (k = 0; k < done + j; k += AGP_PAGE_SIZE) 770 AGP_UNBIND_PAGE(sc, offset + k); 771 772 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 773 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 774 mem->am_size); 775 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, 776 mem->am_nseg); 777 free(mem->am_dmaseg, M_AGP); 778 mutex_exit(&sc->as_mtx); 779 return error; 780 } 781 } 782 done += seg->ds_len; 783 } 784 785 /* 786 * Flush the CPU cache since we are providing a new mapping 787 * for these pages. 788 */ 789 agp_flush_cache(); 790 791 /* 792 * Make sure the chipset gets the new mappings. 793 */ 794 AGP_FLUSH_TLB(sc); 795 796 mem->am_offset = offset; 797 mem->am_is_bound = 1; 798 799 mutex_exit(&sc->as_mtx); 800 801 return 0; 802 } 803 804 int 805 agp_generic_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 806 { 807 int i; 808 809 mutex_enter(&sc->as_mtx); 810 811 if (!mem->am_is_bound) { 812 aprint_error_dev(sc->as_dev, "memory is not bound\n"); 813 mutex_exit(&sc->as_mtx); 814 return EINVAL; 815 } 816 817 818 /* 819 * Unbind the individual pages and flush the chipset's 820 * TLB. Unwire the pages so they can be swapped. 821 */ 822 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 823 AGP_UNBIND_PAGE(sc, mem->am_offset + i); 824 825 agp_flush_cache(); 826 AGP_FLUSH_TLB(sc); 827 828 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 829 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, mem->am_size); 830 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, mem->am_nseg); 831 832 free(mem->am_dmaseg, M_AGP); 833 834 mem->am_offset = 0; 835 mem->am_is_bound = 0; 836 837 mutex_exit(&sc->as_mtx); 838 839 return 0; 840 } 841 842 /* Helper functions for implementing user/kernel api */ 843 844 static int 845 agp_acquire_helper(struct agp_softc *sc, enum agp_acquire_state state) 846 { 847 if (sc->as_state != AGP_ACQUIRE_FREE) 848 return EBUSY; 849 sc->as_state = state; 850 851 return 0; 852 } 853 854 static int 855 agp_release_helper(struct agp_softc *sc, enum agp_acquire_state state) 856 { 857 858 if (sc->as_state == AGP_ACQUIRE_FREE) 859 return 0; 860 861 if (sc->as_state != state) 862 return EBUSY; 863 864 sc->as_state = AGP_ACQUIRE_FREE; 865 return 0; 866 } 867 868 static struct agp_memory * 869 agp_find_memory(struct agp_softc *sc, int id) 870 { 871 struct agp_memory *mem; 872 873 AGP_DPF(("searching for memory block %d\n", id)); 874 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 875 AGP_DPF(("considering memory block %d\n", mem->am_id)); 876 if (mem->am_id == id) 877 return mem; 878 } 879 return 0; 880 } 881 882 /* Implementation of the userland ioctl api */ 883 884 static int 885 agp_info_user(struct agp_softc *sc, agp_info *info) 886 { 887 memset(info, 0, sizeof *info); 888 info->bridge_id = sc->as_id; 889 if (sc->as_capoff != 0) 890 info->agp_mode = pci_conf_read(sc->as_pc, sc->as_tag, 891 sc->as_capoff + AGP_STATUS); 892 else 893 info->agp_mode = 0; /* i810 doesn't have real AGP */ 894 info->aper_base = sc->as_apaddr; 895 info->aper_size = AGP_GET_APERTURE(sc) >> 20; 896 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 897 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 898 899 return 0; 900 } 901 902 static int 903 agp_setup_user(struct agp_softc *sc, agp_setup *setup) 904 { 905 return AGP_ENABLE(sc, setup->agp_mode); 906 } 907 908 static int 909 agp_allocate_user(struct agp_softc *sc, agp_allocate *alloc) 910 { 911 struct agp_memory *mem; 912 913 mem = AGP_ALLOC_MEMORY(sc, 914 alloc->type, 915 alloc->pg_count << AGP_PAGE_SHIFT); 916 if (mem) { 917 alloc->key = mem->am_id; 918 alloc->physical = mem->am_physical; 919 return 0; 920 } else { 921 return ENOMEM; 922 } 923 } 924 925 static int 926 agp_deallocate_user(struct agp_softc *sc, int id) 927 { 928 struct agp_memory *mem = agp_find_memory(sc, id); 929 930 if (mem) { 931 AGP_FREE_MEMORY(sc, mem); 932 return 0; 933 } else { 934 return ENOENT; 935 } 936 } 937 938 static int 939 agp_bind_user(struct agp_softc *sc, agp_bind *bind) 940 { 941 struct agp_memory *mem = agp_find_memory(sc, bind->key); 942 943 if (!mem) 944 return ENOENT; 945 946 return AGP_BIND_MEMORY(sc, mem, bind->pg_start << AGP_PAGE_SHIFT); 947 } 948 949 static int 950 agp_unbind_user(struct agp_softc *sc, agp_unbind *unbind) 951 { 952 struct agp_memory *mem = agp_find_memory(sc, unbind->key); 953 954 if (!mem) 955 return ENOENT; 956 957 return AGP_UNBIND_MEMORY(sc, mem); 958 } 959 960 static int 961 agpopen(dev_t dev, int oflags, int devtype, struct lwp *l) 962 { 963 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 964 965 if (sc == NULL) 966 return ENXIO; 967 968 if (sc->as_chipc == NULL) 969 return ENXIO; 970 971 if (!sc->as_isopen) 972 sc->as_isopen = 1; 973 else 974 return EBUSY; 975 976 return 0; 977 } 978 979 static int 980 agpclose(dev_t dev, int fflag, int devtype, struct lwp *l) 981 { 982 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 983 struct agp_memory *mem; 984 985 if (sc == NULL) 986 return ENODEV; 987 988 /* 989 * Clear the GATT and force release on last close 990 */ 991 if (sc->as_state == AGP_ACQUIRE_USER) { 992 while ((mem = TAILQ_FIRST(&sc->as_memory))) { 993 if (mem->am_is_bound) { 994 printf("agpclose: mem %d is bound\n", 995 mem->am_id); 996 AGP_UNBIND_MEMORY(sc, mem); 997 } 998 /* 999 * XXX it is not documented, but if the protocol allows 1000 * allocate->acquire->bind, it would be possible that 1001 * memory ranges are allocated by the kernel here, 1002 * which we shouldn't free. We'd have to keep track of 1003 * the memory range's owner. 1004 * The kernel API is unsed yet, so we get away with 1005 * freeing all. 1006 */ 1007 AGP_FREE_MEMORY(sc, mem); 1008 } 1009 agp_release_helper(sc, AGP_ACQUIRE_USER); 1010 } 1011 sc->as_isopen = 0; 1012 1013 return 0; 1014 } 1015 1016 static int 1017 agpioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *l) 1018 { 1019 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1020 1021 if (sc == NULL) 1022 return ENODEV; 1023 1024 if ((fflag & FWRITE) == 0 && cmd != AGPIOC_INFO) 1025 return EPERM; 1026 1027 switch (cmd) { 1028 case AGPIOC_INFO: 1029 return agp_info_user(sc, (agp_info *) data); 1030 1031 case AGPIOC_ACQUIRE: 1032 return agp_acquire_helper(sc, AGP_ACQUIRE_USER); 1033 1034 case AGPIOC_RELEASE: 1035 return agp_release_helper(sc, AGP_ACQUIRE_USER); 1036 1037 case AGPIOC_SETUP: 1038 return agp_setup_user(sc, (agp_setup *)data); 1039 1040 #ifdef __x86_64__ 1041 { 1042 /* 1043 * Handle paddr_t change from 32 bit for non PAE kernels 1044 * to 64 bit. 1045 */ 1046 #define AGPIOC_OALLOCATE _IOWR(AGPIOC_BASE, 6, agp_oallocate) 1047 1048 typedef struct _agp_oallocate { 1049 int key; /* tag of allocation */ 1050 size_t pg_count; /* number of pages */ 1051 uint32_t type; /* 0 == normal, other devspec */ 1052 u_long physical; /* device specific (some devices 1053 * need a phys address of the 1054 * actual page behind the gatt 1055 * table) */ 1056 } agp_oallocate; 1057 1058 case AGPIOC_OALLOCATE: { 1059 int ret; 1060 agp_allocate aga; 1061 agp_oallocate *oaga = data; 1062 1063 aga.type = oaga->type; 1064 aga.pg_count = oaga->pg_count; 1065 1066 if ((ret = agp_allocate_user(sc, &aga)) == 0) { 1067 oaga->key = aga.key; 1068 oaga->physical = (u_long)aga.physical; 1069 } 1070 1071 return ret; 1072 } 1073 } 1074 #endif 1075 case AGPIOC_ALLOCATE: 1076 return agp_allocate_user(sc, (agp_allocate *)data); 1077 1078 case AGPIOC_DEALLOCATE: 1079 return agp_deallocate_user(sc, *(int *) data); 1080 1081 case AGPIOC_BIND: 1082 return agp_bind_user(sc, (agp_bind *)data); 1083 1084 case AGPIOC_UNBIND: 1085 return agp_unbind_user(sc, (agp_unbind *)data); 1086 1087 } 1088 1089 return EINVAL; 1090 } 1091 1092 static paddr_t 1093 agpmmap(dev_t dev, off_t offset, int prot) 1094 { 1095 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1096 1097 if (sc == NULL) 1098 return ENODEV; 1099 1100 if (offset > AGP_GET_APERTURE(sc)) 1101 return -1; 1102 1103 return (bus_space_mmap(sc->as_apt, sc->as_apaddr, offset, prot, 1104 BUS_SPACE_MAP_LINEAR)); 1105 } 1106 1107 const struct cdevsw agp_cdevsw = { 1108 agpopen, agpclose, noread, nowrite, agpioctl, 1109 nostop, notty, nopoll, agpmmap, nokqfilter, D_OTHER 1110 }; 1111 1112 /* Implementation of the kernel api */ 1113 1114 void * 1115 agp_find_device(int unit) 1116 { 1117 return device_lookup_private(&agp_cd, unit); 1118 } 1119 1120 enum agp_acquire_state 1121 agp_state(void *devcookie) 1122 { 1123 struct agp_softc *sc = devcookie; 1124 1125 return sc->as_state; 1126 } 1127 1128 void 1129 agp_get_info(void *devcookie, struct agp_info *info) 1130 { 1131 struct agp_softc *sc = devcookie; 1132 1133 info->ai_mode = pci_conf_read(sc->as_pc, sc->as_tag, 1134 sc->as_capoff + AGP_STATUS); 1135 info->ai_aperture_base = sc->as_apaddr; 1136 info->ai_aperture_size = sc->as_apsize; /* XXXfvdl inconsistent */ 1137 info->ai_memory_allowed = sc->as_maxmem; 1138 info->ai_memory_used = sc->as_allocated; 1139 } 1140 1141 int 1142 agp_acquire(void *dev) 1143 { 1144 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 1145 } 1146 1147 int 1148 agp_release(void *dev) 1149 { 1150 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 1151 } 1152 1153 int 1154 agp_enable(void *dev, u_int32_t mode) 1155 { 1156 struct agp_softc *sc = dev; 1157 1158 return AGP_ENABLE(sc, mode); 1159 } 1160 1161 void * 1162 agp_alloc_memory(void *dev, int type, vsize_t bytes) 1163 { 1164 struct agp_softc *sc = dev; 1165 1166 return (void *)AGP_ALLOC_MEMORY(sc, type, bytes); 1167 } 1168 1169 void 1170 agp_free_memory(void *dev, void *handle) 1171 { 1172 struct agp_softc *sc = dev; 1173 struct agp_memory *mem = handle; 1174 1175 AGP_FREE_MEMORY(sc, mem); 1176 } 1177 1178 int 1179 agp_bind_memory(void *dev, void *handle, off_t offset) 1180 { 1181 struct agp_softc *sc = dev; 1182 struct agp_memory *mem = handle; 1183 1184 return AGP_BIND_MEMORY(sc, mem, offset); 1185 } 1186 1187 int 1188 agp_unbind_memory(void *dev, void *handle) 1189 { 1190 struct agp_softc *sc = dev; 1191 struct agp_memory *mem = handle; 1192 1193 return AGP_UNBIND_MEMORY(sc, mem); 1194 } 1195 1196 void 1197 agp_memory_info(void *dev, void *handle, struct agp_memory_info *mi) 1198 { 1199 struct agp_memory *mem = handle; 1200 1201 mi->ami_size = mem->am_size; 1202 mi->ami_physical = mem->am_physical; 1203 mi->ami_offset = mem->am_offset; 1204 mi->ami_is_bound = mem->am_is_bound; 1205 } 1206 1207 int 1208 agp_alloc_dmamem(bus_dma_tag_t tag, size_t size, int flags, 1209 bus_dmamap_t *mapp, void **vaddr, bus_addr_t *baddr, 1210 bus_dma_segment_t *seg, int nseg, int *rseg) 1211 1212 { 1213 int error, level = 0; 1214 1215 if ((error = bus_dmamem_alloc(tag, size, PAGE_SIZE, 0, 1216 seg, nseg, rseg, BUS_DMA_NOWAIT)) != 0) 1217 goto out; 1218 level++; 1219 1220 if ((error = bus_dmamem_map(tag, seg, *rseg, size, vaddr, 1221 BUS_DMA_NOWAIT | flags)) != 0) 1222 goto out; 1223 level++; 1224 1225 if ((error = bus_dmamap_create(tag, size, *rseg, size, 0, 1226 BUS_DMA_NOWAIT, mapp)) != 0) 1227 goto out; 1228 level++; 1229 1230 if ((error = bus_dmamap_load(tag, *mapp, *vaddr, size, NULL, 1231 BUS_DMA_NOWAIT)) != 0) 1232 goto out; 1233 1234 *baddr = (*mapp)->dm_segs[0].ds_addr; 1235 1236 return 0; 1237 out: 1238 switch (level) { 1239 case 3: 1240 bus_dmamap_destroy(tag, *mapp); 1241 /* FALLTHROUGH */ 1242 case 2: 1243 bus_dmamem_unmap(tag, *vaddr, size); 1244 /* FALLTHROUGH */ 1245 case 1: 1246 bus_dmamem_free(tag, seg, *rseg); 1247 break; 1248 default: 1249 break; 1250 } 1251 1252 return error; 1253 } 1254 1255 void 1256 agp_free_dmamem(bus_dma_tag_t tag, size_t size, bus_dmamap_t map, 1257 void *vaddr, bus_dma_segment_t *seg, int nseg) 1258 { 1259 bus_dmamap_unload(tag, map); 1260 bus_dmamap_destroy(tag, map); 1261 bus_dmamem_unmap(tag, vaddr, size); 1262 bus_dmamem_free(tag, seg, nseg); 1263 } 1264 1265 static bool 1266 agp_resume(device_t dv, const pmf_qual_t *qual) 1267 { 1268 agp_flush_cache(); 1269 1270 return true; 1271 } 1272
Indexes created Wed Sep 24 02:09:48 GMT 2025