agp.c revision 1.81
1 /* $NetBSD: agp.c,v 1.81 2014/03/16 05:20:28 dholland Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/pci/agp.c,v 1.12 2001/05/19 01:28:07 alfred Exp $ 29 */ 30 31 /* 32 * Copyright (c) 2001 Wasabi Systems, Inc. 33 * All rights reserved. 34 * 35 * Written by Frank van der Linden for Wasabi Systems, Inc. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed for the NetBSD Project by 48 * Wasabi Systems, Inc. 49 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 50 * or promote products derived from this software without specific prior 51 * written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.81 2014/03/16 05:20:28 dholland Exp $"); 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/malloc.h> 73 #include <sys/kernel.h> 74 #include <sys/device.h> 75 #include <sys/conf.h> 76 #include <sys/ioctl.h> 77 #include <sys/fcntl.h> 78 #include <sys/agpio.h> 79 #include <sys/proc.h> 80 #include <sys/mutex.h> 81 82 #include <dev/pci/pcireg.h> 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/agpvar.h> 85 #include <dev/pci/agpreg.h> 86 #include <dev/pci/pcidevs.h> 87 88 #include <sys/bus.h> 89 90 MALLOC_DEFINE(M_AGP, "AGP", "AGP memory"); 91 92 /* Helper functions for implementing chipset mini drivers. */ 93 /* XXXfvdl get rid of this one. */ 94 95 extern struct cfdriver agp_cd; 96 97 static int agp_info_user(struct agp_softc *, agp_info *); 98 static int agp_setup_user(struct agp_softc *, agp_setup *); 99 static int agp_allocate_user(struct agp_softc *, agp_allocate *); 100 static int agp_deallocate_user(struct agp_softc *, int); 101 static int agp_bind_user(struct agp_softc *, agp_bind *); 102 static int agp_unbind_user(struct agp_softc *, agp_unbind *); 103 static int agp_generic_enable_v2(struct agp_softc *, 104 const struct pci_attach_args *, int, u_int32_t); 105 static int agp_generic_enable_v3(struct agp_softc *, 106 const struct pci_attach_args *, int, u_int32_t); 107 static int agpdev_match(const struct pci_attach_args *); 108 static bool agp_resume(device_t, const pmf_qual_t *); 109 110 #include "agp_ali.h" 111 #include "agp_amd.h" 112 #include "agp_i810.h" 113 #include "agp_intel.h" 114 #include "agp_sis.h" 115 #include "agp_via.h" 116 #include "agp_amd64.h" 117 118 const struct agp_product { 119 uint32_t ap_vendor; 120 uint32_t ap_product; 121 int (*ap_match)(const struct pci_attach_args *); 122 int (*ap_attach)(device_t, device_t, void *); 123 } agp_products[] = { 124 #if NAGP_AMD64 > 0 125 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1689, 126 agp_amd64_match, agp_amd64_attach }, 127 #endif 128 129 #if NAGP_ALI > 0 130 { PCI_VENDOR_ALI, -1, 131 NULL, agp_ali_attach }, 132 #endif 133 134 #if NAGP_AMD64 > 0 135 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_DEV, 136 agp_amd64_match, agp_amd64_attach }, 137 #endif 138 139 #if NAGP_AMD > 0 140 { PCI_VENDOR_AMD, -1, 141 agp_amd_match, agp_amd_attach }, 142 #endif 143 144 #if NAGP_I810 > 0 145 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_MCH, 146 NULL, agp_i810_attach }, 147 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_MCH, 148 NULL, agp_i810_attach }, 149 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_MCH, 150 NULL, agp_i810_attach }, 151 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_HUB, 152 NULL, agp_i810_attach }, 153 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_HB, 154 NULL, agp_i810_attach }, 155 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_1, 156 NULL, agp_i810_attach }, 157 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_DRAM, 158 NULL, agp_i810_attach }, 159 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MCH, 160 NULL, agp_i810_attach }, 161 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_HB, 162 NULL, agp_i810_attach }, 163 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB, 164 NULL, agp_i810_attach }, 165 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB, 166 NULL, agp_i810_attach }, 167 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_MCH, 168 NULL, agp_i810_attach }, 169 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_HB, 170 NULL, agp_i810_attach }, 171 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_HB, 172 NULL, agp_i810_attach }, 173 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HB, 174 NULL, agp_i810_attach }, 175 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_HB, 176 NULL, agp_i810_attach }, 177 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_HB, 178 NULL, agp_i810_attach }, 179 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_HB, 180 NULL, agp_i810_attach }, 181 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_HB, 182 NULL, agp_i810_attach }, 183 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_HB, 184 NULL, agp_i810_attach }, 185 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HB, 186 NULL, agp_i810_attach }, 187 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_HB, 188 NULL, agp_i810_attach }, 189 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_HB, 190 NULL, agp_i810_attach }, 191 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_HB, 192 NULL, agp_i810_attach }, 193 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HB, 194 NULL, agp_i810_attach }, 195 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_HB, 196 NULL, agp_i810_attach }, 197 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_HB, 198 NULL, agp_i810_attach }, 199 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_HB, 200 NULL, agp_i810_attach }, 201 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_HB, 202 NULL, agp_i810_attach }, 203 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_HB, 204 NULL, agp_i810_attach }, 205 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_HB, 206 NULL, agp_i810_attach }, 207 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_HB, 208 NULL, agp_i810_attach }, 209 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MA_HB, 210 NULL, agp_i810_attach }, 211 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MC2_HB, 212 NULL, agp_i810_attach }, 213 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_HB, 214 NULL, agp_i810_attach }, 215 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_M_HB, 216 NULL, agp_i810_attach }, 217 #endif 218 219 #if NAGP_INTEL > 0 220 { PCI_VENDOR_INTEL, -1, 221 NULL, agp_intel_attach }, 222 #endif 223 224 #if NAGP_AMD64 > 0 225 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCHB, 226 agp_amd64_match, agp_amd64_attach }, 227 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCHB, 228 agp_amd64_match, agp_amd64_attach }, 229 #endif 230 231 #if NAGP_AMD64 > 0 232 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_755, 233 agp_amd64_match, agp_amd64_attach }, 234 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_760, 235 agp_amd64_match, agp_amd64_attach }, 236 #endif 237 238 #if NAGP_SIS > 0 239 { PCI_VENDOR_SIS, -1, 240 NULL, agp_sis_attach }, 241 #endif 242 243 #if NAGP_AMD64 > 0 244 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M800_0, 245 agp_amd64_match, agp_amd64_attach }, 246 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_0, 247 agp_amd64_match, agp_amd64_attach }, 248 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_0, 249 agp_amd64_match, agp_amd64_attach }, 250 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB, 251 agp_amd64_match, agp_amd64_attach }, 252 #endif 253 254 #if NAGP_VIA > 0 255 { PCI_VENDOR_VIATECH, -1, 256 NULL, agp_via_attach }, 257 #endif 258 259 { 0, 0, 260 NULL, NULL }, 261 }; 262 263 static const struct agp_product * 264 agp_lookup(const struct pci_attach_args *pa) 265 { 266 const struct agp_product *ap; 267 268 /* First find the vendor. */ 269 for (ap = agp_products; ap->ap_attach != NULL; ap++) { 270 if (PCI_VENDOR(pa->pa_id) == ap->ap_vendor) 271 break; 272 } 273 274 if (ap->ap_attach == NULL) 275 return (NULL); 276 277 /* Now find the product within the vendor's domain. */ 278 for (; ap->ap_attach != NULL; ap++) { 279 if (PCI_VENDOR(pa->pa_id) != ap->ap_vendor) { 280 /* Ran out of this vendor's section of the table. */ 281 return (NULL); 282 } 283 if (ap->ap_product == PCI_PRODUCT(pa->pa_id)) { 284 /* Exact match. */ 285 break; 286 } 287 if (ap->ap_product == (uint32_t) -1) { 288 /* Wildcard match. */ 289 break; 290 } 291 } 292 293 if (ap->ap_attach == NULL) 294 return (NULL); 295 296 /* Now let the product-specific driver filter the match. */ 297 if (ap->ap_match != NULL && (*ap->ap_match)(pa) == 0) 298 return (NULL); 299 300 return (ap); 301 } 302 303 static int 304 agpmatch(device_t parent, cfdata_t match, void *aux) 305 { 306 struct agpbus_attach_args *apa = aux; 307 struct pci_attach_args *pa = &apa->apa_pci_args; 308 309 if (agp_lookup(pa) == NULL) 310 return (0); 311 312 return (1); 313 } 314 315 static const int agp_max[][2] = { 316 {0, 0}, 317 {32, 4}, 318 {64, 28}, 319 {128, 96}, 320 {256, 204}, 321 {512, 440}, 322 {1024, 942}, 323 {2048, 1920}, 324 {4096, 3932} 325 }; 326 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 327 328 static void 329 agpattach(device_t parent, device_t self, void *aux) 330 { 331 struct agpbus_attach_args *apa = aux; 332 struct pci_attach_args *pa = &apa->apa_pci_args; 333 struct agp_softc *sc = device_private(self); 334 const struct agp_product *ap; 335 int memsize, i, ret; 336 337 ap = agp_lookup(pa); 338 KASSERT(ap != NULL); 339 340 aprint_naive(": AGP controller\n"); 341 342 sc->as_dev = self; 343 sc->as_dmat = pa->pa_dmat; 344 sc->as_pc = pa->pa_pc; 345 sc->as_tag = pa->pa_tag; 346 sc->as_id = pa->pa_id; 347 348 /* 349 * Work out an upper bound for agp memory allocation. This 350 * uses a heuristic table from the Linux driver. 351 */ 352 memsize = physmem >> (20 - PAGE_SHIFT); /* memsize is in MB */ 353 for (i = 0; i < agp_max_size; i++) { 354 if (memsize <= agp_max[i][0]) 355 break; 356 } 357 if (i == agp_max_size) 358 i = agp_max_size - 1; 359 sc->as_maxmem = agp_max[i][1] << 20U; 360 361 /* 362 * The mutex is used to prevent re-entry to 363 * agp_generic_bind_memory() since that function can sleep. 364 */ 365 mutex_init(&sc->as_mtx, MUTEX_DEFAULT, IPL_NONE); 366 367 TAILQ_INIT(&sc->as_memory); 368 369 ret = (*ap->ap_attach)(parent, self, pa); 370 if (ret == 0) 371 aprint_normal(": aperture at 0x%lx, size 0x%lx\n", 372 (unsigned long)sc->as_apaddr, 373 (unsigned long)AGP_GET_APERTURE(sc)); 374 else 375 sc->as_chipc = NULL; 376 377 if (!pmf_device_register(self, NULL, agp_resume)) 378 aprint_error_dev(self, "couldn't establish power handler\n"); 379 } 380 381 CFATTACH_DECL_NEW(agp, sizeof(struct agp_softc), 382 agpmatch, agpattach, NULL, NULL); 383 384 int 385 agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 386 { 387 /* 388 * Find the aperture. Don't map it (yet), this would 389 * eat KVA. 390 */ 391 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 392 PCI_MAPREG_TYPE_MEM, &sc->as_apaddr, &sc->as_apsize, 393 &sc->as_apflags) != 0) 394 return ENXIO; 395 396 sc->as_apt = pa->pa_memt; 397 398 return 0; 399 } 400 401 struct agp_gatt * 402 agp_alloc_gatt(struct agp_softc *sc) 403 { 404 u_int32_t apsize = AGP_GET_APERTURE(sc); 405 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 406 struct agp_gatt *gatt; 407 void *virtual; 408 int dummyseg; 409 410 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 411 if (!gatt) 412 return NULL; 413 gatt->ag_entries = entries; 414 415 if (agp_alloc_dmamem(sc->as_dmat, entries * sizeof(u_int32_t), 416 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 417 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 418 free(gatt, M_AGP); 419 return NULL; 420 } 421 gatt->ag_virtual = (uint32_t *)virtual; 422 423 gatt->ag_size = entries * sizeof(u_int32_t); 424 memset(gatt->ag_virtual, 0, gatt->ag_size); 425 agp_flush_cache(); 426 427 return gatt; 428 } 429 430 void 431 agp_free_gatt(struct agp_softc *sc, struct agp_gatt *gatt) 432 { 433 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 434 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 435 free(gatt, M_AGP); 436 } 437 438 439 int 440 agp_generic_detach(struct agp_softc *sc) 441 { 442 mutex_destroy(&sc->as_mtx); 443 agp_flush_cache(); 444 return 0; 445 } 446 447 static int 448 agpdev_match(const struct pci_attach_args *pa) 449 { 450 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 451 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 452 if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, 453 NULL, NULL)) 454 return 1; 455 456 return 0; 457 } 458 459 int 460 agp_generic_enable(struct agp_softc *sc, u_int32_t mode) 461 { 462 struct pci_attach_args pa; 463 pcireg_t tstatus, mstatus; 464 int capoff; 465 466 if (pci_find_device(&pa, agpdev_match) == 0 || 467 pci_get_capability(pa.pa_pc, pa.pa_tag, PCI_CAP_AGP, 468 &capoff, NULL) == 0) { 469 aprint_error_dev(sc->as_dev, "can't find display\n"); 470 return ENXIO; 471 } 472 473 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 474 sc->as_capoff + AGP_STATUS); 475 mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag, 476 capoff + AGP_STATUS); 477 478 if (AGP_MODE_GET_MODE_3(mode) && 479 AGP_MODE_GET_MODE_3(tstatus) && 480 AGP_MODE_GET_MODE_3(mstatus)) 481 return agp_generic_enable_v3(sc, &pa, capoff, mode); 482 else 483 return agp_generic_enable_v2(sc, &pa, capoff, mode); 484 } 485 486 static int 487 agp_generic_enable_v2(struct agp_softc *sc, const struct pci_attach_args *pa, 488 int capoff, u_int32_t mode) 489 { 490 pcireg_t tstatus, mstatus; 491 pcireg_t command; 492 int rq, sba, fw, rate; 493 494 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 495 sc->as_capoff + AGP_STATUS); 496 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 497 capoff + AGP_STATUS); 498 499 /* Set RQ to the min of mode, tstatus and mstatus */ 500 rq = AGP_MODE_GET_RQ(mode); 501 if (AGP_MODE_GET_RQ(tstatus) < rq) 502 rq = AGP_MODE_GET_RQ(tstatus); 503 if (AGP_MODE_GET_RQ(mstatus) < rq) 504 rq = AGP_MODE_GET_RQ(mstatus); 505 506 /* Set SBA if all three can deal with SBA */ 507 sba = (AGP_MODE_GET_SBA(tstatus) 508 & AGP_MODE_GET_SBA(mstatus) 509 & AGP_MODE_GET_SBA(mode)); 510 511 /* Similar for FW */ 512 fw = (AGP_MODE_GET_FW(tstatus) 513 & AGP_MODE_GET_FW(mstatus) 514 & AGP_MODE_GET_FW(mode)); 515 516 /* Figure out the max rate */ 517 rate = (AGP_MODE_GET_RATE(tstatus) 518 & AGP_MODE_GET_RATE(mstatus) 519 & AGP_MODE_GET_RATE(mode)); 520 if (rate & AGP_MODE_V2_RATE_4x) 521 rate = AGP_MODE_V2_RATE_4x; 522 else if (rate & AGP_MODE_V2_RATE_2x) 523 rate = AGP_MODE_V2_RATE_2x; 524 else 525 rate = AGP_MODE_V2_RATE_1x; 526 527 /* Construct the new mode word and tell the hardware */ 528 command = AGP_MODE_SET_RQ(0, rq); 529 command = AGP_MODE_SET_SBA(command, sba); 530 command = AGP_MODE_SET_FW(command, fw); 531 command = AGP_MODE_SET_RATE(command, rate); 532 command = AGP_MODE_SET_AGP(command, 1); 533 pci_conf_write(sc->as_pc, sc->as_tag, 534 sc->as_capoff + AGP_COMMAND, command); 535 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + AGP_COMMAND, command); 536 537 return 0; 538 } 539 540 static int 541 agp_generic_enable_v3(struct agp_softc *sc, const struct pci_attach_args *pa, 542 int capoff, u_int32_t mode) 543 { 544 pcireg_t tstatus, mstatus; 545 pcireg_t command; 546 int rq, sba, fw, rate, arqsz, cal; 547 548 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 549 sc->as_capoff + AGP_STATUS); 550 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 551 capoff + AGP_STATUS); 552 553 /* Set RQ to the min of mode, tstatus and mstatus */ 554 rq = AGP_MODE_GET_RQ(mode); 555 if (AGP_MODE_GET_RQ(tstatus) < rq) 556 rq = AGP_MODE_GET_RQ(tstatus); 557 if (AGP_MODE_GET_RQ(mstatus) < rq) 558 rq = AGP_MODE_GET_RQ(mstatus); 559 560 /* 561 * ARQSZ - Set the value to the maximum one. 562 * Don't allow the mode register to override values. 563 */ 564 arqsz = AGP_MODE_GET_ARQSZ(mode); 565 if (AGP_MODE_GET_ARQSZ(tstatus) > arqsz) 566 arqsz = AGP_MODE_GET_ARQSZ(tstatus); 567 if (AGP_MODE_GET_ARQSZ(mstatus) > arqsz) 568 arqsz = AGP_MODE_GET_ARQSZ(mstatus); 569 570 /* Calibration cycle - don't allow override by mode register */ 571 cal = AGP_MODE_GET_CAL(tstatus); 572 if (AGP_MODE_GET_CAL(mstatus) < cal) 573 cal = AGP_MODE_GET_CAL(mstatus); 574 575 /* SBA must be supported for AGP v3. */ 576 sba = 1; 577 578 /* Set FW if all three support it. */ 579 fw = (AGP_MODE_GET_FW(tstatus) 580 & AGP_MODE_GET_FW(mstatus) 581 & AGP_MODE_GET_FW(mode)); 582 583 /* Figure out the max rate */ 584 rate = (AGP_MODE_GET_RATE(tstatus) 585 & AGP_MODE_GET_RATE(mstatus) 586 & AGP_MODE_GET_RATE(mode)); 587 if (rate & AGP_MODE_V3_RATE_8x) 588 rate = AGP_MODE_V3_RATE_8x; 589 else 590 rate = AGP_MODE_V3_RATE_4x; 591 592 /* Construct the new mode word and tell the hardware */ 593 command = AGP_MODE_SET_RQ(0, rq); 594 command = AGP_MODE_SET_ARQSZ(command, arqsz); 595 command = AGP_MODE_SET_CAL(command, cal); 596 command = AGP_MODE_SET_SBA(command, sba); 597 command = AGP_MODE_SET_FW(command, fw); 598 command = AGP_MODE_SET_RATE(command, rate); 599 command = AGP_MODE_SET_AGP(command, 1); 600 pci_conf_write(sc->as_pc, sc->as_tag, 601 sc->as_capoff + AGP_COMMAND, command); 602 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + AGP_COMMAND, command); 603 604 return 0; 605 } 606 607 struct agp_memory * 608 agp_generic_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 609 { 610 struct agp_memory *mem; 611 612 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 613 return 0; 614 615 if (sc->as_allocated + size > sc->as_maxmem) 616 return 0; 617 618 if (type != 0) { 619 printf("agp_generic_alloc_memory: unsupported type %d\n", 620 type); 621 return 0; 622 } 623 624 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 625 if (mem == NULL) 626 return NULL; 627 628 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 629 size, 0, BUS_DMA_NOWAIT, &mem->am_dmamap) != 0) { 630 free(mem, M_AGP); 631 return NULL; 632 } 633 634 mem->am_id = sc->as_nextid++; 635 mem->am_size = size; 636 mem->am_type = 0; 637 mem->am_physical = 0; 638 mem->am_offset = 0; 639 mem->am_is_bound = 0; 640 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 641 sc->as_allocated += size; 642 643 return mem; 644 } 645 646 int 647 agp_generic_free_memory(struct agp_softc *sc, struct agp_memory *mem) 648 { 649 if (mem->am_is_bound) 650 return EBUSY; 651 652 sc->as_allocated -= mem->am_size; 653 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 654 bus_dmamap_destroy(sc->as_dmat, mem->am_dmamap); 655 free(mem, M_AGP); 656 return 0; 657 } 658 659 int 660 agp_generic_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 661 off_t offset) 662 { 663 off_t i, k; 664 bus_size_t done, j; 665 int error; 666 bus_dma_segment_t *segs, *seg; 667 bus_addr_t pa; 668 int contigpages, nseg; 669 670 mutex_enter(&sc->as_mtx); 671 672 if (mem->am_is_bound) { 673 aprint_error_dev(sc->as_dev, "memory already bound\n"); 674 mutex_exit(&sc->as_mtx); 675 return EINVAL; 676 } 677 678 if (offset < 0 679 || (offset & (AGP_PAGE_SIZE - 1)) != 0 680 || offset + mem->am_size > AGP_GET_APERTURE(sc)) { 681 aprint_error_dev(sc->as_dev, 682 "binding memory at bad offset %#lx\n", 683 (unsigned long) offset); 684 mutex_exit(&sc->as_mtx); 685 return EINVAL; 686 } 687 688 /* 689 * XXXfvdl 690 * The memory here needs to be directly accessable from the 691 * AGP video card, so it should be allocated using bus_dma. 692 * However, it need not be contiguous, since individual pages 693 * are translated using the GATT. 694 * 695 * Using a large chunk of contiguous memory may get in the way 696 * of other subsystems that may need one, so we try to be friendly 697 * and ask for allocation in chunks of a minimum of 8 pages 698 * of contiguous memory on average, falling back to 4, 2 and 1 699 * if really needed. Larger chunks are preferred, since allocating 700 * a bus_dma_segment per page would be overkill. 701 */ 702 703 for (contigpages = 8; contigpages > 0; contigpages >>= 1) { 704 nseg = (mem->am_size / (contigpages * PAGE_SIZE)) + 1; 705 segs = malloc(nseg * sizeof *segs, M_AGP, M_WAITOK); 706 if (segs == NULL) { 707 mutex_exit(&sc->as_mtx); 708 return ENOMEM; 709 } 710 if (bus_dmamem_alloc(sc->as_dmat, mem->am_size, PAGE_SIZE, 0, 711 segs, nseg, &mem->am_nseg, 712 contigpages > 1 ? 713 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) != 0) { 714 free(segs, M_AGP); 715 continue; 716 } 717 if (bus_dmamem_map(sc->as_dmat, segs, mem->am_nseg, 718 mem->am_size, &mem->am_virtual, BUS_DMA_WAITOK) != 0) { 719 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 720 free(segs, M_AGP); 721 continue; 722 } 723 if (bus_dmamap_load(sc->as_dmat, mem->am_dmamap, 724 mem->am_virtual, mem->am_size, NULL, BUS_DMA_WAITOK) != 0) { 725 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 726 mem->am_size); 727 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 728 free(segs, M_AGP); 729 continue; 730 } 731 mem->am_dmaseg = segs; 732 break; 733 } 734 735 if (contigpages == 0) { 736 mutex_exit(&sc->as_mtx); 737 return ENOMEM; 738 } 739 740 741 /* 742 * Bind the individual pages and flush the chipset's 743 * TLB. 744 */ 745 done = 0; 746 for (i = 0; i < mem->am_dmamap->dm_nsegs; i++) { 747 seg = &mem->am_dmamap->dm_segs[i]; 748 /* 749 * Install entries in the GATT, making sure that if 750 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 751 * aligned to PAGE_SIZE, we don't modify too many GATT 752 * entries. 753 */ 754 for (j = 0; j < seg->ds_len && (done + j) < mem->am_size; 755 j += AGP_PAGE_SIZE) { 756 pa = seg->ds_addr + j; 757 AGP_DPF(("binding offset %#lx to pa %#lx\n", 758 (unsigned long)(offset + done + j), 759 (unsigned long)pa)); 760 error = AGP_BIND_PAGE(sc, offset + done + j, pa); 761 if (error) { 762 /* 763 * Bail out. Reverse all the mappings 764 * and unwire the pages. 765 */ 766 for (k = 0; k < done + j; k += AGP_PAGE_SIZE) 767 AGP_UNBIND_PAGE(sc, offset + k); 768 769 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 770 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 771 mem->am_size); 772 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, 773 mem->am_nseg); 774 free(mem->am_dmaseg, M_AGP); 775 mutex_exit(&sc->as_mtx); 776 return error; 777 } 778 } 779 done += seg->ds_len; 780 } 781 782 /* 783 * Flush the CPU cache since we are providing a new mapping 784 * for these pages. 785 */ 786 agp_flush_cache(); 787 788 /* 789 * Make sure the chipset gets the new mappings. 790 */ 791 AGP_FLUSH_TLB(sc); 792 793 mem->am_offset = offset; 794 mem->am_is_bound = 1; 795 796 mutex_exit(&sc->as_mtx); 797 798 return 0; 799 } 800 801 int 802 agp_generic_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 803 { 804 int i; 805 806 mutex_enter(&sc->as_mtx); 807 808 if (!mem->am_is_bound) { 809 aprint_error_dev(sc->as_dev, "memory is not bound\n"); 810 mutex_exit(&sc->as_mtx); 811 return EINVAL; 812 } 813 814 815 /* 816 * Unbind the individual pages and flush the chipset's 817 * TLB. Unwire the pages so they can be swapped. 818 */ 819 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 820 AGP_UNBIND_PAGE(sc, mem->am_offset + i); 821 822 agp_flush_cache(); 823 AGP_FLUSH_TLB(sc); 824 825 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 826 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, mem->am_size); 827 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, mem->am_nseg); 828 829 free(mem->am_dmaseg, M_AGP); 830 831 mem->am_offset = 0; 832 mem->am_is_bound = 0; 833 834 mutex_exit(&sc->as_mtx); 835 836 return 0; 837 } 838 839 /* Helper functions for implementing user/kernel api */ 840 841 static int 842 agp_acquire_helper(struct agp_softc *sc, enum agp_acquire_state state) 843 { 844 if (sc->as_state != AGP_ACQUIRE_FREE) 845 return EBUSY; 846 sc->as_state = state; 847 848 return 0; 849 } 850 851 static int 852 agp_release_helper(struct agp_softc *sc, enum agp_acquire_state state) 853 { 854 855 if (sc->as_state == AGP_ACQUIRE_FREE) 856 return 0; 857 858 if (sc->as_state != state) 859 return EBUSY; 860 861 sc->as_state = AGP_ACQUIRE_FREE; 862 return 0; 863 } 864 865 static struct agp_memory * 866 agp_find_memory(struct agp_softc *sc, int id) 867 { 868 struct agp_memory *mem; 869 870 AGP_DPF(("searching for memory block %d\n", id)); 871 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 872 AGP_DPF(("considering memory block %d\n", mem->am_id)); 873 if (mem->am_id == id) 874 return mem; 875 } 876 return 0; 877 } 878 879 /* Implementation of the userland ioctl api */ 880 881 static int 882 agp_info_user(struct agp_softc *sc, agp_info *info) 883 { 884 memset(info, 0, sizeof *info); 885 info->bridge_id = sc->as_id; 886 if (sc->as_capoff != 0) 887 info->agp_mode = pci_conf_read(sc->as_pc, sc->as_tag, 888 sc->as_capoff + AGP_STATUS); 889 else 890 info->agp_mode = 0; /* i810 doesn't have real AGP */ 891 info->aper_base = sc->as_apaddr; 892 info->aper_size = AGP_GET_APERTURE(sc) >> 20; 893 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 894 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 895 896 return 0; 897 } 898 899 static int 900 agp_setup_user(struct agp_softc *sc, agp_setup *setup) 901 { 902 return AGP_ENABLE(sc, setup->agp_mode); 903 } 904 905 static int 906 agp_allocate_user(struct agp_softc *sc, agp_allocate *alloc) 907 { 908 struct agp_memory *mem; 909 910 mem = AGP_ALLOC_MEMORY(sc, 911 alloc->type, 912 alloc->pg_count << AGP_PAGE_SHIFT); 913 if (mem) { 914 alloc->key = mem->am_id; 915 alloc->physical = mem->am_physical; 916 return 0; 917 } else { 918 return ENOMEM; 919 } 920 } 921 922 static int 923 agp_deallocate_user(struct agp_softc *sc, int id) 924 { 925 struct agp_memory *mem = agp_find_memory(sc, id); 926 927 if (mem) { 928 AGP_FREE_MEMORY(sc, mem); 929 return 0; 930 } else { 931 return ENOENT; 932 } 933 } 934 935 static int 936 agp_bind_user(struct agp_softc *sc, agp_bind *bind) 937 { 938 struct agp_memory *mem = agp_find_memory(sc, bind->key); 939 940 if (!mem) 941 return ENOENT; 942 943 return AGP_BIND_MEMORY(sc, mem, bind->pg_start << AGP_PAGE_SHIFT); 944 } 945 946 static int 947 agp_unbind_user(struct agp_softc *sc, agp_unbind *unbind) 948 { 949 struct agp_memory *mem = agp_find_memory(sc, unbind->key); 950 951 if (!mem) 952 return ENOENT; 953 954 return AGP_UNBIND_MEMORY(sc, mem); 955 } 956 957 static int 958 agpopen(dev_t dev, int oflags, int devtype, struct lwp *l) 959 { 960 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 961 962 if (sc == NULL) 963 return ENXIO; 964 965 if (sc->as_chipc == NULL) 966 return ENXIO; 967 968 if (!sc->as_isopen) 969 sc->as_isopen = 1; 970 else 971 return EBUSY; 972 973 return 0; 974 } 975 976 static int 977 agpclose(dev_t dev, int fflag, int devtype, struct lwp *l) 978 { 979 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 980 struct agp_memory *mem; 981 982 if (sc == NULL) 983 return ENODEV; 984 985 /* 986 * Clear the GATT and force release on last close 987 */ 988 if (sc->as_state == AGP_ACQUIRE_USER) { 989 while ((mem = TAILQ_FIRST(&sc->as_memory))) { 990 if (mem->am_is_bound) { 991 printf("agpclose: mem %d is bound\n", 992 mem->am_id); 993 AGP_UNBIND_MEMORY(sc, mem); 994 } 995 /* 996 * XXX it is not documented, but if the protocol allows 997 * allocate->acquire->bind, it would be possible that 998 * memory ranges are allocated by the kernel here, 999 * which we shouldn't free. We'd have to keep track of 1000 * the memory range's owner. 1001 * The kernel API is unsed yet, so we get away with 1002 * freeing all. 1003 */ 1004 AGP_FREE_MEMORY(sc, mem); 1005 } 1006 agp_release_helper(sc, AGP_ACQUIRE_USER); 1007 } 1008 sc->as_isopen = 0; 1009 1010 return 0; 1011 } 1012 1013 static int 1014 agpioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *l) 1015 { 1016 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1017 1018 if (sc == NULL) 1019 return ENODEV; 1020 1021 if ((fflag & FWRITE) == 0 && cmd != AGPIOC_INFO) 1022 return EPERM; 1023 1024 switch (cmd) { 1025 case AGPIOC_INFO: 1026 return agp_info_user(sc, (agp_info *) data); 1027 1028 case AGPIOC_ACQUIRE: 1029 return agp_acquire_helper(sc, AGP_ACQUIRE_USER); 1030 1031 case AGPIOC_RELEASE: 1032 return agp_release_helper(sc, AGP_ACQUIRE_USER); 1033 1034 case AGPIOC_SETUP: 1035 return agp_setup_user(sc, (agp_setup *)data); 1036 1037 #ifdef __x86_64__ 1038 { 1039 /* 1040 * Handle paddr_t change from 32 bit for non PAE kernels 1041 * to 64 bit. 1042 */ 1043 #define AGPIOC_OALLOCATE _IOWR(AGPIOC_BASE, 6, agp_oallocate) 1044 1045 typedef struct _agp_oallocate { 1046 int key; /* tag of allocation */ 1047 size_t pg_count; /* number of pages */ 1048 uint32_t type; /* 0 == normal, other devspec */ 1049 u_long physical; /* device specific (some devices 1050 * need a phys address of the 1051 * actual page behind the gatt 1052 * table) */ 1053 } agp_oallocate; 1054 1055 case AGPIOC_OALLOCATE: { 1056 int ret; 1057 agp_allocate aga; 1058 agp_oallocate *oaga = data; 1059 1060 aga.type = oaga->type; 1061 aga.pg_count = oaga->pg_count; 1062 1063 if ((ret = agp_allocate_user(sc, &aga)) == 0) { 1064 oaga->key = aga.key; 1065 oaga->physical = (u_long)aga.physical; 1066 } 1067 1068 return ret; 1069 } 1070 } 1071 #endif 1072 case AGPIOC_ALLOCATE: 1073 return agp_allocate_user(sc, (agp_allocate *)data); 1074 1075 case AGPIOC_DEALLOCATE: 1076 return agp_deallocate_user(sc, *(int *) data); 1077 1078 case AGPIOC_BIND: 1079 return agp_bind_user(sc, (agp_bind *)data); 1080 1081 case AGPIOC_UNBIND: 1082 return agp_unbind_user(sc, (agp_unbind *)data); 1083 1084 } 1085 1086 return EINVAL; 1087 } 1088 1089 static paddr_t 1090 agpmmap(dev_t dev, off_t offset, int prot) 1091 { 1092 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1093 1094 if (sc == NULL) 1095 return ENODEV; 1096 1097 if (offset > AGP_GET_APERTURE(sc)) 1098 return -1; 1099 1100 return (bus_space_mmap(sc->as_apt, sc->as_apaddr, offset, prot, 1101 BUS_SPACE_MAP_LINEAR)); 1102 } 1103 1104 const struct cdevsw agp_cdevsw = { 1105 .d_open = agpopen, 1106 .d_close = agpclose, 1107 .d_read = noread, 1108 .d_write = nowrite, 1109 .d_ioctl = agpioctl, 1110 .d_stop = nostop, 1111 .d_tty = notty, 1112 .d_poll = nopoll, 1113 .d_mmap = agpmmap, 1114 .d_kqfilter = nokqfilter, 1115 .d_flag = D_OTHER 1116 }; 1117 1118 /* Implementation of the kernel api */ 1119 1120 void * 1121 agp_find_device(int unit) 1122 { 1123 return device_lookup_private(&agp_cd, unit); 1124 } 1125 1126 enum agp_acquire_state 1127 agp_state(void *devcookie) 1128 { 1129 struct agp_softc *sc = devcookie; 1130 1131 return sc->as_state; 1132 } 1133 1134 void 1135 agp_get_info(void *devcookie, struct agp_info *info) 1136 { 1137 struct agp_softc *sc = devcookie; 1138 1139 info->ai_mode = pci_conf_read(sc->as_pc, sc->as_tag, 1140 sc->as_capoff + AGP_STATUS); 1141 info->ai_aperture_base = sc->as_apaddr; 1142 info->ai_aperture_size = sc->as_apsize; /* XXXfvdl inconsistent */ 1143 info->ai_memory_allowed = sc->as_maxmem; 1144 info->ai_memory_used = sc->as_allocated; 1145 } 1146 1147 int 1148 agp_acquire(void *dev) 1149 { 1150 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 1151 } 1152 1153 int 1154 agp_release(void *dev) 1155 { 1156 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 1157 } 1158 1159 int 1160 agp_enable(void *dev, u_int32_t mode) 1161 { 1162 struct agp_softc *sc = dev; 1163 1164 return AGP_ENABLE(sc, mode); 1165 } 1166 1167 void * 1168 agp_alloc_memory(void *dev, int type, vsize_t bytes) 1169 { 1170 struct agp_softc *sc = dev; 1171 1172 return (void *)AGP_ALLOC_MEMORY(sc, type, bytes); 1173 } 1174 1175 void 1176 agp_free_memory(void *dev, void *handle) 1177 { 1178 struct agp_softc *sc = dev; 1179 struct agp_memory *mem = handle; 1180 1181 AGP_FREE_MEMORY(sc, mem); 1182 } 1183 1184 int 1185 agp_bind_memory(void *dev, void *handle, off_t offset) 1186 { 1187 struct agp_softc *sc = dev; 1188 struct agp_memory *mem = handle; 1189 1190 return AGP_BIND_MEMORY(sc, mem, offset); 1191 } 1192 1193 int 1194 agp_unbind_memory(void *dev, void *handle) 1195 { 1196 struct agp_softc *sc = dev; 1197 struct agp_memory *mem = handle; 1198 1199 return AGP_UNBIND_MEMORY(sc, mem); 1200 } 1201 1202 void 1203 agp_memory_info(void *dev, void *handle, struct agp_memory_info *mi) 1204 { 1205 struct agp_memory *mem = handle; 1206 1207 mi->ami_size = mem->am_size; 1208 mi->ami_physical = mem->am_physical; 1209 mi->ami_offset = mem->am_offset; 1210 mi->ami_is_bound = mem->am_is_bound; 1211 } 1212 1213 int 1214 agp_alloc_dmamem(bus_dma_tag_t tag, size_t size, int flags, 1215 bus_dmamap_t *mapp, void **vaddr, bus_addr_t *baddr, 1216 bus_dma_segment_t *seg, int nseg, int *rseg) 1217 1218 { 1219 int error, level = 0; 1220 1221 if ((error = bus_dmamem_alloc(tag, size, PAGE_SIZE, 0, 1222 seg, nseg, rseg, BUS_DMA_NOWAIT)) != 0) 1223 goto out; 1224 level++; 1225 1226 if ((error = bus_dmamem_map(tag, seg, *rseg, size, vaddr, 1227 BUS_DMA_NOWAIT | flags)) != 0) 1228 goto out; 1229 level++; 1230 1231 if ((error = bus_dmamap_create(tag, size, *rseg, size, 0, 1232 BUS_DMA_NOWAIT, mapp)) != 0) 1233 goto out; 1234 level++; 1235 1236 if ((error = bus_dmamap_load(tag, *mapp, *vaddr, size, NULL, 1237 BUS_DMA_NOWAIT)) != 0) 1238 goto out; 1239 1240 *baddr = (*mapp)->dm_segs[0].ds_addr; 1241 1242 return 0; 1243 out: 1244 switch (level) { 1245 case 3: 1246 bus_dmamap_destroy(tag, *mapp); 1247 /* FALLTHROUGH */ 1248 case 2: 1249 bus_dmamem_unmap(tag, *vaddr, size); 1250 /* FALLTHROUGH */ 1251 case 1: 1252 bus_dmamem_free(tag, seg, *rseg); 1253 break; 1254 default: 1255 break; 1256 } 1257 1258 return error; 1259 } 1260 1261 void 1262 agp_free_dmamem(bus_dma_tag_t tag, size_t size, bus_dmamap_t map, 1263 void *vaddr, bus_dma_segment_t *seg, int nseg) 1264 { 1265 bus_dmamap_unload(tag, map); 1266 bus_dmamap_destroy(tag, map); 1267 bus_dmamem_unmap(tag, vaddr, size); 1268 bus_dmamem_free(tag, seg, nseg); 1269 } 1270 1271 static bool 1272 agp_resume(device_t dv, const pmf_qual_t *qual) 1273 { 1274 agp_flush_cache(); 1275 1276 return true; 1277 } 1278
Indexes created Tue Sep 23 23:09:58 GMT 2025