agp.c revision 1.85
1 /* $NetBSD: agp.c,v 1.85 2018/08/27 07:34:54 riastradh Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/pci/agp.c,v 1.12 2001/05/19 01:28:07 alfred Exp $ 29 */ 30 31 /* 32 * Copyright (c) 2001 Wasabi Systems, Inc. 33 * All rights reserved. 34 * 35 * Written by Frank van der Linden for Wasabi Systems, Inc. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed for the NetBSD Project by 48 * Wasabi Systems, Inc. 49 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 50 * or promote products derived from this software without specific prior 51 * written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.85 2018/08/27 07:34:54 riastradh Exp $"); 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/malloc.h> 73 #include <sys/kernel.h> 74 #include <sys/device.h> 75 #include <sys/conf.h> 76 #include <sys/ioctl.h> 77 #include <sys/fcntl.h> 78 #include <sys/agpio.h> 79 #include <sys/proc.h> 80 #include <sys/mutex.h> 81 82 #include <dev/pci/pcireg.h> 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/agpvar.h> 85 #include <dev/pci/agpreg.h> 86 #include <dev/pci/pcidevs.h> 87 88 #include <sys/bus.h> 89 90 MALLOC_DEFINE(M_AGP, "AGP", "AGP memory"); 91 92 /* Helper functions for implementing chipset mini drivers. */ 93 /* XXXfvdl get rid of this one. */ 94 95 extern struct cfdriver agp_cd; 96 97 static int agp_info_user(struct agp_softc *, agp_info *); 98 static int agp_setup_user(struct agp_softc *, agp_setup *); 99 static int agp_allocate_user(struct agp_softc *, agp_allocate *); 100 static int agp_deallocate_user(struct agp_softc *, int); 101 static int agp_bind_user(struct agp_softc *, agp_bind *); 102 static int agp_unbind_user(struct agp_softc *, agp_unbind *); 103 static int agp_generic_enable_v2(struct agp_softc *, 104 const struct pci_attach_args *, int, u_int32_t); 105 static int agp_generic_enable_v3(struct agp_softc *, 106 const struct pci_attach_args *, int, u_int32_t); 107 static int agpdev_match(const struct pci_attach_args *); 108 static bool agp_resume(device_t, const pmf_qual_t *); 109 110 #include "agp_ali.h" 111 #include "agp_amd.h" 112 #include "agp_i810.h" 113 #include "agp_intel.h" 114 #include "agp_sis.h" 115 #include "agp_via.h" 116 #include "agp_amd64.h" 117 118 const struct agp_product { 119 uint32_t ap_vendor; 120 uint32_t ap_product; 121 int (*ap_match)(const struct pci_attach_args *); 122 int (*ap_attach)(device_t, device_t, void *); 123 } agp_products[] = { 124 #if NAGP_AMD64 > 0 125 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1689, 126 agp_amd64_match, agp_amd64_attach }, 127 #endif 128 129 #if NAGP_ALI > 0 130 { PCI_VENDOR_ALI, -1, 131 NULL, agp_ali_attach }, 132 #endif 133 134 #if NAGP_AMD64 > 0 135 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_DEV, 136 agp_amd64_match, agp_amd64_attach }, 137 #endif 138 139 #if NAGP_AMD > 0 140 { PCI_VENDOR_AMD, -1, 141 agp_amd_match, agp_amd_attach }, 142 #endif 143 144 #if NAGP_I810 > 0 145 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_MCH, 146 NULL, agp_i810_attach }, 147 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_MCH, 148 NULL, agp_i810_attach }, 149 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_MCH, 150 NULL, agp_i810_attach }, 151 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_HUB, 152 NULL, agp_i810_attach }, 153 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_HB, 154 NULL, agp_i810_attach }, 155 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_1, 156 NULL, agp_i810_attach }, 157 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_DRAM, 158 NULL, agp_i810_attach }, 159 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MCH, 160 NULL, agp_i810_attach }, 161 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_HB, 162 NULL, agp_i810_attach }, 163 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB, 164 NULL, agp_i810_attach }, 165 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB, 166 NULL, agp_i810_attach }, 167 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_MCH, 168 NULL, agp_i810_attach }, 169 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_HB, 170 NULL, agp_i810_attach }, 171 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_HB, 172 NULL, agp_i810_attach }, 173 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HB, 174 NULL, agp_i810_attach }, 175 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_HB, 176 NULL, agp_i810_attach }, 177 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_HB, 178 NULL, agp_i810_attach }, 179 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_HB, 180 NULL, agp_i810_attach }, 181 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_HB, 182 NULL, agp_i810_attach }, 183 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_HB, 184 NULL, agp_i810_attach }, 185 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HB, 186 NULL, agp_i810_attach }, 187 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_HB, 188 NULL, agp_i810_attach }, 189 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_HB, 190 NULL, agp_i810_attach }, 191 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_HB, 192 NULL, agp_i810_attach }, 193 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HB, 194 NULL, agp_i810_attach }, 195 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_HB, 196 NULL, agp_i810_attach }, 197 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_HB, 198 NULL, agp_i810_attach }, 199 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_HB, 200 NULL, agp_i810_attach }, 201 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_HB, 202 NULL, agp_i810_attach }, 203 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_HB, 204 NULL, agp_i810_attach }, 205 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_HB, 206 NULL, agp_i810_attach }, 207 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_HB, 208 NULL, agp_i810_attach }, 209 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MA_HB, 210 NULL, agp_i810_attach }, 211 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MC2_HB, 212 NULL, agp_i810_attach }, 213 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_HB, 214 NULL, agp_i810_attach }, 215 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_M_HB, 216 NULL, agp_i810_attach }, 217 #endif 218 219 #if NAGP_INTEL > 0 220 { PCI_VENDOR_INTEL, -1, 221 NULL, agp_intel_attach }, 222 #endif 223 224 #if NAGP_AMD64 > 0 225 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCHB, 226 agp_amd64_match, agp_amd64_attach }, 227 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCHB, 228 agp_amd64_match, agp_amd64_attach }, 229 #endif 230 231 #if NAGP_AMD64 > 0 232 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_755, 233 agp_amd64_match, agp_amd64_attach }, 234 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_760, 235 agp_amd64_match, agp_amd64_attach }, 236 #endif 237 238 #if NAGP_SIS > 0 239 { PCI_VENDOR_SIS, -1, 240 NULL, agp_sis_attach }, 241 #endif 242 243 #if NAGP_AMD64 > 0 244 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M800_0, 245 agp_amd64_match, agp_amd64_attach }, 246 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_0, 247 agp_amd64_match, agp_amd64_attach }, 248 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_0, 249 agp_amd64_match, agp_amd64_attach }, 250 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB, 251 agp_amd64_match, agp_amd64_attach }, 252 #endif 253 254 #if NAGP_VIA > 0 255 { PCI_VENDOR_VIATECH, -1, 256 NULL, agp_via_attach }, 257 #endif 258 259 { 0, 0, 260 NULL, NULL }, 261 }; 262 263 static const struct agp_product * 264 agp_lookup(const struct pci_attach_args *pa) 265 { 266 const struct agp_product *ap; 267 268 /* First find the vendor. */ 269 for (ap = agp_products; ap->ap_attach != NULL; ap++) { 270 if (PCI_VENDOR(pa->pa_id) == ap->ap_vendor) 271 break; 272 } 273 274 if (ap->ap_attach == NULL) 275 return (NULL); 276 277 /* Now find the product within the vendor's domain. */ 278 for (; ap->ap_attach != NULL; ap++) { 279 if (PCI_VENDOR(pa->pa_id) != ap->ap_vendor) { 280 /* Ran out of this vendor's section of the table. */ 281 return (NULL); 282 } 283 if (ap->ap_product == PCI_PRODUCT(pa->pa_id)) { 284 /* Exact match. */ 285 break; 286 } 287 if (ap->ap_product == (uint32_t) -1) { 288 /* Wildcard match. */ 289 break; 290 } 291 } 292 293 if (ap->ap_attach == NULL) 294 return (NULL); 295 296 /* Now let the product-specific driver filter the match. */ 297 if (ap->ap_match != NULL && (*ap->ap_match)(pa) == 0) 298 return (NULL); 299 300 return (ap); 301 } 302 303 static int 304 agpmatch(device_t parent, cfdata_t match, void *aux) 305 { 306 struct agpbus_attach_args *apa = aux; 307 struct pci_attach_args *pa = &apa->apa_pci_args; 308 309 if (agp_lookup(pa) == NULL) 310 return (0); 311 312 return (1); 313 } 314 315 static const int agp_max[][2] = { 316 {0, 0}, 317 {32, 4}, 318 {64, 28}, 319 {128, 96}, 320 {256, 204}, 321 {512, 440}, 322 {1024, 942}, 323 {2048, 1920}, 324 {4096, 3932} 325 }; 326 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 327 328 static void 329 agpattach(device_t parent, device_t self, void *aux) 330 { 331 struct agpbus_attach_args *apa = aux; 332 struct pci_attach_args *pa = &apa->apa_pci_args; 333 struct agp_softc *sc = device_private(self); 334 const struct agp_product *ap; 335 int memsize, i, ret; 336 337 ap = agp_lookup(pa); 338 KASSERT(ap != NULL); 339 340 aprint_naive(": AGP controller\n"); 341 342 sc->as_dev = self; 343 sc->as_dmat = pa->pa_dmat; 344 sc->as_pc = pa->pa_pc; 345 sc->as_tag = pa->pa_tag; 346 sc->as_id = pa->pa_id; 347 348 /* 349 * Work out an upper bound for agp memory allocation. This 350 * uses a heuristic table from the Linux driver. 351 */ 352 memsize = physmem >> (20 - PAGE_SHIFT); /* memsize is in MB */ 353 for (i = 0; i < agp_max_size; i++) { 354 if (memsize <= agp_max[i][0]) 355 break; 356 } 357 if (i == agp_max_size) 358 i = agp_max_size - 1; 359 sc->as_maxmem = agp_max[i][1] << 20U; 360 361 /* 362 * The mutex is used to prevent re-entry to 363 * agp_generic_bind_memory() since that function can sleep. 364 */ 365 mutex_init(&sc->as_mtx, MUTEX_DEFAULT, IPL_NONE); 366 367 TAILQ_INIT(&sc->as_memory); 368 369 ret = (*ap->ap_attach)(parent, self, pa); 370 if (ret == 0) 371 aprint_normal(": aperture at 0x%lx, size 0x%lx\n", 372 (unsigned long)sc->as_apaddr, 373 (unsigned long)AGP_GET_APERTURE(sc)); 374 else 375 sc->as_chipc = NULL; 376 377 if (!pmf_device_register(self, NULL, agp_resume)) 378 aprint_error_dev(self, "couldn't establish power handler\n"); 379 } 380 381 CFATTACH_DECL_NEW(agp, sizeof(struct agp_softc), 382 agpmatch, agpattach, NULL, NULL); 383 384 int 385 agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 386 { 387 /* 388 * Find the aperture. Don't map it (yet), this would 389 * eat KVA. 390 */ 391 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 392 PCI_MAPREG_TYPE_MEM, &sc->as_apaddr, &sc->as_apsize, 393 &sc->as_apflags) != 0) 394 return ENXIO; 395 396 sc->as_apt = pa->pa_memt; 397 398 return 0; 399 } 400 401 struct agp_gatt * 402 agp_alloc_gatt(struct agp_softc *sc) 403 { 404 u_int32_t apsize = AGP_GET_APERTURE(sc); 405 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 406 struct agp_gatt *gatt; 407 void *virtual; 408 int dummyseg; 409 410 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 411 if (!gatt) 412 return NULL; 413 gatt->ag_entries = entries; 414 415 if (agp_alloc_dmamem(sc->as_dmat, entries * sizeof(u_int32_t), 416 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 417 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 418 free(gatt, M_AGP); 419 return NULL; 420 } 421 gatt->ag_virtual = (uint32_t *)virtual; 422 423 gatt->ag_size = entries * sizeof(u_int32_t); 424 memset(gatt->ag_virtual, 0, gatt->ag_size); 425 agp_flush_cache(); 426 427 return gatt; 428 } 429 430 void 431 agp_free_gatt(struct agp_softc *sc, struct agp_gatt *gatt) 432 { 433 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 434 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 435 free(gatt, M_AGP); 436 } 437 438 439 int 440 agp_generic_detach(struct agp_softc *sc) 441 { 442 mutex_destroy(&sc->as_mtx); 443 agp_flush_cache(); 444 return 0; 445 } 446 447 static int 448 agpdev_match(const struct pci_attach_args *pa) 449 { 450 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 451 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 452 if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, 453 NULL, NULL)) 454 return 1; 455 456 return 0; 457 } 458 459 int 460 agp_generic_enable(struct agp_softc *sc, u_int32_t mode) 461 { 462 struct pci_attach_args pa; 463 pcireg_t tstatus, mstatus; 464 int capoff; 465 466 if (pci_find_device(&pa, agpdev_match) == 0 || 467 pci_get_capability(pa.pa_pc, pa.pa_tag, PCI_CAP_AGP, 468 &capoff, NULL) == 0) { 469 aprint_error_dev(sc->as_dev, "can't find display\n"); 470 return ENXIO; 471 } 472 473 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 474 sc->as_capoff + PCI_AGP_STATUS); 475 mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag, 476 capoff + PCI_AGP_STATUS); 477 478 if (AGP_MODE_GET_MODE_3(mode) && 479 AGP_MODE_GET_MODE_3(tstatus) && 480 AGP_MODE_GET_MODE_3(mstatus)) 481 return agp_generic_enable_v3(sc, &pa, capoff, mode); 482 else 483 return agp_generic_enable_v2(sc, &pa, capoff, mode); 484 } 485 486 static int 487 agp_generic_enable_v2(struct agp_softc *sc, const struct pci_attach_args *pa, 488 int capoff, u_int32_t mode) 489 { 490 pcireg_t tstatus, mstatus; 491 pcireg_t command; 492 int rq, sba, fw, rate; 493 494 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 495 sc->as_capoff + PCI_AGP_STATUS); 496 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 497 capoff + PCI_AGP_STATUS); 498 499 /* Set RQ to the min of mode, tstatus and mstatus */ 500 rq = AGP_MODE_GET_RQ(mode); 501 if (AGP_MODE_GET_RQ(tstatus) < rq) 502 rq = AGP_MODE_GET_RQ(tstatus); 503 if (AGP_MODE_GET_RQ(mstatus) < rq) 504 rq = AGP_MODE_GET_RQ(mstatus); 505 506 /* Set SBA if all three can deal with SBA */ 507 sba = (AGP_MODE_GET_SBA(tstatus) 508 & AGP_MODE_GET_SBA(mstatus) 509 & AGP_MODE_GET_SBA(mode)); 510 511 /* Similar for FW */ 512 fw = (AGP_MODE_GET_FW(tstatus) 513 & AGP_MODE_GET_FW(mstatus) 514 & AGP_MODE_GET_FW(mode)); 515 516 /* Figure out the max rate */ 517 rate = (AGP_MODE_GET_RATE(tstatus) 518 & AGP_MODE_GET_RATE(mstatus) 519 & AGP_MODE_GET_RATE(mode)); 520 if (rate & AGP_MODE_V2_RATE_4x) 521 rate = AGP_MODE_V2_RATE_4x; 522 else if (rate & AGP_MODE_V2_RATE_2x) 523 rate = AGP_MODE_V2_RATE_2x; 524 else 525 rate = AGP_MODE_V2_RATE_1x; 526 527 /* Construct the new mode word and tell the hardware */ 528 command = AGP_MODE_SET_RQ(0, rq); 529 command = AGP_MODE_SET_SBA(command, sba); 530 command = AGP_MODE_SET_FW(command, fw); 531 command = AGP_MODE_SET_RATE(command, rate); 532 command = AGP_MODE_SET_AGP(command, 1); 533 pci_conf_write(sc->as_pc, sc->as_tag, 534 sc->as_capoff + PCI_AGP_COMMAND, command); 535 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND, 536 command); 537 538 return 0; 539 } 540 541 static int 542 agp_generic_enable_v3(struct agp_softc *sc, const struct pci_attach_args *pa, 543 int capoff, u_int32_t mode) 544 { 545 pcireg_t tstatus, mstatus; 546 pcireg_t command; 547 int rq, sba, fw, rate, arqsz, cal; 548 549 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 550 sc->as_capoff + PCI_AGP_STATUS); 551 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 552 capoff + PCI_AGP_STATUS); 553 554 /* Set RQ to the min of mode, tstatus and mstatus */ 555 rq = AGP_MODE_GET_RQ(mode); 556 if (AGP_MODE_GET_RQ(tstatus) < rq) 557 rq = AGP_MODE_GET_RQ(tstatus); 558 if (AGP_MODE_GET_RQ(mstatus) < rq) 559 rq = AGP_MODE_GET_RQ(mstatus); 560 561 /* 562 * ARQSZ - Set the value to the maximum one. 563 * Don't allow the mode register to override values. 564 */ 565 arqsz = AGP_MODE_GET_ARQSZ(mode); 566 if (AGP_MODE_GET_ARQSZ(tstatus) > arqsz) 567 arqsz = AGP_MODE_GET_ARQSZ(tstatus); 568 if (AGP_MODE_GET_ARQSZ(mstatus) > arqsz) 569 arqsz = AGP_MODE_GET_ARQSZ(mstatus); 570 571 /* Calibration cycle - don't allow override by mode register */ 572 cal = AGP_MODE_GET_CAL(tstatus); 573 if (AGP_MODE_GET_CAL(mstatus) < cal) 574 cal = AGP_MODE_GET_CAL(mstatus); 575 576 /* SBA must be supported for AGP v3. */ 577 sba = 1; 578 579 /* Set FW if all three support it. */ 580 fw = (AGP_MODE_GET_FW(tstatus) 581 & AGP_MODE_GET_FW(mstatus) 582 & AGP_MODE_GET_FW(mode)); 583 584 /* Figure out the max rate */ 585 rate = (AGP_MODE_GET_RATE(tstatus) 586 & AGP_MODE_GET_RATE(mstatus) 587 & AGP_MODE_GET_RATE(mode)); 588 if (rate & AGP_MODE_V3_RATE_8x) 589 rate = AGP_MODE_V3_RATE_8x; 590 else 591 rate = AGP_MODE_V3_RATE_4x; 592 593 /* Construct the new mode word and tell the hardware */ 594 command = AGP_MODE_SET_RQ(0, rq); 595 command = AGP_MODE_SET_ARQSZ(command, arqsz); 596 command = AGP_MODE_SET_CAL(command, cal); 597 command = AGP_MODE_SET_SBA(command, sba); 598 command = AGP_MODE_SET_FW(command, fw); 599 command = AGP_MODE_SET_RATE(command, rate); 600 command = AGP_MODE_SET_AGP(command, 1); 601 pci_conf_write(sc->as_pc, sc->as_tag, 602 sc->as_capoff + PCI_AGP_COMMAND, command); 603 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND, 604 command); 605 606 return 0; 607 } 608 609 struct agp_memory * 610 agp_generic_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 611 { 612 struct agp_memory *mem; 613 614 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 615 return 0; 616 617 if (sc->as_allocated + size > sc->as_maxmem) 618 return 0; 619 620 if (type != 0) { 621 printf("agp_generic_alloc_memory: unsupported type %d\n", 622 type); 623 return 0; 624 } 625 626 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 627 if (mem == NULL) 628 return NULL; 629 630 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 631 size, 0, BUS_DMA_NOWAIT, &mem->am_dmamap) != 0) { 632 free(mem, M_AGP); 633 return NULL; 634 } 635 636 mem->am_id = sc->as_nextid++; 637 mem->am_size = size; 638 mem->am_type = 0; 639 mem->am_physical = 0; 640 mem->am_offset = 0; 641 mem->am_is_bound = 0; 642 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 643 sc->as_allocated += size; 644 645 return mem; 646 } 647 648 int 649 agp_generic_free_memory(struct agp_softc *sc, struct agp_memory *mem) 650 { 651 if (mem->am_is_bound) 652 return EBUSY; 653 654 sc->as_allocated -= mem->am_size; 655 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 656 bus_dmamap_destroy(sc->as_dmat, mem->am_dmamap); 657 free(mem, M_AGP); 658 return 0; 659 } 660 661 int 662 agp_generic_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 663 off_t offset) 664 { 665 666 return agp_generic_bind_memory_bounded(sc, mem, offset, 667 0, AGP_GET_APERTURE(sc)); 668 } 669 670 int 671 agp_generic_bind_memory_bounded(struct agp_softc *sc, struct agp_memory *mem, 672 off_t offset, off_t start, off_t end) 673 { 674 off_t i, k; 675 bus_size_t done, j; 676 int error; 677 bus_dma_segment_t *segs, *seg; 678 bus_addr_t pa; 679 int contigpages, nseg; 680 681 mutex_enter(&sc->as_mtx); 682 683 if (mem->am_is_bound) { 684 aprint_error_dev(sc->as_dev, "memory already bound\n"); 685 mutex_exit(&sc->as_mtx); 686 return EINVAL; 687 } 688 689 if (offset < start 690 || (offset & (AGP_PAGE_SIZE - 1)) != 0 691 || offset > end 692 || mem->am_size > (end - offset)) { 693 aprint_error_dev(sc->as_dev, 694 "binding memory at bad offset %#lx\n", 695 (unsigned long) offset); 696 mutex_exit(&sc->as_mtx); 697 return EINVAL; 698 } 699 700 /* 701 * XXXfvdl 702 * The memory here needs to be directly accessable from the 703 * AGP video card, so it should be allocated using bus_dma. 704 * However, it need not be contiguous, since individual pages 705 * are translated using the GATT. 706 * 707 * Using a large chunk of contiguous memory may get in the way 708 * of other subsystems that may need one, so we try to be friendly 709 * and ask for allocation in chunks of a minimum of 8 pages 710 * of contiguous memory on average, falling back to 4, 2 and 1 711 * if really needed. Larger chunks are preferred, since allocating 712 * a bus_dma_segment per page would be overkill. 713 */ 714 715 for (contigpages = 8; contigpages > 0; contigpages >>= 1) { 716 nseg = (mem->am_size / (contigpages * PAGE_SIZE)) + 1; 717 segs = malloc(nseg * sizeof *segs, M_AGP, M_WAITOK); 718 if (segs == NULL) { 719 mutex_exit(&sc->as_mtx); 720 return ENOMEM; 721 } 722 if (bus_dmamem_alloc(sc->as_dmat, mem->am_size, PAGE_SIZE, 0, 723 segs, nseg, &mem->am_nseg, 724 contigpages > 1 ? 725 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) != 0) { 726 free(segs, M_AGP); 727 continue; 728 } 729 if (bus_dmamem_map(sc->as_dmat, segs, mem->am_nseg, 730 mem->am_size, &mem->am_virtual, BUS_DMA_WAITOK) != 0) { 731 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 732 free(segs, M_AGP); 733 continue; 734 } 735 if (bus_dmamap_load(sc->as_dmat, mem->am_dmamap, 736 mem->am_virtual, mem->am_size, NULL, BUS_DMA_WAITOK) != 0) { 737 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 738 mem->am_size); 739 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 740 free(segs, M_AGP); 741 continue; 742 } 743 mem->am_dmaseg = segs; 744 break; 745 } 746 747 if (contigpages == 0) { 748 mutex_exit(&sc->as_mtx); 749 return ENOMEM; 750 } 751 752 753 /* 754 * Bind the individual pages and flush the chipset's 755 * TLB. 756 */ 757 done = 0; 758 for (i = 0; i < mem->am_dmamap->dm_nsegs; i++) { 759 seg = &mem->am_dmamap->dm_segs[i]; 760 /* 761 * Install entries in the GATT, making sure that if 762 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 763 * aligned to PAGE_SIZE, we don't modify too many GATT 764 * entries. 765 */ 766 for (j = 0; j < seg->ds_len && (done + j) < mem->am_size; 767 j += AGP_PAGE_SIZE) { 768 pa = seg->ds_addr + j; 769 AGP_DPF(("binding offset %#lx to pa %#lx\n", 770 (unsigned long)(offset + done + j), 771 (unsigned long)pa)); 772 error = AGP_BIND_PAGE(sc, offset + done + j, pa); 773 if (error) { 774 /* 775 * Bail out. Reverse all the mappings 776 * and unwire the pages. 777 */ 778 for (k = 0; k < done + j; k += AGP_PAGE_SIZE) 779 AGP_UNBIND_PAGE(sc, offset + k); 780 781 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 782 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 783 mem->am_size); 784 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, 785 mem->am_nseg); 786 free(mem->am_dmaseg, M_AGP); 787 mutex_exit(&sc->as_mtx); 788 return error; 789 } 790 } 791 done += seg->ds_len; 792 } 793 794 /* 795 * Flush the CPU cache since we are providing a new mapping 796 * for these pages. 797 */ 798 agp_flush_cache(); 799 800 /* 801 * Make sure the chipset gets the new mappings. 802 */ 803 AGP_FLUSH_TLB(sc); 804 805 mem->am_offset = offset; 806 mem->am_is_bound = 1; 807 808 mutex_exit(&sc->as_mtx); 809 810 return 0; 811 } 812 813 int 814 agp_generic_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 815 { 816 int i; 817 818 mutex_enter(&sc->as_mtx); 819 820 if (!mem->am_is_bound) { 821 aprint_error_dev(sc->as_dev, "memory is not bound\n"); 822 mutex_exit(&sc->as_mtx); 823 return EINVAL; 824 } 825 826 827 /* 828 * Unbind the individual pages and flush the chipset's 829 * TLB. Unwire the pages so they can be swapped. 830 */ 831 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 832 AGP_UNBIND_PAGE(sc, mem->am_offset + i); 833 834 agp_flush_cache(); 835 AGP_FLUSH_TLB(sc); 836 837 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 838 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, mem->am_size); 839 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, mem->am_nseg); 840 841 free(mem->am_dmaseg, M_AGP); 842 843 mem->am_offset = 0; 844 mem->am_is_bound = 0; 845 846 mutex_exit(&sc->as_mtx); 847 848 return 0; 849 } 850 851 /* Helper functions for implementing user/kernel api */ 852 853 static int 854 agp_acquire_helper(struct agp_softc *sc, enum agp_acquire_state state) 855 { 856 if (sc->as_state != AGP_ACQUIRE_FREE) 857 return EBUSY; 858 sc->as_state = state; 859 860 return 0; 861 } 862 863 static int 864 agp_release_helper(struct agp_softc *sc, enum agp_acquire_state state) 865 { 866 867 if (sc->as_state == AGP_ACQUIRE_FREE) 868 return 0; 869 870 if (sc->as_state != state) 871 return EBUSY; 872 873 sc->as_state = AGP_ACQUIRE_FREE; 874 return 0; 875 } 876 877 static struct agp_memory * 878 agp_find_memory(struct agp_softc *sc, int id) 879 { 880 struct agp_memory *mem; 881 882 AGP_DPF(("searching for memory block %d\n", id)); 883 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 884 AGP_DPF(("considering memory block %d\n", mem->am_id)); 885 if (mem->am_id == id) 886 return mem; 887 } 888 return 0; 889 } 890 891 /* Implementation of the userland ioctl api */ 892 893 static int 894 agp_info_user(struct agp_softc *sc, agp_info *info) 895 { 896 memset(info, 0, sizeof *info); 897 info->bridge_id = sc->as_id; 898 if (sc->as_capoff != 0) 899 info->agp_mode = pci_conf_read(sc->as_pc, sc->as_tag, 900 sc->as_capoff + PCI_AGP_STATUS); 901 else 902 info->agp_mode = 0; /* i810 doesn't have real AGP */ 903 info->aper_base = sc->as_apaddr; 904 info->aper_size = AGP_GET_APERTURE(sc) >> 20; 905 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 906 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 907 908 return 0; 909 } 910 911 static int 912 agp_setup_user(struct agp_softc *sc, agp_setup *setup) 913 { 914 return AGP_ENABLE(sc, setup->agp_mode); 915 } 916 917 static int 918 agp_allocate_user(struct agp_softc *sc, agp_allocate *alloc) 919 { 920 struct agp_memory *mem; 921 922 mem = AGP_ALLOC_MEMORY(sc, 923 alloc->type, 924 alloc->pg_count << AGP_PAGE_SHIFT); 925 if (mem) { 926 alloc->key = mem->am_id; 927 alloc->physical = mem->am_physical; 928 return 0; 929 } else { 930 return ENOMEM; 931 } 932 } 933 934 static int 935 agp_deallocate_user(struct agp_softc *sc, int id) 936 { 937 struct agp_memory *mem = agp_find_memory(sc, id); 938 939 if (mem) { 940 AGP_FREE_MEMORY(sc, mem); 941 return 0; 942 } else { 943 return ENOENT; 944 } 945 } 946 947 static int 948 agp_bind_user(struct agp_softc *sc, agp_bind *bind) 949 { 950 struct agp_memory *mem = agp_find_memory(sc, bind->key); 951 952 if (!mem) 953 return ENOENT; 954 955 return AGP_BIND_MEMORY(sc, mem, bind->pg_start << AGP_PAGE_SHIFT); 956 } 957 958 static int 959 agp_unbind_user(struct agp_softc *sc, agp_unbind *unbind) 960 { 961 struct agp_memory *mem = agp_find_memory(sc, unbind->key); 962 963 if (!mem) 964 return ENOENT; 965 966 return AGP_UNBIND_MEMORY(sc, mem); 967 } 968 969 static int 970 agpopen(dev_t dev, int oflags, int devtype, struct lwp *l) 971 { 972 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 973 974 if (sc == NULL) 975 return ENXIO; 976 977 if (sc->as_chipc == NULL) 978 return ENXIO; 979 980 if (!sc->as_isopen) 981 sc->as_isopen = 1; 982 else 983 return EBUSY; 984 985 return 0; 986 } 987 988 static int 989 agpclose(dev_t dev, int fflag, int devtype, struct lwp *l) 990 { 991 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 992 struct agp_memory *mem; 993 994 if (sc == NULL) 995 return ENODEV; 996 997 /* 998 * Clear the GATT and force release on last close 999 */ 1000 if (sc->as_state == AGP_ACQUIRE_USER) { 1001 while ((mem = TAILQ_FIRST(&sc->as_memory))) { 1002 if (mem->am_is_bound) { 1003 printf("agpclose: mem %d is bound\n", 1004 mem->am_id); 1005 AGP_UNBIND_MEMORY(sc, mem); 1006 } 1007 /* 1008 * XXX it is not documented, but if the protocol allows 1009 * allocate->acquire->bind, it would be possible that 1010 * memory ranges are allocated by the kernel here, 1011 * which we shouldn't free. We'd have to keep track of 1012 * the memory range's owner. 1013 * The kernel API is unsed yet, so we get away with 1014 * freeing all. 1015 */ 1016 AGP_FREE_MEMORY(sc, mem); 1017 } 1018 agp_release_helper(sc, AGP_ACQUIRE_USER); 1019 } 1020 sc->as_isopen = 0; 1021 1022 return 0; 1023 } 1024 1025 static int 1026 agpioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *l) 1027 { 1028 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1029 1030 if (sc == NULL) 1031 return ENODEV; 1032 1033 if ((fflag & FWRITE) == 0 && cmd != AGPIOC_INFO) 1034 return EPERM; 1035 1036 switch (cmd) { 1037 case AGPIOC_INFO: 1038 return agp_info_user(sc, (agp_info *) data); 1039 1040 case AGPIOC_ACQUIRE: 1041 return agp_acquire_helper(sc, AGP_ACQUIRE_USER); 1042 1043 case AGPIOC_RELEASE: 1044 return agp_release_helper(sc, AGP_ACQUIRE_USER); 1045 1046 case AGPIOC_SETUP: 1047 return agp_setup_user(sc, (agp_setup *)data); 1048 1049 #ifdef __x86_64__ 1050 { 1051 /* 1052 * Handle paddr_t change from 32 bit for non PAE kernels 1053 * to 64 bit. 1054 */ 1055 #define AGPIOC_OALLOCATE _IOWR(AGPIOC_BASE, 6, agp_oallocate) 1056 1057 typedef struct _agp_oallocate { 1058 int key; /* tag of allocation */ 1059 size_t pg_count; /* number of pages */ 1060 uint32_t type; /* 0 == normal, other devspec */ 1061 u_long physical; /* device specific (some devices 1062 * need a phys address of the 1063 * actual page behind the gatt 1064 * table) */ 1065 } agp_oallocate; 1066 1067 case AGPIOC_OALLOCATE: { 1068 int ret; 1069 agp_allocate aga; 1070 agp_oallocate *oaga = data; 1071 1072 aga.type = oaga->type; 1073 aga.pg_count = oaga->pg_count; 1074 1075 if ((ret = agp_allocate_user(sc, &aga)) == 0) { 1076 oaga->key = aga.key; 1077 oaga->physical = (u_long)aga.physical; 1078 } 1079 1080 return ret; 1081 } 1082 } 1083 #endif 1084 case AGPIOC_ALLOCATE: 1085 return agp_allocate_user(sc, (agp_allocate *)data); 1086 1087 case AGPIOC_DEALLOCATE: 1088 return agp_deallocate_user(sc, *(int *) data); 1089 1090 case AGPIOC_BIND: 1091 return agp_bind_user(sc, (agp_bind *)data); 1092 1093 case AGPIOC_UNBIND: 1094 return agp_unbind_user(sc, (agp_unbind *)data); 1095 1096 } 1097 1098 return EINVAL; 1099 } 1100 1101 static paddr_t 1102 agpmmap(dev_t dev, off_t offset, int prot) 1103 { 1104 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1105 1106 if (sc == NULL) 1107 return ENODEV; 1108 1109 if (offset > AGP_GET_APERTURE(sc)) 1110 return -1; 1111 1112 return (bus_space_mmap(sc->as_apt, sc->as_apaddr, offset, prot, 1113 BUS_SPACE_MAP_LINEAR)); 1114 } 1115 1116 const struct cdevsw agp_cdevsw = { 1117 .d_open = agpopen, 1118 .d_close = agpclose, 1119 .d_read = noread, 1120 .d_write = nowrite, 1121 .d_ioctl = agpioctl, 1122 .d_stop = nostop, 1123 .d_tty = notty, 1124 .d_poll = nopoll, 1125 .d_mmap = agpmmap, 1126 .d_kqfilter = nokqfilter, 1127 .d_discard = nodiscard, 1128 .d_flag = D_OTHER 1129 }; 1130 1131 /* Implementation of the kernel api */ 1132 1133 void * 1134 agp_find_device(int unit) 1135 { 1136 return device_lookup_private(&agp_cd, unit); 1137 } 1138 1139 enum agp_acquire_state 1140 agp_state(void *devcookie) 1141 { 1142 struct agp_softc *sc = devcookie; 1143 1144 return sc->as_state; 1145 } 1146 1147 void 1148 agp_get_info(void *devcookie, struct agp_info *info) 1149 { 1150 struct agp_softc *sc = devcookie; 1151 1152 info->ai_mode = pci_conf_read(sc->as_pc, sc->as_tag, 1153 sc->as_capoff + PCI_AGP_STATUS); 1154 info->ai_aperture_base = sc->as_apaddr; 1155 info->ai_aperture_size = sc->as_apsize; /* XXXfvdl inconsistent */ 1156 info->ai_memory_allowed = sc->as_maxmem; 1157 info->ai_memory_used = sc->as_allocated; 1158 info->ai_devid = sc->as_id; 1159 } 1160 1161 int 1162 agp_acquire(void *dev) 1163 { 1164 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 1165 } 1166 1167 int 1168 agp_release(void *dev) 1169 { 1170 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 1171 } 1172 1173 int 1174 agp_enable(void *dev, u_int32_t mode) 1175 { 1176 struct agp_softc *sc = dev; 1177 1178 return AGP_ENABLE(sc, mode); 1179 } 1180 1181 void * 1182 agp_alloc_memory(void *dev, int type, vsize_t bytes) 1183 { 1184 struct agp_softc *sc = dev; 1185 1186 return (void *)AGP_ALLOC_MEMORY(sc, type, bytes); 1187 } 1188 1189 void 1190 agp_free_memory(void *dev, void *handle) 1191 { 1192 struct agp_softc *sc = dev; 1193 struct agp_memory *mem = handle; 1194 1195 AGP_FREE_MEMORY(sc, mem); 1196 } 1197 1198 int 1199 agp_bind_memory(void *dev, void *handle, off_t offset) 1200 { 1201 struct agp_softc *sc = dev; 1202 struct agp_memory *mem = handle; 1203 1204 return AGP_BIND_MEMORY(sc, mem, offset); 1205 } 1206 1207 int 1208 agp_unbind_memory(void *dev, void *handle) 1209 { 1210 struct agp_softc *sc = dev; 1211 struct agp_memory *mem = handle; 1212 1213 return AGP_UNBIND_MEMORY(sc, mem); 1214 } 1215 1216 void 1217 agp_memory_info(void *dev, void *handle, struct agp_memory_info *mi) 1218 { 1219 struct agp_memory *mem = handle; 1220 1221 mi->ami_size = mem->am_size; 1222 mi->ami_physical = mem->am_physical; 1223 mi->ami_offset = mem->am_offset; 1224 mi->ami_is_bound = mem->am_is_bound; 1225 } 1226 1227 int 1228 agp_alloc_dmamem(bus_dma_tag_t tag, size_t size, int flags, 1229 bus_dmamap_t *mapp, void **vaddr, bus_addr_t *baddr, 1230 bus_dma_segment_t *seg, int nseg, int *rseg) 1231 1232 { 1233 int error, level = 0; 1234 1235 if ((error = bus_dmamem_alloc(tag, size, PAGE_SIZE, 0, 1236 seg, nseg, rseg, BUS_DMA_NOWAIT)) != 0) 1237 goto out; 1238 level++; 1239 1240 if ((error = bus_dmamem_map(tag, seg, *rseg, size, vaddr, 1241 BUS_DMA_NOWAIT | flags)) != 0) 1242 goto out; 1243 level++; 1244 1245 if ((error = bus_dmamap_create(tag, size, *rseg, size, 0, 1246 BUS_DMA_NOWAIT, mapp)) != 0) 1247 goto out; 1248 level++; 1249 1250 if ((error = bus_dmamap_load(tag, *mapp, *vaddr, size, NULL, 1251 BUS_DMA_NOWAIT)) != 0) 1252 goto out; 1253 1254 *baddr = (*mapp)->dm_segs[0].ds_addr; 1255 1256 return 0; 1257 out: 1258 switch (level) { 1259 case 3: 1260 bus_dmamap_destroy(tag, *mapp); 1261 /* FALLTHROUGH */ 1262 case 2: 1263 bus_dmamem_unmap(tag, *vaddr, size); 1264 /* FALLTHROUGH */ 1265 case 1: 1266 bus_dmamem_free(tag, seg, *rseg); 1267 break; 1268 default: 1269 break; 1270 } 1271 1272 return error; 1273 } 1274 1275 void 1276 agp_free_dmamem(bus_dma_tag_t tag, size_t size, bus_dmamap_t map, 1277 void *vaddr, bus_dma_segment_t *seg, int nseg) 1278 { 1279 bus_dmamap_unload(tag, map); 1280 bus_dmamap_destroy(tag, map); 1281 bus_dmamem_unmap(tag, vaddr, size); 1282 bus_dmamem_free(tag, seg, nseg); 1283 } 1284 1285 static bool 1286 agp_resume(device_t dv, const pmf_qual_t *qual) 1287 { 1288 agp_flush_cache(); 1289 1290 return true; 1291 } 1292
Indexes created Tue Sep 23 14:10:03 GMT 2025