agp.c revision 1.85.6.1
1 /* $NetBSD: agp.c,v 1.85.6.1 2020/01/31 11:17:32 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/pci/agp.c,v 1.12 2001/05/19 01:28:07 alfred Exp $ 29 */ 30 31 /* 32 * Copyright (c) 2001 Wasabi Systems, Inc. 33 * All rights reserved. 34 * 35 * Written by Frank van der Linden for Wasabi Systems, Inc. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed for the NetBSD Project by 48 * Wasabi Systems, Inc. 49 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 50 * or promote products derived from this software without specific prior 51 * written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.85.6.1 2020/01/31 11:17:32 martin Exp $"); 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/malloc.h> 73 #include <sys/kernel.h> 74 #include <sys/device.h> 75 #include <sys/conf.h> 76 #include <sys/ioctl.h> 77 #include <sys/fcntl.h> 78 #include <sys/agpio.h> 79 #include <sys/proc.h> 80 #include <sys/mutex.h> 81 82 #include <dev/pci/pcireg.h> 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/agpvar.h> 85 #include <dev/pci/agpreg.h> 86 #include <dev/pci/pcidevs.h> 87 88 #include <sys/bus.h> 89 90 MALLOC_DEFINE(M_AGP, "AGP", "AGP memory"); 91 92 /* Helper functions for implementing chipset mini drivers. */ 93 /* XXXfvdl get rid of this one. */ 94 95 extern struct cfdriver agp_cd; 96 97 static int agp_info_user(struct agp_softc *, agp_info *); 98 static int agp_setup_user(struct agp_softc *, agp_setup *); 99 static int agp_allocate_user(struct agp_softc *, agp_allocate *); 100 static int agp_deallocate_user(struct agp_softc *, int); 101 static int agp_bind_user(struct agp_softc *, agp_bind *); 102 static int agp_unbind_user(struct agp_softc *, agp_unbind *); 103 static int agp_generic_enable_v2(struct agp_softc *, 104 const struct pci_attach_args *, int, u_int32_t); 105 static int agp_generic_enable_v3(struct agp_softc *, 106 const struct pci_attach_args *, int, u_int32_t); 107 static int agpdev_match(const struct pci_attach_args *); 108 static bool agp_resume(device_t, const pmf_qual_t *); 109 110 #include "agp_ali.h" 111 #include "agp_amd.h" 112 #include "agp_i810.h" 113 #include "agp_intel.h" 114 #include "agp_sis.h" 115 #include "agp_via.h" 116 #include "agp_amd64.h" 117 118 const struct agp_product { 119 uint32_t ap_vendor; 120 uint32_t ap_product; 121 int (*ap_match)(const struct pci_attach_args *); 122 int (*ap_attach)(device_t, device_t, void *); 123 } agp_products[] = { 124 #if NAGP_AMD64 > 0 125 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1689, 126 agp_amd64_match, agp_amd64_attach }, 127 #endif 128 129 #if NAGP_ALI > 0 130 { PCI_VENDOR_ALI, -1, 131 NULL, agp_ali_attach }, 132 #endif 133 134 #if NAGP_AMD64 > 0 135 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_DEV, 136 agp_amd64_match, agp_amd64_attach }, 137 #endif 138 139 #if NAGP_AMD > 0 140 { PCI_VENDOR_AMD, -1, 141 agp_amd_match, agp_amd_attach }, 142 #endif 143 144 #if NAGP_I810 > 0 145 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_MCH, 146 NULL, agp_i810_attach }, 147 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_MCH, 148 NULL, agp_i810_attach }, 149 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_MCH, 150 NULL, agp_i810_attach }, 151 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_HUB, 152 NULL, agp_i810_attach }, 153 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_HB, 154 NULL, agp_i810_attach }, 155 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_1, 156 NULL, agp_i810_attach }, 157 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_DRAM, 158 NULL, agp_i810_attach }, 159 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MCH, 160 NULL, agp_i810_attach }, 161 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_HB, 162 NULL, agp_i810_attach }, 163 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB, 164 NULL, agp_i810_attach }, 165 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB, 166 NULL, agp_i810_attach }, 167 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_MCH, 168 NULL, agp_i810_attach }, 169 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_HB, 170 NULL, agp_i810_attach }, 171 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_HB, 172 NULL, agp_i810_attach }, 173 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HB, 174 NULL, agp_i810_attach }, 175 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_HB, 176 NULL, agp_i810_attach }, 177 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_HB, 178 NULL, agp_i810_attach }, 179 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_HB, 180 NULL, agp_i810_attach }, 181 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_HB, 182 NULL, agp_i810_attach }, 183 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_HB, 184 NULL, agp_i810_attach }, 185 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HB, 186 NULL, agp_i810_attach }, 187 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_HB, 188 NULL, agp_i810_attach }, 189 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_HB, 190 NULL, agp_i810_attach }, 191 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_HB, 192 NULL, agp_i810_attach }, 193 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HB, 194 NULL, agp_i810_attach }, 195 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_HB, 196 NULL, agp_i810_attach }, 197 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_HB, 198 NULL, agp_i810_attach }, 199 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_HB, 200 NULL, agp_i810_attach }, 201 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_HB, 202 NULL, agp_i810_attach }, 203 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_HB, 204 NULL, agp_i810_attach }, 205 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_HB, 206 NULL, agp_i810_attach }, 207 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_HB, 208 NULL, agp_i810_attach }, 209 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MA_HB, 210 NULL, agp_i810_attach }, 211 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MC2_HB, 212 NULL, agp_i810_attach }, 213 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_HB, 214 NULL, agp_i810_attach }, 215 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_M_HB, 216 NULL, agp_i810_attach }, 217 #endif 218 219 #if NAGP_INTEL > 0 220 { PCI_VENDOR_INTEL, -1, 221 NULL, agp_intel_attach }, 222 #endif 223 224 #if NAGP_AMD64 > 0 225 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCHB, 226 agp_amd64_match, agp_amd64_attach }, 227 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCHB, 228 agp_amd64_match, agp_amd64_attach }, 229 #endif 230 231 #if NAGP_AMD64 > 0 232 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_755, 233 agp_amd64_match, agp_amd64_attach }, 234 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_760, 235 agp_amd64_match, agp_amd64_attach }, 236 #endif 237 238 #if NAGP_SIS > 0 239 { PCI_VENDOR_SIS, -1, 240 NULL, agp_sis_attach }, 241 #endif 242 243 #if NAGP_AMD64 > 0 244 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M800_0, 245 agp_amd64_match, agp_amd64_attach }, 246 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_0, 247 agp_amd64_match, agp_amd64_attach }, 248 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_0, 249 agp_amd64_match, agp_amd64_attach }, 250 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB, 251 agp_amd64_match, agp_amd64_attach }, 252 #endif 253 254 #if NAGP_VIA > 0 255 { PCI_VENDOR_VIATECH, -1, 256 NULL, agp_via_attach }, 257 #endif 258 259 { 0, 0, 260 NULL, NULL }, 261 }; 262 263 static const struct agp_product * 264 agp_lookup(const struct pci_attach_args *pa) 265 { 266 const struct agp_product *ap; 267 268 /* First find the vendor. */ 269 for (ap = agp_products; ap->ap_attach != NULL; ap++) { 270 if (PCI_VENDOR(pa->pa_id) == ap->ap_vendor) 271 break; 272 } 273 274 if (ap->ap_attach == NULL) 275 return (NULL); 276 277 /* Now find the product within the vendor's domain. */ 278 for (; ap->ap_attach != NULL; ap++) { 279 if (PCI_VENDOR(pa->pa_id) != ap->ap_vendor) { 280 /* Ran out of this vendor's section of the table. */ 281 return (NULL); 282 } 283 if (ap->ap_product == PCI_PRODUCT(pa->pa_id)) { 284 /* Exact match. */ 285 break; 286 } 287 if (ap->ap_product == (uint32_t) -1) { 288 /* Wildcard match. */ 289 break; 290 } 291 } 292 293 if (ap->ap_attach == NULL) 294 return (NULL); 295 296 /* Now let the product-specific driver filter the match. */ 297 if (ap->ap_match != NULL && (*ap->ap_match)(pa) == 0) 298 return (NULL); 299 300 return (ap); 301 } 302 303 static int 304 agpmatch(device_t parent, cfdata_t match, void *aux) 305 { 306 struct agpbus_attach_args *apa = aux; 307 struct pci_attach_args *pa = &apa->apa_pci_args; 308 309 if (agp_lookup(pa) == NULL) 310 return (0); 311 312 return (1); 313 } 314 315 static const u_int agp_max[][2] = { 316 {0, 0}, 317 {32, 4}, 318 {64, 28}, 319 {128, 96}, 320 {256, 204}, 321 {512, 440}, 322 {1024, 942}, 323 {2048, 1920}, 324 {4096, 3932} 325 }; 326 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 327 328 static void 329 agpattach(device_t parent, device_t self, void *aux) 330 { 331 struct agpbus_attach_args *apa = aux; 332 struct pci_attach_args *pa = &apa->apa_pci_args; 333 struct agp_softc *sc = device_private(self); 334 const struct agp_product *ap; 335 int ret; 336 u_int memsize, i; 337 338 ap = agp_lookup(pa); 339 KASSERT(ap != NULL); 340 341 aprint_naive(": AGP controller\n"); 342 343 sc->as_dev = self; 344 sc->as_dmat = pa->pa_dmat; 345 sc->as_pc = pa->pa_pc; 346 sc->as_tag = pa->pa_tag; 347 sc->as_id = pa->pa_id; 348 349 /* 350 * Work out an upper bound for agp memory allocation. This 351 * uses a heuristic table from the Linux driver. 352 */ 353 memsize = physmem >> (20 - PAGE_SHIFT); /* memsize is in MB */ 354 for (i = 0; i < agp_max_size; i++) { 355 if (memsize <= agp_max[i][0]) 356 break; 357 } 358 if (i == agp_max_size) 359 i = agp_max_size - 1; 360 sc->as_maxmem = agp_max[i][1] << 20U; 361 362 /* 363 * The mutex is used to prevent re-entry to 364 * agp_generic_bind_memory() since that function can sleep. 365 */ 366 mutex_init(&sc->as_mtx, MUTEX_DEFAULT, IPL_NONE); 367 368 TAILQ_INIT(&sc->as_memory); 369 370 ret = (*ap->ap_attach)(parent, self, pa); 371 if (ret == 0) 372 aprint_normal(": aperture at 0x%lx, size 0x%lx\n", 373 (unsigned long)sc->as_apaddr, 374 (unsigned long)AGP_GET_APERTURE(sc)); 375 else 376 sc->as_chipc = NULL; 377 378 if (!pmf_device_register(self, NULL, agp_resume)) 379 aprint_error_dev(self, "couldn't establish power handler\n"); 380 } 381 382 CFATTACH_DECL_NEW(agp, sizeof(struct agp_softc), 383 agpmatch, agpattach, NULL, NULL); 384 385 int 386 agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 387 { 388 /* 389 * Find the aperture. Don't map it (yet), this would 390 * eat KVA. 391 */ 392 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 393 PCI_MAPREG_TYPE_MEM, &sc->as_apaddr, &sc->as_apsize, 394 &sc->as_apflags) != 0) 395 return ENXIO; 396 397 sc->as_apt = pa->pa_memt; 398 399 return 0; 400 } 401 402 struct agp_gatt * 403 agp_alloc_gatt(struct agp_softc *sc) 404 { 405 u_int32_t apsize = AGP_GET_APERTURE(sc); 406 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 407 struct agp_gatt *gatt; 408 void *virtual; 409 int dummyseg; 410 411 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 412 if (!gatt) 413 return NULL; 414 gatt->ag_entries = entries; 415 416 if (agp_alloc_dmamem(sc->as_dmat, entries * sizeof(u_int32_t), 417 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 418 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 419 free(gatt, M_AGP); 420 return NULL; 421 } 422 gatt->ag_virtual = (uint32_t *)virtual; 423 424 gatt->ag_size = entries * sizeof(u_int32_t); 425 memset(gatt->ag_virtual, 0, gatt->ag_size); 426 agp_flush_cache(); 427 428 return gatt; 429 } 430 431 void 432 agp_free_gatt(struct agp_softc *sc, struct agp_gatt *gatt) 433 { 434 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 435 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 436 free(gatt, M_AGP); 437 } 438 439 440 int 441 agp_generic_detach(struct agp_softc *sc) 442 { 443 mutex_destroy(&sc->as_mtx); 444 agp_flush_cache(); 445 return 0; 446 } 447 448 static int 449 agpdev_match(const struct pci_attach_args *pa) 450 { 451 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 452 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 453 if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, 454 NULL, NULL)) 455 return 1; 456 457 return 0; 458 } 459 460 int 461 agp_generic_enable(struct agp_softc *sc, u_int32_t mode) 462 { 463 struct pci_attach_args pa; 464 pcireg_t tstatus, mstatus; 465 int capoff; 466 467 if (pci_find_device(&pa, agpdev_match) == 0 || 468 pci_get_capability(pa.pa_pc, pa.pa_tag, PCI_CAP_AGP, 469 &capoff, NULL) == 0) { 470 aprint_error_dev(sc->as_dev, "can't find display\n"); 471 return ENXIO; 472 } 473 474 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 475 sc->as_capoff + PCI_AGP_STATUS); 476 mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag, 477 capoff + PCI_AGP_STATUS); 478 479 if (AGP_MODE_GET_MODE_3(mode) && 480 AGP_MODE_GET_MODE_3(tstatus) && 481 AGP_MODE_GET_MODE_3(mstatus)) 482 return agp_generic_enable_v3(sc, &pa, capoff, mode); 483 else 484 return agp_generic_enable_v2(sc, &pa, capoff, mode); 485 } 486 487 static int 488 agp_generic_enable_v2(struct agp_softc *sc, const struct pci_attach_args *pa, 489 int capoff, u_int32_t mode) 490 { 491 pcireg_t tstatus, mstatus; 492 pcireg_t command; 493 int rq, sba, fw, rate; 494 495 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 496 sc->as_capoff + PCI_AGP_STATUS); 497 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 498 capoff + PCI_AGP_STATUS); 499 500 /* Set RQ to the min of mode, tstatus and mstatus */ 501 rq = AGP_MODE_GET_RQ(mode); 502 if (AGP_MODE_GET_RQ(tstatus) < rq) 503 rq = AGP_MODE_GET_RQ(tstatus); 504 if (AGP_MODE_GET_RQ(mstatus) < rq) 505 rq = AGP_MODE_GET_RQ(mstatus); 506 507 /* Set SBA if all three can deal with SBA */ 508 sba = (AGP_MODE_GET_SBA(tstatus) 509 & AGP_MODE_GET_SBA(mstatus) 510 & AGP_MODE_GET_SBA(mode)); 511 512 /* Similar for FW */ 513 fw = (AGP_MODE_GET_FW(tstatus) 514 & AGP_MODE_GET_FW(mstatus) 515 & AGP_MODE_GET_FW(mode)); 516 517 /* Figure out the max rate */ 518 rate = (AGP_MODE_GET_RATE(tstatus) 519 & AGP_MODE_GET_RATE(mstatus) 520 & AGP_MODE_GET_RATE(mode)); 521 if (rate & AGP_MODE_V2_RATE_4x) 522 rate = AGP_MODE_V2_RATE_4x; 523 else if (rate & AGP_MODE_V2_RATE_2x) 524 rate = AGP_MODE_V2_RATE_2x; 525 else 526 rate = AGP_MODE_V2_RATE_1x; 527 528 /* Construct the new mode word and tell the hardware */ 529 command = AGP_MODE_SET_RQ(0, rq); 530 command = AGP_MODE_SET_SBA(command, sba); 531 command = AGP_MODE_SET_FW(command, fw); 532 command = AGP_MODE_SET_RATE(command, rate); 533 command = AGP_MODE_SET_AGP(command, 1); 534 pci_conf_write(sc->as_pc, sc->as_tag, 535 sc->as_capoff + PCI_AGP_COMMAND, command); 536 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND, 537 command); 538 539 return 0; 540 } 541 542 static int 543 agp_generic_enable_v3(struct agp_softc *sc, const struct pci_attach_args *pa, 544 int capoff, u_int32_t mode) 545 { 546 pcireg_t tstatus, mstatus; 547 pcireg_t command; 548 int rq, sba, fw, rate, arqsz, cal; 549 550 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 551 sc->as_capoff + PCI_AGP_STATUS); 552 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 553 capoff + PCI_AGP_STATUS); 554 555 /* Set RQ to the min of mode, tstatus and mstatus */ 556 rq = AGP_MODE_GET_RQ(mode); 557 if (AGP_MODE_GET_RQ(tstatus) < rq) 558 rq = AGP_MODE_GET_RQ(tstatus); 559 if (AGP_MODE_GET_RQ(mstatus) < rq) 560 rq = AGP_MODE_GET_RQ(mstatus); 561 562 /* 563 * ARQSZ - Set the value to the maximum one. 564 * Don't allow the mode register to override values. 565 */ 566 arqsz = AGP_MODE_GET_ARQSZ(mode); 567 if (AGP_MODE_GET_ARQSZ(tstatus) > arqsz) 568 arqsz = AGP_MODE_GET_ARQSZ(tstatus); 569 if (AGP_MODE_GET_ARQSZ(mstatus) > arqsz) 570 arqsz = AGP_MODE_GET_ARQSZ(mstatus); 571 572 /* Calibration cycle - don't allow override by mode register */ 573 cal = AGP_MODE_GET_CAL(tstatus); 574 if (AGP_MODE_GET_CAL(mstatus) < cal) 575 cal = AGP_MODE_GET_CAL(mstatus); 576 577 /* SBA must be supported for AGP v3. */ 578 sba = 1; 579 580 /* Set FW if all three support it. */ 581 fw = (AGP_MODE_GET_FW(tstatus) 582 & AGP_MODE_GET_FW(mstatus) 583 & AGP_MODE_GET_FW(mode)); 584 585 /* Figure out the max rate */ 586 rate = (AGP_MODE_GET_RATE(tstatus) 587 & AGP_MODE_GET_RATE(mstatus) 588 & AGP_MODE_GET_RATE(mode)); 589 if (rate & AGP_MODE_V3_RATE_8x) 590 rate = AGP_MODE_V3_RATE_8x; 591 else 592 rate = AGP_MODE_V3_RATE_4x; 593 594 /* Construct the new mode word and tell the hardware */ 595 command = AGP_MODE_SET_RQ(0, rq); 596 command = AGP_MODE_SET_ARQSZ(command, arqsz); 597 command = AGP_MODE_SET_CAL(command, cal); 598 command = AGP_MODE_SET_SBA(command, sba); 599 command = AGP_MODE_SET_FW(command, fw); 600 command = AGP_MODE_SET_RATE(command, rate); 601 command = AGP_MODE_SET_AGP(command, 1); 602 pci_conf_write(sc->as_pc, sc->as_tag, 603 sc->as_capoff + PCI_AGP_COMMAND, command); 604 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND, 605 command); 606 607 return 0; 608 } 609 610 struct agp_memory * 611 agp_generic_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 612 { 613 struct agp_memory *mem; 614 615 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 616 return 0; 617 618 if (sc->as_allocated + size > sc->as_maxmem) 619 return 0; 620 621 if (type != 0) { 622 printf("agp_generic_alloc_memory: unsupported type %d\n", 623 type); 624 return 0; 625 } 626 627 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 628 if (mem == NULL) 629 return NULL; 630 631 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 632 size, 0, BUS_DMA_NOWAIT, &mem->am_dmamap) != 0) { 633 free(mem, M_AGP); 634 return NULL; 635 } 636 637 mem->am_id = sc->as_nextid++; 638 mem->am_size = size; 639 mem->am_type = 0; 640 mem->am_physical = 0; 641 mem->am_offset = 0; 642 mem->am_is_bound = 0; 643 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 644 sc->as_allocated += size; 645 646 return mem; 647 } 648 649 int 650 agp_generic_free_memory(struct agp_softc *sc, struct agp_memory *mem) 651 { 652 if (mem->am_is_bound) 653 return EBUSY; 654 655 sc->as_allocated -= mem->am_size; 656 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 657 bus_dmamap_destroy(sc->as_dmat, mem->am_dmamap); 658 free(mem, M_AGP); 659 return 0; 660 } 661 662 int 663 agp_generic_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 664 off_t offset) 665 { 666 667 return agp_generic_bind_memory_bounded(sc, mem, offset, 668 0, AGP_GET_APERTURE(sc)); 669 } 670 671 int 672 agp_generic_bind_memory_bounded(struct agp_softc *sc, struct agp_memory *mem, 673 off_t offset, off_t start, off_t end) 674 { 675 off_t i, k; 676 bus_size_t done, j; 677 int error; 678 bus_dma_segment_t *segs, *seg; 679 bus_addr_t pa; 680 int contigpages, nseg; 681 682 mutex_enter(&sc->as_mtx); 683 684 if (mem->am_is_bound) { 685 aprint_error_dev(sc->as_dev, "memory already bound\n"); 686 mutex_exit(&sc->as_mtx); 687 return EINVAL; 688 } 689 690 if (offset < start 691 || (offset & (AGP_PAGE_SIZE - 1)) != 0 692 || offset > end 693 || mem->am_size > (end - offset)) { 694 aprint_error_dev(sc->as_dev, 695 "binding memory at bad offset %#lx\n", 696 (unsigned long) offset); 697 mutex_exit(&sc->as_mtx); 698 return EINVAL; 699 } 700 701 /* 702 * XXXfvdl 703 * The memory here needs to be directly accessable from the 704 * AGP video card, so it should be allocated using bus_dma. 705 * However, it need not be contiguous, since individual pages 706 * are translated using the GATT. 707 * 708 * Using a large chunk of contiguous memory may get in the way 709 * of other subsystems that may need one, so we try to be friendly 710 * and ask for allocation in chunks of a minimum of 8 pages 711 * of contiguous memory on average, falling back to 4, 2 and 1 712 * if really needed. Larger chunks are preferred, since allocating 713 * a bus_dma_segment per page would be overkill. 714 */ 715 716 for (contigpages = 8; contigpages > 0; contigpages >>= 1) { 717 nseg = (mem->am_size / (contigpages * PAGE_SIZE)) + 1; 718 segs = malloc(nseg * sizeof *segs, M_AGP, M_WAITOK); 719 if (segs == NULL) { 720 mutex_exit(&sc->as_mtx); 721 return ENOMEM; 722 } 723 if (bus_dmamem_alloc(sc->as_dmat, mem->am_size, PAGE_SIZE, 0, 724 segs, nseg, &mem->am_nseg, 725 contigpages > 1 ? 726 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) != 0) { 727 free(segs, M_AGP); 728 continue; 729 } 730 if (bus_dmamem_map(sc->as_dmat, segs, mem->am_nseg, 731 mem->am_size, &mem->am_virtual, BUS_DMA_WAITOK) != 0) { 732 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 733 free(segs, M_AGP); 734 continue; 735 } 736 if (bus_dmamap_load(sc->as_dmat, mem->am_dmamap, 737 mem->am_virtual, mem->am_size, NULL, BUS_DMA_WAITOK) != 0) { 738 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 739 mem->am_size); 740 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 741 free(segs, M_AGP); 742 continue; 743 } 744 mem->am_dmaseg = segs; 745 break; 746 } 747 748 if (contigpages == 0) { 749 mutex_exit(&sc->as_mtx); 750 return ENOMEM; 751 } 752 753 754 /* 755 * Bind the individual pages and flush the chipset's 756 * TLB. 757 */ 758 done = 0; 759 for (i = 0; i < mem->am_dmamap->dm_nsegs; i++) { 760 seg = &mem->am_dmamap->dm_segs[i]; 761 /* 762 * Install entries in the GATT, making sure that if 763 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 764 * aligned to PAGE_SIZE, we don't modify too many GATT 765 * entries. 766 */ 767 for (j = 0; j < seg->ds_len && (done + j) < mem->am_size; 768 j += AGP_PAGE_SIZE) { 769 pa = seg->ds_addr + j; 770 AGP_DPF(("binding offset %#lx to pa %#lx\n", 771 (unsigned long)(offset + done + j), 772 (unsigned long)pa)); 773 error = AGP_BIND_PAGE(sc, offset + done + j, pa); 774 if (error) { 775 /* 776 * Bail out. Reverse all the mappings 777 * and unwire the pages. 778 */ 779 for (k = 0; k < done + j; k += AGP_PAGE_SIZE) 780 AGP_UNBIND_PAGE(sc, offset + k); 781 782 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 783 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 784 mem->am_size); 785 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, 786 mem->am_nseg); 787 free(mem->am_dmaseg, M_AGP); 788 mutex_exit(&sc->as_mtx); 789 return error; 790 } 791 } 792 done += seg->ds_len; 793 } 794 795 /* 796 * Flush the CPU cache since we are providing a new mapping 797 * for these pages. 798 */ 799 agp_flush_cache(); 800 801 /* 802 * Make sure the chipset gets the new mappings. 803 */ 804 AGP_FLUSH_TLB(sc); 805 806 mem->am_offset = offset; 807 mem->am_is_bound = 1; 808 809 mutex_exit(&sc->as_mtx); 810 811 return 0; 812 } 813 814 int 815 agp_generic_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 816 { 817 int i; 818 819 mutex_enter(&sc->as_mtx); 820 821 if (!mem->am_is_bound) { 822 aprint_error_dev(sc->as_dev, "memory is not bound\n"); 823 mutex_exit(&sc->as_mtx); 824 return EINVAL; 825 } 826 827 828 /* 829 * Unbind the individual pages and flush the chipset's 830 * TLB. Unwire the pages so they can be swapped. 831 */ 832 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 833 AGP_UNBIND_PAGE(sc, mem->am_offset + i); 834 835 agp_flush_cache(); 836 AGP_FLUSH_TLB(sc); 837 838 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 839 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, mem->am_size); 840 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, mem->am_nseg); 841 842 free(mem->am_dmaseg, M_AGP); 843 844 mem->am_offset = 0; 845 mem->am_is_bound = 0; 846 847 mutex_exit(&sc->as_mtx); 848 849 return 0; 850 } 851 852 /* Helper functions for implementing user/kernel api */ 853 854 static int 855 agp_acquire_helper(struct agp_softc *sc, enum agp_acquire_state state) 856 { 857 if (sc->as_state != AGP_ACQUIRE_FREE) 858 return EBUSY; 859 sc->as_state = state; 860 861 return 0; 862 } 863 864 static int 865 agp_release_helper(struct agp_softc *sc, enum agp_acquire_state state) 866 { 867 868 if (sc->as_state == AGP_ACQUIRE_FREE) 869 return 0; 870 871 if (sc->as_state != state) 872 return EBUSY; 873 874 sc->as_state = AGP_ACQUIRE_FREE; 875 return 0; 876 } 877 878 static struct agp_memory * 879 agp_find_memory(struct agp_softc *sc, int id) 880 { 881 struct agp_memory *mem; 882 883 AGP_DPF(("searching for memory block %d\n", id)); 884 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 885 AGP_DPF(("considering memory block %d\n", mem->am_id)); 886 if (mem->am_id == id) 887 return mem; 888 } 889 return 0; 890 } 891 892 /* Implementation of the userland ioctl api */ 893 894 static int 895 agp_info_user(struct agp_softc *sc, agp_info *info) 896 { 897 memset(info, 0, sizeof *info); 898 info->bridge_id = sc->as_id; 899 if (sc->as_capoff != 0) 900 info->agp_mode = pci_conf_read(sc->as_pc, sc->as_tag, 901 sc->as_capoff + PCI_AGP_STATUS); 902 else 903 info->agp_mode = 0; /* i810 doesn't have real AGP */ 904 info->aper_base = sc->as_apaddr; 905 info->aper_size = AGP_GET_APERTURE(sc) >> 20; 906 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 907 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 908 909 return 0; 910 } 911 912 static int 913 agp_setup_user(struct agp_softc *sc, agp_setup *setup) 914 { 915 return AGP_ENABLE(sc, setup->agp_mode); 916 } 917 918 static int 919 agp_allocate_user(struct agp_softc *sc, agp_allocate *alloc) 920 { 921 struct agp_memory *mem; 922 923 mem = AGP_ALLOC_MEMORY(sc, 924 alloc->type, 925 alloc->pg_count << AGP_PAGE_SHIFT); 926 if (mem) { 927 alloc->key = mem->am_id; 928 alloc->physical = mem->am_physical; 929 return 0; 930 } else { 931 return ENOMEM; 932 } 933 } 934 935 static int 936 agp_deallocate_user(struct agp_softc *sc, int id) 937 { 938 struct agp_memory *mem = agp_find_memory(sc, id); 939 940 if (mem) { 941 AGP_FREE_MEMORY(sc, mem); 942 return 0; 943 } else { 944 return ENOENT; 945 } 946 } 947 948 static int 949 agp_bind_user(struct agp_softc *sc, agp_bind *bind) 950 { 951 struct agp_memory *mem = agp_find_memory(sc, bind->key); 952 953 if (!mem) 954 return ENOENT; 955 956 return AGP_BIND_MEMORY(sc, mem, bind->pg_start << AGP_PAGE_SHIFT); 957 } 958 959 static int 960 agp_unbind_user(struct agp_softc *sc, agp_unbind *unbind) 961 { 962 struct agp_memory *mem = agp_find_memory(sc, unbind->key); 963 964 if (!mem) 965 return ENOENT; 966 967 return AGP_UNBIND_MEMORY(sc, mem); 968 } 969 970 static int 971 agpopen(dev_t dev, int oflags, int devtype, struct lwp *l) 972 { 973 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 974 975 if (sc == NULL) 976 return ENXIO; 977 978 if (sc->as_chipc == NULL) 979 return ENXIO; 980 981 if (!sc->as_isopen) 982 sc->as_isopen = 1; 983 else 984 return EBUSY; 985 986 return 0; 987 } 988 989 static int 990 agpclose(dev_t dev, int fflag, int devtype, struct lwp *l) 991 { 992 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 993 struct agp_memory *mem; 994 995 if (sc == NULL) 996 return ENODEV; 997 998 /* 999 * Clear the GATT and force release on last close 1000 */ 1001 if (sc->as_state == AGP_ACQUIRE_USER) { 1002 while ((mem = TAILQ_FIRST(&sc->as_memory))) { 1003 if (mem->am_is_bound) { 1004 printf("agpclose: mem %d is bound\n", 1005 mem->am_id); 1006 AGP_UNBIND_MEMORY(sc, mem); 1007 } 1008 /* 1009 * XXX it is not documented, but if the protocol allows 1010 * allocate->acquire->bind, it would be possible that 1011 * memory ranges are allocated by the kernel here, 1012 * which we shouldn't free. We'd have to keep track of 1013 * the memory range's owner. 1014 * The kernel API is unsed yet, so we get away with 1015 * freeing all. 1016 */ 1017 AGP_FREE_MEMORY(sc, mem); 1018 } 1019 agp_release_helper(sc, AGP_ACQUIRE_USER); 1020 } 1021 sc->as_isopen = 0; 1022 1023 return 0; 1024 } 1025 1026 static int 1027 agpioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *l) 1028 { 1029 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1030 1031 if (sc == NULL) 1032 return ENODEV; 1033 1034 if ((fflag & FWRITE) == 0 && cmd != AGPIOC_INFO) 1035 return EPERM; 1036 1037 switch (cmd) { 1038 case AGPIOC_INFO: 1039 return agp_info_user(sc, (agp_info *) data); 1040 1041 case AGPIOC_ACQUIRE: 1042 return agp_acquire_helper(sc, AGP_ACQUIRE_USER); 1043 1044 case AGPIOC_RELEASE: 1045 return agp_release_helper(sc, AGP_ACQUIRE_USER); 1046 1047 case AGPIOC_SETUP: 1048 return agp_setup_user(sc, (agp_setup *)data); 1049 1050 #ifdef __x86_64__ 1051 { 1052 /* 1053 * Handle paddr_t change from 32 bit for non PAE kernels 1054 * to 64 bit. 1055 */ 1056 #define AGPIOC_OALLOCATE _IOWR(AGPIOC_BASE, 6, agp_oallocate) 1057 1058 typedef struct _agp_oallocate { 1059 int key; /* tag of allocation */ 1060 size_t pg_count; /* number of pages */ 1061 uint32_t type; /* 0 == normal, other devspec */ 1062 u_long physical; /* device specific (some devices 1063 * need a phys address of the 1064 * actual page behind the gatt 1065 * table) */ 1066 } agp_oallocate; 1067 1068 case AGPIOC_OALLOCATE: { 1069 int ret; 1070 agp_allocate aga; 1071 agp_oallocate *oaga = data; 1072 1073 aga.type = oaga->type; 1074 aga.pg_count = oaga->pg_count; 1075 1076 if ((ret = agp_allocate_user(sc, &aga)) == 0) { 1077 oaga->key = aga.key; 1078 oaga->physical = (u_long)aga.physical; 1079 } 1080 1081 return ret; 1082 } 1083 } 1084 #endif 1085 case AGPIOC_ALLOCATE: 1086 return agp_allocate_user(sc, (agp_allocate *)data); 1087 1088 case AGPIOC_DEALLOCATE: 1089 return agp_deallocate_user(sc, *(int *) data); 1090 1091 case AGPIOC_BIND: 1092 return agp_bind_user(sc, (agp_bind *)data); 1093 1094 case AGPIOC_UNBIND: 1095 return agp_unbind_user(sc, (agp_unbind *)data); 1096 1097 } 1098 1099 return EINVAL; 1100 } 1101 1102 static paddr_t 1103 agpmmap(dev_t dev, off_t offset, int prot) 1104 { 1105 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1106 1107 if (sc == NULL) 1108 return ENODEV; 1109 1110 if (offset > AGP_GET_APERTURE(sc)) 1111 return -1; 1112 1113 return (bus_space_mmap(sc->as_apt, sc->as_apaddr, offset, prot, 1114 BUS_SPACE_MAP_LINEAR)); 1115 } 1116 1117 const struct cdevsw agp_cdevsw = { 1118 .d_open = agpopen, 1119 .d_close = agpclose, 1120 .d_read = noread, 1121 .d_write = nowrite, 1122 .d_ioctl = agpioctl, 1123 .d_stop = nostop, 1124 .d_tty = notty, 1125 .d_poll = nopoll, 1126 .d_mmap = agpmmap, 1127 .d_kqfilter = nokqfilter, 1128 .d_discard = nodiscard, 1129 .d_flag = D_OTHER 1130 }; 1131 1132 /* Implementation of the kernel api */ 1133 1134 void * 1135 agp_find_device(int unit) 1136 { 1137 return device_lookup_private(&agp_cd, unit); 1138 } 1139 1140 enum agp_acquire_state 1141 agp_state(void *devcookie) 1142 { 1143 struct agp_softc *sc = devcookie; 1144 1145 return sc->as_state; 1146 } 1147 1148 void 1149 agp_get_info(void *devcookie, struct agp_info *info) 1150 { 1151 struct agp_softc *sc = devcookie; 1152 1153 info->ai_mode = pci_conf_read(sc->as_pc, sc->as_tag, 1154 sc->as_capoff + PCI_AGP_STATUS); 1155 info->ai_aperture_base = sc->as_apaddr; 1156 info->ai_aperture_size = sc->as_apsize; /* XXXfvdl inconsistent */ 1157 info->ai_memory_allowed = sc->as_maxmem; 1158 info->ai_memory_used = sc->as_allocated; 1159 info->ai_devid = sc->as_id; 1160 } 1161 1162 int 1163 agp_acquire(void *dev) 1164 { 1165 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 1166 } 1167 1168 int 1169 agp_release(void *dev) 1170 { 1171 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 1172 } 1173 1174 int 1175 agp_enable(void *dev, u_int32_t mode) 1176 { 1177 struct agp_softc *sc = dev; 1178 1179 return AGP_ENABLE(sc, mode); 1180 } 1181 1182 void * 1183 agp_alloc_memory(void *dev, int type, vsize_t bytes) 1184 { 1185 struct agp_softc *sc = dev; 1186 1187 return (void *)AGP_ALLOC_MEMORY(sc, type, bytes); 1188 } 1189 1190 void 1191 agp_free_memory(void *dev, void *handle) 1192 { 1193 struct agp_softc *sc = dev; 1194 struct agp_memory *mem = handle; 1195 1196 AGP_FREE_MEMORY(sc, mem); 1197 } 1198 1199 int 1200 agp_bind_memory(void *dev, void *handle, off_t offset) 1201 { 1202 struct agp_softc *sc = dev; 1203 struct agp_memory *mem = handle; 1204 1205 return AGP_BIND_MEMORY(sc, mem, offset); 1206 } 1207 1208 int 1209 agp_unbind_memory(void *dev, void *handle) 1210 { 1211 struct agp_softc *sc = dev; 1212 struct agp_memory *mem = handle; 1213 1214 return AGP_UNBIND_MEMORY(sc, mem); 1215 } 1216 1217 void 1218 agp_memory_info(void *dev, void *handle, struct agp_memory_info *mi) 1219 { 1220 struct agp_memory *mem = handle; 1221 1222 mi->ami_size = mem->am_size; 1223 mi->ami_physical = mem->am_physical; 1224 mi->ami_offset = mem->am_offset; 1225 mi->ami_is_bound = mem->am_is_bound; 1226 } 1227 1228 int 1229 agp_alloc_dmamem(bus_dma_tag_t tag, size_t size, int flags, 1230 bus_dmamap_t *mapp, void **vaddr, bus_addr_t *baddr, 1231 bus_dma_segment_t *seg, int nseg, int *rseg) 1232 1233 { 1234 int error, level = 0; 1235 1236 if ((error = bus_dmamem_alloc(tag, size, PAGE_SIZE, 0, 1237 seg, nseg, rseg, BUS_DMA_NOWAIT)) != 0) 1238 goto out; 1239 level++; 1240 1241 if ((error = bus_dmamem_map(tag, seg, *rseg, size, vaddr, 1242 BUS_DMA_NOWAIT | flags)) != 0) 1243 goto out; 1244 level++; 1245 1246 if ((error = bus_dmamap_create(tag, size, *rseg, size, 0, 1247 BUS_DMA_NOWAIT, mapp)) != 0) 1248 goto out; 1249 level++; 1250 1251 if ((error = bus_dmamap_load(tag, *mapp, *vaddr, size, NULL, 1252 BUS_DMA_NOWAIT)) != 0) 1253 goto out; 1254 1255 *baddr = (*mapp)->dm_segs[0].ds_addr; 1256 1257 return 0; 1258 out: 1259 switch (level) { 1260 case 3: 1261 bus_dmamap_destroy(tag, *mapp); 1262 /* FALLTHROUGH */ 1263 case 2: 1264 bus_dmamem_unmap(tag, *vaddr, size); 1265 /* FALLTHROUGH */ 1266 case 1: 1267 bus_dmamem_free(tag, seg, *rseg); 1268 break; 1269 default: 1270 break; 1271 } 1272 1273 return error; 1274 } 1275 1276 void 1277 agp_free_dmamem(bus_dma_tag_t tag, size_t size, bus_dmamap_t map, 1278 void *vaddr, bus_dma_segment_t *seg, int nseg) 1279 { 1280 bus_dmamap_unload(tag, map); 1281 bus_dmamap_destroy(tag, map); 1282 bus_dmamem_unmap(tag, vaddr, size); 1283 bus_dmamem_free(tag, seg, nseg); 1284 } 1285 1286 static bool 1287 agp_resume(device_t dv, const pmf_qual_t *qual) 1288 { 1289 agp_flush_cache(); 1290 1291 return true; 1292 } 1293
Indexes created Tue Oct 14 06:10:07 GMT 2025