agp_i810.c revision 1.70 1 1.70 gsutre /* $NetBSD: agp_i810.c,v 1.70 2011/01/25 10:52:11 gsutre Exp $ */
2 1.1 fvdl
3 1.1 fvdl /*-
4 1.1 fvdl * Copyright (c) 2000 Doug Rabson
5 1.1 fvdl * Copyright (c) 2000 Ruslan Ermilov
6 1.1 fvdl * All rights reserved.
7 1.1 fvdl *
8 1.1 fvdl * Redistribution and use in source and binary forms, with or without
9 1.1 fvdl * modification, are permitted provided that the following conditions
10 1.1 fvdl * are met:
11 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
12 1.1 fvdl * notice, this list of conditions and the following disclaimer.
13 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
15 1.1 fvdl * documentation and/or other materials provided with the distribution.
16 1.1 fvdl *
17 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 1.1 fvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 1.1 fvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 1.1 fvdl * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 1.1 fvdl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 1.1 fvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 1.1 fvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 1.1 fvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 1.1 fvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 1.1 fvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 1.1 fvdl * SUCH DAMAGE.
28 1.1 fvdl *
29 1.1 fvdl * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $
30 1.1 fvdl */
31 1.9 lukem
32 1.9 lukem #include <sys/cdefs.h>
33 1.70 gsutre __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.70 2011/01/25 10:52:11 gsutre Exp $");
34 1.1 fvdl
35 1.1 fvdl #include <sys/param.h>
36 1.1 fvdl #include <sys/systm.h>
37 1.1 fvdl #include <sys/malloc.h>
38 1.1 fvdl #include <sys/kernel.h>
39 1.1 fvdl #include <sys/proc.h>
40 1.1 fvdl #include <sys/device.h>
41 1.1 fvdl #include <sys/conf.h>
42 1.1 fvdl
43 1.1 fvdl #include <dev/pci/pcivar.h>
44 1.1 fvdl #include <dev/pci/pcireg.h>
45 1.1 fvdl #include <dev/pci/pcidevs.h>
46 1.1 fvdl #include <dev/pci/agpvar.h>
47 1.1 fvdl #include <dev/pci/agpreg.h>
48 1.1 fvdl
49 1.1 fvdl #include <sys/agpio.h>
50 1.1 fvdl
51 1.43 ad #include <sys/bus.h>
52 1.1 fvdl
53 1.20 tron #include "agp_intel.h"
54 1.20 tron
55 1.1 fvdl #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off)
56 1.14 scw #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off)
57 1.1 fvdl #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v)
58 1.1 fvdl
59 1.14 scw #define CHIP_I810 0 /* i810/i815 */
60 1.17 hannken #define CHIP_I830 1 /* 830M/845G */
61 1.17 hannken #define CHIP_I855 2 /* 852GM/855GM/865G */
62 1.56 tnn #define CHIP_I915 3 /* 915G/915GM/945G/945GM/945GME */
63 1.45 joerg #define CHIP_I965 4 /* 965Q/965PM */
64 1.45 joerg #define CHIP_G33 5 /* G33/Q33/Q35 */
65 1.58 christos #define CHIP_G4X 6 /* G45/Q45 */
66 1.14 scw
67 1.1 fvdl struct agp_i810_softc {
68 1.1 fvdl u_int32_t initial_aperture; /* aperture size at startup */
69 1.1 fvdl struct agp_gatt *gatt;
70 1.14 scw int chiptype; /* i810-like or i830 */
71 1.14 scw u_int32_t dcache_size; /* i810 only */
72 1.14 scw u_int32_t stolen; /* number of i830/845 gtt entries
73 1.14 scw for stolen memory */
74 1.28 christos bus_space_tag_t bst; /* register bus_space tag */
75 1.28 christos bus_space_handle_t bsh; /* register bus_space handle */
76 1.28 christos bus_space_tag_t gtt_bst; /* GTT bus_space tag */
77 1.28 christos bus_space_handle_t gtt_bsh; /* GTT bus_space handle */
78 1.1 fvdl struct pci_attach_args vga_pa;
79 1.24 jmcneill
80 1.47 jmcneill u_int32_t pgtblctl;
81 1.1 fvdl };
82 1.1 fvdl
83 1.49 drochner /* XXX hack, see below */
84 1.50 drochner static bus_addr_t agp_i810_vga_regbase;
85 1.50 drochner static bus_space_handle_t agp_i810_vga_bsh;
86 1.49 drochner
87 1.1 fvdl static u_int32_t agp_i810_get_aperture(struct agp_softc *);
88 1.1 fvdl static int agp_i810_set_aperture(struct agp_softc *, u_int32_t);
89 1.1 fvdl static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t);
90 1.1 fvdl static int agp_i810_unbind_page(struct agp_softc *, off_t);
91 1.1 fvdl static void agp_i810_flush_tlb(struct agp_softc *);
92 1.1 fvdl static int agp_i810_enable(struct agp_softc *, u_int32_t mode);
93 1.1 fvdl static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int,
94 1.1 fvdl vsize_t);
95 1.1 fvdl static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *);
96 1.1 fvdl static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t);
97 1.1 fvdl static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *);
98 1.47 jmcneill
99 1.66 dyoung static bool agp_i810_resume(device_t, const pmf_qual_t *);
100 1.47 jmcneill static int agp_i810_init(struct agp_softc *);
101 1.1 fvdl
102 1.45 joerg static int agp_i810_init(struct agp_softc *);
103 1.58 christos static void agp_i810_write_gtt_entry(struct agp_i810_softc *, off_t,
104 1.58 christos u_int32_t);
105 1.45 joerg
106 1.26 thorpej static struct agp_methods agp_i810_methods = {
107 1.1 fvdl agp_i810_get_aperture,
108 1.1 fvdl agp_i810_set_aperture,
109 1.1 fvdl agp_i810_bind_page,
110 1.1 fvdl agp_i810_unbind_page,
111 1.1 fvdl agp_i810_flush_tlb,
112 1.1 fvdl agp_i810_enable,
113 1.1 fvdl agp_i810_alloc_memory,
114 1.1 fvdl agp_i810_free_memory,
115 1.1 fvdl agp_i810_bind_memory,
116 1.1 fvdl agp_i810_unbind_memory,
117 1.1 fvdl };
118 1.1 fvdl
119 1.58 christos static void
120 1.58 christos agp_i810_write_gtt_entry(struct agp_i810_softc *isc, off_t off, u_int32_t v)
121 1.58 christos {
122 1.58 christos u_int32_t base_off;
123 1.58 christos
124 1.58 christos base_off = 0;
125 1.58 christos
126 1.58 christos switch (isc->chiptype) {
127 1.58 christos case CHIP_I810:
128 1.58 christos case CHIP_I830:
129 1.58 christos case CHIP_I855:
130 1.58 christos base_off = AGP_I810_GTT;
131 1.58 christos break;
132 1.58 christos case CHIP_I965:
133 1.58 christos base_off = AGP_I965_GTT;
134 1.58 christos break;
135 1.58 christos case CHIP_G4X:
136 1.58 christos base_off = AGP_G4X_GTT;
137 1.58 christos break;
138 1.58 christos case CHIP_I915:
139 1.58 christos case CHIP_G33:
140 1.59 alc bus_space_write_4(isc->gtt_bst, isc->gtt_bsh,
141 1.59 alc (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, (v));
142 1.59 alc return;
143 1.58 christos }
144 1.58 christos
145 1.58 christos WRITE4(base_off + (u_int32_t)(off >> AGP_PAGE_SHIFT) * 4, v);
146 1.58 christos }
147 1.58 christos
148 1.55 matthias /* XXXthorpej -- duplicated code (see arch/x86/pci/pchb.c) */
149 1.1 fvdl static int
150 1.1 fvdl agp_i810_vgamatch(struct pci_attach_args *pa)
151 1.1 fvdl {
152 1.6 thorpej
153 1.2 fvdl if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY ||
154 1.2 fvdl PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
155 1.6 thorpej return (0);
156 1.6 thorpej
157 1.1 fvdl switch (PCI_PRODUCT(pa->pa_id)) {
158 1.1 fvdl case PCI_PRODUCT_INTEL_82810_GC:
159 1.1 fvdl case PCI_PRODUCT_INTEL_82810_DC100_GC:
160 1.1 fvdl case PCI_PRODUCT_INTEL_82810E_GC:
161 1.1 fvdl case PCI_PRODUCT_INTEL_82815_FULL_GRAPH:
162 1.14 scw case PCI_PRODUCT_INTEL_82830MP_IV:
163 1.14 scw case PCI_PRODUCT_INTEL_82845G_IGD:
164 1.17 hannken case PCI_PRODUCT_INTEL_82855GM_IGD:
165 1.18 tron case PCI_PRODUCT_INTEL_82865_IGD:
166 1.28 christos case PCI_PRODUCT_INTEL_82915G_IGD:
167 1.28 christos case PCI_PRODUCT_INTEL_82915GM_IGD:
168 1.32 simonb case PCI_PRODUCT_INTEL_82945P_IGD:
169 1.32 simonb case PCI_PRODUCT_INTEL_82945GM_IGD:
170 1.32 simonb case PCI_PRODUCT_INTEL_82945GM_IGD_1:
171 1.56 tnn case PCI_PRODUCT_INTEL_82945GME_IGD:
172 1.68 riz case PCI_PRODUCT_INTEL_E7221_IGD:
173 1.42 markd case PCI_PRODUCT_INTEL_82965Q_IGD:
174 1.42 markd case PCI_PRODUCT_INTEL_82965Q_IGD_1:
175 1.45 joerg case PCI_PRODUCT_INTEL_82965PM_IGD:
176 1.45 joerg case PCI_PRODUCT_INTEL_82965PM_IGD_1:
177 1.45 joerg case PCI_PRODUCT_INTEL_82G33_IGD:
178 1.45 joerg case PCI_PRODUCT_INTEL_82G33_IGD_1:
179 1.44 jnemeth case PCI_PRODUCT_INTEL_82965G_IGD:
180 1.44 jnemeth case PCI_PRODUCT_INTEL_82965G_IGD_1:
181 1.68 riz case PCI_PRODUCT_INTEL_82965GME_IGD:
182 1.46 markd case PCI_PRODUCT_INTEL_82Q35_IGD:
183 1.46 markd case PCI_PRODUCT_INTEL_82Q35_IGD_1:
184 1.46 markd case PCI_PRODUCT_INTEL_82Q33_IGD:
185 1.46 markd case PCI_PRODUCT_INTEL_82Q33_IGD_1:
186 1.57 christos case PCI_PRODUCT_INTEL_82G35_IGD:
187 1.57 christos case PCI_PRODUCT_INTEL_82G35_IGD_1:
188 1.55 matthias case PCI_PRODUCT_INTEL_82946GZ_IGD:
189 1.58 christos case PCI_PRODUCT_INTEL_82GM45_IGD:
190 1.58 christos case PCI_PRODUCT_INTEL_82GM45_IGD_1:
191 1.62 markd case PCI_PRODUCT_INTEL_82IGD_E_IGD:
192 1.62 markd case PCI_PRODUCT_INTEL_82Q45_IGD:
193 1.62 markd case PCI_PRODUCT_INTEL_82G45_IGD:
194 1.68 riz case PCI_PRODUCT_INTEL_82G41_IGD:
195 1.68 riz case PCI_PRODUCT_INTEL_82B43_IGD:
196 1.68 riz case PCI_PRODUCT_INTEL_IRONLAKE_D_IGD:
197 1.68 riz case PCI_PRODUCT_INTEL_IRONLAKE_M_IGD:
198 1.6 thorpej return (1);
199 1.1 fvdl }
200 1.1 fvdl
201 1.6 thorpej return (0);
202 1.1 fvdl }
203 1.1 fvdl
204 1.42 markd static int
205 1.42 markd agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg)
206 1.42 markd {
207 1.42 markd /*
208 1.42 markd * Find the aperture. Don't map it (yet), this would
209 1.42 markd * eat KVA.
210 1.42 markd */
211 1.42 markd if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
212 1.42 markd PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, &sc->as_apsize,
213 1.42 markd &sc->as_apflags) != 0)
214 1.42 markd return ENXIO;
215 1.42 markd
216 1.42 markd sc->as_apt = pa->pa_memt;
217 1.42 markd
218 1.42 markd return 0;
219 1.42 markd }
220 1.42 markd
221 1.1 fvdl int
222 1.54 freza agp_i810_attach(device_t parent, device_t self, void *aux)
223 1.1 fvdl {
224 1.54 freza struct agp_softc *sc = device_private(self);
225 1.1 fvdl struct agp_i810_softc *isc;
226 1.1 fvdl struct agp_gatt *gatt;
227 1.28 christos int error, apbase;
228 1.49 drochner bus_addr_t mmadr;
229 1.37 drochner bus_size_t mmadrsize;
230 1.1 fvdl
231 1.10 tsutsui isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO);
232 1.1 fvdl if (isc == NULL) {
233 1.15 thorpej aprint_error(": can't allocate chipset-specific softc\n");
234 1.1 fvdl return ENOMEM;
235 1.1 fvdl }
236 1.1 fvdl sc->as_chipc = isc;
237 1.1 fvdl sc->as_methods = &agp_i810_methods;
238 1.1 fvdl
239 1.1 fvdl if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) {
240 1.20 tron #if NAGP_INTEL > 0
241 1.19 tron const struct pci_attach_args *pa = aux;
242 1.19 tron
243 1.19 tron switch (PCI_PRODUCT(pa->pa_id)) {
244 1.19 tron case PCI_PRODUCT_INTEL_82840_HB:
245 1.19 tron case PCI_PRODUCT_INTEL_82865_HB:
246 1.21 tron case PCI_PRODUCT_INTEL_82845G_DRAM:
247 1.23 xtraeme case PCI_PRODUCT_INTEL_82815_FULL_HUB:
248 1.67 jakllsch case PCI_PRODUCT_INTEL_82855GM_MCH:
249 1.19 tron return agp_intel_attach(parent, self, aux);
250 1.20 tron }
251 1.20 tron #endif
252 1.15 thorpej aprint_error(": can't find internal VGA device config space\n");
253 1.1 fvdl free(isc, M_AGP);
254 1.1 fvdl return ENOENT;
255 1.1 fvdl }
256 1.1 fvdl
257 1.1 fvdl /* XXXfvdl */
258 1.1 fvdl sc->as_dmat = isc->vga_pa.pa_dmat;
259 1.1 fvdl
260 1.14 scw switch (PCI_PRODUCT(isc->vga_pa.pa_id)) {
261 1.14 scw case PCI_PRODUCT_INTEL_82810_GC:
262 1.14 scw case PCI_PRODUCT_INTEL_82810_DC100_GC:
263 1.14 scw case PCI_PRODUCT_INTEL_82810E_GC:
264 1.14 scw case PCI_PRODUCT_INTEL_82815_FULL_GRAPH:
265 1.14 scw isc->chiptype = CHIP_I810;
266 1.14 scw break;
267 1.14 scw case PCI_PRODUCT_INTEL_82830MP_IV:
268 1.14 scw case PCI_PRODUCT_INTEL_82845G_IGD:
269 1.14 scw isc->chiptype = CHIP_I830;
270 1.14 scw break;
271 1.17 hannken case PCI_PRODUCT_INTEL_82855GM_IGD:
272 1.18 tron case PCI_PRODUCT_INTEL_82865_IGD:
273 1.17 hannken isc->chiptype = CHIP_I855;
274 1.17 hannken break;
275 1.28 christos case PCI_PRODUCT_INTEL_82915G_IGD:
276 1.28 christos case PCI_PRODUCT_INTEL_82915GM_IGD:
277 1.32 simonb case PCI_PRODUCT_INTEL_82945P_IGD:
278 1.32 simonb case PCI_PRODUCT_INTEL_82945GM_IGD:
279 1.32 simonb case PCI_PRODUCT_INTEL_82945GM_IGD_1:
280 1.56 tnn case PCI_PRODUCT_INTEL_82945GME_IGD:
281 1.68 riz case PCI_PRODUCT_INTEL_E7221_IGD:
282 1.28 christos isc->chiptype = CHIP_I915;
283 1.28 christos break;
284 1.42 markd case PCI_PRODUCT_INTEL_82965Q_IGD:
285 1.42 markd case PCI_PRODUCT_INTEL_82965Q_IGD_1:
286 1.45 joerg case PCI_PRODUCT_INTEL_82965PM_IGD:
287 1.45 joerg case PCI_PRODUCT_INTEL_82965PM_IGD_1:
288 1.44 jnemeth case PCI_PRODUCT_INTEL_82965G_IGD:
289 1.44 jnemeth case PCI_PRODUCT_INTEL_82965G_IGD_1:
290 1.68 riz case PCI_PRODUCT_INTEL_82965GME_IGD:
291 1.55 matthias case PCI_PRODUCT_INTEL_82946GZ_IGD:
292 1.57 christos case PCI_PRODUCT_INTEL_82G35_IGD:
293 1.57 christos case PCI_PRODUCT_INTEL_82G35_IGD_1:
294 1.42 markd isc->chiptype = CHIP_I965;
295 1.42 markd break;
296 1.46 markd case PCI_PRODUCT_INTEL_82Q35_IGD:
297 1.46 markd case PCI_PRODUCT_INTEL_82Q35_IGD_1:
298 1.45 joerg case PCI_PRODUCT_INTEL_82G33_IGD:
299 1.45 joerg case PCI_PRODUCT_INTEL_82G33_IGD_1:
300 1.46 markd case PCI_PRODUCT_INTEL_82Q33_IGD:
301 1.46 markd case PCI_PRODUCT_INTEL_82Q33_IGD_1:
302 1.45 joerg isc->chiptype = CHIP_G33;
303 1.63 markd break;
304 1.58 christos case PCI_PRODUCT_INTEL_82GM45_IGD:
305 1.58 christos case PCI_PRODUCT_INTEL_82GM45_IGD_1:
306 1.62 markd case PCI_PRODUCT_INTEL_82IGD_E_IGD:
307 1.62 markd case PCI_PRODUCT_INTEL_82Q45_IGD:
308 1.62 markd case PCI_PRODUCT_INTEL_82G45_IGD:
309 1.68 riz case PCI_PRODUCT_INTEL_82G41_IGD:
310 1.68 riz case PCI_PRODUCT_INTEL_82B43_IGD:
311 1.68 riz case PCI_PRODUCT_INTEL_IRONLAKE_D_IGD:
312 1.68 riz case PCI_PRODUCT_INTEL_IRONLAKE_M_IGD:
313 1.58 christos isc->chiptype = CHIP_G4X;
314 1.45 joerg break;
315 1.14 scw }
316 1.14 scw
317 1.45 joerg switch (isc->chiptype) {
318 1.45 joerg case CHIP_I915:
319 1.45 joerg case CHIP_G33:
320 1.45 joerg apbase = AGP_I915_GMADR;
321 1.45 joerg break;
322 1.58 christos case CHIP_I965:
323 1.58 christos case CHIP_G4X:
324 1.58 christos apbase = AGP_I965_GMADR;
325 1.58 christos break;
326 1.45 joerg default:
327 1.45 joerg apbase = AGP_I810_GMADR;
328 1.45 joerg break;
329 1.45 joerg }
330 1.58 christos
331 1.58 christos if (isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G4X) {
332 1.58 christos error = agp_i965_map_aperture(&isc->vga_pa, sc, apbase);
333 1.42 markd } else {
334 1.42 markd error = agp_map_aperture(&isc->vga_pa, sc, apbase);
335 1.42 markd }
336 1.1 fvdl if (error != 0) {
337 1.28 christos aprint_error(": can't map aperture\n");
338 1.28 christos free(isc, M_AGP);
339 1.1 fvdl return error;
340 1.1 fvdl }
341 1.1 fvdl
342 1.45 joerg if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) {
343 1.28 christos error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR,
344 1.39 drochner PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh,
345 1.49 drochner &mmadr, &mmadrsize);
346 1.28 christos if (error != 0) {
347 1.28 christos aprint_error(": can't map mmadr registers\n");
348 1.28 christos agp_generic_detach(sc);
349 1.28 christos return error;
350 1.28 christos }
351 1.28 christos error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR,
352 1.28 christos PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh,
353 1.28 christos NULL, NULL);
354 1.28 christos if (error != 0) {
355 1.28 christos aprint_error(": can't map gttadr registers\n");
356 1.28 christos /* XXX we should release mmadr here */
357 1.28 christos agp_generic_detach(sc);
358 1.28 christos return error;
359 1.28 christos }
360 1.58 christos } else if (isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G4X) {
361 1.42 markd error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR,
362 1.42 markd PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh,
363 1.49 drochner &mmadr, &mmadrsize);
364 1.42 markd if (error != 0) {
365 1.42 markd aprint_error(": can't map mmadr registers\n");
366 1.42 markd agp_generic_detach(sc);
367 1.42 markd return error;
368 1.42 markd }
369 1.28 christos } else {
370 1.28 christos error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR,
371 1.39 drochner PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh,
372 1.49 drochner &mmadr, &mmadrsize);
373 1.28 christos if (error != 0) {
374 1.28 christos aprint_error(": can't map mmadr registers\n");
375 1.28 christos agp_generic_detach(sc);
376 1.28 christos return error;
377 1.28 christos }
378 1.28 christos }
379 1.28 christos
380 1.1 fvdl isc->initial_aperture = AGP_GET_APERTURE(sc);
381 1.1 fvdl
382 1.14 scw gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT);
383 1.14 scw if (!gatt) {
384 1.14 scw agp_generic_detach(sc);
385 1.14 scw return ENOMEM;
386 1.14 scw }
387 1.14 scw isc->gatt = gatt;
388 1.14 scw
389 1.14 scw gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT;
390 1.1 fvdl
391 1.47 jmcneill if (!pmf_device_register(self, NULL, agp_i810_resume))
392 1.47 jmcneill aprint_error_dev(self, "couldn't establish power handler\n");
393 1.47 jmcneill
394 1.49 drochner /*
395 1.49 drochner * XXX horrible hack to allow drm code to use our mapping
396 1.49 drochner * of VGA chip registers
397 1.49 drochner */
398 1.49 drochner agp_i810_vga_regbase = mmadr;
399 1.49 drochner agp_i810_vga_bsh = isc->bsh;
400 1.49 drochner
401 1.45 joerg return agp_i810_init(sc);
402 1.45 joerg }
403 1.45 joerg
404 1.49 drochner /*
405 1.49 drochner * XXX horrible hack to allow drm code to use our mapping
406 1.49 drochner * of VGA chip registers
407 1.49 drochner */
408 1.49 drochner int
409 1.49 drochner agp_i810_borrow(bus_addr_t base, bus_space_handle_t *hdlp)
410 1.49 drochner {
411 1.49 drochner
412 1.49 drochner if (!agp_i810_vga_regbase || base != agp_i810_vga_regbase)
413 1.49 drochner return 0;
414 1.49 drochner *hdlp = agp_i810_vga_bsh;
415 1.49 drochner return 1;
416 1.49 drochner }
417 1.49 drochner
418 1.45 joerg static int agp_i810_init(struct agp_softc *sc)
419 1.45 joerg {
420 1.45 joerg struct agp_i810_softc *isc;
421 1.45 joerg struct agp_gatt *gatt;
422 1.45 joerg
423 1.45 joerg isc = sc->as_chipc;
424 1.45 joerg gatt = isc->gatt;
425 1.45 joerg
426 1.14 scw if (isc->chiptype == CHIP_I810) {
427 1.36 christos void *virtual;
428 1.14 scw int dummyseg;
429 1.31 tron
430 1.14 scw /* Some i810s have on-chip memory called dcache */
431 1.14 scw if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
432 1.14 scw isc->dcache_size = 4 * 1024 * 1024;
433 1.14 scw else
434 1.14 scw isc->dcache_size = 0;
435 1.14 scw
436 1.14 scw /* According to the specs the gatt on the i810 must be 64k */
437 1.14 scw if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024,
438 1.31 tron 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical,
439 1.31 tron &gatt->ag_dmaseg, 1, &dummyseg) != 0) {
440 1.14 scw free(gatt, M_AGP);
441 1.1 fvdl agp_generic_detach(sc);
442 1.1 fvdl return ENOMEM;
443 1.1 fvdl }
444 1.31 tron gatt->ag_virtual = (uint32_t *)virtual;
445 1.14 scw gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t);
446 1.14 scw memset(gatt->ag_virtual, 0, gatt->ag_size);
447 1.25 perry
448 1.14 scw agp_flush_cache();
449 1.14 scw /* Install the GATT. */
450 1.14 scw WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1);
451 1.17 hannken } else if (isc->chiptype == CHIP_I830) {
452 1.14 scw /* The i830 automatically initializes the 128k gatt on boot. */
453 1.14 scw pcireg_t reg;
454 1.14 scw u_int32_t pgtblctl;
455 1.14 scw u_int16_t gcc1;
456 1.14 scw
457 1.14 scw reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
458 1.14 scw gcc1 = (u_int16_t)(reg >> 16);
459 1.14 scw switch (gcc1 & AGP_I830_GCC1_GMS) {
460 1.14 scw case AGP_I830_GCC1_GMS_STOLEN_512:
461 1.14 scw isc->stolen = (512 - 132) * 1024 / 4096;
462 1.14 scw break;
463 1.25 perry case AGP_I830_GCC1_GMS_STOLEN_1024:
464 1.14 scw isc->stolen = (1024 - 132) * 1024 / 4096;
465 1.14 scw break;
466 1.25 perry case AGP_I830_GCC1_GMS_STOLEN_8192:
467 1.14 scw isc->stolen = (8192 - 132) * 1024 / 4096;
468 1.14 scw break;
469 1.14 scw default:
470 1.14 scw isc->stolen = 0;
471 1.15 thorpej aprint_error(
472 1.15 thorpej ": unknown memory configuration, disabling\n");
473 1.14 scw agp_generic_detach(sc);
474 1.14 scw return EINVAL;
475 1.14 scw }
476 1.45 joerg
477 1.14 scw if (isc->stolen > 0) {
478 1.53 jmcneill aprint_normal(": detected %dk stolen memory\n%s",
479 1.54 freza isc->stolen * 4, device_xname(sc->as_dev));
480 1.14 scw }
481 1.17 hannken
482 1.17 hannken /* GATT address is already in there, make sure it's enabled */
483 1.17 hannken pgtblctl = READ4(AGP_I810_PGTBL_CTL);
484 1.17 hannken pgtblctl |= 1;
485 1.17 hannken WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
486 1.17 hannken
487 1.17 hannken gatt->ag_physical = pgtblctl & ~1;
488 1.42 markd } else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 ||
489 1.58 christos isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G33 ||
490 1.58 christos isc->chiptype == CHIP_G4X) {
491 1.17 hannken pcireg_t reg;
492 1.58 christos u_int32_t pgtblctl, gtt_size, stolen;
493 1.17 hannken u_int16_t gcc1;
494 1.17 hannken
495 1.45 joerg reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1);
496 1.45 joerg gcc1 = (u_int16_t)(reg >> 16);
497 1.45 joerg
498 1.58 christos pgtblctl = READ4(AGP_I810_PGTBL_CTL);
499 1.58 christos
500 1.42 markd /* Stolen memory is set up at the beginning of the aperture by
501 1.42 markd * the BIOS, consisting of the GATT followed by 4kb for the
502 1.42 markd * BIOS display.
503 1.42 markd */
504 1.42 markd switch (isc->chiptype) {
505 1.42 markd case CHIP_I855:
506 1.58 christos gtt_size = 128;
507 1.42 markd break;
508 1.42 markd case CHIP_I915:
509 1.58 christos gtt_size = 256;
510 1.42 markd break;
511 1.42 markd case CHIP_I965:
512 1.60 christos switch (pgtblctl & AGP_I810_PGTBL_SIZE_MASK) {
513 1.58 christos case AGP_I810_PGTBL_SIZE_128KB:
514 1.58 christos case AGP_I810_PGTBL_SIZE_512KB:
515 1.58 christos gtt_size = 512;
516 1.58 christos break;
517 1.58 christos case AGP_I965_PGTBL_SIZE_1MB:
518 1.58 christos gtt_size = 1024;
519 1.58 christos break;
520 1.58 christos case AGP_I965_PGTBL_SIZE_2MB:
521 1.61 sketch gtt_size = 2048;
522 1.58 christos break;
523 1.58 christos case AGP_I965_PGTBL_SIZE_1_5MB:
524 1.61 sketch gtt_size = 1024 + 512;
525 1.58 christos break;
526 1.58 christos default:
527 1.58 christos aprint_error("Bad PGTBL size\n");
528 1.58 christos agp_generic_detach(sc);
529 1.58 christos return EINVAL;
530 1.58 christos }
531 1.42 markd break;
532 1.45 joerg case CHIP_G33:
533 1.45 joerg switch (gcc1 & AGP_G33_PGTBL_SIZE_MASK) {
534 1.45 joerg case AGP_G33_PGTBL_SIZE_1M:
535 1.58 christos gtt_size = 1024;
536 1.45 joerg break;
537 1.45 joerg case AGP_G33_PGTBL_SIZE_2M:
538 1.58 christos gtt_size = 2048;
539 1.45 joerg break;
540 1.45 joerg default:
541 1.58 christos aprint_error(": Bad PGTBL size\n");
542 1.45 joerg agp_generic_detach(sc);
543 1.45 joerg return EINVAL;
544 1.45 joerg }
545 1.45 joerg break;
546 1.58 christos case CHIP_G4X:
547 1.58 christos gtt_size = 0;
548 1.58 christos break;
549 1.42 markd default:
550 1.42 markd aprint_error(": bad chiptype\n");
551 1.42 markd agp_generic_detach(sc);
552 1.42 markd return EINVAL;
553 1.58 christos }
554 1.42 markd
555 1.17 hannken switch (gcc1 & AGP_I855_GCC1_GMS) {
556 1.17 hannken case AGP_I855_GCC1_GMS_STOLEN_1M:
557 1.58 christos stolen = 1024;
558 1.17 hannken break;
559 1.17 hannken case AGP_I855_GCC1_GMS_STOLEN_4M:
560 1.58 christos stolen = 4 * 1024;
561 1.17 hannken break;
562 1.17 hannken case AGP_I855_GCC1_GMS_STOLEN_8M:
563 1.58 christos stolen = 8 * 1024;
564 1.17 hannken break;
565 1.17 hannken case AGP_I855_GCC1_GMS_STOLEN_16M:
566 1.58 christos stolen = 16 * 1024;
567 1.17 hannken break;
568 1.17 hannken case AGP_I855_GCC1_GMS_STOLEN_32M:
569 1.58 christos stolen = 32 * 1024;
570 1.41 sborrill break;
571 1.41 sborrill case AGP_I915_GCC1_GMS_STOLEN_48M:
572 1.58 christos stolen = 48 * 1024;
573 1.41 sborrill break;
574 1.41 sborrill case AGP_I915_GCC1_GMS_STOLEN_64M:
575 1.58 christos stolen = 64 * 1024;
576 1.41 sborrill break;
577 1.46 markd case AGP_G33_GCC1_GMS_STOLEN_128M:
578 1.58 christos stolen = 128 * 1024;
579 1.46 markd break;
580 1.46 markd case AGP_G33_GCC1_GMS_STOLEN_256M:
581 1.58 christos stolen = 256 * 1024;
582 1.58 christos break;
583 1.58 christos case AGP_G4X_GCC1_GMS_STOLEN_96M:
584 1.58 christos stolen = 96 * 1024;
585 1.58 christos break;
586 1.58 christos case AGP_G4X_GCC1_GMS_STOLEN_160M:
587 1.58 christos stolen = 160 * 1024;
588 1.58 christos break;
589 1.58 christos case AGP_G4X_GCC1_GMS_STOLEN_224M:
590 1.58 christos stolen = 224 * 1024;
591 1.58 christos break;
592 1.58 christos case AGP_G4X_GCC1_GMS_STOLEN_352M:
593 1.58 christos stolen = 352 * 1024;
594 1.46 markd break;
595 1.28 christos default:
596 1.28 christos aprint_error(
597 1.28 christos ": unknown memory configuration, disabling\n");
598 1.28 christos agp_generic_detach(sc);
599 1.28 christos return EINVAL;
600 1.28 christos }
601 1.58 christos
602 1.58 christos switch (gcc1 & AGP_I855_GCC1_GMS) {
603 1.58 christos case AGP_I915_GCC1_GMS_STOLEN_48M:
604 1.58 christos case AGP_I915_GCC1_GMS_STOLEN_64M:
605 1.58 christos if (isc->chiptype != CHIP_I915 &&
606 1.58 christos isc->chiptype != CHIP_I965 &&
607 1.58 christos isc->chiptype != CHIP_G33 &&
608 1.58 christos isc->chiptype != CHIP_G4X)
609 1.58 christos stolen = 0;
610 1.58 christos break;
611 1.58 christos case AGP_G33_GCC1_GMS_STOLEN_128M:
612 1.58 christos case AGP_G33_GCC1_GMS_STOLEN_256M:
613 1.58 christos if (isc->chiptype != CHIP_I965 &&
614 1.58 christos isc->chiptype != CHIP_G33 &&
615 1.58 christos isc->chiptype != CHIP_G4X)
616 1.58 christos stolen = 0;
617 1.58 christos break;
618 1.58 christos case AGP_G4X_GCC1_GMS_STOLEN_96M:
619 1.58 christos case AGP_G4X_GCC1_GMS_STOLEN_160M:
620 1.58 christos case AGP_G4X_GCC1_GMS_STOLEN_224M:
621 1.58 christos case AGP_G4X_GCC1_GMS_STOLEN_352M:
622 1.58 christos if (isc->chiptype != CHIP_I965 &&
623 1.58 christos isc->chiptype != CHIP_G4X)
624 1.58 christos stolen = 0;
625 1.58 christos break;
626 1.58 christos }
627 1.58 christos
628 1.58 christos /* BIOS space */
629 1.62 markd gtt_size += 4;
630 1.58 christos
631 1.58 christos isc->stolen = (stolen - gtt_size) * 1024 / 4096;
632 1.58 christos
633 1.28 christos if (isc->stolen > 0) {
634 1.53 jmcneill aprint_normal(": detected %dk stolen memory\n%s",
635 1.54 freza isc->stolen * 4, device_xname(sc->as_dev));
636 1.28 christos }
637 1.28 christos
638 1.28 christos /* GATT address is already in there, make sure it's enabled */
639 1.28 christos pgtblctl |= 1;
640 1.28 christos WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
641 1.28 christos
642 1.28 christos gatt->ag_physical = pgtblctl & ~1;
643 1.1 fvdl }
644 1.1 fvdl
645 1.1 fvdl /*
646 1.1 fvdl * Make sure the chipset can see everything.
647 1.1 fvdl */
648 1.1 fvdl agp_flush_cache();
649 1.14 scw
650 1.1 fvdl return 0;
651 1.1 fvdl }
652 1.1 fvdl
653 1.1 fvdl #if 0
654 1.1 fvdl static int
655 1.1 fvdl agp_i810_detach(struct agp_softc *sc)
656 1.1 fvdl {
657 1.1 fvdl int error;
658 1.1 fvdl struct agp_i810_softc *isc = sc->as_chipc;
659 1.1 fvdl
660 1.1 fvdl error = agp_generic_detach(sc);
661 1.1 fvdl if (error)
662 1.1 fvdl return error;
663 1.1 fvdl
664 1.1 fvdl /* Clear the GATT base. */
665 1.14 scw if (sc->chiptype == CHIP_I810) {
666 1.14 scw WRITE4(AGP_I810_PGTBL_CTL, 0);
667 1.14 scw } else {
668 1.14 scw unsigned int pgtblctl;
669 1.14 scw pgtblctl = READ4(AGP_I810_PGTBL_CTL);
670 1.14 scw pgtblctl &= ~1;
671 1.14 scw WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
672 1.14 scw }
673 1.1 fvdl
674 1.1 fvdl /* Put the aperture back the way it started. */
675 1.1 fvdl AGP_SET_APERTURE(sc, isc->initial_aperture);
676 1.1 fvdl
677 1.14 scw if (sc->chiptype == CHIP_I810) {
678 1.14 scw agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap,
679 1.36 christos (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1);
680 1.14 scw }
681 1.14 scw free(sc->gatt, M_AGP);
682 1.1 fvdl
683 1.1 fvdl return 0;
684 1.1 fvdl }
685 1.1 fvdl #endif
686 1.1 fvdl
687 1.1 fvdl static u_int32_t
688 1.1 fvdl agp_i810_get_aperture(struct agp_softc *sc)
689 1.1 fvdl {
690 1.14 scw struct agp_i810_softc *isc = sc->as_chipc;
691 1.14 scw pcireg_t reg;
692 1.58 christos u_int32_t size;
693 1.42 markd u_int16_t miscc, gcc1, msac;
694 1.14 scw
695 1.58 christos size = 0;
696 1.58 christos
697 1.42 markd switch (isc->chiptype) {
698 1.42 markd case CHIP_I810:
699 1.14 scw reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM);
700 1.14 scw miscc = (u_int16_t)(reg >> 16);
701 1.14 scw if ((miscc & AGP_I810_MISCC_WINSIZE) ==
702 1.14 scw AGP_I810_MISCC_WINSIZE_32)
703 1.58 christos size = 32 * 1024 * 1024;
704 1.14 scw else
705 1.58 christos size = 64 * 1024 * 1024;
706 1.58 christos break;
707 1.42 markd case CHIP_I830:
708 1.14 scw reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
709 1.14 scw gcc1 = (u_int16_t)(reg >> 16);
710 1.14 scw if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
711 1.58 christos size = 64 * 1024 * 1024;
712 1.14 scw else
713 1.58 christos size = 128 * 1024 * 1024;
714 1.58 christos break;
715 1.42 markd case CHIP_I855:
716 1.58 christos size = 128 * 1024 * 1024;
717 1.58 christos break;
718 1.42 markd case CHIP_I915:
719 1.45 joerg case CHIP_G33:
720 1.64 markd case CHIP_G4X:
721 1.28 christos reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC);
722 1.28 christos msac = (u_int16_t)(reg >> 16);
723 1.28 christos if (msac & AGP_I915_MSAC_APER_128M)
724 1.58 christos size = 128 * 1024 * 1024;
725 1.28 christos else
726 1.58 christos size = 256 * 1024 * 1024;
727 1.58 christos break;
728 1.42 markd case CHIP_I965:
729 1.58 christos size = 512 * 1024 * 1024;
730 1.58 christos break;
731 1.42 markd default:
732 1.42 markd aprint_error(": Unknown chipset\n");
733 1.14 scw }
734 1.42 markd
735 1.58 christos return size;
736 1.1 fvdl }
737 1.1 fvdl
738 1.1 fvdl static int
739 1.1 fvdl agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture)
740 1.1 fvdl {
741 1.14 scw struct agp_i810_softc *isc = sc->as_chipc;
742 1.14 scw pcireg_t reg;
743 1.42 markd u_int16_t miscc, gcc1;
744 1.14 scw
745 1.42 markd switch (isc->chiptype) {
746 1.42 markd case CHIP_I810:
747 1.14 scw /*
748 1.14 scw * Double check for sanity.
749 1.14 scw */
750 1.14 scw if (aperture != (32 * 1024 * 1024) &&
751 1.14 scw aperture != (64 * 1024 * 1024)) {
752 1.54 freza aprint_error_dev(sc->as_dev, "bad aperture size %d\n",
753 1.52 cegger aperture);
754 1.14 scw return EINVAL;
755 1.14 scw }
756 1.1 fvdl
757 1.14 scw reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM);
758 1.14 scw miscc = (u_int16_t)(reg >> 16);
759 1.14 scw miscc &= ~AGP_I810_MISCC_WINSIZE;
760 1.14 scw if (aperture == 32 * 1024 * 1024)
761 1.14 scw miscc |= AGP_I810_MISCC_WINSIZE_32;
762 1.14 scw else
763 1.14 scw miscc |= AGP_I810_MISCC_WINSIZE_64;
764 1.14 scw
765 1.14 scw reg &= 0x0000ffff;
766 1.14 scw reg |= ((pcireg_t)miscc) << 16;
767 1.14 scw pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg);
768 1.42 markd break;
769 1.42 markd case CHIP_I830:
770 1.14 scw if (aperture != (64 * 1024 * 1024) &&
771 1.14 scw aperture != (128 * 1024 * 1024)) {
772 1.54 freza aprint_error_dev(sc->as_dev, "bad aperture size %d\n",
773 1.52 cegger aperture);
774 1.14 scw return EINVAL;
775 1.14 scw }
776 1.14 scw reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
777 1.14 scw gcc1 = (u_int16_t)(reg >> 16);
778 1.14 scw gcc1 &= ~AGP_I830_GCC1_GMASIZE;
779 1.14 scw if (aperture == 64 * 1024 * 1024)
780 1.14 scw gcc1 |= AGP_I830_GCC1_GMASIZE_64;
781 1.14 scw else
782 1.14 scw gcc1 |= AGP_I830_GCC1_GMASIZE_128;
783 1.14 scw
784 1.14 scw reg &= 0x0000ffff;
785 1.14 scw reg |= ((pcireg_t)gcc1) << 16;
786 1.14 scw pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg);
787 1.42 markd break;
788 1.42 markd case CHIP_I855:
789 1.42 markd case CHIP_I915:
790 1.28 christos if (aperture != agp_i810_get_aperture(sc)) {
791 1.54 freza aprint_error_dev(sc->as_dev, "bad aperture size %d\n",
792 1.52 cegger aperture);
793 1.17 hannken return EINVAL;
794 1.17 hannken }
795 1.42 markd break;
796 1.42 markd case CHIP_I965:
797 1.42 markd if (aperture != 512 * 1024 * 1024) {
798 1.54 freza aprint_error_dev(sc->as_dev, "bad aperture size %d\n",
799 1.52 cegger aperture);
800 1.42 markd return EINVAL;
801 1.42 markd }
802 1.42 markd break;
803 1.1 fvdl }
804 1.1 fvdl
805 1.1 fvdl return 0;
806 1.1 fvdl }
807 1.1 fvdl
808 1.1 fvdl static int
809 1.1 fvdl agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
810 1.1 fvdl {
811 1.1 fvdl struct agp_i810_softc *isc = sc->as_chipc;
812 1.1 fvdl
813 1.14 scw if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
814 1.29 rpaulo #ifdef AGP_DEBUG
815 1.14 scw printf("%s: failed: offset 0x%08x, shift %d, entries %d\n",
816 1.54 freza device_xname(sc->as_dev), (int)offset, AGP_PAGE_SHIFT,
817 1.14 scw isc->gatt->ag_entries);
818 1.14 scw #endif
819 1.1 fvdl return EINVAL;
820 1.14 scw }
821 1.14 scw
822 1.70 gsutre if (isc->chiptype != CHIP_I810) {
823 1.14 scw if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) {
824 1.29 rpaulo #ifdef AGP_DEBUG
825 1.70 gsutre printf("%s: trying to bind into stolen memory\n",
826 1.54 freza device_xname(sc->as_dev));
827 1.14 scw #endif
828 1.14 scw return EINVAL;
829 1.14 scw }
830 1.14 scw }
831 1.1 fvdl
832 1.58 christos agp_i810_write_gtt_entry(isc, offset, physical | 1);
833 1.1 fvdl return 0;
834 1.1 fvdl }
835 1.1 fvdl
836 1.1 fvdl static int
837 1.1 fvdl agp_i810_unbind_page(struct agp_softc *sc, off_t offset)
838 1.1 fvdl {
839 1.1 fvdl struct agp_i810_softc *isc = sc->as_chipc;
840 1.1 fvdl
841 1.1 fvdl if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT))
842 1.1 fvdl return EINVAL;
843 1.1 fvdl
844 1.17 hannken if (isc->chiptype != CHIP_I810 ) {
845 1.14 scw if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) {
846 1.29 rpaulo #ifdef AGP_DEBUG
847 1.70 gsutre printf("%s: trying to unbind from stolen memory\n",
848 1.54 freza device_xname(sc->as_dev));
849 1.14 scw #endif
850 1.14 scw return EINVAL;
851 1.14 scw }
852 1.14 scw }
853 1.14 scw
854 1.58 christos agp_i810_write_gtt_entry(isc, offset, 0);
855 1.1 fvdl return 0;
856 1.1 fvdl }
857 1.1 fvdl
858 1.1 fvdl /*
859 1.1 fvdl * Writing via memory mapped registers already flushes all TLBs.
860 1.1 fvdl */
861 1.1 fvdl static void
862 1.35 christos agp_i810_flush_tlb(struct agp_softc *sc)
863 1.1 fvdl {
864 1.1 fvdl }
865 1.1 fvdl
866 1.1 fvdl static int
867 1.35 christos agp_i810_enable(struct agp_softc *sc, u_int32_t mode)
868 1.1 fvdl {
869 1.1 fvdl
870 1.1 fvdl return 0;
871 1.1 fvdl }
872 1.1 fvdl
873 1.1 fvdl static struct agp_memory *
874 1.1 fvdl agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size)
875 1.1 fvdl {
876 1.1 fvdl struct agp_i810_softc *isc = sc->as_chipc;
877 1.1 fvdl struct agp_memory *mem;
878 1.1 fvdl
879 1.29 rpaulo #ifdef AGP_DEBUG
880 1.28 christos printf("AGP: alloc(%d, 0x%x)\n", type, (int) size);
881 1.28 christos #endif
882 1.28 christos
883 1.1 fvdl if ((size & (AGP_PAGE_SIZE - 1)) != 0)
884 1.1 fvdl return 0;
885 1.1 fvdl
886 1.1 fvdl if (sc->as_allocated + size > sc->as_maxmem)
887 1.1 fvdl return 0;
888 1.1 fvdl
889 1.1 fvdl if (type == 1) {
890 1.1 fvdl /*
891 1.1 fvdl * Mapping local DRAM into GATT.
892 1.1 fvdl */
893 1.17 hannken if (isc->chiptype != CHIP_I810 )
894 1.14 scw return 0;
895 1.1 fvdl if (size != isc->dcache_size)
896 1.1 fvdl return 0;
897 1.1 fvdl } else if (type == 2) {
898 1.1 fvdl /*
899 1.28 christos * Bogus mapping for the hardware cursor.
900 1.1 fvdl */
901 1.28 christos if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE)
902 1.1 fvdl return 0;
903 1.1 fvdl }
904 1.1 fvdl
905 1.10 tsutsui mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO);
906 1.1 fvdl if (mem == NULL)
907 1.1 fvdl return NULL;
908 1.1 fvdl mem->am_id = sc->as_nextid++;
909 1.1 fvdl mem->am_size = size;
910 1.1 fvdl mem->am_type = type;
911 1.1 fvdl
912 1.1 fvdl if (type == 2) {
913 1.1 fvdl /*
914 1.28 christos * Allocate and wire down the memory now so that we can
915 1.1 fvdl * get its physical address.
916 1.1 fvdl */
917 1.1 fvdl mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP,
918 1.1 fvdl M_WAITOK);
919 1.1 fvdl if (mem->am_dmaseg == NULL) {
920 1.1 fvdl free(mem, M_AGP);
921 1.1 fvdl return NULL;
922 1.1 fvdl }
923 1.1 fvdl if (agp_alloc_dmamem(sc->as_dmat, size, 0,
924 1.1 fvdl &mem->am_dmamap, &mem->am_virtual, &mem->am_physical,
925 1.1 fvdl mem->am_dmaseg, 1, &mem->am_nseg) != 0) {
926 1.1 fvdl free(mem->am_dmaseg, M_AGP);
927 1.1 fvdl free(mem, M_AGP);
928 1.1 fvdl return NULL;
929 1.1 fvdl }
930 1.28 christos memset(mem->am_virtual, 0, size);
931 1.1 fvdl } else if (type != 1) {
932 1.4 drochner if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1,
933 1.4 drochner size, 0, BUS_DMA_NOWAIT,
934 1.4 drochner &mem->am_dmamap) != 0) {
935 1.1 fvdl free(mem, M_AGP);
936 1.1 fvdl return NULL;
937 1.1 fvdl }
938 1.1 fvdl }
939 1.1 fvdl
940 1.1 fvdl TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link);
941 1.1 fvdl sc->as_allocated += size;
942 1.1 fvdl
943 1.1 fvdl return mem;
944 1.1 fvdl }
945 1.1 fvdl
946 1.1 fvdl static int
947 1.1 fvdl agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem)
948 1.1 fvdl {
949 1.1 fvdl if (mem->am_is_bound)
950 1.1 fvdl return EBUSY;
951 1.1 fvdl
952 1.1 fvdl if (mem->am_type == 2) {
953 1.1 fvdl agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap,
954 1.1 fvdl mem->am_virtual, mem->am_dmaseg, mem->am_nseg);
955 1.1 fvdl free(mem->am_dmaseg, M_AGP);
956 1.1 fvdl }
957 1.1 fvdl
958 1.1 fvdl sc->as_allocated -= mem->am_size;
959 1.1 fvdl TAILQ_REMOVE(&sc->as_memory, mem, am_link);
960 1.1 fvdl free(mem, M_AGP);
961 1.1 fvdl return 0;
962 1.1 fvdl }
963 1.1 fvdl
964 1.1 fvdl static int
965 1.1 fvdl agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem,
966 1.1 fvdl off_t offset)
967 1.1 fvdl {
968 1.1 fvdl struct agp_i810_softc *isc = sc->as_chipc;
969 1.4 drochner u_int32_t regval, i;
970 1.4 drochner
971 1.70 gsutre if (mem->am_is_bound != 0)
972 1.70 gsutre return EINVAL;
973 1.70 gsutre
974 1.4 drochner /*
975 1.4 drochner * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the
976 1.4 drochner * X server for mysterious reasons which leads to crashes if we write
977 1.4 drochner * to the GTT through the MMIO window.
978 1.4 drochner * Until the issue is solved, simply restore it.
979 1.4 drochner */
980 1.4 drochner regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL);
981 1.4 drochner if (regval != (isc->gatt->ag_physical | 1)) {
982 1.4 drochner printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n",
983 1.4 drochner regval);
984 1.4 drochner bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL,
985 1.4 drochner isc->gatt->ag_physical | 1);
986 1.4 drochner }
987 1.1 fvdl
988 1.5 drochner if (mem->am_type == 2) {
989 1.70 gsutre for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
990 1.70 gsutre agp_i810_bind_page(sc, offset + i,
991 1.70 gsutre mem->am_physical + i);
992 1.5 drochner mem->am_offset = offset;
993 1.5 drochner mem->am_is_bound = 1;
994 1.1 fvdl return 0;
995 1.5 drochner }
996 1.5 drochner
997 1.1 fvdl if (mem->am_type != 1)
998 1.1 fvdl return agp_generic_bind_memory(sc, mem, offset);
999 1.1 fvdl
1000 1.17 hannken if (isc->chiptype != CHIP_I810)
1001 1.14 scw return EINVAL;
1002 1.14 scw
1003 1.28 christos for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
1004 1.70 gsutre agp_i810_write_gtt_entry(isc, i, i | 3);
1005 1.13 drochner mem->am_is_bound = 1;
1006 1.1 fvdl return 0;
1007 1.1 fvdl }
1008 1.1 fvdl
1009 1.1 fvdl static int
1010 1.1 fvdl agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem)
1011 1.1 fvdl {
1012 1.1 fvdl struct agp_i810_softc *isc = sc->as_chipc;
1013 1.1 fvdl u_int32_t i;
1014 1.1 fvdl
1015 1.70 gsutre if (mem->am_is_bound == 0)
1016 1.70 gsutre return EINVAL;
1017 1.70 gsutre
1018 1.5 drochner if (mem->am_type == 2) {
1019 1.70 gsutre for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
1020 1.70 gsutre agp_i810_unbind_page(sc, mem->am_offset + i);
1021 1.5 drochner mem->am_offset = 0;
1022 1.5 drochner mem->am_is_bound = 0;
1023 1.1 fvdl return 0;
1024 1.5 drochner }
1025 1.1 fvdl
1026 1.1 fvdl if (mem->am_type != 1)
1027 1.1 fvdl return agp_generic_unbind_memory(sc, mem);
1028 1.14 scw
1029 1.17 hannken if (isc->chiptype != CHIP_I810)
1030 1.14 scw return EINVAL;
1031 1.1 fvdl
1032 1.1 fvdl for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
1033 1.58 christos agp_i810_write_gtt_entry(isc, i, 0);
1034 1.13 drochner mem->am_is_bound = 0;
1035 1.1 fvdl return 0;
1036 1.1 fvdl }
1037 1.24 jmcneill
1038 1.47 jmcneill static bool
1039 1.66 dyoung agp_i810_resume(device_t dv, const pmf_qual_t *qual)
1040 1.24 jmcneill {
1041 1.47 jmcneill struct agp_softc *sc = device_private(dv);
1042 1.24 jmcneill struct agp_i810_softc *isc = sc->as_chipc;
1043 1.24 jmcneill
1044 1.47 jmcneill isc->pgtblctl = READ4(AGP_I810_PGTBL_CTL);
1045 1.47 jmcneill agp_flush_cache();
1046 1.24 jmcneill
1047 1.47 jmcneill return true;
1048 1.24 jmcneill }
1049