agp_i810.c revision 1.18
1 /* $NetBSD: agp_i810.c,v 1.18 2003/08/26 17:33:23 tron Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.18 2003/08/26 17:33:23 tron Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <machine/bus.h> 55 56 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 57 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 58 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 59 60 #define CHIP_I810 0 /* i810/i815 */ 61 #define CHIP_I830 1 /* 830M/845G */ 62 #define CHIP_I855 2 /* 852GM/855GM/865G */ 63 64 struct agp_i810_softc { 65 u_int32_t initial_aperture; /* aperture size at startup */ 66 struct agp_gatt *gatt; 67 int chiptype; /* i810-like or i830 */ 68 u_int32_t dcache_size; /* i810 only */ 69 u_int32_t stolen; /* number of i830/845 gtt entries 70 for stolen memory */ 71 bus_space_tag_t bst; /* bus_space tag */ 72 bus_space_handle_t bsh; /* bus_space handle */ 73 struct pci_attach_args vga_pa; 74 }; 75 76 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 77 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 78 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 79 static int agp_i810_unbind_page(struct agp_softc *, off_t); 80 static void agp_i810_flush_tlb(struct agp_softc *); 81 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 82 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 83 vsize_t); 84 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 85 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 86 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 87 88 struct agp_methods agp_i810_methods = { 89 agp_i810_get_aperture, 90 agp_i810_set_aperture, 91 agp_i810_bind_page, 92 agp_i810_unbind_page, 93 agp_i810_flush_tlb, 94 agp_i810_enable, 95 agp_i810_alloc_memory, 96 agp_i810_free_memory, 97 agp_i810_bind_memory, 98 agp_i810_unbind_memory, 99 }; 100 101 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 102 static int 103 agp_i810_vgamatch(struct pci_attach_args *pa) 104 { 105 106 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 107 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 108 return (0); 109 110 switch (PCI_PRODUCT(pa->pa_id)) { 111 case PCI_PRODUCT_INTEL_82810_GC: 112 case PCI_PRODUCT_INTEL_82810_DC100_GC: 113 case PCI_PRODUCT_INTEL_82810E_GC: 114 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 115 case PCI_PRODUCT_INTEL_82830MP_IV: 116 case PCI_PRODUCT_INTEL_82845G_IGD: 117 case PCI_PRODUCT_INTEL_82855GM_IGD: 118 case PCI_PRODUCT_INTEL_82865_IGD: 119 return (1); 120 } 121 122 return (0); 123 } 124 125 int 126 agp_i810_attach(struct device *parent, struct device *self, void *aux) 127 { 128 struct agp_softc *sc = (void *)self; 129 struct agp_i810_softc *isc; 130 struct agp_gatt *gatt; 131 int error; 132 133 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 134 if (isc == NULL) { 135 aprint_error(": can't allocate chipset-specific softc\n"); 136 return ENOMEM; 137 } 138 sc->as_chipc = isc; 139 sc->as_methods = &agp_i810_methods; 140 141 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 142 aprint_error(": can't find internal VGA device config space\n"); 143 free(isc, M_AGP); 144 return ENOENT; 145 } 146 147 /* XXXfvdl */ 148 sc->as_dmat = isc->vga_pa.pa_dmat; 149 150 error = agp_map_aperture(&isc->vga_pa, sc); 151 if (error != 0) { 152 aprint_error(": can't map aperture\n"); 153 free(isc, M_AGP); 154 return error; 155 } 156 157 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 158 case PCI_PRODUCT_INTEL_82810_GC: 159 case PCI_PRODUCT_INTEL_82810_DC100_GC: 160 case PCI_PRODUCT_INTEL_82810E_GC: 161 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 162 isc->chiptype = CHIP_I810; 163 break; 164 case PCI_PRODUCT_INTEL_82830MP_IV: 165 case PCI_PRODUCT_INTEL_82845G_IGD: 166 isc->chiptype = CHIP_I830; 167 break; 168 case PCI_PRODUCT_INTEL_82855GM_IGD: 169 case PCI_PRODUCT_INTEL_82865_IGD: 170 isc->chiptype = CHIP_I855; 171 break; 172 } 173 174 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 175 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, NULL, NULL); 176 if (error != 0) { 177 aprint_error(": can't map mmadr registers\n"); 178 return error; 179 } 180 181 isc->initial_aperture = AGP_GET_APERTURE(sc); 182 183 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 184 if (!gatt) { 185 agp_generic_detach(sc); 186 return ENOMEM; 187 } 188 isc->gatt = gatt; 189 190 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 191 192 if (isc->chiptype == CHIP_I810) { 193 int dummyseg; 194 /* Some i810s have on-chip memory called dcache */ 195 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 196 isc->dcache_size = 4 * 1024 * 1024; 197 else 198 isc->dcache_size = 0; 199 200 /* According to the specs the gatt on the i810 must be 64k */ 201 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 202 0, &gatt->ag_dmamap, (caddr_t *)&gatt->ag_virtual, 203 &gatt->ag_physical, &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 204 free(gatt, M_AGP); 205 agp_generic_detach(sc); 206 return ENOMEM; 207 } 208 209 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 210 memset(gatt->ag_virtual, 0, gatt->ag_size); 211 212 agp_flush_cache(); 213 /* Install the GATT. */ 214 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 215 } else if (isc->chiptype == CHIP_I830) { 216 /* The i830 automatically initializes the 128k gatt on boot. */ 217 pcireg_t reg; 218 u_int32_t pgtblctl; 219 u_int16_t gcc1; 220 221 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 222 gcc1 = (u_int16_t)(reg >> 16); 223 switch (gcc1 & AGP_I830_GCC1_GMS) { 224 case AGP_I830_GCC1_GMS_STOLEN_512: 225 isc->stolen = (512 - 132) * 1024 / 4096; 226 break; 227 case AGP_I830_GCC1_GMS_STOLEN_1024: 228 isc->stolen = (1024 - 132) * 1024 / 4096; 229 break; 230 case AGP_I830_GCC1_GMS_STOLEN_8192: 231 isc->stolen = (8192 - 132) * 1024 / 4096; 232 break; 233 default: 234 isc->stolen = 0; 235 aprint_error( 236 ": unknown memory configuration, disabling\n"); 237 agp_generic_detach(sc); 238 return EINVAL; 239 } 240 if (isc->stolen > 0) { 241 aprint_error(": detected %dk stolen memory\n%s", 242 isc->stolen * 4, sc->as_dev.dv_xname); 243 } 244 aprint_error(": aperture size is %dM\n%s", 245 isc->initial_aperture / 1024 / 1024, 246 sc->as_dev.dv_xname); 247 248 /* GATT address is already in there, make sure it's enabled */ 249 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 250 pgtblctl |= 1; 251 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 252 253 gatt->ag_physical = pgtblctl & ~1; 254 } else { /* CHIP_I855 */ 255 /* The 855GM automatically initializes the 128k gatt on boot. */ 256 pcireg_t reg; 257 u_int32_t pgtblctl; 258 u_int16_t gcc1; 259 260 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 261 gcc1 = (u_int16_t)(reg >> 16); 262 switch (gcc1 & AGP_I855_GCC1_GMS) { 263 case AGP_I855_GCC1_GMS_STOLEN_1M: 264 isc->stolen = (1024 - 132) * 1024 / 4096; 265 break; 266 case AGP_I855_GCC1_GMS_STOLEN_4M: 267 isc->stolen = (4096 - 132) * 1024 / 4096; 268 break; 269 case AGP_I855_GCC1_GMS_STOLEN_8M: 270 isc->stolen = (8192 - 132) * 1024 / 4096; 271 break; 272 case AGP_I855_GCC1_GMS_STOLEN_16M: 273 isc->stolen = (16384 - 132) * 1024 / 4096; 274 break; 275 case AGP_I855_GCC1_GMS_STOLEN_32M: 276 isc->stolen = (32768 - 132) * 1024 / 4096; 277 break; 278 default: 279 isc->stolen = 0; 280 aprint_error( 281 ": unknown memory configuration, disabling\n"); 282 agp_generic_detach(sc); 283 return EINVAL; 284 } 285 if (isc->stolen > 0) { 286 aprint_error(": detected %dk stolen memory\n%s", 287 isc->stolen * 4, sc->as_dev.dv_xname); 288 } 289 aprint_error(": aperture size is %dM\n%s", 290 isc->initial_aperture / 1024 / 1024, 291 sc->as_dev.dv_xname); 292 293 /* GATT address is already in there, make sure it's enabled */ 294 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 295 pgtblctl |= 1; 296 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 297 298 gatt->ag_physical = pgtblctl & ~1; 299 } 300 301 /* 302 * Make sure the chipset can see everything. 303 */ 304 agp_flush_cache(); 305 306 return 0; 307 } 308 309 #if 0 310 static int 311 agp_i810_detach(struct agp_softc *sc) 312 { 313 int error; 314 struct agp_i810_softc *isc = sc->as_chipc; 315 316 error = agp_generic_detach(sc); 317 if (error) 318 return error; 319 320 /* Clear the GATT base. */ 321 if (sc->chiptype == CHIP_I810) { 322 WRITE4(AGP_I810_PGTBL_CTL, 0); 323 } else { 324 unsigned int pgtblctl; 325 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 326 pgtblctl &= ~1; 327 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 328 } 329 330 /* Put the aperture back the way it started. */ 331 AGP_SET_APERTURE(sc, isc->initial_aperture); 332 333 if (sc->chiptype == CHIP_I810) { 334 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 335 (caddr_t)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 336 } 337 free(sc->gatt, M_AGP); 338 339 return 0; 340 } 341 #endif 342 343 static u_int32_t 344 agp_i810_get_aperture(struct agp_softc *sc) 345 { 346 struct agp_i810_softc *isc = sc->as_chipc; 347 pcireg_t reg; 348 349 if (isc->chiptype == CHIP_I810) { 350 u_int16_t miscc; 351 352 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 353 miscc = (u_int16_t)(reg >> 16); 354 if ((miscc & AGP_I810_MISCC_WINSIZE) == 355 AGP_I810_MISCC_WINSIZE_32) 356 return 32 * 1024 * 1024; 357 else 358 return 64 * 1024 * 1024; 359 } else if (isc->chiptype == CHIP_I830) { 360 u_int16_t gcc1; 361 362 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 363 gcc1 = (u_int16_t)(reg >> 16); 364 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 365 return 64 * 1024 * 1024; 366 else 367 return 128 * 1024 * 1024; 368 } else { /* CHIP_I855 */ 369 return 128 * 1024 * 1024; 370 } 371 } 372 373 static int 374 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 375 { 376 struct agp_i810_softc *isc = sc->as_chipc; 377 pcireg_t reg; 378 379 if (isc->chiptype == CHIP_I810) { 380 u_int16_t miscc; 381 382 /* 383 * Double check for sanity. 384 */ 385 if (aperture != (32 * 1024 * 1024) && 386 aperture != (64 * 1024 * 1024)) { 387 printf("%s: bad aperture size %d\n", 388 sc->as_dev.dv_xname, aperture); 389 return EINVAL; 390 } 391 392 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 393 miscc = (u_int16_t)(reg >> 16); 394 miscc &= ~AGP_I810_MISCC_WINSIZE; 395 if (aperture == 32 * 1024 * 1024) 396 miscc |= AGP_I810_MISCC_WINSIZE_32; 397 else 398 miscc |= AGP_I810_MISCC_WINSIZE_64; 399 400 reg &= 0x0000ffff; 401 reg |= ((pcireg_t)miscc) << 16; 402 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 403 } if (isc->chiptype == CHIP_I830) { 404 u_int16_t gcc1; 405 406 if (aperture != (64 * 1024 * 1024) && 407 aperture != (128 * 1024 * 1024)) { 408 printf("%s: bad aperture size %d\n", 409 sc->as_dev.dv_xname, aperture); 410 return EINVAL; 411 } 412 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 413 gcc1 = (u_int16_t)(reg >> 16); 414 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 415 if (aperture == 64 * 1024 * 1024) 416 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 417 else 418 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 419 420 reg &= 0x0000ffff; 421 reg |= ((pcireg_t)gcc1) << 16; 422 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 423 } else { /* CHIP_I855 */ 424 if (aperture != 128 * 1024 * 1024) { 425 printf("%s: bad aperture size %d\n", 426 sc->as_dev.dv_xname, aperture); 427 return EINVAL; 428 } 429 } 430 431 return 0; 432 } 433 434 static int 435 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 436 { 437 struct agp_i810_softc *isc = sc->as_chipc; 438 439 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 440 #ifdef DEBUG 441 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 442 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 443 isc->gatt->ag_entries); 444 #endif 445 return EINVAL; 446 } 447 448 if (isc->chiptype != CHIP_I830) { 449 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 450 #ifdef DEBUG 451 printf("%s: trying to bind into stolen memory", 452 sc->as_dev.dv_xname); 453 #endif 454 return EINVAL; 455 } 456 } 457 458 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 459 physical | 1); 460 return 0; 461 } 462 463 static int 464 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 465 { 466 struct agp_i810_softc *isc = sc->as_chipc; 467 468 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 469 return EINVAL; 470 471 if (isc->chiptype != CHIP_I810 ) { 472 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 473 #ifdef DEBUG 474 printf("%s: trying to unbind from stolen memory", 475 sc->as_dev.dv_xname); 476 #endif 477 return EINVAL; 478 } 479 } 480 481 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 0); 482 return 0; 483 } 484 485 /* 486 * Writing via memory mapped registers already flushes all TLBs. 487 */ 488 static void 489 agp_i810_flush_tlb(struct agp_softc *sc) 490 { 491 } 492 493 static int 494 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 495 { 496 497 return 0; 498 } 499 500 static struct agp_memory * 501 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 502 { 503 struct agp_i810_softc *isc = sc->as_chipc; 504 struct agp_memory *mem; 505 506 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 507 return 0; 508 509 if (sc->as_allocated + size > sc->as_maxmem) 510 return 0; 511 512 if (type == 1) { 513 /* 514 * Mapping local DRAM into GATT. 515 */ 516 if (isc->chiptype != CHIP_I810 ) 517 return 0; 518 if (size != isc->dcache_size) 519 return 0; 520 } else if (type == 2) { 521 /* 522 * Bogus mapping of a single page for the hardware cursor. 523 */ 524 if (size != AGP_PAGE_SIZE) 525 return 0; 526 } 527 528 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 529 if (mem == NULL) 530 return NULL; 531 mem->am_id = sc->as_nextid++; 532 mem->am_size = size; 533 mem->am_type = type; 534 535 if (type == 2) { 536 /* 537 * Allocate and wire down the page now so that we can 538 * get its physical address. 539 */ 540 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 541 M_WAITOK); 542 if (mem->am_dmaseg == NULL) { 543 free(mem, M_AGP); 544 return NULL; 545 } 546 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 547 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 548 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 549 free(mem->am_dmaseg, M_AGP); 550 free(mem, M_AGP); 551 return NULL; 552 } 553 } else if (type != 1) { 554 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 555 size, 0, BUS_DMA_NOWAIT, 556 &mem->am_dmamap) != 0) { 557 free(mem, M_AGP); 558 return NULL; 559 } 560 } 561 562 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 563 sc->as_allocated += size; 564 565 return mem; 566 } 567 568 static int 569 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 570 { 571 if (mem->am_is_bound) 572 return EBUSY; 573 574 if (mem->am_type == 2) { 575 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 576 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 577 free(mem->am_dmaseg, M_AGP); 578 } 579 580 sc->as_allocated -= mem->am_size; 581 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 582 free(mem, M_AGP); 583 return 0; 584 } 585 586 static int 587 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 588 off_t offset) 589 { 590 struct agp_i810_softc *isc = sc->as_chipc; 591 u_int32_t regval, i; 592 593 /* 594 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 595 * X server for mysterious reasons which leads to crashes if we write 596 * to the GTT through the MMIO window. 597 * Until the issue is solved, simply restore it. 598 */ 599 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 600 if (regval != (isc->gatt->ag_physical | 1)) { 601 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 602 regval); 603 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 604 isc->gatt->ag_physical | 1); 605 } 606 607 if (mem->am_type == 2) { 608 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 609 mem->am_physical | 1); 610 mem->am_offset = offset; 611 mem->am_is_bound = 1; 612 return 0; 613 } 614 615 if (mem->am_type != 1) 616 return agp_generic_bind_memory(sc, mem, offset); 617 618 if (isc->chiptype != CHIP_I810) 619 return EINVAL; 620 621 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) { 622 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 623 i | 3); 624 } 625 mem->am_is_bound = 1; 626 return 0; 627 } 628 629 static int 630 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 631 { 632 struct agp_i810_softc *isc = sc->as_chipc; 633 u_int32_t i; 634 635 if (mem->am_type == 2) { 636 WRITE4(AGP_I810_GTT + 637 (u_int32_t)(mem->am_offset >> AGP_PAGE_SHIFT) * 4, 638 0); 639 mem->am_offset = 0; 640 mem->am_is_bound = 0; 641 return 0; 642 } 643 644 if (mem->am_type != 1) 645 return agp_generic_unbind_memory(sc, mem); 646 647 if (isc->chiptype != CHIP_I810) 648 return EINVAL; 649 650 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 651 WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0); 652 mem->am_is_bound = 0; 653 return 0; 654 } 655
Indexes created Wed Sep 24 05:09:52 GMT 2025