agp_i810.c revision 1.20
1 /* $NetBSD: agp_i810.c,v 1.20 2003/09/07 15:40:57 tron Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.20 2003/09/07 15:40:57 tron Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <machine/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 62 #define CHIP_I810 0 /* i810/i815 */ 63 #define CHIP_I830 1 /* 830M/845G */ 64 #define CHIP_I855 2 /* 852GM/855GM/865G */ 65 66 struct agp_i810_softc { 67 u_int32_t initial_aperture; /* aperture size at startup */ 68 struct agp_gatt *gatt; 69 int chiptype; /* i810-like or i830 */ 70 u_int32_t dcache_size; /* i810 only */ 71 u_int32_t stolen; /* number of i830/845 gtt entries 72 for stolen memory */ 73 bus_space_tag_t bst; /* bus_space tag */ 74 bus_space_handle_t bsh; /* bus_space handle */ 75 struct pci_attach_args vga_pa; 76 }; 77 78 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 79 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 80 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 81 static int agp_i810_unbind_page(struct agp_softc *, off_t); 82 static void agp_i810_flush_tlb(struct agp_softc *); 83 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 84 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 85 vsize_t); 86 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 87 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 88 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 89 90 struct agp_methods agp_i810_methods = { 91 agp_i810_get_aperture, 92 agp_i810_set_aperture, 93 agp_i810_bind_page, 94 agp_i810_unbind_page, 95 agp_i810_flush_tlb, 96 agp_i810_enable, 97 agp_i810_alloc_memory, 98 agp_i810_free_memory, 99 agp_i810_bind_memory, 100 agp_i810_unbind_memory, 101 }; 102 103 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 104 static int 105 agp_i810_vgamatch(struct pci_attach_args *pa) 106 { 107 108 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 109 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 110 return (0); 111 112 switch (PCI_PRODUCT(pa->pa_id)) { 113 case PCI_PRODUCT_INTEL_82810_GC: 114 case PCI_PRODUCT_INTEL_82810_DC100_GC: 115 case PCI_PRODUCT_INTEL_82810E_GC: 116 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 117 case PCI_PRODUCT_INTEL_82830MP_IV: 118 case PCI_PRODUCT_INTEL_82845G_IGD: 119 case PCI_PRODUCT_INTEL_82855GM_IGD: 120 case PCI_PRODUCT_INTEL_82865_IGD: 121 return (1); 122 } 123 124 return (0); 125 } 126 127 int 128 agp_i810_attach(struct device *parent, struct device *self, void *aux) 129 { 130 struct agp_softc *sc = (void *)self; 131 struct agp_i810_softc *isc; 132 struct agp_gatt *gatt; 133 int error; 134 135 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 136 if (isc == NULL) { 137 aprint_error(": can't allocate chipset-specific softc\n"); 138 return ENOMEM; 139 } 140 sc->as_chipc = isc; 141 sc->as_methods = &agp_i810_methods; 142 143 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 144 #if NAGP_INTEL > 0 145 const struct pci_attach_args *pa = aux; 146 147 switch (PCI_PRODUCT(pa->pa_id)) { 148 case PCI_PRODUCT_INTEL_82840_HB: 149 case PCI_PRODUCT_INTEL_82865_HB: 150 return agp_intel_attach(parent, self, aux); 151 } 152 #endif 153 aprint_error(": can't find internal VGA device config space\n"); 154 free(isc, M_AGP); 155 return ENOENT; 156 } 157 158 /* XXXfvdl */ 159 sc->as_dmat = isc->vga_pa.pa_dmat; 160 161 error = agp_map_aperture(&isc->vga_pa, sc); 162 if (error != 0) { 163 aprint_error(": can't map aperture\n"); 164 free(isc, M_AGP); 165 return error; 166 } 167 168 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 169 case PCI_PRODUCT_INTEL_82810_GC: 170 case PCI_PRODUCT_INTEL_82810_DC100_GC: 171 case PCI_PRODUCT_INTEL_82810E_GC: 172 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 173 isc->chiptype = CHIP_I810; 174 break; 175 case PCI_PRODUCT_INTEL_82830MP_IV: 176 case PCI_PRODUCT_INTEL_82845G_IGD: 177 isc->chiptype = CHIP_I830; 178 break; 179 case PCI_PRODUCT_INTEL_82855GM_IGD: 180 case PCI_PRODUCT_INTEL_82865_IGD: 181 isc->chiptype = CHIP_I855; 182 break; 183 } 184 185 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 186 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, NULL, NULL); 187 if (error != 0) { 188 aprint_error(": can't map mmadr registers\n"); 189 return error; 190 } 191 192 isc->initial_aperture = AGP_GET_APERTURE(sc); 193 194 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 195 if (!gatt) { 196 agp_generic_detach(sc); 197 return ENOMEM; 198 } 199 isc->gatt = gatt; 200 201 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 202 203 if (isc->chiptype == CHIP_I810) { 204 int dummyseg; 205 /* Some i810s have on-chip memory called dcache */ 206 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 207 isc->dcache_size = 4 * 1024 * 1024; 208 else 209 isc->dcache_size = 0; 210 211 /* According to the specs the gatt on the i810 must be 64k */ 212 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 213 0, &gatt->ag_dmamap, (caddr_t *)&gatt->ag_virtual, 214 &gatt->ag_physical, &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 215 free(gatt, M_AGP); 216 agp_generic_detach(sc); 217 return ENOMEM; 218 } 219 220 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 221 memset(gatt->ag_virtual, 0, gatt->ag_size); 222 223 agp_flush_cache(); 224 /* Install the GATT. */ 225 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 226 } else if (isc->chiptype == CHIP_I830) { 227 /* The i830 automatically initializes the 128k gatt on boot. */ 228 pcireg_t reg; 229 u_int32_t pgtblctl; 230 u_int16_t gcc1; 231 232 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 233 gcc1 = (u_int16_t)(reg >> 16); 234 switch (gcc1 & AGP_I830_GCC1_GMS) { 235 case AGP_I830_GCC1_GMS_STOLEN_512: 236 isc->stolen = (512 - 132) * 1024 / 4096; 237 break; 238 case AGP_I830_GCC1_GMS_STOLEN_1024: 239 isc->stolen = (1024 - 132) * 1024 / 4096; 240 break; 241 case AGP_I830_GCC1_GMS_STOLEN_8192: 242 isc->stolen = (8192 - 132) * 1024 / 4096; 243 break; 244 default: 245 isc->stolen = 0; 246 aprint_error( 247 ": unknown memory configuration, disabling\n"); 248 agp_generic_detach(sc); 249 return EINVAL; 250 } 251 if (isc->stolen > 0) { 252 aprint_error(": detected %dk stolen memory\n%s", 253 isc->stolen * 4, sc->as_dev.dv_xname); 254 } 255 aprint_error(": aperture size is %dM\n%s", 256 isc->initial_aperture / 1024 / 1024, 257 sc->as_dev.dv_xname); 258 259 /* GATT address is already in there, make sure it's enabled */ 260 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 261 pgtblctl |= 1; 262 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 263 264 gatt->ag_physical = pgtblctl & ~1; 265 } else { /* CHIP_I855 */ 266 /* The 855GM automatically initializes the 128k gatt on boot. */ 267 pcireg_t reg; 268 u_int32_t pgtblctl; 269 u_int16_t gcc1; 270 271 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 272 gcc1 = (u_int16_t)(reg >> 16); 273 switch (gcc1 & AGP_I855_GCC1_GMS) { 274 case AGP_I855_GCC1_GMS_STOLEN_1M: 275 isc->stolen = (1024 - 132) * 1024 / 4096; 276 break; 277 case AGP_I855_GCC1_GMS_STOLEN_4M: 278 isc->stolen = (4096 - 132) * 1024 / 4096; 279 break; 280 case AGP_I855_GCC1_GMS_STOLEN_8M: 281 isc->stolen = (8192 - 132) * 1024 / 4096; 282 break; 283 case AGP_I855_GCC1_GMS_STOLEN_16M: 284 isc->stolen = (16384 - 132) * 1024 / 4096; 285 break; 286 case AGP_I855_GCC1_GMS_STOLEN_32M: 287 isc->stolen = (32768 - 132) * 1024 / 4096; 288 break; 289 default: 290 isc->stolen = 0; 291 aprint_error( 292 ": unknown memory configuration, disabling\n"); 293 agp_generic_detach(sc); 294 return EINVAL; 295 } 296 if (isc->stolen > 0) { 297 aprint_error(": detected %dk stolen memory\n%s", 298 isc->stolen * 4, sc->as_dev.dv_xname); 299 } 300 aprint_error(": aperture size is %dM\n%s", 301 isc->initial_aperture / 1024 / 1024, 302 sc->as_dev.dv_xname); 303 304 /* GATT address is already in there, make sure it's enabled */ 305 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 306 pgtblctl |= 1; 307 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 308 309 gatt->ag_physical = pgtblctl & ~1; 310 } 311 312 /* 313 * Make sure the chipset can see everything. 314 */ 315 agp_flush_cache(); 316 317 return 0; 318 } 319 320 #if 0 321 static int 322 agp_i810_detach(struct agp_softc *sc) 323 { 324 int error; 325 struct agp_i810_softc *isc = sc->as_chipc; 326 327 error = agp_generic_detach(sc); 328 if (error) 329 return error; 330 331 /* Clear the GATT base. */ 332 if (sc->chiptype == CHIP_I810) { 333 WRITE4(AGP_I810_PGTBL_CTL, 0); 334 } else { 335 unsigned int pgtblctl; 336 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 337 pgtblctl &= ~1; 338 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 339 } 340 341 /* Put the aperture back the way it started. */ 342 AGP_SET_APERTURE(sc, isc->initial_aperture); 343 344 if (sc->chiptype == CHIP_I810) { 345 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 346 (caddr_t)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 347 } 348 free(sc->gatt, M_AGP); 349 350 return 0; 351 } 352 #endif 353 354 static u_int32_t 355 agp_i810_get_aperture(struct agp_softc *sc) 356 { 357 struct agp_i810_softc *isc = sc->as_chipc; 358 pcireg_t reg; 359 360 if (isc->chiptype == CHIP_I810) { 361 u_int16_t miscc; 362 363 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 364 miscc = (u_int16_t)(reg >> 16); 365 if ((miscc & AGP_I810_MISCC_WINSIZE) == 366 AGP_I810_MISCC_WINSIZE_32) 367 return 32 * 1024 * 1024; 368 else 369 return 64 * 1024 * 1024; 370 } else if (isc->chiptype == CHIP_I830) { 371 u_int16_t gcc1; 372 373 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 374 gcc1 = (u_int16_t)(reg >> 16); 375 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 376 return 64 * 1024 * 1024; 377 else 378 return 128 * 1024 * 1024; 379 } else { /* CHIP_I855 */ 380 return 128 * 1024 * 1024; 381 } 382 } 383 384 static int 385 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 386 { 387 struct agp_i810_softc *isc = sc->as_chipc; 388 pcireg_t reg; 389 390 if (isc->chiptype == CHIP_I810) { 391 u_int16_t miscc; 392 393 /* 394 * Double check for sanity. 395 */ 396 if (aperture != (32 * 1024 * 1024) && 397 aperture != (64 * 1024 * 1024)) { 398 printf("%s: bad aperture size %d\n", 399 sc->as_dev.dv_xname, aperture); 400 return EINVAL; 401 } 402 403 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 404 miscc = (u_int16_t)(reg >> 16); 405 miscc &= ~AGP_I810_MISCC_WINSIZE; 406 if (aperture == 32 * 1024 * 1024) 407 miscc |= AGP_I810_MISCC_WINSIZE_32; 408 else 409 miscc |= AGP_I810_MISCC_WINSIZE_64; 410 411 reg &= 0x0000ffff; 412 reg |= ((pcireg_t)miscc) << 16; 413 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 414 } if (isc->chiptype == CHIP_I830) { 415 u_int16_t gcc1; 416 417 if (aperture != (64 * 1024 * 1024) && 418 aperture != (128 * 1024 * 1024)) { 419 printf("%s: bad aperture size %d\n", 420 sc->as_dev.dv_xname, aperture); 421 return EINVAL; 422 } 423 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 424 gcc1 = (u_int16_t)(reg >> 16); 425 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 426 if (aperture == 64 * 1024 * 1024) 427 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 428 else 429 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 430 431 reg &= 0x0000ffff; 432 reg |= ((pcireg_t)gcc1) << 16; 433 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 434 } else { /* CHIP_I855 */ 435 if (aperture != 128 * 1024 * 1024) { 436 printf("%s: bad aperture size %d\n", 437 sc->as_dev.dv_xname, aperture); 438 return EINVAL; 439 } 440 } 441 442 return 0; 443 } 444 445 static int 446 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 447 { 448 struct agp_i810_softc *isc = sc->as_chipc; 449 450 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 451 #ifdef DEBUG 452 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 453 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 454 isc->gatt->ag_entries); 455 #endif 456 return EINVAL; 457 } 458 459 if (isc->chiptype != CHIP_I830) { 460 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 461 #ifdef DEBUG 462 printf("%s: trying to bind into stolen memory", 463 sc->as_dev.dv_xname); 464 #endif 465 return EINVAL; 466 } 467 } 468 469 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 470 physical | 1); 471 return 0; 472 } 473 474 static int 475 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 476 { 477 struct agp_i810_softc *isc = sc->as_chipc; 478 479 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 480 return EINVAL; 481 482 if (isc->chiptype != CHIP_I810 ) { 483 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 484 #ifdef DEBUG 485 printf("%s: trying to unbind from stolen memory", 486 sc->as_dev.dv_xname); 487 #endif 488 return EINVAL; 489 } 490 } 491 492 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 0); 493 return 0; 494 } 495 496 /* 497 * Writing via memory mapped registers already flushes all TLBs. 498 */ 499 static void 500 agp_i810_flush_tlb(struct agp_softc *sc) 501 { 502 } 503 504 static int 505 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 506 { 507 508 return 0; 509 } 510 511 static struct agp_memory * 512 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 513 { 514 struct agp_i810_softc *isc = sc->as_chipc; 515 struct agp_memory *mem; 516 517 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 518 return 0; 519 520 if (sc->as_allocated + size > sc->as_maxmem) 521 return 0; 522 523 if (type == 1) { 524 /* 525 * Mapping local DRAM into GATT. 526 */ 527 if (isc->chiptype != CHIP_I810 ) 528 return 0; 529 if (size != isc->dcache_size) 530 return 0; 531 } else if (type == 2) { 532 /* 533 * Bogus mapping of a single page for the hardware cursor. 534 */ 535 if (size != AGP_PAGE_SIZE) 536 return 0; 537 } 538 539 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 540 if (mem == NULL) 541 return NULL; 542 mem->am_id = sc->as_nextid++; 543 mem->am_size = size; 544 mem->am_type = type; 545 546 if (type == 2) { 547 /* 548 * Allocate and wire down the page now so that we can 549 * get its physical address. 550 */ 551 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 552 M_WAITOK); 553 if (mem->am_dmaseg == NULL) { 554 free(mem, M_AGP); 555 return NULL; 556 } 557 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 558 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 559 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 560 free(mem->am_dmaseg, M_AGP); 561 free(mem, M_AGP); 562 return NULL; 563 } 564 } else if (type != 1) { 565 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 566 size, 0, BUS_DMA_NOWAIT, 567 &mem->am_dmamap) != 0) { 568 free(mem, M_AGP); 569 return NULL; 570 } 571 } 572 573 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 574 sc->as_allocated += size; 575 576 return mem; 577 } 578 579 static int 580 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 581 { 582 if (mem->am_is_bound) 583 return EBUSY; 584 585 if (mem->am_type == 2) { 586 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 587 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 588 free(mem->am_dmaseg, M_AGP); 589 } 590 591 sc->as_allocated -= mem->am_size; 592 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 593 free(mem, M_AGP); 594 return 0; 595 } 596 597 static int 598 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 599 off_t offset) 600 { 601 struct agp_i810_softc *isc = sc->as_chipc; 602 u_int32_t regval, i; 603 604 /* 605 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 606 * X server for mysterious reasons which leads to crashes if we write 607 * to the GTT through the MMIO window. 608 * Until the issue is solved, simply restore it. 609 */ 610 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 611 if (regval != (isc->gatt->ag_physical | 1)) { 612 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 613 regval); 614 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 615 isc->gatt->ag_physical | 1); 616 } 617 618 if (mem->am_type == 2) { 619 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 620 mem->am_physical | 1); 621 mem->am_offset = offset; 622 mem->am_is_bound = 1; 623 return 0; 624 } 625 626 if (mem->am_type != 1) 627 return agp_generic_bind_memory(sc, mem, offset); 628 629 if (isc->chiptype != CHIP_I810) 630 return EINVAL; 631 632 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) { 633 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 634 i | 3); 635 } 636 mem->am_is_bound = 1; 637 return 0; 638 } 639 640 static int 641 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 642 { 643 struct agp_i810_softc *isc = sc->as_chipc; 644 u_int32_t i; 645 646 if (mem->am_type == 2) { 647 WRITE4(AGP_I810_GTT + 648 (u_int32_t)(mem->am_offset >> AGP_PAGE_SHIFT) * 4, 649 0); 650 mem->am_offset = 0; 651 mem->am_is_bound = 0; 652 return 0; 653 } 654 655 if (mem->am_type != 1) 656 return agp_generic_unbind_memory(sc, mem); 657 658 if (isc->chiptype != CHIP_I810) 659 return EINVAL; 660 661 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 662 WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0); 663 mem->am_is_bound = 0; 664 return 0; 665 } 666
Indexes created Wed Sep 24 22:09:59 GMT 2025