agp_i810.c revision 1.21
1 /* $NetBSD: agp_i810.c,v 1.21 2003/12/23 19:56:58 tron Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.21 2003/12/23 19:56:58 tron Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <machine/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 62 #define CHIP_I810 0 /* i810/i815 */ 63 #define CHIP_I830 1 /* 830M/845G */ 64 #define CHIP_I855 2 /* 852GM/855GM/865G */ 65 66 struct agp_i810_softc { 67 u_int32_t initial_aperture; /* aperture size at startup */ 68 struct agp_gatt *gatt; 69 int chiptype; /* i810-like or i830 */ 70 u_int32_t dcache_size; /* i810 only */ 71 u_int32_t stolen; /* number of i830/845 gtt entries 72 for stolen memory */ 73 bus_space_tag_t bst; /* bus_space tag */ 74 bus_space_handle_t bsh; /* bus_space handle */ 75 struct pci_attach_args vga_pa; 76 }; 77 78 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 79 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 80 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 81 static int agp_i810_unbind_page(struct agp_softc *, off_t); 82 static void agp_i810_flush_tlb(struct agp_softc *); 83 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 84 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 85 vsize_t); 86 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 87 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 88 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 89 90 struct agp_methods agp_i810_methods = { 91 agp_i810_get_aperture, 92 agp_i810_set_aperture, 93 agp_i810_bind_page, 94 agp_i810_unbind_page, 95 agp_i810_flush_tlb, 96 agp_i810_enable, 97 agp_i810_alloc_memory, 98 agp_i810_free_memory, 99 agp_i810_bind_memory, 100 agp_i810_unbind_memory, 101 }; 102 103 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 104 static int 105 agp_i810_vgamatch(struct pci_attach_args *pa) 106 { 107 108 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 109 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 110 return (0); 111 112 switch (PCI_PRODUCT(pa->pa_id)) { 113 case PCI_PRODUCT_INTEL_82810_GC: 114 case PCI_PRODUCT_INTEL_82810_DC100_GC: 115 case PCI_PRODUCT_INTEL_82810E_GC: 116 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 117 case PCI_PRODUCT_INTEL_82830MP_IV: 118 case PCI_PRODUCT_INTEL_82845G_IGD: 119 case PCI_PRODUCT_INTEL_82855GM_IGD: 120 case PCI_PRODUCT_INTEL_82865_IGD: 121 return (1); 122 } 123 124 return (0); 125 } 126 127 int 128 agp_i810_attach(struct device *parent, struct device *self, void *aux) 129 { 130 struct agp_softc *sc = (void *)self; 131 struct agp_i810_softc *isc; 132 struct agp_gatt *gatt; 133 int error; 134 135 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 136 if (isc == NULL) { 137 aprint_error(": can't allocate chipset-specific softc\n"); 138 return ENOMEM; 139 } 140 sc->as_chipc = isc; 141 sc->as_methods = &agp_i810_methods; 142 143 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 144 #if NAGP_INTEL > 0 145 const struct pci_attach_args *pa = aux; 146 147 switch (PCI_PRODUCT(pa->pa_id)) { 148 case PCI_PRODUCT_INTEL_82840_HB: 149 case PCI_PRODUCT_INTEL_82865_HB: 150 case PCI_PRODUCT_INTEL_82845G_DRAM: 151 return agp_intel_attach(parent, self, aux); 152 } 153 #endif 154 aprint_error(": can't find internal VGA device config space\n"); 155 free(isc, M_AGP); 156 return ENOENT; 157 } 158 159 /* XXXfvdl */ 160 sc->as_dmat = isc->vga_pa.pa_dmat; 161 162 error = agp_map_aperture(&isc->vga_pa, sc); 163 if (error != 0) { 164 aprint_error(": can't map aperture\n"); 165 free(isc, M_AGP); 166 return error; 167 } 168 169 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 170 case PCI_PRODUCT_INTEL_82810_GC: 171 case PCI_PRODUCT_INTEL_82810_DC100_GC: 172 case PCI_PRODUCT_INTEL_82810E_GC: 173 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 174 isc->chiptype = CHIP_I810; 175 break; 176 case PCI_PRODUCT_INTEL_82830MP_IV: 177 case PCI_PRODUCT_INTEL_82845G_IGD: 178 isc->chiptype = CHIP_I830; 179 break; 180 case PCI_PRODUCT_INTEL_82855GM_IGD: 181 case PCI_PRODUCT_INTEL_82865_IGD: 182 isc->chiptype = CHIP_I855; 183 break; 184 } 185 186 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 187 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, NULL, NULL); 188 if (error != 0) { 189 aprint_error(": can't map mmadr registers\n"); 190 return error; 191 } 192 193 isc->initial_aperture = AGP_GET_APERTURE(sc); 194 195 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 196 if (!gatt) { 197 agp_generic_detach(sc); 198 return ENOMEM; 199 } 200 isc->gatt = gatt; 201 202 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 203 204 if (isc->chiptype == CHIP_I810) { 205 int dummyseg; 206 /* Some i810s have on-chip memory called dcache */ 207 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 208 isc->dcache_size = 4 * 1024 * 1024; 209 else 210 isc->dcache_size = 0; 211 212 /* According to the specs the gatt on the i810 must be 64k */ 213 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 214 0, &gatt->ag_dmamap, (caddr_t *)&gatt->ag_virtual, 215 &gatt->ag_physical, &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 216 free(gatt, M_AGP); 217 agp_generic_detach(sc); 218 return ENOMEM; 219 } 220 221 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 222 memset(gatt->ag_virtual, 0, gatt->ag_size); 223 224 agp_flush_cache(); 225 /* Install the GATT. */ 226 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 227 } else if (isc->chiptype == CHIP_I830) { 228 /* The i830 automatically initializes the 128k gatt on boot. */ 229 pcireg_t reg; 230 u_int32_t pgtblctl; 231 u_int16_t gcc1; 232 233 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 234 gcc1 = (u_int16_t)(reg >> 16); 235 switch (gcc1 & AGP_I830_GCC1_GMS) { 236 case AGP_I830_GCC1_GMS_STOLEN_512: 237 isc->stolen = (512 - 132) * 1024 / 4096; 238 break; 239 case AGP_I830_GCC1_GMS_STOLEN_1024: 240 isc->stolen = (1024 - 132) * 1024 / 4096; 241 break; 242 case AGP_I830_GCC1_GMS_STOLEN_8192: 243 isc->stolen = (8192 - 132) * 1024 / 4096; 244 break; 245 default: 246 isc->stolen = 0; 247 aprint_error( 248 ": unknown memory configuration, disabling\n"); 249 agp_generic_detach(sc); 250 return EINVAL; 251 } 252 if (isc->stolen > 0) { 253 aprint_error(": detected %dk stolen memory\n%s", 254 isc->stolen * 4, sc->as_dev.dv_xname); 255 } 256 aprint_error(": aperture size is %dM\n%s", 257 isc->initial_aperture / 1024 / 1024, 258 sc->as_dev.dv_xname); 259 260 /* GATT address is already in there, make sure it's enabled */ 261 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 262 pgtblctl |= 1; 263 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 264 265 gatt->ag_physical = pgtblctl & ~1; 266 } else { /* CHIP_I855 */ 267 /* The 855GM automatically initializes the 128k gatt on boot. */ 268 pcireg_t reg; 269 u_int32_t pgtblctl; 270 u_int16_t gcc1; 271 272 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 273 gcc1 = (u_int16_t)(reg >> 16); 274 switch (gcc1 & AGP_I855_GCC1_GMS) { 275 case AGP_I855_GCC1_GMS_STOLEN_1M: 276 isc->stolen = (1024 - 132) * 1024 / 4096; 277 break; 278 case AGP_I855_GCC1_GMS_STOLEN_4M: 279 isc->stolen = (4096 - 132) * 1024 / 4096; 280 break; 281 case AGP_I855_GCC1_GMS_STOLEN_8M: 282 isc->stolen = (8192 - 132) * 1024 / 4096; 283 break; 284 case AGP_I855_GCC1_GMS_STOLEN_16M: 285 isc->stolen = (16384 - 132) * 1024 / 4096; 286 break; 287 case AGP_I855_GCC1_GMS_STOLEN_32M: 288 isc->stolen = (32768 - 132) * 1024 / 4096; 289 break; 290 default: 291 isc->stolen = 0; 292 aprint_error( 293 ": unknown memory configuration, disabling\n"); 294 agp_generic_detach(sc); 295 return EINVAL; 296 } 297 if (isc->stolen > 0) { 298 aprint_error(": detected %dk stolen memory\n%s", 299 isc->stolen * 4, sc->as_dev.dv_xname); 300 } 301 aprint_error(": aperture size is %dM\n%s", 302 isc->initial_aperture / 1024 / 1024, 303 sc->as_dev.dv_xname); 304 305 /* GATT address is already in there, make sure it's enabled */ 306 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 307 pgtblctl |= 1; 308 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 309 310 gatt->ag_physical = pgtblctl & ~1; 311 } 312 313 /* 314 * Make sure the chipset can see everything. 315 */ 316 agp_flush_cache(); 317 318 return 0; 319 } 320 321 #if 0 322 static int 323 agp_i810_detach(struct agp_softc *sc) 324 { 325 int error; 326 struct agp_i810_softc *isc = sc->as_chipc; 327 328 error = agp_generic_detach(sc); 329 if (error) 330 return error; 331 332 /* Clear the GATT base. */ 333 if (sc->chiptype == CHIP_I810) { 334 WRITE4(AGP_I810_PGTBL_CTL, 0); 335 } else { 336 unsigned int pgtblctl; 337 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 338 pgtblctl &= ~1; 339 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 340 } 341 342 /* Put the aperture back the way it started. */ 343 AGP_SET_APERTURE(sc, isc->initial_aperture); 344 345 if (sc->chiptype == CHIP_I810) { 346 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 347 (caddr_t)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 348 } 349 free(sc->gatt, M_AGP); 350 351 return 0; 352 } 353 #endif 354 355 static u_int32_t 356 agp_i810_get_aperture(struct agp_softc *sc) 357 { 358 struct agp_i810_softc *isc = sc->as_chipc; 359 pcireg_t reg; 360 361 if (isc->chiptype == CHIP_I810) { 362 u_int16_t miscc; 363 364 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 365 miscc = (u_int16_t)(reg >> 16); 366 if ((miscc & AGP_I810_MISCC_WINSIZE) == 367 AGP_I810_MISCC_WINSIZE_32) 368 return 32 * 1024 * 1024; 369 else 370 return 64 * 1024 * 1024; 371 } else if (isc->chiptype == CHIP_I830) { 372 u_int16_t gcc1; 373 374 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 375 gcc1 = (u_int16_t)(reg >> 16); 376 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 377 return 64 * 1024 * 1024; 378 else 379 return 128 * 1024 * 1024; 380 } else { /* CHIP_I855 */ 381 return 128 * 1024 * 1024; 382 } 383 } 384 385 static int 386 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 387 { 388 struct agp_i810_softc *isc = sc->as_chipc; 389 pcireg_t reg; 390 391 if (isc->chiptype == CHIP_I810) { 392 u_int16_t miscc; 393 394 /* 395 * Double check for sanity. 396 */ 397 if (aperture != (32 * 1024 * 1024) && 398 aperture != (64 * 1024 * 1024)) { 399 printf("%s: bad aperture size %d\n", 400 sc->as_dev.dv_xname, aperture); 401 return EINVAL; 402 } 403 404 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 405 miscc = (u_int16_t)(reg >> 16); 406 miscc &= ~AGP_I810_MISCC_WINSIZE; 407 if (aperture == 32 * 1024 * 1024) 408 miscc |= AGP_I810_MISCC_WINSIZE_32; 409 else 410 miscc |= AGP_I810_MISCC_WINSIZE_64; 411 412 reg &= 0x0000ffff; 413 reg |= ((pcireg_t)miscc) << 16; 414 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 415 } if (isc->chiptype == CHIP_I830) { 416 u_int16_t gcc1; 417 418 if (aperture != (64 * 1024 * 1024) && 419 aperture != (128 * 1024 * 1024)) { 420 printf("%s: bad aperture size %d\n", 421 sc->as_dev.dv_xname, aperture); 422 return EINVAL; 423 } 424 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 425 gcc1 = (u_int16_t)(reg >> 16); 426 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 427 if (aperture == 64 * 1024 * 1024) 428 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 429 else 430 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 431 432 reg &= 0x0000ffff; 433 reg |= ((pcireg_t)gcc1) << 16; 434 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 435 } else { /* CHIP_I855 */ 436 if (aperture != 128 * 1024 * 1024) { 437 printf("%s: bad aperture size %d\n", 438 sc->as_dev.dv_xname, aperture); 439 return EINVAL; 440 } 441 } 442 443 return 0; 444 } 445 446 static int 447 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 448 { 449 struct agp_i810_softc *isc = sc->as_chipc; 450 451 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 452 #ifdef DEBUG 453 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 454 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 455 isc->gatt->ag_entries); 456 #endif 457 return EINVAL; 458 } 459 460 if (isc->chiptype != CHIP_I830) { 461 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 462 #ifdef DEBUG 463 printf("%s: trying to bind into stolen memory", 464 sc->as_dev.dv_xname); 465 #endif 466 return EINVAL; 467 } 468 } 469 470 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 471 physical | 1); 472 return 0; 473 } 474 475 static int 476 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 477 { 478 struct agp_i810_softc *isc = sc->as_chipc; 479 480 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 481 return EINVAL; 482 483 if (isc->chiptype != CHIP_I810 ) { 484 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 485 #ifdef DEBUG 486 printf("%s: trying to unbind from stolen memory", 487 sc->as_dev.dv_xname); 488 #endif 489 return EINVAL; 490 } 491 } 492 493 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 0); 494 return 0; 495 } 496 497 /* 498 * Writing via memory mapped registers already flushes all TLBs. 499 */ 500 static void 501 agp_i810_flush_tlb(struct agp_softc *sc) 502 { 503 } 504 505 static int 506 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 507 { 508 509 return 0; 510 } 511 512 static struct agp_memory * 513 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 514 { 515 struct agp_i810_softc *isc = sc->as_chipc; 516 struct agp_memory *mem; 517 518 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 519 return 0; 520 521 if (sc->as_allocated + size > sc->as_maxmem) 522 return 0; 523 524 if (type == 1) { 525 /* 526 * Mapping local DRAM into GATT. 527 */ 528 if (isc->chiptype != CHIP_I810 ) 529 return 0; 530 if (size != isc->dcache_size) 531 return 0; 532 } else if (type == 2) { 533 /* 534 * Bogus mapping of a single page for the hardware cursor. 535 */ 536 if (size != AGP_PAGE_SIZE) 537 return 0; 538 } 539 540 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 541 if (mem == NULL) 542 return NULL; 543 mem->am_id = sc->as_nextid++; 544 mem->am_size = size; 545 mem->am_type = type; 546 547 if (type == 2) { 548 /* 549 * Allocate and wire down the page now so that we can 550 * get its physical address. 551 */ 552 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 553 M_WAITOK); 554 if (mem->am_dmaseg == NULL) { 555 free(mem, M_AGP); 556 return NULL; 557 } 558 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 559 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 560 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 561 free(mem->am_dmaseg, M_AGP); 562 free(mem, M_AGP); 563 return NULL; 564 } 565 } else if (type != 1) { 566 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 567 size, 0, BUS_DMA_NOWAIT, 568 &mem->am_dmamap) != 0) { 569 free(mem, M_AGP); 570 return NULL; 571 } 572 } 573 574 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 575 sc->as_allocated += size; 576 577 return mem; 578 } 579 580 static int 581 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 582 { 583 if (mem->am_is_bound) 584 return EBUSY; 585 586 if (mem->am_type == 2) { 587 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 588 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 589 free(mem->am_dmaseg, M_AGP); 590 } 591 592 sc->as_allocated -= mem->am_size; 593 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 594 free(mem, M_AGP); 595 return 0; 596 } 597 598 static int 599 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 600 off_t offset) 601 { 602 struct agp_i810_softc *isc = sc->as_chipc; 603 u_int32_t regval, i; 604 605 /* 606 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 607 * X server for mysterious reasons which leads to crashes if we write 608 * to the GTT through the MMIO window. 609 * Until the issue is solved, simply restore it. 610 */ 611 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 612 if (regval != (isc->gatt->ag_physical | 1)) { 613 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 614 regval); 615 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 616 isc->gatt->ag_physical | 1); 617 } 618 619 if (mem->am_type == 2) { 620 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 621 mem->am_physical | 1); 622 mem->am_offset = offset; 623 mem->am_is_bound = 1; 624 return 0; 625 } 626 627 if (mem->am_type != 1) 628 return agp_generic_bind_memory(sc, mem, offset); 629 630 if (isc->chiptype != CHIP_I810) 631 return EINVAL; 632 633 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) { 634 WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 635 i | 3); 636 } 637 mem->am_is_bound = 1; 638 return 0; 639 } 640 641 static int 642 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 643 { 644 struct agp_i810_softc *isc = sc->as_chipc; 645 u_int32_t i; 646 647 if (mem->am_type == 2) { 648 WRITE4(AGP_I810_GTT + 649 (u_int32_t)(mem->am_offset >> AGP_PAGE_SHIFT) * 4, 650 0); 651 mem->am_offset = 0; 652 mem->am_is_bound = 0; 653 return 0; 654 } 655 656 if (mem->am_type != 1) 657 return agp_generic_unbind_memory(sc, mem); 658 659 if (isc->chiptype != CHIP_I810) 660 return EINVAL; 661 662 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 663 WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0); 664 mem->am_is_bound = 0; 665 return 0; 666 } 667
Indexes created Fri Sep 26 20:09:58 GMT 2025