agp_i810.c revision 1.26.2.6
1 /* $NetBSD: agp_i810.c,v 1.26.2.6 2007/12/07 17:30:22 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.26.2.6 2007/12/07 17:30:22 yamt Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <sys/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 #define WRITEGTT(off, v) \ 62 do { \ 63 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { \ 64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 66 (v)); \ 67 } else if (isc->chiptype == CHIP_I965) { \ 68 WRITE4(AGP_I965_GTT + \ 69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 70 (v)); \ 71 } else { \ 72 WRITE4(AGP_I810_GTT + \ 73 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 74 (v)); \ 75 } \ 76 } while (0) 77 78 #define CHIP_I810 0 /* i810/i815 */ 79 #define CHIP_I830 1 /* 830M/845G */ 80 #define CHIP_I855 2 /* 852GM/855GM/865G */ 81 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */ 82 #define CHIP_I965 4 /* 965Q/965PM */ 83 #define CHIP_G33 5 /* G33/Q33/Q35 */ 84 85 struct agp_i810_softc { 86 u_int32_t initial_aperture; /* aperture size at startup */ 87 struct agp_gatt *gatt; 88 int chiptype; /* i810-like or i830 */ 89 u_int32_t dcache_size; /* i810 only */ 90 u_int32_t stolen; /* number of i830/845 gtt entries 91 for stolen memory */ 92 bus_space_tag_t bst; /* register bus_space tag */ 93 bus_space_handle_t bsh; /* register bus_space handle */ 94 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 95 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 96 struct pci_attach_args vga_pa; 97 98 void *sc_powerhook; 99 struct pci_conf_state sc_pciconf; 100 }; 101 102 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 103 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 104 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 105 static int agp_i810_unbind_page(struct agp_softc *, off_t); 106 static void agp_i810_flush_tlb(struct agp_softc *); 107 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 108 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 109 vsize_t); 110 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 111 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 112 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 113 static void agp_i810_powerhook(int, void *); 114 115 static int agp_i810_init(struct agp_softc *); 116 117 static struct agp_methods agp_i810_methods = { 118 agp_i810_get_aperture, 119 agp_i810_set_aperture, 120 agp_i810_bind_page, 121 agp_i810_unbind_page, 122 agp_i810_flush_tlb, 123 agp_i810_enable, 124 agp_i810_alloc_memory, 125 agp_i810_free_memory, 126 agp_i810_bind_memory, 127 agp_i810_unbind_memory, 128 }; 129 130 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 131 static int 132 agp_i810_vgamatch(struct pci_attach_args *pa) 133 { 134 135 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 136 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 137 return (0); 138 139 switch (PCI_PRODUCT(pa->pa_id)) { 140 case PCI_PRODUCT_INTEL_82810_GC: 141 case PCI_PRODUCT_INTEL_82810_DC100_GC: 142 case PCI_PRODUCT_INTEL_82810E_GC: 143 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 144 case PCI_PRODUCT_INTEL_82830MP_IV: 145 case PCI_PRODUCT_INTEL_82845G_IGD: 146 case PCI_PRODUCT_INTEL_82855GM_IGD: 147 case PCI_PRODUCT_INTEL_82865_IGD: 148 case PCI_PRODUCT_INTEL_82915G_IGD: 149 case PCI_PRODUCT_INTEL_82915GM_IGD: 150 case PCI_PRODUCT_INTEL_82945P_IGD: 151 case PCI_PRODUCT_INTEL_82945GM_IGD: 152 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 153 case PCI_PRODUCT_INTEL_82965Q_IGD: 154 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 155 case PCI_PRODUCT_INTEL_82965PM_IGD: 156 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 157 case PCI_PRODUCT_INTEL_82G33_IGD: 158 case PCI_PRODUCT_INTEL_82G33_IGD_1: 159 case PCI_PRODUCT_INTEL_82965G_IGD: 160 case PCI_PRODUCT_INTEL_82965G_IGD_1: 161 case PCI_PRODUCT_INTEL_82Q35_IGD: 162 case PCI_PRODUCT_INTEL_82Q35_IGD_1: 163 case PCI_PRODUCT_INTEL_82Q33_IGD: 164 case PCI_PRODUCT_INTEL_82Q33_IGD_1: 165 return (1); 166 } 167 168 return (0); 169 } 170 171 static int 172 agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 173 { 174 /* 175 * Find the aperture. Don't map it (yet), this would 176 * eat KVA. 177 */ 178 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 179 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, &sc->as_apsize, 180 &sc->as_apflags) != 0) 181 return ENXIO; 182 183 sc->as_apt = pa->pa_memt; 184 185 return 0; 186 } 187 188 int 189 agp_i810_attach(struct device *parent, struct device *self, void *aux) 190 { 191 struct agp_softc *sc = (void *)self; 192 struct agp_i810_softc *isc; 193 struct agp_gatt *gatt; 194 int error, apbase; 195 bus_size_t mmadrsize; 196 197 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 198 if (isc == NULL) { 199 aprint_error(": can't allocate chipset-specific softc\n"); 200 return ENOMEM; 201 } 202 sc->as_chipc = isc; 203 sc->as_methods = &agp_i810_methods; 204 205 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 206 #if NAGP_INTEL > 0 207 const struct pci_attach_args *pa = aux; 208 209 switch (PCI_PRODUCT(pa->pa_id)) { 210 case PCI_PRODUCT_INTEL_82840_HB: 211 case PCI_PRODUCT_INTEL_82865_HB: 212 case PCI_PRODUCT_INTEL_82845G_DRAM: 213 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 214 return agp_intel_attach(parent, self, aux); 215 } 216 #endif 217 aprint_error(": can't find internal VGA device config space\n"); 218 free(isc, M_AGP); 219 return ENOENT; 220 } 221 222 /* XXXfvdl */ 223 sc->as_dmat = isc->vga_pa.pa_dmat; 224 225 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 226 case PCI_PRODUCT_INTEL_82810_GC: 227 case PCI_PRODUCT_INTEL_82810_DC100_GC: 228 case PCI_PRODUCT_INTEL_82810E_GC: 229 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 230 isc->chiptype = CHIP_I810; 231 break; 232 case PCI_PRODUCT_INTEL_82830MP_IV: 233 case PCI_PRODUCT_INTEL_82845G_IGD: 234 isc->chiptype = CHIP_I830; 235 break; 236 case PCI_PRODUCT_INTEL_82855GM_IGD: 237 case PCI_PRODUCT_INTEL_82865_IGD: 238 isc->chiptype = CHIP_I855; 239 break; 240 case PCI_PRODUCT_INTEL_82915G_IGD: 241 case PCI_PRODUCT_INTEL_82915GM_IGD: 242 case PCI_PRODUCT_INTEL_82945P_IGD: 243 case PCI_PRODUCT_INTEL_82945GM_IGD: 244 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 245 isc->chiptype = CHIP_I915; 246 break; 247 case PCI_PRODUCT_INTEL_82965Q_IGD: 248 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 249 case PCI_PRODUCT_INTEL_82965PM_IGD: 250 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 251 case PCI_PRODUCT_INTEL_82965G_IGD: 252 case PCI_PRODUCT_INTEL_82965G_IGD_1: 253 isc->chiptype = CHIP_I965; 254 break; 255 case PCI_PRODUCT_INTEL_82Q35_IGD: 256 case PCI_PRODUCT_INTEL_82Q35_IGD_1: 257 case PCI_PRODUCT_INTEL_82G33_IGD: 258 case PCI_PRODUCT_INTEL_82G33_IGD_1: 259 case PCI_PRODUCT_INTEL_82Q33_IGD: 260 case PCI_PRODUCT_INTEL_82Q33_IGD_1: 261 isc->chiptype = CHIP_G33; 262 break; 263 } 264 265 switch (isc->chiptype) { 266 case CHIP_I915: 267 case CHIP_G33: 268 apbase = AGP_I915_GMADR; 269 break; 270 default: 271 apbase = AGP_I810_GMADR; 272 break; 273 } 274 if (isc->chiptype == CHIP_I965) { 275 error = agp_i965_map_aperture(&isc->vga_pa, sc, AGP_I965_GMADR); 276 } else { 277 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 278 } 279 if (error != 0) { 280 aprint_error(": can't map aperture\n"); 281 free(isc, M_AGP); 282 return error; 283 } 284 285 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { 286 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 287 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 288 NULL, &mmadrsize); 289 if (error != 0) { 290 aprint_error(": can't map mmadr registers\n"); 291 agp_generic_detach(sc); 292 return error; 293 } 294 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 295 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 296 NULL, NULL); 297 if (error != 0) { 298 aprint_error(": can't map gttadr registers\n"); 299 /* XXX we should release mmadr here */ 300 agp_generic_detach(sc); 301 return error; 302 } 303 } else if (isc->chiptype == CHIP_I965) { 304 error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR, 305 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 306 NULL, &mmadrsize); 307 if (error != 0) { 308 aprint_error(": can't map mmadr registers\n"); 309 agp_generic_detach(sc); 310 return error; 311 } 312 } else { 313 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 314 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 315 NULL, &mmadrsize); 316 if (error != 0) { 317 aprint_error(": can't map mmadr registers\n"); 318 agp_generic_detach(sc); 319 return error; 320 } 321 } 322 323 isc->initial_aperture = AGP_GET_APERTURE(sc); 324 325 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 326 if (!gatt) { 327 agp_generic_detach(sc); 328 return ENOMEM; 329 } 330 isc->gatt = gatt; 331 332 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 333 334 return agp_i810_init(sc); 335 } 336 337 static int agp_i810_init(struct agp_softc *sc) 338 { 339 struct agp_i810_softc *isc; 340 struct agp_gatt *gatt; 341 342 isc = sc->as_chipc; 343 gatt = isc->gatt; 344 345 if (isc->chiptype == CHIP_I810) { 346 void *virtual; 347 int dummyseg; 348 349 /* Some i810s have on-chip memory called dcache */ 350 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 351 isc->dcache_size = 4 * 1024 * 1024; 352 else 353 isc->dcache_size = 0; 354 355 /* According to the specs the gatt on the i810 must be 64k */ 356 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 357 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 358 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 359 free(gatt, M_AGP); 360 agp_generic_detach(sc); 361 return ENOMEM; 362 } 363 gatt->ag_virtual = (uint32_t *)virtual; 364 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 365 memset(gatt->ag_virtual, 0, gatt->ag_size); 366 367 agp_flush_cache(); 368 /* Install the GATT. */ 369 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 370 } else if (isc->chiptype == CHIP_I830) { 371 /* The i830 automatically initializes the 128k gatt on boot. */ 372 pcireg_t reg; 373 u_int32_t pgtblctl; 374 u_int16_t gcc1; 375 376 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 377 gcc1 = (u_int16_t)(reg >> 16); 378 switch (gcc1 & AGP_I830_GCC1_GMS) { 379 case AGP_I830_GCC1_GMS_STOLEN_512: 380 isc->stolen = (512 - 132) * 1024 / 4096; 381 break; 382 case AGP_I830_GCC1_GMS_STOLEN_1024: 383 isc->stolen = (1024 - 132) * 1024 / 4096; 384 break; 385 case AGP_I830_GCC1_GMS_STOLEN_8192: 386 isc->stolen = (8192 - 132) * 1024 / 4096; 387 break; 388 default: 389 isc->stolen = 0; 390 aprint_error( 391 ": unknown memory configuration, disabling\n"); 392 agp_generic_detach(sc); 393 return EINVAL; 394 } 395 396 if (isc->stolen > 0) { 397 aprint_error(": detected %dk stolen memory\n%s", 398 isc->stolen * 4, sc->as_dev.dv_xname); 399 } 400 401 /* GATT address is already in there, make sure it's enabled */ 402 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 403 pgtblctl |= 1; 404 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 405 406 gatt->ag_physical = pgtblctl & ~1; 407 } else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 || 408 isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G33) { 409 pcireg_t reg; 410 u_int32_t pgtblctl, stolen; 411 u_int16_t gcc1; 412 413 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 414 gcc1 = (u_int16_t)(reg >> 16); 415 416 /* Stolen memory is set up at the beginning of the aperture by 417 * the BIOS, consisting of the GATT followed by 4kb for the 418 * BIOS display. 419 */ 420 switch (isc->chiptype) { 421 case CHIP_I855: 422 stolen = 128 + 4; 423 break; 424 case CHIP_I915: 425 stolen = 256 + 4; 426 break; 427 case CHIP_I965: 428 stolen = 512 + 4; 429 break; 430 case CHIP_G33: 431 switch (gcc1 & AGP_G33_PGTBL_SIZE_MASK) { 432 case AGP_G33_PGTBL_SIZE_1M: 433 stolen = 1024 + 4; 434 break; 435 case AGP_G33_PGTBL_SIZE_2M: 436 stolen = 2048 + 4; 437 break; 438 default: 439 aprint_error(": bad gtt size\n"); 440 agp_generic_detach(sc); 441 return EINVAL; 442 } 443 break; 444 default: 445 aprint_error(": bad chiptype\n"); 446 agp_generic_detach(sc); 447 return EINVAL; 448 } 449 450 switch (gcc1 & AGP_I855_GCC1_GMS) { 451 case AGP_I855_GCC1_GMS_STOLEN_1M: 452 isc->stolen = (1024 - stolen) * 1024 / 4096; 453 break; 454 case AGP_I855_GCC1_GMS_STOLEN_4M: 455 isc->stolen = (4096 - stolen) * 1024 / 4096; 456 break; 457 case AGP_I855_GCC1_GMS_STOLEN_8M: 458 isc->stolen = (8192 - stolen) * 1024 / 4096; 459 break; 460 case AGP_I855_GCC1_GMS_STOLEN_16M: 461 isc->stolen = (16384 - stolen) * 1024 / 4096; 462 break; 463 case AGP_I855_GCC1_GMS_STOLEN_32M: 464 isc->stolen = (32768 - stolen) * 1024 / 4096; 465 break; 466 case AGP_I915_GCC1_GMS_STOLEN_48M: 467 isc->stolen = (49152 - stolen) * 1024 / 4096; 468 break; 469 case AGP_I915_GCC1_GMS_STOLEN_64M: 470 isc->stolen = (65536 - stolen) * 1024 / 4096; 471 break; 472 case AGP_G33_GCC1_GMS_STOLEN_128M: 473 isc->stolen = ((128 * 1024) - stolen) * 1024 / 4096; 474 break; 475 case AGP_G33_GCC1_GMS_STOLEN_256M: 476 isc->stolen = ((256 * 1024) - stolen) * 1024 / 4096; 477 break; 478 default: 479 isc->stolen = 0; 480 aprint_error( 481 ": unknown memory configuration, disabling\n"); 482 agp_generic_detach(sc); 483 return EINVAL; 484 } 485 if (isc->stolen > 0) { 486 aprint_error(": detected %dk stolen memory\n%s", 487 isc->stolen * 4, sc->as_dev.dv_xname); 488 } 489 490 /* GATT address is already in there, make sure it's enabled */ 491 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 492 pgtblctl |= 1; 493 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 494 495 gatt->ag_physical = pgtblctl & ~1; 496 } 497 498 /* 499 * Make sure the chipset can see everything. 500 */ 501 agp_flush_cache(); 502 503 isc->sc_powerhook = powerhook_establish(sc->as_dev.dv_xname, 504 agp_i810_powerhook, sc); 505 if (isc->sc_powerhook == NULL) 506 printf("%s: WARNING: unable to establish PCI power hook\n", 507 sc->as_dev.dv_xname); 508 509 #if 0 510 /* 511 * another device (drm) may need access to this region 512 * we do not need it anymore 513 */ 514 bus_space_unmap(isc->bst, isc->bsh, mmadrsize); 515 #endif 516 517 return 0; 518 } 519 520 #if 0 521 static int 522 agp_i810_detach(struct agp_softc *sc) 523 { 524 int error; 525 struct agp_i810_softc *isc = sc->as_chipc; 526 527 error = agp_generic_detach(sc); 528 if (error) 529 return error; 530 531 /* Clear the GATT base. */ 532 if (sc->chiptype == CHIP_I810) { 533 WRITE4(AGP_I810_PGTBL_CTL, 0); 534 } else { 535 unsigned int pgtblctl; 536 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 537 pgtblctl &= ~1; 538 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 539 } 540 541 /* Put the aperture back the way it started. */ 542 AGP_SET_APERTURE(sc, isc->initial_aperture); 543 544 if (sc->chiptype == CHIP_I810) { 545 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 546 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 547 } 548 free(sc->gatt, M_AGP); 549 550 return 0; 551 } 552 #endif 553 554 static u_int32_t 555 agp_i810_get_aperture(struct agp_softc *sc) 556 { 557 struct agp_i810_softc *isc = sc->as_chipc; 558 pcireg_t reg; 559 u_int16_t miscc, gcc1, msac; 560 561 switch (isc->chiptype) { 562 case CHIP_I810: 563 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 564 miscc = (u_int16_t)(reg >> 16); 565 if ((miscc & AGP_I810_MISCC_WINSIZE) == 566 AGP_I810_MISCC_WINSIZE_32) 567 return 32 * 1024 * 1024; 568 else 569 return 64 * 1024 * 1024; 570 case CHIP_I830: 571 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 572 gcc1 = (u_int16_t)(reg >> 16); 573 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 574 return 64 * 1024 * 1024; 575 else 576 return 128 * 1024 * 1024; 577 case CHIP_I855: 578 return 128 * 1024 * 1024; 579 case CHIP_I915: 580 case CHIP_G33: 581 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 582 msac = (u_int16_t)(reg >> 16); 583 if (msac & AGP_I915_MSAC_APER_128M) 584 return 128 * 1024 * 1024; 585 else 586 return 256 * 1024 * 1024; 587 case CHIP_I965: 588 return 512 * 1024 * 1024; 589 default: 590 aprint_error(": Unknown chipset\n"); 591 } 592 593 return 0; 594 } 595 596 static int 597 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 598 { 599 struct agp_i810_softc *isc = sc->as_chipc; 600 pcireg_t reg; 601 u_int16_t miscc, gcc1; 602 603 switch (isc->chiptype) { 604 case CHIP_I810: 605 /* 606 * Double check for sanity. 607 */ 608 if (aperture != (32 * 1024 * 1024) && 609 aperture != (64 * 1024 * 1024)) { 610 printf("%s: bad aperture size %d\n", 611 sc->as_dev.dv_xname, aperture); 612 return EINVAL; 613 } 614 615 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 616 miscc = (u_int16_t)(reg >> 16); 617 miscc &= ~AGP_I810_MISCC_WINSIZE; 618 if (aperture == 32 * 1024 * 1024) 619 miscc |= AGP_I810_MISCC_WINSIZE_32; 620 else 621 miscc |= AGP_I810_MISCC_WINSIZE_64; 622 623 reg &= 0x0000ffff; 624 reg |= ((pcireg_t)miscc) << 16; 625 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 626 break; 627 case CHIP_I830: 628 if (aperture != (64 * 1024 * 1024) && 629 aperture != (128 * 1024 * 1024)) { 630 printf("%s: bad aperture size %d\n", 631 sc->as_dev.dv_xname, aperture); 632 return EINVAL; 633 } 634 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 635 gcc1 = (u_int16_t)(reg >> 16); 636 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 637 if (aperture == 64 * 1024 * 1024) 638 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 639 else 640 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 641 642 reg &= 0x0000ffff; 643 reg |= ((pcireg_t)gcc1) << 16; 644 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 645 break; 646 case CHIP_I855: 647 case CHIP_I915: 648 if (aperture != agp_i810_get_aperture(sc)) { 649 printf("%s: bad aperture size %d\n", 650 sc->as_dev.dv_xname, aperture); 651 return EINVAL; 652 } 653 break; 654 case CHIP_I965: 655 if (aperture != 512 * 1024 * 1024) { 656 printf("%s: bad aperture size %d\n", 657 sc->as_dev.dv_xname, aperture); 658 return EINVAL; 659 } 660 break; 661 } 662 663 return 0; 664 } 665 666 static int 667 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 668 { 669 struct agp_i810_softc *isc = sc->as_chipc; 670 671 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 672 #ifdef AGP_DEBUG 673 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 674 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 675 isc->gatt->ag_entries); 676 #endif 677 return EINVAL; 678 } 679 680 if (isc->chiptype != CHIP_I830) { 681 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 682 #ifdef AGP_DEBUG 683 printf("%s: trying to bind into stolen memory", 684 sc->as_dev.dv_xname); 685 #endif 686 return EINVAL; 687 } 688 } 689 690 WRITEGTT(offset, physical | 1); 691 return 0; 692 } 693 694 static int 695 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 696 { 697 struct agp_i810_softc *isc = sc->as_chipc; 698 699 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 700 return EINVAL; 701 702 if (isc->chiptype != CHIP_I810 ) { 703 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 704 #ifdef AGP_DEBUG 705 printf("%s: trying to unbind from stolen memory", 706 sc->as_dev.dv_xname); 707 #endif 708 return EINVAL; 709 } 710 } 711 712 WRITEGTT(offset, 0); 713 return 0; 714 } 715 716 /* 717 * Writing via memory mapped registers already flushes all TLBs. 718 */ 719 static void 720 agp_i810_flush_tlb(struct agp_softc *sc) 721 { 722 } 723 724 static int 725 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 726 { 727 728 return 0; 729 } 730 731 static struct agp_memory * 732 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 733 { 734 struct agp_i810_softc *isc = sc->as_chipc; 735 struct agp_memory *mem; 736 737 #ifdef AGP_DEBUG 738 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 739 #endif 740 741 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 742 return 0; 743 744 if (sc->as_allocated + size > sc->as_maxmem) 745 return 0; 746 747 if (type == 1) { 748 /* 749 * Mapping local DRAM into GATT. 750 */ 751 if (isc->chiptype != CHIP_I810 ) 752 return 0; 753 if (size != isc->dcache_size) 754 return 0; 755 } else if (type == 2) { 756 /* 757 * Bogus mapping for the hardware cursor. 758 */ 759 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 760 return 0; 761 } 762 763 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 764 if (mem == NULL) 765 return NULL; 766 mem->am_id = sc->as_nextid++; 767 mem->am_size = size; 768 mem->am_type = type; 769 770 if (type == 2) { 771 /* 772 * Allocate and wire down the memory now so that we can 773 * get its physical address. 774 */ 775 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 776 M_WAITOK); 777 if (mem->am_dmaseg == NULL) { 778 free(mem, M_AGP); 779 return NULL; 780 } 781 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 782 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 783 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 784 free(mem->am_dmaseg, M_AGP); 785 free(mem, M_AGP); 786 return NULL; 787 } 788 memset(mem->am_virtual, 0, size); 789 } else if (type != 1) { 790 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 791 size, 0, BUS_DMA_NOWAIT, 792 &mem->am_dmamap) != 0) { 793 free(mem, M_AGP); 794 return NULL; 795 } 796 } 797 798 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 799 sc->as_allocated += size; 800 801 return mem; 802 } 803 804 static int 805 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 806 { 807 if (mem->am_is_bound) 808 return EBUSY; 809 810 if (mem->am_type == 2) { 811 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 812 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 813 free(mem->am_dmaseg, M_AGP); 814 } 815 816 sc->as_allocated -= mem->am_size; 817 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 818 free(mem, M_AGP); 819 return 0; 820 } 821 822 static int 823 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 824 off_t offset) 825 { 826 struct agp_i810_softc *isc = sc->as_chipc; 827 u_int32_t regval, i; 828 829 /* 830 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 831 * X server for mysterious reasons which leads to crashes if we write 832 * to the GTT through the MMIO window. 833 * Until the issue is solved, simply restore it. 834 */ 835 836 #if 0 837 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 838 if (regval != (isc->gatt->ag_physical | 1)) { 839 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 840 regval); 841 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 842 isc->gatt->ag_physical | 1); 843 } 844 #endif 845 regval = 0; 846 847 if (mem->am_type == 2) { 848 WRITEGTT(offset, mem->am_physical | 1); 849 mem->am_offset = offset; 850 mem->am_is_bound = 1; 851 return 0; 852 } 853 854 if (mem->am_type != 1) 855 return agp_generic_bind_memory(sc, mem, offset); 856 857 if (isc->chiptype != CHIP_I810) 858 return EINVAL; 859 860 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 861 WRITEGTT(offset, i | 3); 862 mem->am_is_bound = 1; 863 return 0; 864 } 865 866 static int 867 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 868 { 869 struct agp_i810_softc *isc = sc->as_chipc; 870 u_int32_t i; 871 872 if (mem->am_type == 2) { 873 WRITEGTT(mem->am_offset, 0); 874 mem->am_offset = 0; 875 mem->am_is_bound = 0; 876 return 0; 877 } 878 879 if (mem->am_type != 1) 880 return agp_generic_unbind_memory(sc, mem); 881 882 if (isc->chiptype != CHIP_I810) 883 return EINVAL; 884 885 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 886 WRITEGTT(i, 0); 887 mem->am_is_bound = 0; 888 return 0; 889 } 890 891 static void 892 agp_i810_powerhook(int why, void *arg) 893 { 894 struct agp_softc *sc = (struct agp_softc *)arg; 895 struct agp_i810_softc *isc = sc->as_chipc; 896 897 if (why == PWR_RESUME) { 898 pci_conf_restore(sc->as_pc, sc->as_tag, &isc->sc_pciconf); 899 agp_flush_cache(); 900 } else if ((why == PWR_STANDBY) || (why == PWR_SUSPEND)) 901 pci_conf_capture(sc->as_pc, sc->as_tag, &isc->sc_pciconf); 902 903 return; 904 } 905
Indexes created Tue Oct 07 21:09:53 GMT 2025