agp_i810.c revision 1.38 1 /* $NetBSD: agp_i810.c,v 1.38 2007/03/23 16:27:59 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2000 Doug Rabson
5 * Copyright (c) 2000 Ruslan Ermilov
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.38 2007/03/23 16:27:59 jmcneill Exp $");
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/malloc.h>
38 #include <sys/kernel.h>
39 #include <sys/lock.h>
40 #include <sys/proc.h>
41 #include <sys/device.h>
42 #include <sys/conf.h>
43
44 #include <uvm/uvm_extern.h>
45
46 #include <dev/pci/pcivar.h>
47 #include <dev/pci/pcireg.h>
48 #include <dev/pci/pcidevs.h>
49 #include <dev/pci/agpvar.h>
50 #include <dev/pci/agpreg.h>
51
52 #include <sys/agpio.h>
53
54 #include <machine/bus.h>
55
56 #include "agp_intel.h"
57
58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off)
59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off)
60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v)
61 #define WRITEGTT(off, v) \
62 do { \
63 if (isc->chiptype == CHIP_I915) { \
64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \
65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \
66 (v)); \
67 } else { \
68 WRITE4(AGP_I810_GTT + \
69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \
70 (v)); \
71 } \
72 } while (0)
73
74 #define CHIP_I810 0 /* i810/i815 */
75 #define CHIP_I830 1 /* 830M/845G */
76 #define CHIP_I855 2 /* 852GM/855GM/865G */
77 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */
78
79 struct agp_i810_softc {
80 u_int32_t initial_aperture; /* aperture size at startup */
81 struct agp_gatt *gatt;
82 int chiptype; /* i810-like or i830 */
83 u_int32_t dcache_size; /* i810 only */
84 u_int32_t stolen; /* number of i830/845 gtt entries
85 for stolen memory */
86 bus_space_tag_t bst; /* register bus_space tag */
87 bus_space_handle_t bsh; /* register bus_space handle */
88 bus_space_tag_t gtt_bst; /* GTT bus_space tag */
89 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */
90 struct pci_attach_args vga_pa;
91
92 void *sc_powerhook;
93 struct pci_conf_state sc_pciconf;
94 };
95
96 static u_int32_t agp_i810_get_aperture(struct agp_softc *);
97 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t);
98 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t);
99 static int agp_i810_unbind_page(struct agp_softc *, off_t);
100 static void agp_i810_flush_tlb(struct agp_softc *);
101 static int agp_i810_enable(struct agp_softc *, u_int32_t mode);
102 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int,
103 vsize_t);
104 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *);
105 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t);
106 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *);
107 static void agp_i810_powerhook(int, void *);
108
109 static struct agp_methods agp_i810_methods = {
110 agp_i810_get_aperture,
111 agp_i810_set_aperture,
112 agp_i810_bind_page,
113 agp_i810_unbind_page,
114 agp_i810_flush_tlb,
115 agp_i810_enable,
116 agp_i810_alloc_memory,
117 agp_i810_free_memory,
118 agp_i810_bind_memory,
119 agp_i810_unbind_memory,
120 };
121
122 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */
123 static int
124 agp_i810_vgamatch(struct pci_attach_args *pa)
125 {
126
127 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY ||
128 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
129 return (0);
130
131 switch (PCI_PRODUCT(pa->pa_id)) {
132 case PCI_PRODUCT_INTEL_82810_GC:
133 case PCI_PRODUCT_INTEL_82810_DC100_GC:
134 case PCI_PRODUCT_INTEL_82810E_GC:
135 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH:
136 case PCI_PRODUCT_INTEL_82830MP_IV:
137 case PCI_PRODUCT_INTEL_82845G_IGD:
138 case PCI_PRODUCT_INTEL_82855GM_IGD:
139 case PCI_PRODUCT_INTEL_82865_IGD:
140 case PCI_PRODUCT_INTEL_82915G_IGD:
141 case PCI_PRODUCT_INTEL_82915GM_IGD:
142 case PCI_PRODUCT_INTEL_82945P_IGD:
143 case PCI_PRODUCT_INTEL_82945GM_IGD:
144 case PCI_PRODUCT_INTEL_82945GM_IGD_1:
145 return (1);
146 }
147
148 return (0);
149 }
150
151 int
152 agp_i810_attach(struct device *parent, struct device *self, void *aux)
153 {
154 struct agp_softc *sc = (void *)self;
155 struct agp_i810_softc *isc;
156 struct agp_gatt *gatt;
157 int error, apbase;
158 bus_size_t mmadrsize;
159
160 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO);
161 if (isc == NULL) {
162 aprint_error(": can't allocate chipset-specific softc\n");
163 return ENOMEM;
164 }
165 sc->as_chipc = isc;
166 sc->as_methods = &agp_i810_methods;
167
168 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) {
169 #if NAGP_INTEL > 0
170 const struct pci_attach_args *pa = aux;
171
172 switch (PCI_PRODUCT(pa->pa_id)) {
173 case PCI_PRODUCT_INTEL_82840_HB:
174 case PCI_PRODUCT_INTEL_82865_HB:
175 case PCI_PRODUCT_INTEL_82845G_DRAM:
176 case PCI_PRODUCT_INTEL_82815_FULL_HUB:
177 return agp_intel_attach(parent, self, aux);
178 }
179 #endif
180 aprint_error(": can't find internal VGA device config space\n");
181 free(isc, M_AGP);
182 return ENOENT;
183 }
184
185 /* XXXfvdl */
186 sc->as_dmat = isc->vga_pa.pa_dmat;
187
188 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) {
189 case PCI_PRODUCT_INTEL_82810_GC:
190 case PCI_PRODUCT_INTEL_82810_DC100_GC:
191 case PCI_PRODUCT_INTEL_82810E_GC:
192 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH:
193 isc->chiptype = CHIP_I810;
194 break;
195 case PCI_PRODUCT_INTEL_82830MP_IV:
196 case PCI_PRODUCT_INTEL_82845G_IGD:
197 isc->chiptype = CHIP_I830;
198 break;
199 case PCI_PRODUCT_INTEL_82855GM_IGD:
200 case PCI_PRODUCT_INTEL_82865_IGD:
201 isc->chiptype = CHIP_I855;
202 break;
203 case PCI_PRODUCT_INTEL_82915G_IGD:
204 case PCI_PRODUCT_INTEL_82915GM_IGD:
205 case PCI_PRODUCT_INTEL_82945P_IGD:
206 case PCI_PRODUCT_INTEL_82945GM_IGD:
207 case PCI_PRODUCT_INTEL_82945GM_IGD_1:
208 isc->chiptype = CHIP_I915;
209 break;
210 }
211
212 apbase = isc->chiptype == CHIP_I915 ? AGP_I915_GMADR : AGP_I810_GMADR;
213 error = agp_map_aperture(&isc->vga_pa, sc, apbase);
214 if (error != 0) {
215 aprint_error(": can't map aperture\n");
216 free(isc, M_AGP);
217 return error;
218 }
219
220 if (isc->chiptype == CHIP_I915) {
221 pci_mapreg_info(isc->vga_pa.pa_pc, isc->vga_pa.pa_tag,
222 AGP_I915_MMADR, PCI_MAPREG_TYPE_MEM, NULL,
223 &mmadrsize, NULL);
224 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR,
225 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, NULL, NULL);
226 if (error != 0) {
227 aprint_error(": can't map mmadr registers\n");
228 agp_generic_detach(sc);
229 return error;
230 }
231 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR,
232 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh,
233 NULL, NULL);
234 if (error != 0) {
235 aprint_error(": can't map gttadr registers\n");
236 /* XXX we should release mmadr here */
237 agp_generic_detach(sc);
238 return error;
239 }
240 } else {
241 pci_mapreg_info(isc->vga_pa.pa_pc, isc->vga_pa.pa_tag,
242 AGP_I810_MMADR, PCI_MAPREG_TYPE_MEM, NULL,
243 &mmadrsize, NULL);
244 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR,
245 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, NULL, NULL);
246 if (error != 0) {
247 aprint_error(": can't map mmadr registers\n");
248 agp_generic_detach(sc);
249 return error;
250 }
251 }
252
253 isc->initial_aperture = AGP_GET_APERTURE(sc);
254
255 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT);
256 if (!gatt) {
257 agp_generic_detach(sc);
258 return ENOMEM;
259 }
260 isc->gatt = gatt;
261
262 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT;
263
264 if (isc->chiptype == CHIP_I810) {
265 void *virtual;
266 int dummyseg;
267
268 /* Some i810s have on-chip memory called dcache */
269 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
270 isc->dcache_size = 4 * 1024 * 1024;
271 else
272 isc->dcache_size = 0;
273
274 /* According to the specs the gatt on the i810 must be 64k */
275 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024,
276 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical,
277 &gatt->ag_dmaseg, 1, &dummyseg) != 0) {
278 free(gatt, M_AGP);
279 agp_generic_detach(sc);
280 return ENOMEM;
281 }
282 gatt->ag_virtual = (uint32_t *)virtual;
283
284 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t);
285 memset(gatt->ag_virtual, 0, gatt->ag_size);
286
287 agp_flush_cache();
288 /* Install the GATT. */
289 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1);
290 } else if (isc->chiptype == CHIP_I830) {
291 /* The i830 automatically initializes the 128k gatt on boot. */
292 pcireg_t reg;
293 u_int32_t pgtblctl;
294 u_int16_t gcc1;
295
296 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
297 gcc1 = (u_int16_t)(reg >> 16);
298 switch (gcc1 & AGP_I830_GCC1_GMS) {
299 case AGP_I830_GCC1_GMS_STOLEN_512:
300 isc->stolen = (512 - 132) * 1024 / 4096;
301 break;
302 case AGP_I830_GCC1_GMS_STOLEN_1024:
303 isc->stolen = (1024 - 132) * 1024 / 4096;
304 break;
305 case AGP_I830_GCC1_GMS_STOLEN_8192:
306 isc->stolen = (8192 - 132) * 1024 / 4096;
307 break;
308 default:
309 isc->stolen = 0;
310 aprint_error(
311 ": unknown memory configuration, disabling\n");
312 agp_generic_detach(sc);
313 return EINVAL;
314 }
315 if (isc->stolen > 0) {
316 aprint_error(": detected %dk stolen memory\n%s",
317 isc->stolen * 4, sc->as_dev.dv_xname);
318 }
319
320 /* GATT address is already in there, make sure it's enabled */
321 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
322 pgtblctl |= 1;
323 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
324
325 gatt->ag_physical = pgtblctl & ~1;
326 } else if (isc->chiptype == CHIP_I855) {
327 /* The 855GM automatically initializes the 128k gatt on boot. */
328 pcireg_t reg;
329 u_int32_t pgtblctl;
330 u_int16_t gcc1;
331
332 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1);
333 gcc1 = (u_int16_t)(reg >> 16);
334 switch (gcc1 & AGP_I855_GCC1_GMS) {
335 case AGP_I855_GCC1_GMS_STOLEN_1M:
336 isc->stolen = (1024 - 132) * 1024 / 4096;
337 break;
338 case AGP_I855_GCC1_GMS_STOLEN_4M:
339 isc->stolen = (4096 - 132) * 1024 / 4096;
340 break;
341 case AGP_I855_GCC1_GMS_STOLEN_8M:
342 isc->stolen = (8192 - 132) * 1024 / 4096;
343 break;
344 case AGP_I855_GCC1_GMS_STOLEN_16M:
345 isc->stolen = (16384 - 132) * 1024 / 4096;
346 break;
347 case AGP_I855_GCC1_GMS_STOLEN_32M:
348 isc->stolen = (32768 - 132) * 1024 / 4096;
349 break;
350 default:
351 isc->stolen = 0;
352 aprint_error(
353 ": unknown memory configuration, disabling\n");
354 agp_generic_detach(sc);
355 return EINVAL;
356 }
357 if (isc->stolen > 0) {
358 aprint_error(": detected %dk stolen memory\n%s",
359 isc->stolen * 4, sc->as_dev.dv_xname);
360 }
361
362 /* GATT address is already in there, make sure it's enabled */
363 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
364 pgtblctl |= 1;
365 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
366
367 gatt->ag_physical = pgtblctl & ~1;
368 } else { /* CHIP_I915 */
369 /* The 915G automatically initializes the 256k gatt on boot. */
370 pcireg_t reg;
371 u_int32_t pgtblctl;
372 u_int16_t gcc1;
373
374 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_GCC1);
375 gcc1 = (u_int16_t)(reg >> 16);
376 switch (gcc1 & AGP_I915_GCC1_GMS) {
377 case AGP_I915_GCC1_GMS_STOLEN_0M:
378 isc->stolen = 0;
379 break;
380 case AGP_I915_GCC1_GMS_STOLEN_1M:
381 isc->stolen = (1024 - 260) * 1024 / 4096;
382 break;
383 case AGP_I915_GCC1_GMS_STOLEN_8M:
384 isc->stolen = (8192 - 260) * 1024 / 4096;
385 break;
386 default:
387 isc->stolen = 0;
388 aprint_error(
389 ": unknown memory configuration, disabling\n");
390 agp_generic_detach(sc);
391 return EINVAL;
392 }
393 if (isc->stolen > 0) {
394 aprint_error(": detected %dk stolen memory\n%s",
395 isc->stolen * 4, sc->as_dev.dv_xname);
396 }
397
398 /* GATT address is already in there, make sure it's enabled */
399 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
400 pgtblctl |= 1;
401 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
402
403 gatt->ag_physical = pgtblctl & ~1;
404 }
405
406 /*
407 * Make sure the chipset can see everything.
408 */
409 agp_flush_cache();
410
411 isc->sc_powerhook = powerhook_establish(sc->as_dev.dv_xname,
412 agp_i810_powerhook, sc);
413 if (isc->sc_powerhook == NULL)
414 printf("%s: WARNING: unable to establish PCI power hook\n",
415 sc->as_dev.dv_xname);
416
417 /*
418 * another device (drm) may need access to this region
419 * we do not need it anymore
420 */
421 bus_space_unmap(isc->bst, isc->bsh, mmadrsize);
422
423 return 0;
424 }
425
426 #if 0
427 static int
428 agp_i810_detach(struct agp_softc *sc)
429 {
430 int error;
431 struct agp_i810_softc *isc = sc->as_chipc;
432
433 error = agp_generic_detach(sc);
434 if (error)
435 return error;
436
437 /* Clear the GATT base. */
438 if (sc->chiptype == CHIP_I810) {
439 WRITE4(AGP_I810_PGTBL_CTL, 0);
440 } else {
441 unsigned int pgtblctl;
442 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
443 pgtblctl &= ~1;
444 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
445 }
446
447 /* Put the aperture back the way it started. */
448 AGP_SET_APERTURE(sc, isc->initial_aperture);
449
450 if (sc->chiptype == CHIP_I810) {
451 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap,
452 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1);
453 }
454 free(sc->gatt, M_AGP);
455
456 return 0;
457 }
458 #endif
459
460 static u_int32_t
461 agp_i810_get_aperture(struct agp_softc *sc)
462 {
463 struct agp_i810_softc *isc = sc->as_chipc;
464 pcireg_t reg;
465
466 if (isc->chiptype == CHIP_I810) {
467 u_int16_t miscc;
468
469 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM);
470 miscc = (u_int16_t)(reg >> 16);
471 if ((miscc & AGP_I810_MISCC_WINSIZE) ==
472 AGP_I810_MISCC_WINSIZE_32)
473 return 32 * 1024 * 1024;
474 else
475 return 64 * 1024 * 1024;
476 } else if (isc->chiptype == CHIP_I830) {
477 u_int16_t gcc1;
478
479 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
480 gcc1 = (u_int16_t)(reg >> 16);
481 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
482 return 64 * 1024 * 1024;
483 else
484 return 128 * 1024 * 1024;
485 } else if (isc->chiptype == CHIP_I855) {
486 return 128 * 1024 * 1024;
487 } else { /* CHIP_I915 */
488 u_int16_t msac;
489
490 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC);
491 msac = (u_int16_t)(reg >> 16);
492 if (msac & AGP_I915_MSAC_APER_128M)
493 return 128 * 1024 * 1024;
494 else
495 return 256 * 1024 * 1024;
496 }
497 }
498
499 static int
500 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture)
501 {
502 struct agp_i810_softc *isc = sc->as_chipc;
503 pcireg_t reg;
504
505 if (isc->chiptype == CHIP_I810) {
506 u_int16_t miscc;
507
508 /*
509 * Double check for sanity.
510 */
511 if (aperture != (32 * 1024 * 1024) &&
512 aperture != (64 * 1024 * 1024)) {
513 printf("%s: bad aperture size %d\n",
514 sc->as_dev.dv_xname, aperture);
515 return EINVAL;
516 }
517
518 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM);
519 miscc = (u_int16_t)(reg >> 16);
520 miscc &= ~AGP_I810_MISCC_WINSIZE;
521 if (aperture == 32 * 1024 * 1024)
522 miscc |= AGP_I810_MISCC_WINSIZE_32;
523 else
524 miscc |= AGP_I810_MISCC_WINSIZE_64;
525
526 reg &= 0x0000ffff;
527 reg |= ((pcireg_t)miscc) << 16;
528 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg);
529 } else if (isc->chiptype == CHIP_I830) {
530 u_int16_t gcc1;
531
532 if (aperture != (64 * 1024 * 1024) &&
533 aperture != (128 * 1024 * 1024)) {
534 printf("%s: bad aperture size %d\n",
535 sc->as_dev.dv_xname, aperture);
536 return EINVAL;
537 }
538 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
539 gcc1 = (u_int16_t)(reg >> 16);
540 gcc1 &= ~AGP_I830_GCC1_GMASIZE;
541 if (aperture == 64 * 1024 * 1024)
542 gcc1 |= AGP_I830_GCC1_GMASIZE_64;
543 else
544 gcc1 |= AGP_I830_GCC1_GMASIZE_128;
545
546 reg &= 0x0000ffff;
547 reg |= ((pcireg_t)gcc1) << 16;
548 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg);
549 } else { /* CHIP_I855 or CHIP_I915 */
550 if (aperture != agp_i810_get_aperture(sc)) {
551 printf("%s: bad aperture size %d\n",
552 sc->as_dev.dv_xname, aperture);
553 return EINVAL;
554 }
555 }
556
557 return 0;
558 }
559
560 static int
561 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
562 {
563 struct agp_i810_softc *isc = sc->as_chipc;
564
565 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
566 #ifdef AGP_DEBUG
567 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n",
568 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT,
569 isc->gatt->ag_entries);
570 #endif
571 return EINVAL;
572 }
573
574 if (isc->chiptype != CHIP_I830) {
575 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) {
576 #ifdef AGP_DEBUG
577 printf("%s: trying to bind into stolen memory",
578 sc->as_dev.dv_xname);
579 #endif
580 return EINVAL;
581 }
582 }
583
584 WRITEGTT(offset, physical | 1);
585 return 0;
586 }
587
588 static int
589 agp_i810_unbind_page(struct agp_softc *sc, off_t offset)
590 {
591 struct agp_i810_softc *isc = sc->as_chipc;
592
593 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT))
594 return EINVAL;
595
596 if (isc->chiptype != CHIP_I810 ) {
597 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) {
598 #ifdef AGP_DEBUG
599 printf("%s: trying to unbind from stolen memory",
600 sc->as_dev.dv_xname);
601 #endif
602 return EINVAL;
603 }
604 }
605
606 WRITEGTT(offset, 0);
607 return 0;
608 }
609
610 /*
611 * Writing via memory mapped registers already flushes all TLBs.
612 */
613 static void
614 agp_i810_flush_tlb(struct agp_softc *sc)
615 {
616 }
617
618 static int
619 agp_i810_enable(struct agp_softc *sc, u_int32_t mode)
620 {
621
622 return 0;
623 }
624
625 static struct agp_memory *
626 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size)
627 {
628 struct agp_i810_softc *isc = sc->as_chipc;
629 struct agp_memory *mem;
630
631 #ifdef AGP_DEBUG
632 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size);
633 #endif
634
635 if ((size & (AGP_PAGE_SIZE - 1)) != 0)
636 return 0;
637
638 if (sc->as_allocated + size > sc->as_maxmem)
639 return 0;
640
641 if (type == 1) {
642 /*
643 * Mapping local DRAM into GATT.
644 */
645 if (isc->chiptype != CHIP_I810 )
646 return 0;
647 if (size != isc->dcache_size)
648 return 0;
649 } else if (type == 2) {
650 /*
651 * Bogus mapping for the hardware cursor.
652 */
653 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE)
654 return 0;
655 }
656
657 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO);
658 if (mem == NULL)
659 return NULL;
660 mem->am_id = sc->as_nextid++;
661 mem->am_size = size;
662 mem->am_type = type;
663
664 if (type == 2) {
665 /*
666 * Allocate and wire down the memory now so that we can
667 * get its physical address.
668 */
669 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP,
670 M_WAITOK);
671 if (mem->am_dmaseg == NULL) {
672 free(mem, M_AGP);
673 return NULL;
674 }
675 if (agp_alloc_dmamem(sc->as_dmat, size, 0,
676 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical,
677 mem->am_dmaseg, 1, &mem->am_nseg) != 0) {
678 free(mem->am_dmaseg, M_AGP);
679 free(mem, M_AGP);
680 return NULL;
681 }
682 memset(mem->am_virtual, 0, size);
683 } else if (type != 1) {
684 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1,
685 size, 0, BUS_DMA_NOWAIT,
686 &mem->am_dmamap) != 0) {
687 free(mem, M_AGP);
688 return NULL;
689 }
690 }
691
692 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link);
693 sc->as_allocated += size;
694
695 return mem;
696 }
697
698 static int
699 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem)
700 {
701 if (mem->am_is_bound)
702 return EBUSY;
703
704 if (mem->am_type == 2) {
705 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap,
706 mem->am_virtual, mem->am_dmaseg, mem->am_nseg);
707 free(mem->am_dmaseg, M_AGP);
708 }
709
710 sc->as_allocated -= mem->am_size;
711 TAILQ_REMOVE(&sc->as_memory, mem, am_link);
712 free(mem, M_AGP);
713 return 0;
714 }
715
716 static int
717 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem,
718 off_t offset)
719 {
720 struct agp_i810_softc *isc = sc->as_chipc;
721 u_int32_t regval, i;
722
723 /*
724 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the
725 * X server for mysterious reasons which leads to crashes if we write
726 * to the GTT through the MMIO window.
727 * Until the issue is solved, simply restore it.
728 */
729
730 #if 0
731 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL);
732 if (regval != (isc->gatt->ag_physical | 1)) {
733 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n",
734 regval);
735 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL,
736 isc->gatt->ag_physical | 1);
737 }
738 #endif
739 regval = 0;
740
741 if (mem->am_type == 2) {
742 WRITEGTT(offset, mem->am_physical | 1);
743 mem->am_offset = offset;
744 mem->am_is_bound = 1;
745 return 0;
746 }
747
748 if (mem->am_type != 1)
749 return agp_generic_bind_memory(sc, mem, offset);
750
751 if (isc->chiptype != CHIP_I810)
752 return EINVAL;
753
754 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
755 WRITEGTT(offset, i | 3);
756 mem->am_is_bound = 1;
757 return 0;
758 }
759
760 static int
761 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem)
762 {
763 struct agp_i810_softc *isc = sc->as_chipc;
764 u_int32_t i;
765
766 if (mem->am_type == 2) {
767 WRITEGTT(mem->am_offset, 0);
768 mem->am_offset = 0;
769 mem->am_is_bound = 0;
770 return 0;
771 }
772
773 if (mem->am_type != 1)
774 return agp_generic_unbind_memory(sc, mem);
775
776 if (isc->chiptype != CHIP_I810)
777 return EINVAL;
778
779 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
780 WRITEGTT(i, 0);
781 mem->am_is_bound = 0;
782 return 0;
783 }
784
785 static void
786 agp_i810_powerhook(int why, void *arg)
787 {
788 struct agp_softc *sc = (struct agp_softc *)arg;
789 struct agp_i810_softc *isc = sc->as_chipc;
790
791 if (why == PWR_RESUME) {
792 pci_conf_restore(sc->as_pc, sc->as_tag, &isc->sc_pciconf);
793 agp_flush_cache();
794 } else if ((why == PWR_STANDBY) || (why == PWR_SUSPEND))
795 pci_conf_capture(sc->as_pc, sc->as_tag, &isc->sc_pciconf);
796
797 return;
798 }
799