agp_i810.c revision 1.39
1 /* $NetBSD: agp_i810.c,v 1.39 2007/03/23 16:39:07 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.39 2007/03/23 16:39:07 drochner Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <machine/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 #define WRITEGTT(off, v) \ 62 do { \ 63 if (isc->chiptype == CHIP_I915) { \ 64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 66 (v)); \ 67 } else { \ 68 WRITE4(AGP_I810_GTT + \ 69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 70 (v)); \ 71 } \ 72 } while (0) 73 74 #define CHIP_I810 0 /* i810/i815 */ 75 #define CHIP_I830 1 /* 830M/845G */ 76 #define CHIP_I855 2 /* 852GM/855GM/865G */ 77 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */ 78 79 struct agp_i810_softc { 80 u_int32_t initial_aperture; /* aperture size at startup */ 81 struct agp_gatt *gatt; 82 int chiptype; /* i810-like or i830 */ 83 u_int32_t dcache_size; /* i810 only */ 84 u_int32_t stolen; /* number of i830/845 gtt entries 85 for stolen memory */ 86 bus_space_tag_t bst; /* register bus_space tag */ 87 bus_space_handle_t bsh; /* register bus_space handle */ 88 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 89 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 90 struct pci_attach_args vga_pa; 91 92 void *sc_powerhook; 93 struct pci_conf_state sc_pciconf; 94 }; 95 96 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 97 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 98 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 99 static int agp_i810_unbind_page(struct agp_softc *, off_t); 100 static void agp_i810_flush_tlb(struct agp_softc *); 101 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 102 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 103 vsize_t); 104 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 105 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 106 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 107 static void agp_i810_powerhook(int, void *); 108 109 static struct agp_methods agp_i810_methods = { 110 agp_i810_get_aperture, 111 agp_i810_set_aperture, 112 agp_i810_bind_page, 113 agp_i810_unbind_page, 114 agp_i810_flush_tlb, 115 agp_i810_enable, 116 agp_i810_alloc_memory, 117 agp_i810_free_memory, 118 agp_i810_bind_memory, 119 agp_i810_unbind_memory, 120 }; 121 122 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 123 static int 124 agp_i810_vgamatch(struct pci_attach_args *pa) 125 { 126 127 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 128 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 129 return (0); 130 131 switch (PCI_PRODUCT(pa->pa_id)) { 132 case PCI_PRODUCT_INTEL_82810_GC: 133 case PCI_PRODUCT_INTEL_82810_DC100_GC: 134 case PCI_PRODUCT_INTEL_82810E_GC: 135 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 136 case PCI_PRODUCT_INTEL_82830MP_IV: 137 case PCI_PRODUCT_INTEL_82845G_IGD: 138 case PCI_PRODUCT_INTEL_82855GM_IGD: 139 case PCI_PRODUCT_INTEL_82865_IGD: 140 case PCI_PRODUCT_INTEL_82915G_IGD: 141 case PCI_PRODUCT_INTEL_82915GM_IGD: 142 case PCI_PRODUCT_INTEL_82945P_IGD: 143 case PCI_PRODUCT_INTEL_82945GM_IGD: 144 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 145 return (1); 146 } 147 148 return (0); 149 } 150 151 int 152 agp_i810_attach(struct device *parent, struct device *self, void *aux) 153 { 154 struct agp_softc *sc = (void *)self; 155 struct agp_i810_softc *isc; 156 struct agp_gatt *gatt; 157 int error, apbase; 158 bus_size_t mmadrsize; 159 160 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 161 if (isc == NULL) { 162 aprint_error(": can't allocate chipset-specific softc\n"); 163 return ENOMEM; 164 } 165 sc->as_chipc = isc; 166 sc->as_methods = &agp_i810_methods; 167 168 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 169 #if NAGP_INTEL > 0 170 const struct pci_attach_args *pa = aux; 171 172 switch (PCI_PRODUCT(pa->pa_id)) { 173 case PCI_PRODUCT_INTEL_82840_HB: 174 case PCI_PRODUCT_INTEL_82865_HB: 175 case PCI_PRODUCT_INTEL_82845G_DRAM: 176 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 177 return agp_intel_attach(parent, self, aux); 178 } 179 #endif 180 aprint_error(": can't find internal VGA device config space\n"); 181 free(isc, M_AGP); 182 return ENOENT; 183 } 184 185 /* XXXfvdl */ 186 sc->as_dmat = isc->vga_pa.pa_dmat; 187 188 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 189 case PCI_PRODUCT_INTEL_82810_GC: 190 case PCI_PRODUCT_INTEL_82810_DC100_GC: 191 case PCI_PRODUCT_INTEL_82810E_GC: 192 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 193 isc->chiptype = CHIP_I810; 194 break; 195 case PCI_PRODUCT_INTEL_82830MP_IV: 196 case PCI_PRODUCT_INTEL_82845G_IGD: 197 isc->chiptype = CHIP_I830; 198 break; 199 case PCI_PRODUCT_INTEL_82855GM_IGD: 200 case PCI_PRODUCT_INTEL_82865_IGD: 201 isc->chiptype = CHIP_I855; 202 break; 203 case PCI_PRODUCT_INTEL_82915G_IGD: 204 case PCI_PRODUCT_INTEL_82915GM_IGD: 205 case PCI_PRODUCT_INTEL_82945P_IGD: 206 case PCI_PRODUCT_INTEL_82945GM_IGD: 207 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 208 isc->chiptype = CHIP_I915; 209 break; 210 } 211 212 apbase = isc->chiptype == CHIP_I915 ? AGP_I915_GMADR : AGP_I810_GMADR; 213 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 214 if (error != 0) { 215 aprint_error(": can't map aperture\n"); 216 free(isc, M_AGP); 217 return error; 218 } 219 220 if (isc->chiptype == CHIP_I915) { 221 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 222 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 223 NULL, &mmadrsize); 224 if (error != 0) { 225 aprint_error(": can't map mmadr registers\n"); 226 agp_generic_detach(sc); 227 return error; 228 } 229 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 230 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 231 NULL, NULL); 232 if (error != 0) { 233 aprint_error(": can't map gttadr registers\n"); 234 /* XXX we should release mmadr here */ 235 agp_generic_detach(sc); 236 return error; 237 } 238 } else { 239 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 240 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 241 NULL, &mmadrsize); 242 if (error != 0) { 243 aprint_error(": can't map mmadr registers\n"); 244 agp_generic_detach(sc); 245 return error; 246 } 247 } 248 249 isc->initial_aperture = AGP_GET_APERTURE(sc); 250 251 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 252 if (!gatt) { 253 agp_generic_detach(sc); 254 return ENOMEM; 255 } 256 isc->gatt = gatt; 257 258 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 259 260 if (isc->chiptype == CHIP_I810) { 261 void *virtual; 262 int dummyseg; 263 264 /* Some i810s have on-chip memory called dcache */ 265 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 266 isc->dcache_size = 4 * 1024 * 1024; 267 else 268 isc->dcache_size = 0; 269 270 /* According to the specs the gatt on the i810 must be 64k */ 271 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 272 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 273 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 274 free(gatt, M_AGP); 275 agp_generic_detach(sc); 276 return ENOMEM; 277 } 278 gatt->ag_virtual = (uint32_t *)virtual; 279 280 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 281 memset(gatt->ag_virtual, 0, gatt->ag_size); 282 283 agp_flush_cache(); 284 /* Install the GATT. */ 285 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 286 } else if (isc->chiptype == CHIP_I830) { 287 /* The i830 automatically initializes the 128k gatt on boot. */ 288 pcireg_t reg; 289 u_int32_t pgtblctl; 290 u_int16_t gcc1; 291 292 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 293 gcc1 = (u_int16_t)(reg >> 16); 294 switch (gcc1 & AGP_I830_GCC1_GMS) { 295 case AGP_I830_GCC1_GMS_STOLEN_512: 296 isc->stolen = (512 - 132) * 1024 / 4096; 297 break; 298 case AGP_I830_GCC1_GMS_STOLEN_1024: 299 isc->stolen = (1024 - 132) * 1024 / 4096; 300 break; 301 case AGP_I830_GCC1_GMS_STOLEN_8192: 302 isc->stolen = (8192 - 132) * 1024 / 4096; 303 break; 304 default: 305 isc->stolen = 0; 306 aprint_error( 307 ": unknown memory configuration, disabling\n"); 308 agp_generic_detach(sc); 309 return EINVAL; 310 } 311 if (isc->stolen > 0) { 312 aprint_error(": detected %dk stolen memory\n%s", 313 isc->stolen * 4, sc->as_dev.dv_xname); 314 } 315 316 /* GATT address is already in there, make sure it's enabled */ 317 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 318 pgtblctl |= 1; 319 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 320 321 gatt->ag_physical = pgtblctl & ~1; 322 } else if (isc->chiptype == CHIP_I855) { 323 /* The 855GM automatically initializes the 128k gatt on boot. */ 324 pcireg_t reg; 325 u_int32_t pgtblctl; 326 u_int16_t gcc1; 327 328 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 329 gcc1 = (u_int16_t)(reg >> 16); 330 switch (gcc1 & AGP_I855_GCC1_GMS) { 331 case AGP_I855_GCC1_GMS_STOLEN_1M: 332 isc->stolen = (1024 - 132) * 1024 / 4096; 333 break; 334 case AGP_I855_GCC1_GMS_STOLEN_4M: 335 isc->stolen = (4096 - 132) * 1024 / 4096; 336 break; 337 case AGP_I855_GCC1_GMS_STOLEN_8M: 338 isc->stolen = (8192 - 132) * 1024 / 4096; 339 break; 340 case AGP_I855_GCC1_GMS_STOLEN_16M: 341 isc->stolen = (16384 - 132) * 1024 / 4096; 342 break; 343 case AGP_I855_GCC1_GMS_STOLEN_32M: 344 isc->stolen = (32768 - 132) * 1024 / 4096; 345 break; 346 default: 347 isc->stolen = 0; 348 aprint_error( 349 ": unknown memory configuration, disabling\n"); 350 agp_generic_detach(sc); 351 return EINVAL; 352 } 353 if (isc->stolen > 0) { 354 aprint_error(": detected %dk stolen memory\n%s", 355 isc->stolen * 4, sc->as_dev.dv_xname); 356 } 357 358 /* GATT address is already in there, make sure it's enabled */ 359 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 360 pgtblctl |= 1; 361 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 362 363 gatt->ag_physical = pgtblctl & ~1; 364 } else { /* CHIP_I915 */ 365 /* The 915G automatically initializes the 256k gatt on boot. */ 366 pcireg_t reg; 367 u_int32_t pgtblctl; 368 u_int16_t gcc1; 369 370 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_GCC1); 371 gcc1 = (u_int16_t)(reg >> 16); 372 switch (gcc1 & AGP_I915_GCC1_GMS) { 373 case AGP_I915_GCC1_GMS_STOLEN_0M: 374 isc->stolen = 0; 375 break; 376 case AGP_I915_GCC1_GMS_STOLEN_1M: 377 isc->stolen = (1024 - 260) * 1024 / 4096; 378 break; 379 case AGP_I915_GCC1_GMS_STOLEN_8M: 380 isc->stolen = (8192 - 260) * 1024 / 4096; 381 break; 382 default: 383 isc->stolen = 0; 384 aprint_error( 385 ": unknown memory configuration, disabling\n"); 386 agp_generic_detach(sc); 387 return EINVAL; 388 } 389 if (isc->stolen > 0) { 390 aprint_error(": detected %dk stolen memory\n%s", 391 isc->stolen * 4, sc->as_dev.dv_xname); 392 } 393 394 /* GATT address is already in there, make sure it's enabled */ 395 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 396 pgtblctl |= 1; 397 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 398 399 gatt->ag_physical = pgtblctl & ~1; 400 } 401 402 /* 403 * Make sure the chipset can see everything. 404 */ 405 agp_flush_cache(); 406 407 isc->sc_powerhook = powerhook_establish(sc->as_dev.dv_xname, 408 agp_i810_powerhook, sc); 409 if (isc->sc_powerhook == NULL) 410 printf("%s: WARNING: unable to establish PCI power hook\n", 411 sc->as_dev.dv_xname); 412 413 /* 414 * another device (drm) may need access to this region 415 * we do not need it anymore 416 */ 417 bus_space_unmap(isc->bst, isc->bsh, mmadrsize); 418 419 return 0; 420 } 421 422 #if 0 423 static int 424 agp_i810_detach(struct agp_softc *sc) 425 { 426 int error; 427 struct agp_i810_softc *isc = sc->as_chipc; 428 429 error = agp_generic_detach(sc); 430 if (error) 431 return error; 432 433 /* Clear the GATT base. */ 434 if (sc->chiptype == CHIP_I810) { 435 WRITE4(AGP_I810_PGTBL_CTL, 0); 436 } else { 437 unsigned int pgtblctl; 438 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 439 pgtblctl &= ~1; 440 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 441 } 442 443 /* Put the aperture back the way it started. */ 444 AGP_SET_APERTURE(sc, isc->initial_aperture); 445 446 if (sc->chiptype == CHIP_I810) { 447 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 448 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 449 } 450 free(sc->gatt, M_AGP); 451 452 return 0; 453 } 454 #endif 455 456 static u_int32_t 457 agp_i810_get_aperture(struct agp_softc *sc) 458 { 459 struct agp_i810_softc *isc = sc->as_chipc; 460 pcireg_t reg; 461 462 if (isc->chiptype == CHIP_I810) { 463 u_int16_t miscc; 464 465 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 466 miscc = (u_int16_t)(reg >> 16); 467 if ((miscc & AGP_I810_MISCC_WINSIZE) == 468 AGP_I810_MISCC_WINSIZE_32) 469 return 32 * 1024 * 1024; 470 else 471 return 64 * 1024 * 1024; 472 } else if (isc->chiptype == CHIP_I830) { 473 u_int16_t gcc1; 474 475 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 476 gcc1 = (u_int16_t)(reg >> 16); 477 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 478 return 64 * 1024 * 1024; 479 else 480 return 128 * 1024 * 1024; 481 } else if (isc->chiptype == CHIP_I855) { 482 return 128 * 1024 * 1024; 483 } else { /* CHIP_I915 */ 484 u_int16_t msac; 485 486 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 487 msac = (u_int16_t)(reg >> 16); 488 if (msac & AGP_I915_MSAC_APER_128M) 489 return 128 * 1024 * 1024; 490 else 491 return 256 * 1024 * 1024; 492 } 493 } 494 495 static int 496 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 497 { 498 struct agp_i810_softc *isc = sc->as_chipc; 499 pcireg_t reg; 500 501 if (isc->chiptype == CHIP_I810) { 502 u_int16_t miscc; 503 504 /* 505 * Double check for sanity. 506 */ 507 if (aperture != (32 * 1024 * 1024) && 508 aperture != (64 * 1024 * 1024)) { 509 printf("%s: bad aperture size %d\n", 510 sc->as_dev.dv_xname, aperture); 511 return EINVAL; 512 } 513 514 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 515 miscc = (u_int16_t)(reg >> 16); 516 miscc &= ~AGP_I810_MISCC_WINSIZE; 517 if (aperture == 32 * 1024 * 1024) 518 miscc |= AGP_I810_MISCC_WINSIZE_32; 519 else 520 miscc |= AGP_I810_MISCC_WINSIZE_64; 521 522 reg &= 0x0000ffff; 523 reg |= ((pcireg_t)miscc) << 16; 524 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 525 } else if (isc->chiptype == CHIP_I830) { 526 u_int16_t gcc1; 527 528 if (aperture != (64 * 1024 * 1024) && 529 aperture != (128 * 1024 * 1024)) { 530 printf("%s: bad aperture size %d\n", 531 sc->as_dev.dv_xname, aperture); 532 return EINVAL; 533 } 534 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 535 gcc1 = (u_int16_t)(reg >> 16); 536 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 537 if (aperture == 64 * 1024 * 1024) 538 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 539 else 540 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 541 542 reg &= 0x0000ffff; 543 reg |= ((pcireg_t)gcc1) << 16; 544 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 545 } else { /* CHIP_I855 or CHIP_I915 */ 546 if (aperture != agp_i810_get_aperture(sc)) { 547 printf("%s: bad aperture size %d\n", 548 sc->as_dev.dv_xname, aperture); 549 return EINVAL; 550 } 551 } 552 553 return 0; 554 } 555 556 static int 557 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 558 { 559 struct agp_i810_softc *isc = sc->as_chipc; 560 561 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 562 #ifdef AGP_DEBUG 563 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 564 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 565 isc->gatt->ag_entries); 566 #endif 567 return EINVAL; 568 } 569 570 if (isc->chiptype != CHIP_I830) { 571 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 572 #ifdef AGP_DEBUG 573 printf("%s: trying to bind into stolen memory", 574 sc->as_dev.dv_xname); 575 #endif 576 return EINVAL; 577 } 578 } 579 580 WRITEGTT(offset, physical | 1); 581 return 0; 582 } 583 584 static int 585 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 586 { 587 struct agp_i810_softc *isc = sc->as_chipc; 588 589 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 590 return EINVAL; 591 592 if (isc->chiptype != CHIP_I810 ) { 593 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 594 #ifdef AGP_DEBUG 595 printf("%s: trying to unbind from stolen memory", 596 sc->as_dev.dv_xname); 597 #endif 598 return EINVAL; 599 } 600 } 601 602 WRITEGTT(offset, 0); 603 return 0; 604 } 605 606 /* 607 * Writing via memory mapped registers already flushes all TLBs. 608 */ 609 static void 610 agp_i810_flush_tlb(struct agp_softc *sc) 611 { 612 } 613 614 static int 615 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 616 { 617 618 return 0; 619 } 620 621 static struct agp_memory * 622 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 623 { 624 struct agp_i810_softc *isc = sc->as_chipc; 625 struct agp_memory *mem; 626 627 #ifdef AGP_DEBUG 628 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 629 #endif 630 631 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 632 return 0; 633 634 if (sc->as_allocated + size > sc->as_maxmem) 635 return 0; 636 637 if (type == 1) { 638 /* 639 * Mapping local DRAM into GATT. 640 */ 641 if (isc->chiptype != CHIP_I810 ) 642 return 0; 643 if (size != isc->dcache_size) 644 return 0; 645 } else if (type == 2) { 646 /* 647 * Bogus mapping for the hardware cursor. 648 */ 649 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 650 return 0; 651 } 652 653 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 654 if (mem == NULL) 655 return NULL; 656 mem->am_id = sc->as_nextid++; 657 mem->am_size = size; 658 mem->am_type = type; 659 660 if (type == 2) { 661 /* 662 * Allocate and wire down the memory now so that we can 663 * get its physical address. 664 */ 665 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 666 M_WAITOK); 667 if (mem->am_dmaseg == NULL) { 668 free(mem, M_AGP); 669 return NULL; 670 } 671 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 672 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 673 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 674 free(mem->am_dmaseg, M_AGP); 675 free(mem, M_AGP); 676 return NULL; 677 } 678 memset(mem->am_virtual, 0, size); 679 } else if (type != 1) { 680 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 681 size, 0, BUS_DMA_NOWAIT, 682 &mem->am_dmamap) != 0) { 683 free(mem, M_AGP); 684 return NULL; 685 } 686 } 687 688 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 689 sc->as_allocated += size; 690 691 return mem; 692 } 693 694 static int 695 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 696 { 697 if (mem->am_is_bound) 698 return EBUSY; 699 700 if (mem->am_type == 2) { 701 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 702 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 703 free(mem->am_dmaseg, M_AGP); 704 } 705 706 sc->as_allocated -= mem->am_size; 707 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 708 free(mem, M_AGP); 709 return 0; 710 } 711 712 static int 713 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 714 off_t offset) 715 { 716 struct agp_i810_softc *isc = sc->as_chipc; 717 u_int32_t regval, i; 718 719 /* 720 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 721 * X server for mysterious reasons which leads to crashes if we write 722 * to the GTT through the MMIO window. 723 * Until the issue is solved, simply restore it. 724 */ 725 726 #if 0 727 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 728 if (regval != (isc->gatt->ag_physical | 1)) { 729 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 730 regval); 731 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 732 isc->gatt->ag_physical | 1); 733 } 734 #endif 735 regval = 0; 736 737 if (mem->am_type == 2) { 738 WRITEGTT(offset, mem->am_physical | 1); 739 mem->am_offset = offset; 740 mem->am_is_bound = 1; 741 return 0; 742 } 743 744 if (mem->am_type != 1) 745 return agp_generic_bind_memory(sc, mem, offset); 746 747 if (isc->chiptype != CHIP_I810) 748 return EINVAL; 749 750 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 751 WRITEGTT(offset, i | 3); 752 mem->am_is_bound = 1; 753 return 0; 754 } 755 756 static int 757 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 758 { 759 struct agp_i810_softc *isc = sc->as_chipc; 760 u_int32_t i; 761 762 if (mem->am_type == 2) { 763 WRITEGTT(mem->am_offset, 0); 764 mem->am_offset = 0; 765 mem->am_is_bound = 0; 766 return 0; 767 } 768 769 if (mem->am_type != 1) 770 return agp_generic_unbind_memory(sc, mem); 771 772 if (isc->chiptype != CHIP_I810) 773 return EINVAL; 774 775 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 776 WRITEGTT(i, 0); 777 mem->am_is_bound = 0; 778 return 0; 779 } 780 781 static void 782 agp_i810_powerhook(int why, void *arg) 783 { 784 struct agp_softc *sc = (struct agp_softc *)arg; 785 struct agp_i810_softc *isc = sc->as_chipc; 786 787 if (why == PWR_RESUME) { 788 pci_conf_restore(sc->as_pc, sc->as_tag, &isc->sc_pciconf); 789 agp_flush_cache(); 790 } else if ((why == PWR_STANDBY) || (why == PWR_SUSPEND)) 791 pci_conf_capture(sc->as_pc, sc->as_tag, &isc->sc_pciconf); 792 793 return; 794 } 795
Indexes created Fri Sep 26 08:10:20 GMT 2025