agp_i810.c revision 1.41.6.1
1 /* $NetBSD: agp_i810.c,v 1.41.6.1 2007/08/03 22:17:18 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.41.6.1 2007/08/03 22:17:18 jmcneill Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <machine/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 #define WRITEGTT(off, v) \ 62 do { \ 63 if (isc->chiptype == CHIP_I915) { \ 64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 66 (v)); \ 67 } else { \ 68 WRITE4(AGP_I810_GTT + \ 69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 70 (v)); \ 71 } \ 72 } while (0) 73 74 #define CHIP_I810 0 /* i810/i815 */ 75 #define CHIP_I830 1 /* 830M/845G */ 76 #define CHIP_I855 2 /* 852GM/855GM/865G */ 77 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */ 78 79 struct agp_i810_softc { 80 u_int32_t initial_aperture; /* aperture size at startup */ 81 struct agp_gatt *gatt; 82 int chiptype; /* i810-like or i830 */ 83 u_int32_t dcache_size; /* i810 only */ 84 u_int32_t stolen; /* number of i830/845 gtt entries 85 for stolen memory */ 86 bus_space_tag_t bst; /* register bus_space tag */ 87 bus_space_handle_t bsh; /* register bus_space handle */ 88 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 89 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 90 struct pci_attach_args vga_pa; 91 92 struct pci_conf_state sc_pciconf; 93 }; 94 95 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 96 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 97 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 98 static int agp_i810_unbind_page(struct agp_softc *, off_t); 99 static void agp_i810_flush_tlb(struct agp_softc *); 100 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 101 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 102 vsize_t); 103 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 104 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 105 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 106 static pnp_status_t agp_i810_power(device_t, pnp_request_t, void *); 107 108 static struct agp_methods agp_i810_methods = { 109 agp_i810_get_aperture, 110 agp_i810_set_aperture, 111 agp_i810_bind_page, 112 agp_i810_unbind_page, 113 agp_i810_flush_tlb, 114 agp_i810_enable, 115 agp_i810_alloc_memory, 116 agp_i810_free_memory, 117 agp_i810_bind_memory, 118 agp_i810_unbind_memory, 119 }; 120 121 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 122 static int 123 agp_i810_vgamatch(struct pci_attach_args *pa) 124 { 125 126 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 127 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 128 return (0); 129 130 switch (PCI_PRODUCT(pa->pa_id)) { 131 case PCI_PRODUCT_INTEL_82810_GC: 132 case PCI_PRODUCT_INTEL_82810_DC100_GC: 133 case PCI_PRODUCT_INTEL_82810E_GC: 134 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 135 case PCI_PRODUCT_INTEL_82830MP_IV: 136 case PCI_PRODUCT_INTEL_82845G_IGD: 137 case PCI_PRODUCT_INTEL_82855GM_IGD: 138 case PCI_PRODUCT_INTEL_82865_IGD: 139 case PCI_PRODUCT_INTEL_82915G_IGD: 140 case PCI_PRODUCT_INTEL_82915GM_IGD: 141 case PCI_PRODUCT_INTEL_82945P_IGD: 142 case PCI_PRODUCT_INTEL_82945GM_IGD: 143 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 144 return (1); 145 } 146 147 return (0); 148 } 149 150 int 151 agp_i810_attach(struct device *parent, struct device *self, void *aux) 152 { 153 struct agp_softc *sc = (void *)self; 154 struct agp_i810_softc *isc; 155 struct agp_gatt *gatt; 156 pnp_status_t status; 157 int error, apbase; 158 bus_size_t mmadrsize; 159 160 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 161 if (isc == NULL) { 162 aprint_error(": can't allocate chipset-specific softc\n"); 163 return ENOMEM; 164 } 165 sc->as_chipc = isc; 166 sc->as_methods = &agp_i810_methods; 167 168 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 169 #if NAGP_INTEL > 0 170 const struct pci_attach_args *pa = aux; 171 172 switch (PCI_PRODUCT(pa->pa_id)) { 173 case PCI_PRODUCT_INTEL_82840_HB: 174 case PCI_PRODUCT_INTEL_82865_HB: 175 case PCI_PRODUCT_INTEL_82845G_DRAM: 176 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 177 return agp_intel_attach(parent, self, aux); 178 } 179 #endif 180 aprint_error(": can't find internal VGA device config space\n"); 181 free(isc, M_AGP); 182 return ENOENT; 183 } 184 185 /* XXXfvdl */ 186 sc->as_dmat = isc->vga_pa.pa_dmat; 187 188 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 189 case PCI_PRODUCT_INTEL_82810_GC: 190 case PCI_PRODUCT_INTEL_82810_DC100_GC: 191 case PCI_PRODUCT_INTEL_82810E_GC: 192 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 193 isc->chiptype = CHIP_I810; 194 break; 195 case PCI_PRODUCT_INTEL_82830MP_IV: 196 case PCI_PRODUCT_INTEL_82845G_IGD: 197 isc->chiptype = CHIP_I830; 198 break; 199 case PCI_PRODUCT_INTEL_82855GM_IGD: 200 case PCI_PRODUCT_INTEL_82865_IGD: 201 isc->chiptype = CHIP_I855; 202 break; 203 case PCI_PRODUCT_INTEL_82915G_IGD: 204 case PCI_PRODUCT_INTEL_82915GM_IGD: 205 case PCI_PRODUCT_INTEL_82945P_IGD: 206 case PCI_PRODUCT_INTEL_82945GM_IGD: 207 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 208 isc->chiptype = CHIP_I915; 209 break; 210 } 211 212 apbase = isc->chiptype == CHIP_I915 ? AGP_I915_GMADR : AGP_I810_GMADR; 213 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 214 if (error != 0) { 215 aprint_error(": can't map aperture\n"); 216 free(isc, M_AGP); 217 return error; 218 } 219 220 if (isc->chiptype == CHIP_I915) { 221 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 222 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 223 NULL, &mmadrsize); 224 if (error != 0) { 225 aprint_error(": can't map mmadr registers\n"); 226 agp_generic_detach(sc); 227 return error; 228 } 229 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 230 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 231 NULL, NULL); 232 if (error != 0) { 233 aprint_error(": can't map gttadr registers\n"); 234 /* XXX we should release mmadr here */ 235 agp_generic_detach(sc); 236 return error; 237 } 238 } else { 239 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 240 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 241 NULL, &mmadrsize); 242 if (error != 0) { 243 aprint_error(": can't map mmadr registers\n"); 244 agp_generic_detach(sc); 245 return error; 246 } 247 } 248 249 isc->initial_aperture = AGP_GET_APERTURE(sc); 250 251 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 252 if (!gatt) { 253 agp_generic_detach(sc); 254 return ENOMEM; 255 } 256 isc->gatt = gatt; 257 258 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 259 260 if (isc->chiptype == CHIP_I810) { 261 void *virtual; 262 int dummyseg; 263 264 /* Some i810s have on-chip memory called dcache */ 265 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 266 isc->dcache_size = 4 * 1024 * 1024; 267 else 268 isc->dcache_size = 0; 269 270 /* According to the specs the gatt on the i810 must be 64k */ 271 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 272 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 273 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 274 free(gatt, M_AGP); 275 agp_generic_detach(sc); 276 return ENOMEM; 277 } 278 gatt->ag_virtual = (uint32_t *)virtual; 279 280 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 281 memset(gatt->ag_virtual, 0, gatt->ag_size); 282 283 agp_flush_cache(); 284 /* Install the GATT. */ 285 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 286 } else if (isc->chiptype == CHIP_I830) { 287 /* The i830 automatically initializes the 128k gatt on boot. */ 288 pcireg_t reg; 289 u_int32_t pgtblctl; 290 u_int16_t gcc1; 291 292 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 293 gcc1 = (u_int16_t)(reg >> 16); 294 switch (gcc1 & AGP_I830_GCC1_GMS) { 295 case AGP_I830_GCC1_GMS_STOLEN_512: 296 isc->stolen = (512 - 132) * 1024 / 4096; 297 break; 298 case AGP_I830_GCC1_GMS_STOLEN_1024: 299 isc->stolen = (1024 - 132) * 1024 / 4096; 300 break; 301 case AGP_I830_GCC1_GMS_STOLEN_8192: 302 isc->stolen = (8192 - 132) * 1024 / 4096; 303 break; 304 default: 305 isc->stolen = 0; 306 aprint_error( 307 ": unknown memory configuration, disabling\n"); 308 agp_generic_detach(sc); 309 return EINVAL; 310 } 311 if (isc->stolen > 0) { 312 aprint_error(": detected %dk stolen memory\n%s", 313 isc->stolen * 4, sc->as_dev.dv_xname); 314 } 315 316 /* GATT address is already in there, make sure it's enabled */ 317 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 318 pgtblctl |= 1; 319 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 320 321 gatt->ag_physical = pgtblctl & ~1; 322 } else if (isc->chiptype == CHIP_I855) { 323 /* The 855GM automatically initializes the 128k gatt on boot. */ 324 pcireg_t reg; 325 u_int32_t pgtblctl; 326 u_int16_t gcc1; 327 328 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 329 gcc1 = (u_int16_t)(reg >> 16); 330 switch (gcc1 & AGP_I855_GCC1_GMS) { 331 case AGP_I855_GCC1_GMS_STOLEN_1M: 332 isc->stolen = (1024 - 132) * 1024 / 4096; 333 break; 334 case AGP_I855_GCC1_GMS_STOLEN_4M: 335 isc->stolen = (4096 - 132) * 1024 / 4096; 336 break; 337 case AGP_I855_GCC1_GMS_STOLEN_8M: 338 isc->stolen = (8192 - 132) * 1024 / 4096; 339 break; 340 case AGP_I855_GCC1_GMS_STOLEN_16M: 341 isc->stolen = (16384 - 132) * 1024 / 4096; 342 break; 343 case AGP_I855_GCC1_GMS_STOLEN_32M: 344 isc->stolen = (32768 - 132) * 1024 / 4096; 345 break; 346 default: 347 isc->stolen = 0; 348 aprint_error( 349 ": unknown memory configuration, disabling\n"); 350 agp_generic_detach(sc); 351 return EINVAL; 352 } 353 if (isc->stolen > 0) { 354 aprint_error(": detected %dk stolen memory\n%s", 355 isc->stolen * 4, sc->as_dev.dv_xname); 356 } 357 358 /* GATT address is already in there, make sure it's enabled */ 359 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 360 pgtblctl |= 1; 361 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 362 363 gatt->ag_physical = pgtblctl & ~1; 364 } else { /* CHIP_I915 */ 365 /* The 915G automatically initializes the 256k gatt on boot. */ 366 pcireg_t reg; 367 u_int32_t pgtblctl; 368 u_int16_t gcc1; 369 370 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_GCC1); 371 gcc1 = (u_int16_t)(reg >> 16); 372 switch (gcc1 & AGP_I915_GCC1_GMS) { 373 case AGP_I915_GCC1_GMS_STOLEN_0M: 374 isc->stolen = 0; 375 break; 376 case AGP_I915_GCC1_GMS_STOLEN_1M: 377 isc->stolen = (1024 - 260) * 1024 / 4096; 378 break; 379 case AGP_I915_GCC1_GMS_STOLEN_8M: 380 isc->stolen = (8192 - 260) * 1024 / 4096; 381 break; 382 case AGP_I915_GCC1_GMS_STOLEN_16M: 383 isc->stolen = (16384 - 260) * 1024 / 4096; 384 break; 385 case AGP_I915_GCC1_GMS_STOLEN_32M: 386 isc->stolen = (32768 - 260) * 1024 / 4096; 387 break; 388 case AGP_I915_GCC1_GMS_STOLEN_48M: 389 isc->stolen = (49152 - 260) * 1024 / 4096; 390 break; 391 case AGP_I915_GCC1_GMS_STOLEN_64M: 392 isc->stolen = (65536 - 260) * 1024 / 4096; 393 break; 394 default: 395 isc->stolen = 0; 396 aprint_error( 397 ": unknown memory configuration, disabling\n"); 398 agp_generic_detach(sc); 399 return EINVAL; 400 } 401 if (isc->stolen > 0) { 402 aprint_error(": detected %dk stolen memory\n%s", 403 isc->stolen * 4, sc->as_dev.dv_xname); 404 } 405 406 /* GATT address is already in there, make sure it's enabled */ 407 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 408 pgtblctl |= 1; 409 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 410 411 gatt->ag_physical = pgtblctl & ~1; 412 } 413 414 /* 415 * Make sure the chipset can see everything. 416 */ 417 agp_flush_cache(); 418 419 status = pnp_register(self, agp_i810_power); 420 if (status != PNP_STATUS_SUCCESS) 421 printf("%s: couldn't establish power handler\n", 422 device_xname(self)); 423 424 #if 0 425 /* 426 * another device (drm) may need access to this region 427 * we do not need it anymore 428 */ 429 bus_space_unmap(isc->bst, isc->bsh, mmadrsize); 430 #endif 431 432 return 0; 433 } 434 435 #if 0 436 static int 437 agp_i810_detach(struct agp_softc *sc) 438 { 439 int error; 440 struct agp_i810_softc *isc = sc->as_chipc; 441 442 error = agp_generic_detach(sc); 443 if (error) 444 return error; 445 446 /* Clear the GATT base. */ 447 if (sc->chiptype == CHIP_I810) { 448 WRITE4(AGP_I810_PGTBL_CTL, 0); 449 } else { 450 unsigned int pgtblctl; 451 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 452 pgtblctl &= ~1; 453 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 454 } 455 456 /* Put the aperture back the way it started. */ 457 AGP_SET_APERTURE(sc, isc->initial_aperture); 458 459 if (sc->chiptype == CHIP_I810) { 460 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 461 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 462 } 463 free(sc->gatt, M_AGP); 464 465 return 0; 466 } 467 #endif 468 469 static u_int32_t 470 agp_i810_get_aperture(struct agp_softc *sc) 471 { 472 struct agp_i810_softc *isc = sc->as_chipc; 473 pcireg_t reg; 474 475 if (isc->chiptype == CHIP_I810) { 476 u_int16_t miscc; 477 478 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 479 miscc = (u_int16_t)(reg >> 16); 480 if ((miscc & AGP_I810_MISCC_WINSIZE) == 481 AGP_I810_MISCC_WINSIZE_32) 482 return 32 * 1024 * 1024; 483 else 484 return 64 * 1024 * 1024; 485 } else if (isc->chiptype == CHIP_I830) { 486 u_int16_t gcc1; 487 488 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 489 gcc1 = (u_int16_t)(reg >> 16); 490 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 491 return 64 * 1024 * 1024; 492 else 493 return 128 * 1024 * 1024; 494 } else if (isc->chiptype == CHIP_I855) { 495 return 128 * 1024 * 1024; 496 } else { /* CHIP_I915 */ 497 u_int16_t msac; 498 499 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 500 msac = (u_int16_t)(reg >> 16); 501 if (msac & AGP_I915_MSAC_APER_128M) 502 return 128 * 1024 * 1024; 503 else 504 return 256 * 1024 * 1024; 505 } 506 } 507 508 static int 509 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 510 { 511 struct agp_i810_softc *isc = sc->as_chipc; 512 pcireg_t reg; 513 514 if (isc->chiptype == CHIP_I810) { 515 u_int16_t miscc; 516 517 /* 518 * Double check for sanity. 519 */ 520 if (aperture != (32 * 1024 * 1024) && 521 aperture != (64 * 1024 * 1024)) { 522 printf("%s: bad aperture size %d\n", 523 sc->as_dev.dv_xname, aperture); 524 return EINVAL; 525 } 526 527 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 528 miscc = (u_int16_t)(reg >> 16); 529 miscc &= ~AGP_I810_MISCC_WINSIZE; 530 if (aperture == 32 * 1024 * 1024) 531 miscc |= AGP_I810_MISCC_WINSIZE_32; 532 else 533 miscc |= AGP_I810_MISCC_WINSIZE_64; 534 535 reg &= 0x0000ffff; 536 reg |= ((pcireg_t)miscc) << 16; 537 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 538 } else if (isc->chiptype == CHIP_I830) { 539 u_int16_t gcc1; 540 541 if (aperture != (64 * 1024 * 1024) && 542 aperture != (128 * 1024 * 1024)) { 543 printf("%s: bad aperture size %d\n", 544 sc->as_dev.dv_xname, aperture); 545 return EINVAL; 546 } 547 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 548 gcc1 = (u_int16_t)(reg >> 16); 549 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 550 if (aperture == 64 * 1024 * 1024) 551 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 552 else 553 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 554 555 reg &= 0x0000ffff; 556 reg |= ((pcireg_t)gcc1) << 16; 557 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 558 } else { /* CHIP_I855 or CHIP_I915 */ 559 if (aperture != agp_i810_get_aperture(sc)) { 560 printf("%s: bad aperture size %d\n", 561 sc->as_dev.dv_xname, aperture); 562 return EINVAL; 563 } 564 } 565 566 return 0; 567 } 568 569 static int 570 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 571 { 572 struct agp_i810_softc *isc = sc->as_chipc; 573 574 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 575 #ifdef AGP_DEBUG 576 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 577 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 578 isc->gatt->ag_entries); 579 #endif 580 return EINVAL; 581 } 582 583 if (isc->chiptype != CHIP_I830) { 584 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 585 #ifdef AGP_DEBUG 586 printf("%s: trying to bind into stolen memory", 587 sc->as_dev.dv_xname); 588 #endif 589 return EINVAL; 590 } 591 } 592 593 WRITEGTT(offset, physical | 1); 594 return 0; 595 } 596 597 static int 598 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 599 { 600 struct agp_i810_softc *isc = sc->as_chipc; 601 602 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 603 return EINVAL; 604 605 if (isc->chiptype != CHIP_I810 ) { 606 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 607 #ifdef AGP_DEBUG 608 printf("%s: trying to unbind from stolen memory", 609 sc->as_dev.dv_xname); 610 #endif 611 return EINVAL; 612 } 613 } 614 615 WRITEGTT(offset, 0); 616 return 0; 617 } 618 619 /* 620 * Writing via memory mapped registers already flushes all TLBs. 621 */ 622 static void 623 agp_i810_flush_tlb(struct agp_softc *sc) 624 { 625 } 626 627 static int 628 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 629 { 630 631 return 0; 632 } 633 634 static struct agp_memory * 635 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 636 { 637 struct agp_i810_softc *isc = sc->as_chipc; 638 struct agp_memory *mem; 639 640 #ifdef AGP_DEBUG 641 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 642 #endif 643 644 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 645 return 0; 646 647 if (sc->as_allocated + size > sc->as_maxmem) 648 return 0; 649 650 if (type == 1) { 651 /* 652 * Mapping local DRAM into GATT. 653 */ 654 if (isc->chiptype != CHIP_I810 ) 655 return 0; 656 if (size != isc->dcache_size) 657 return 0; 658 } else if (type == 2) { 659 /* 660 * Bogus mapping for the hardware cursor. 661 */ 662 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 663 return 0; 664 } 665 666 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 667 if (mem == NULL) 668 return NULL; 669 mem->am_id = sc->as_nextid++; 670 mem->am_size = size; 671 mem->am_type = type; 672 673 if (type == 2) { 674 /* 675 * Allocate and wire down the memory now so that we can 676 * get its physical address. 677 */ 678 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 679 M_WAITOK); 680 if (mem->am_dmaseg == NULL) { 681 free(mem, M_AGP); 682 return NULL; 683 } 684 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 685 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 686 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 687 free(mem->am_dmaseg, M_AGP); 688 free(mem, M_AGP); 689 return NULL; 690 } 691 memset(mem->am_virtual, 0, size); 692 } else if (type != 1) { 693 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 694 size, 0, BUS_DMA_NOWAIT, 695 &mem->am_dmamap) != 0) { 696 free(mem, M_AGP); 697 return NULL; 698 } 699 } 700 701 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 702 sc->as_allocated += size; 703 704 return mem; 705 } 706 707 static int 708 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 709 { 710 if (mem->am_is_bound) 711 return EBUSY; 712 713 if (mem->am_type == 2) { 714 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 715 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 716 free(mem->am_dmaseg, M_AGP); 717 } 718 719 sc->as_allocated -= mem->am_size; 720 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 721 free(mem, M_AGP); 722 return 0; 723 } 724 725 static int 726 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 727 off_t offset) 728 { 729 struct agp_i810_softc *isc = sc->as_chipc; 730 u_int32_t regval, i; 731 732 /* 733 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 734 * X server for mysterious reasons which leads to crashes if we write 735 * to the GTT through the MMIO window. 736 * Until the issue is solved, simply restore it. 737 */ 738 739 #if 0 740 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 741 if (regval != (isc->gatt->ag_physical | 1)) { 742 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 743 regval); 744 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 745 isc->gatt->ag_physical | 1); 746 } 747 #endif 748 regval = 0; 749 750 if (mem->am_type == 2) { 751 WRITEGTT(offset, mem->am_physical | 1); 752 mem->am_offset = offset; 753 mem->am_is_bound = 1; 754 return 0; 755 } 756 757 if (mem->am_type != 1) 758 return agp_generic_bind_memory(sc, mem, offset); 759 760 if (isc->chiptype != CHIP_I810) 761 return EINVAL; 762 763 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 764 WRITEGTT(offset, i | 3); 765 mem->am_is_bound = 1; 766 return 0; 767 } 768 769 static int 770 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 771 { 772 struct agp_i810_softc *isc = sc->as_chipc; 773 u_int32_t i; 774 775 if (mem->am_type == 2) { 776 WRITEGTT(mem->am_offset, 0); 777 mem->am_offset = 0; 778 mem->am_is_bound = 0; 779 return 0; 780 } 781 782 if (mem->am_type != 1) 783 return agp_generic_unbind_memory(sc, mem); 784 785 if (isc->chiptype != CHIP_I810) 786 return EINVAL; 787 788 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 789 WRITEGTT(i, 0); 790 mem->am_is_bound = 0; 791 return 0; 792 } 793 794 static pnp_status_t 795 agp_i810_power(device_t dv, pnp_request_t req, void *opaque) 796 { 797 struct agp_softc *sc = (struct agp_softc *)dv; 798 struct agp_i810_softc *isc = sc->as_chipc; 799 pnp_capabilities_t *pcaps; 800 pnp_state_t *pstate; 801 pcireg_t val; 802 int off; 803 804 switch (req) { 805 case PNP_REQUEST_GET_CAPABILITIES: 806 pcaps = opaque; 807 808 pci_get_capability(sc->as_pc, sc->as_tag, PCI_CAP_PWRMGMT, 809 &off, &val); 810 pcaps->state = pci_pnp_capabilities(val); 811 pcaps->state |= PNP_STATE_D0 | PNP_STATE_D3; 812 break; 813 814 case PNP_REQUEST_GET_STATE: 815 pstate = opaque; 816 if (pci_get_powerstate(sc->as_pc, sc->as_tag, &val) != 0) 817 *pstate = PNP_STATE_D0; 818 else 819 *pstate = pci_pnp_powerstate(val); 820 break; 821 822 case PNP_REQUEST_SET_STATE: 823 pstate = opaque; 824 switch (*pstate) { 825 case PNP_STATE_D0: 826 val = PCI_PMCSR_STATE_D0; 827 break; 828 case PNP_STATE_D3: 829 val = PCI_PMCSR_STATE_D3; 830 pci_conf_capture(sc->as_pc, sc->as_tag, 831 &isc->sc_pciconf); 832 break; 833 default: 834 return PNP_STATUS_UNSUPPORTED; 835 } 836 837 (void)pci_set_powerstate(sc->as_pc, sc->as_tag, val); 838 if (*pstate != PNP_STATE_D0) 839 break; 840 841 pci_conf_restore(sc->as_pc, sc->as_tag, 842 &isc->sc_pciconf); 843 agp_flush_cache(); 844 break; 845 846 default: 847 return PNP_STATUS_UNSUPPORTED; 848 } 849 850 return PNP_STATUS_SUCCESS; 851 } 852
Indexes created Tue Oct 07 21:09:53 GMT 2025