agp_i810.c revision 1.41.6.10
1 /* $NetBSD: agp_i810.c,v 1.41.6.10 2007/11/06 14:27:20 joerg Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.41.6.10 2007/11/06 14:27:20 joerg Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <sys/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 #define WRITEGTT(off, v) \ 62 do { \ 63 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { \ 64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 66 (v)); \ 67 } else if (isc->chiptype == CHIP_I965) { \ 68 WRITE4(AGP_I965_GTT + \ 69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 70 (v)); \ 71 } else { \ 72 WRITE4(AGP_I810_GTT + \ 73 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 74 (v)); \ 75 } \ 76 } while (0) 77 78 #define CHIP_I810 0 /* i810/i815 */ 79 #define CHIP_I830 1 /* 830M/845G */ 80 #define CHIP_I855 2 /* 852GM/855GM/865G */ 81 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */ 82 #define CHIP_I965 4 /* 965Q/965PM */ 83 #define CHIP_G33 5 /* G33/Q33/Q35 */ 84 85 struct agp_i810_softc { 86 u_int32_t initial_aperture; /* aperture size at startup */ 87 struct agp_gatt *gatt; 88 int chiptype; /* i810-like or i830 */ 89 u_int32_t dcache_size; /* i810 only */ 90 u_int32_t stolen; /* number of i830/845 gtt entries 91 for stolen memory */ 92 bus_space_tag_t bst; /* register bus_space tag */ 93 bus_space_handle_t bsh; /* register bus_space handle */ 94 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 95 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 96 struct pci_attach_args vga_pa; 97 98 u_int32_t pgtblctl; 99 }; 100 101 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 102 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 103 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 104 static int agp_i810_unbind_page(struct agp_softc *, off_t); 105 static void agp_i810_flush_tlb(struct agp_softc *); 106 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 107 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 108 vsize_t); 109 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 110 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 111 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 112 113 static bool agp_i810_resume(device_t); 114 static int agp_i810_init(struct agp_softc *); 115 116 static struct agp_methods agp_i810_methods = { 117 agp_i810_get_aperture, 118 agp_i810_set_aperture, 119 agp_i810_bind_page, 120 agp_i810_unbind_page, 121 agp_i810_flush_tlb, 122 agp_i810_enable, 123 agp_i810_alloc_memory, 124 agp_i810_free_memory, 125 agp_i810_bind_memory, 126 agp_i810_unbind_memory, 127 }; 128 129 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 130 static int 131 agp_i810_vgamatch(struct pci_attach_args *pa) 132 { 133 134 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 135 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 136 return (0); 137 138 switch (PCI_PRODUCT(pa->pa_id)) { 139 case PCI_PRODUCT_INTEL_82810_GC: 140 case PCI_PRODUCT_INTEL_82810_DC100_GC: 141 case PCI_PRODUCT_INTEL_82810E_GC: 142 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 143 case PCI_PRODUCT_INTEL_82830MP_IV: 144 case PCI_PRODUCT_INTEL_82845G_IGD: 145 case PCI_PRODUCT_INTEL_82855GM_IGD: 146 case PCI_PRODUCT_INTEL_82865_IGD: 147 case PCI_PRODUCT_INTEL_82915G_IGD: 148 case PCI_PRODUCT_INTEL_82915GM_IGD: 149 case PCI_PRODUCT_INTEL_82945P_IGD: 150 case PCI_PRODUCT_INTEL_82945GM_IGD: 151 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 152 case PCI_PRODUCT_INTEL_82965Q_IGD: 153 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 154 case PCI_PRODUCT_INTEL_82965PM_IGD: 155 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 156 case PCI_PRODUCT_INTEL_82G33_IGD: 157 case PCI_PRODUCT_INTEL_82G33_IGD_1: 158 case PCI_PRODUCT_INTEL_82965G_IGD: 159 case PCI_PRODUCT_INTEL_82965G_IGD_1: 160 return (1); 161 } 162 163 return (0); 164 } 165 166 static int 167 agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 168 { 169 /* 170 * Find the aperture. Don't map it (yet), this would 171 * eat KVA. 172 */ 173 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 174 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, &sc->as_apsize, 175 &sc->as_apflags) != 0) 176 return ENXIO; 177 178 sc->as_apt = pa->pa_memt; 179 180 return 0; 181 } 182 183 int 184 agp_i810_attach(struct device *parent, struct device *self, void *aux) 185 { 186 struct agp_softc *sc = (void *)self; 187 struct agp_i810_softc *isc; 188 struct agp_gatt *gatt; 189 int error, apbase; 190 bus_size_t mmadrsize; 191 192 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 193 if (isc == NULL) { 194 aprint_error(": can't allocate chipset-specific softc\n"); 195 return ENOMEM; 196 } 197 sc->as_chipc = isc; 198 sc->as_methods = &agp_i810_methods; 199 200 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 201 #if NAGP_INTEL > 0 202 const struct pci_attach_args *pa = aux; 203 204 switch (PCI_PRODUCT(pa->pa_id)) { 205 case PCI_PRODUCT_INTEL_82840_HB: 206 case PCI_PRODUCT_INTEL_82865_HB: 207 case PCI_PRODUCT_INTEL_82845G_DRAM: 208 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 209 return agp_intel_attach(parent, self, aux); 210 } 211 #endif 212 aprint_error(": can't find internal VGA device config space\n"); 213 free(isc, M_AGP); 214 return ENOENT; 215 } 216 217 /* XXXfvdl */ 218 sc->as_dmat = isc->vga_pa.pa_dmat; 219 220 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 221 case PCI_PRODUCT_INTEL_82810_GC: 222 case PCI_PRODUCT_INTEL_82810_DC100_GC: 223 case PCI_PRODUCT_INTEL_82810E_GC: 224 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 225 isc->chiptype = CHIP_I810; 226 break; 227 case PCI_PRODUCT_INTEL_82830MP_IV: 228 case PCI_PRODUCT_INTEL_82845G_IGD: 229 isc->chiptype = CHIP_I830; 230 break; 231 case PCI_PRODUCT_INTEL_82855GM_IGD: 232 case PCI_PRODUCT_INTEL_82865_IGD: 233 isc->chiptype = CHIP_I855; 234 break; 235 case PCI_PRODUCT_INTEL_82915G_IGD: 236 case PCI_PRODUCT_INTEL_82915GM_IGD: 237 case PCI_PRODUCT_INTEL_82945P_IGD: 238 case PCI_PRODUCT_INTEL_82945GM_IGD: 239 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 240 isc->chiptype = CHIP_I915; 241 break; 242 case PCI_PRODUCT_INTEL_82965Q_IGD: 243 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 244 case PCI_PRODUCT_INTEL_82965PM_IGD: 245 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 246 case PCI_PRODUCT_INTEL_82965G_IGD: 247 case PCI_PRODUCT_INTEL_82965G_IGD_1: 248 isc->chiptype = CHIP_I965; 249 break; 250 case PCI_PRODUCT_INTEL_82G33_IGD: 251 case PCI_PRODUCT_INTEL_82G33_IGD_1: 252 isc->chiptype = CHIP_G33; 253 break; 254 } 255 256 switch (isc->chiptype) { 257 case CHIP_I915: 258 case CHIP_G33: 259 apbase = AGP_I915_GMADR; 260 break; 261 default: 262 apbase = AGP_I810_GMADR; 263 break; 264 } 265 if (isc->chiptype == CHIP_I965) { 266 error = agp_i965_map_aperture(&isc->vga_pa, sc, AGP_I965_GMADR); 267 } else { 268 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 269 } 270 if (error != 0) { 271 aprint_error(": can't map aperture\n"); 272 free(isc, M_AGP); 273 return error; 274 } 275 276 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { 277 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 278 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 279 NULL, &mmadrsize); 280 if (error != 0) { 281 aprint_error(": can't map mmadr registers\n"); 282 agp_generic_detach(sc); 283 return error; 284 } 285 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 286 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 287 NULL, NULL); 288 if (error != 0) { 289 aprint_error(": can't map gttadr registers\n"); 290 /* XXX we should release mmadr here */ 291 agp_generic_detach(sc); 292 return error; 293 } 294 } else if (isc->chiptype == CHIP_I965) { 295 error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR, 296 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 297 NULL, &mmadrsize); 298 if (error != 0) { 299 aprint_error(": can't map mmadr registers\n"); 300 agp_generic_detach(sc); 301 return error; 302 } 303 } else { 304 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 305 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 306 NULL, &mmadrsize); 307 if (error != 0) { 308 aprint_error(": can't map mmadr registers\n"); 309 agp_generic_detach(sc); 310 return error; 311 } 312 } 313 314 isc->initial_aperture = AGP_GET_APERTURE(sc); 315 316 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 317 if (!gatt) { 318 agp_generic_detach(sc); 319 return ENOMEM; 320 } 321 isc->gatt = gatt; 322 323 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 324 325 if (!pnp_device_register(self, NULL, agp_i810_resume)) 326 aprint_error_dev(self, "couldn't establish power handler\n"); 327 328 return agp_i810_init(sc); 329 } 330 331 static int agp_i810_init(struct agp_softc *sc) 332 { 333 struct agp_i810_softc *isc; 334 struct agp_gatt *gatt; 335 336 isc = sc->as_chipc; 337 gatt = isc->gatt; 338 339 if (isc->chiptype == CHIP_I810) { 340 void *virtual; 341 int dummyseg; 342 343 /* Some i810s have on-chip memory called dcache */ 344 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 345 isc->dcache_size = 4 * 1024 * 1024; 346 else 347 isc->dcache_size = 0; 348 349 /* According to the specs the gatt on the i810 must be 64k */ 350 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 351 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 352 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 353 free(gatt, M_AGP); 354 agp_generic_detach(sc); 355 return ENOMEM; 356 } 357 gatt->ag_virtual = (uint32_t *)virtual; 358 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 359 memset(gatt->ag_virtual, 0, gatt->ag_size); 360 361 agp_flush_cache(); 362 /* Install the GATT. */ 363 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 364 } else if (isc->chiptype == CHIP_I830) { 365 /* The i830 automatically initializes the 128k gatt on boot. */ 366 pcireg_t reg; 367 u_int32_t pgtblctl; 368 u_int16_t gcc1; 369 370 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 371 gcc1 = (u_int16_t)(reg >> 16); 372 switch (gcc1 & AGP_I830_GCC1_GMS) { 373 case AGP_I830_GCC1_GMS_STOLEN_512: 374 isc->stolen = (512 - 132) * 1024 / 4096; 375 break; 376 case AGP_I830_GCC1_GMS_STOLEN_1024: 377 isc->stolen = (1024 - 132) * 1024 / 4096; 378 break; 379 case AGP_I830_GCC1_GMS_STOLEN_8192: 380 isc->stolen = (8192 - 132) * 1024 / 4096; 381 break; 382 default: 383 isc->stolen = 0; 384 aprint_error( 385 ": unknown memory configuration, disabling\n"); 386 agp_generic_detach(sc); 387 return EINVAL; 388 } 389 390 if (isc->stolen > 0) { 391 aprint_error(": detected %dk stolen memory\n%s", 392 isc->stolen * 4, sc->as_dev.dv_xname); 393 } 394 395 /* GATT address is already in there, make sure it's enabled */ 396 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 397 pgtblctl |= 1; 398 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 399 400 gatt->ag_physical = pgtblctl & ~1; 401 } else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 || 402 isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G33) { 403 pcireg_t reg; 404 u_int32_t pgtblctl, stolen; 405 u_int16_t gcc1; 406 407 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 408 gcc1 = (u_int16_t)(reg >> 16); 409 410 /* Stolen memory is set up at the beginning of the aperture by 411 * the BIOS, consisting of the GATT followed by 4kb for the 412 * BIOS display. 413 */ 414 switch (isc->chiptype) { 415 case CHIP_I855: 416 stolen = 128 + 4; 417 break; 418 case CHIP_I915: 419 stolen = 256 + 4; 420 break; 421 case CHIP_I965: 422 stolen = 512 + 4; 423 break; 424 case CHIP_G33: 425 switch (gcc1 & AGP_G33_PGTBL_SIZE_MASK) { 426 case AGP_G33_PGTBL_SIZE_1M: 427 stolen = 1024 + 4; 428 break; 429 case AGP_G33_PGTBL_SIZE_2M: 430 stolen = 2048 + 4; 431 break; 432 default: 433 aprint_error(": bad gtt size\n"); 434 agp_generic_detach(sc); 435 return EINVAL; 436 } 437 break; 438 default: 439 aprint_error(": bad chiptype\n"); 440 agp_generic_detach(sc); 441 return EINVAL; 442 } 443 444 switch (gcc1 & AGP_I855_GCC1_GMS) { 445 case AGP_I855_GCC1_GMS_STOLEN_1M: 446 isc->stolen = (1024 - stolen) * 1024 / 4096; 447 break; 448 case AGP_I855_GCC1_GMS_STOLEN_4M: 449 isc->stolen = (4096 - stolen) * 1024 / 4096; 450 break; 451 case AGP_I855_GCC1_GMS_STOLEN_8M: 452 isc->stolen = (8192 - stolen) * 1024 / 4096; 453 break; 454 case AGP_I855_GCC1_GMS_STOLEN_16M: 455 isc->stolen = (16384 - stolen) * 1024 / 4096; 456 break; 457 case AGP_I855_GCC1_GMS_STOLEN_32M: 458 isc->stolen = (32768 - stolen) * 1024 / 4096; 459 break; 460 case AGP_I915_GCC1_GMS_STOLEN_48M: 461 isc->stolen = (49152 - stolen) * 1024 / 4096; 462 break; 463 case AGP_I915_GCC1_GMS_STOLEN_64M: 464 isc->stolen = (65536 - stolen) * 1024 / 4096; 465 break; 466 default: 467 isc->stolen = 0; 468 aprint_error( 469 ": unknown memory configuration, disabling\n"); 470 agp_generic_detach(sc); 471 return EINVAL; 472 } 473 if (isc->stolen > 0) { 474 aprint_error(": detected %dk stolen memory\n%s", 475 isc->stolen * 4, sc->as_dev.dv_xname); 476 } 477 478 /* GATT address is already in there, make sure it's enabled */ 479 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 480 pgtblctl |= 1; 481 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 482 483 gatt->ag_physical = pgtblctl & ~1; 484 } 485 486 /* 487 * Make sure the chipset can see everything. 488 */ 489 agp_flush_cache(); 490 491 #if 0 492 /* 493 * another device (drm) may need access to this region 494 * we do not need it anymore 495 */ 496 bus_space_unmap(isc->bst, isc->bsh, mmadrsize); 497 #endif 498 499 return 0; 500 } 501 502 #if 0 503 static int 504 agp_i810_detach(struct agp_softc *sc) 505 { 506 int error; 507 struct agp_i810_softc *isc = sc->as_chipc; 508 509 error = agp_generic_detach(sc); 510 if (error) 511 return error; 512 513 /* Clear the GATT base. */ 514 if (sc->chiptype == CHIP_I810) { 515 WRITE4(AGP_I810_PGTBL_CTL, 0); 516 } else { 517 unsigned int pgtblctl; 518 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 519 pgtblctl &= ~1; 520 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 521 } 522 523 /* Put the aperture back the way it started. */ 524 AGP_SET_APERTURE(sc, isc->initial_aperture); 525 526 if (sc->chiptype == CHIP_I810) { 527 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 528 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 529 } 530 free(sc->gatt, M_AGP); 531 532 return 0; 533 } 534 #endif 535 536 static u_int32_t 537 agp_i810_get_aperture(struct agp_softc *sc) 538 { 539 struct agp_i810_softc *isc = sc->as_chipc; 540 pcireg_t reg; 541 u_int16_t miscc, gcc1, msac; 542 543 switch (isc->chiptype) { 544 case CHIP_I810: 545 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 546 miscc = (u_int16_t)(reg >> 16); 547 if ((miscc & AGP_I810_MISCC_WINSIZE) == 548 AGP_I810_MISCC_WINSIZE_32) 549 return 32 * 1024 * 1024; 550 else 551 return 64 * 1024 * 1024; 552 case CHIP_I830: 553 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 554 gcc1 = (u_int16_t)(reg >> 16); 555 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 556 return 64 * 1024 * 1024; 557 else 558 return 128 * 1024 * 1024; 559 case CHIP_I855: 560 return 128 * 1024 * 1024; 561 case CHIP_I915: 562 case CHIP_G33: 563 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 564 msac = (u_int16_t)(reg >> 16); 565 if (msac & AGP_I915_MSAC_APER_128M) 566 return 128 * 1024 * 1024; 567 else 568 return 256 * 1024 * 1024; 569 case CHIP_I965: 570 return 512 * 1024 * 1024; 571 default: 572 aprint_error(": Unknown chipset\n"); 573 } 574 575 return 0; 576 } 577 578 static int 579 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 580 { 581 struct agp_i810_softc *isc = sc->as_chipc; 582 pcireg_t reg; 583 u_int16_t miscc, gcc1; 584 585 switch (isc->chiptype) { 586 case CHIP_I810: 587 /* 588 * Double check for sanity. 589 */ 590 if (aperture != (32 * 1024 * 1024) && 591 aperture != (64 * 1024 * 1024)) { 592 printf("%s: bad aperture size %d\n", 593 sc->as_dev.dv_xname, aperture); 594 return EINVAL; 595 } 596 597 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 598 miscc = (u_int16_t)(reg >> 16); 599 miscc &= ~AGP_I810_MISCC_WINSIZE; 600 if (aperture == 32 * 1024 * 1024) 601 miscc |= AGP_I810_MISCC_WINSIZE_32; 602 else 603 miscc |= AGP_I810_MISCC_WINSIZE_64; 604 605 reg &= 0x0000ffff; 606 reg |= ((pcireg_t)miscc) << 16; 607 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 608 break; 609 case CHIP_I830: 610 if (aperture != (64 * 1024 * 1024) && 611 aperture != (128 * 1024 * 1024)) { 612 printf("%s: bad aperture size %d\n", 613 sc->as_dev.dv_xname, aperture); 614 return EINVAL; 615 } 616 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 617 gcc1 = (u_int16_t)(reg >> 16); 618 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 619 if (aperture == 64 * 1024 * 1024) 620 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 621 else 622 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 623 624 reg &= 0x0000ffff; 625 reg |= ((pcireg_t)gcc1) << 16; 626 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 627 break; 628 case CHIP_I855: 629 case CHIP_I915: 630 if (aperture != agp_i810_get_aperture(sc)) { 631 printf("%s: bad aperture size %d\n", 632 sc->as_dev.dv_xname, aperture); 633 return EINVAL; 634 } 635 break; 636 case CHIP_I965: 637 if (aperture != 512 * 1024 * 1024) { 638 printf("%s: bad aperture size %d\n", 639 sc->as_dev.dv_xname, aperture); 640 return EINVAL; 641 } 642 break; 643 } 644 645 return 0; 646 } 647 648 static int 649 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 650 { 651 struct agp_i810_softc *isc = sc->as_chipc; 652 653 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 654 #ifdef AGP_DEBUG 655 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 656 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 657 isc->gatt->ag_entries); 658 #endif 659 return EINVAL; 660 } 661 662 if (isc->chiptype != CHIP_I830) { 663 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 664 #ifdef AGP_DEBUG 665 printf("%s: trying to bind into stolen memory", 666 sc->as_dev.dv_xname); 667 #endif 668 return EINVAL; 669 } 670 } 671 672 WRITEGTT(offset, physical | 1); 673 return 0; 674 } 675 676 static int 677 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 678 { 679 struct agp_i810_softc *isc = sc->as_chipc; 680 681 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 682 return EINVAL; 683 684 if (isc->chiptype != CHIP_I810 ) { 685 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 686 #ifdef AGP_DEBUG 687 printf("%s: trying to unbind from stolen memory", 688 sc->as_dev.dv_xname); 689 #endif 690 return EINVAL; 691 } 692 } 693 694 WRITEGTT(offset, 0); 695 return 0; 696 } 697 698 /* 699 * Writing via memory mapped registers already flushes all TLBs. 700 */ 701 static void 702 agp_i810_flush_tlb(struct agp_softc *sc) 703 { 704 } 705 706 static int 707 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 708 { 709 710 return 0; 711 } 712 713 static struct agp_memory * 714 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 715 { 716 struct agp_i810_softc *isc = sc->as_chipc; 717 struct agp_memory *mem; 718 719 #ifdef AGP_DEBUG 720 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 721 #endif 722 723 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 724 return 0; 725 726 if (sc->as_allocated + size > sc->as_maxmem) 727 return 0; 728 729 if (type == 1) { 730 /* 731 * Mapping local DRAM into GATT. 732 */ 733 if (isc->chiptype != CHIP_I810 ) 734 return 0; 735 if (size != isc->dcache_size) 736 return 0; 737 } else if (type == 2) { 738 /* 739 * Bogus mapping for the hardware cursor. 740 */ 741 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 742 return 0; 743 } 744 745 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 746 if (mem == NULL) 747 return NULL; 748 mem->am_id = sc->as_nextid++; 749 mem->am_size = size; 750 mem->am_type = type; 751 752 if (type == 2) { 753 /* 754 * Allocate and wire down the memory now so that we can 755 * get its physical address. 756 */ 757 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 758 M_WAITOK); 759 if (mem->am_dmaseg == NULL) { 760 free(mem, M_AGP); 761 return NULL; 762 } 763 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 764 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 765 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 766 free(mem->am_dmaseg, M_AGP); 767 free(mem, M_AGP); 768 return NULL; 769 } 770 memset(mem->am_virtual, 0, size); 771 } else if (type != 1) { 772 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 773 size, 0, BUS_DMA_NOWAIT, 774 &mem->am_dmamap) != 0) { 775 free(mem, M_AGP); 776 return NULL; 777 } 778 } 779 780 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 781 sc->as_allocated += size; 782 783 return mem; 784 } 785 786 static int 787 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 788 { 789 if (mem->am_is_bound) 790 return EBUSY; 791 792 if (mem->am_type == 2) { 793 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 794 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 795 free(mem->am_dmaseg, M_AGP); 796 } 797 798 sc->as_allocated -= mem->am_size; 799 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 800 free(mem, M_AGP); 801 return 0; 802 } 803 804 static int 805 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 806 off_t offset) 807 { 808 struct agp_i810_softc *isc = sc->as_chipc; 809 u_int32_t regval, i; 810 811 /* 812 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 813 * X server for mysterious reasons which leads to crashes if we write 814 * to the GTT through the MMIO window. 815 * Until the issue is solved, simply restore it. 816 */ 817 818 #if 0 819 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 820 if (regval != (isc->gatt->ag_physical | 1)) { 821 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 822 regval); 823 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 824 isc->gatt->ag_physical | 1); 825 } 826 #endif 827 regval = 0; 828 829 if (mem->am_type == 2) { 830 WRITEGTT(offset, mem->am_physical | 1); 831 mem->am_offset = offset; 832 mem->am_is_bound = 1; 833 return 0; 834 } 835 836 if (mem->am_type != 1) 837 return agp_generic_bind_memory(sc, mem, offset); 838 839 if (isc->chiptype != CHIP_I810) 840 return EINVAL; 841 842 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 843 WRITEGTT(offset, i | 3); 844 mem->am_is_bound = 1; 845 return 0; 846 } 847 848 static int 849 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 850 { 851 struct agp_i810_softc *isc = sc->as_chipc; 852 u_int32_t i; 853 854 if (mem->am_type == 2) { 855 WRITEGTT(mem->am_offset, 0); 856 mem->am_offset = 0; 857 mem->am_is_bound = 0; 858 return 0; 859 } 860 861 if (mem->am_type != 1) 862 return agp_generic_unbind_memory(sc, mem); 863 864 if (isc->chiptype != CHIP_I810) 865 return EINVAL; 866 867 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 868 WRITEGTT(i, 0); 869 mem->am_is_bound = 0; 870 return 0; 871 } 872 873 static bool 874 agp_i810_resume(device_t dv) 875 { 876 struct agp_softc *sc = device_private(dv); 877 struct agp_i810_softc *isc = sc->as_chipc; 878 879 isc->pgtblctl = READ4(AGP_I810_PGTBL_CTL); 880 agp_flush_cache(); 881 882 return true; 883 } 884
Indexes created Tue Oct 07 21:09:53 GMT 2025