agp_i810.c revision 1.41.6.11
1 /* $NetBSD: agp_i810.c,v 1.41.6.11 2007/11/14 19:04:28 joerg Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.41.6.11 2007/11/14 19:04:28 joerg Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <sys/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 #define WRITEGTT(off, v) \ 62 do { \ 63 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { \ 64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 66 (v)); \ 67 } else if (isc->chiptype == CHIP_I965) { \ 68 WRITE4(AGP_I965_GTT + \ 69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 70 (v)); \ 71 } else { \ 72 WRITE4(AGP_I810_GTT + \ 73 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 74 (v)); \ 75 } \ 76 } while (0) 77 78 #define CHIP_I810 0 /* i810/i815 */ 79 #define CHIP_I830 1 /* 830M/845G */ 80 #define CHIP_I855 2 /* 852GM/855GM/865G */ 81 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */ 82 #define CHIP_I965 4 /* 965Q/965PM */ 83 #define CHIP_G33 5 /* G33/Q33/Q35 */ 84 85 struct agp_i810_softc { 86 u_int32_t initial_aperture; /* aperture size at startup */ 87 struct agp_gatt *gatt; 88 int chiptype; /* i810-like or i830 */ 89 u_int32_t dcache_size; /* i810 only */ 90 u_int32_t stolen; /* number of i830/845 gtt entries 91 for stolen memory */ 92 bus_space_tag_t bst; /* register bus_space tag */ 93 bus_space_handle_t bsh; /* register bus_space handle */ 94 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 95 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 96 struct pci_attach_args vga_pa; 97 98 u_int32_t pgtblctl; 99 }; 100 101 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 102 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 103 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 104 static int agp_i810_unbind_page(struct agp_softc *, off_t); 105 static void agp_i810_flush_tlb(struct agp_softc *); 106 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 107 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 108 vsize_t); 109 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 110 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 111 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 112 113 static bool agp_i810_resume(device_t); 114 static int agp_i810_init(struct agp_softc *); 115 116 static int agp_i810_init(struct agp_softc *); 117 118 static struct agp_methods agp_i810_methods = { 119 agp_i810_get_aperture, 120 agp_i810_set_aperture, 121 agp_i810_bind_page, 122 agp_i810_unbind_page, 123 agp_i810_flush_tlb, 124 agp_i810_enable, 125 agp_i810_alloc_memory, 126 agp_i810_free_memory, 127 agp_i810_bind_memory, 128 agp_i810_unbind_memory, 129 }; 130 131 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 132 static int 133 agp_i810_vgamatch(struct pci_attach_args *pa) 134 { 135 136 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 137 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 138 return (0); 139 140 switch (PCI_PRODUCT(pa->pa_id)) { 141 case PCI_PRODUCT_INTEL_82810_GC: 142 case PCI_PRODUCT_INTEL_82810_DC100_GC: 143 case PCI_PRODUCT_INTEL_82810E_GC: 144 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 145 case PCI_PRODUCT_INTEL_82830MP_IV: 146 case PCI_PRODUCT_INTEL_82845G_IGD: 147 case PCI_PRODUCT_INTEL_82855GM_IGD: 148 case PCI_PRODUCT_INTEL_82865_IGD: 149 case PCI_PRODUCT_INTEL_82915G_IGD: 150 case PCI_PRODUCT_INTEL_82915GM_IGD: 151 case PCI_PRODUCT_INTEL_82945P_IGD: 152 case PCI_PRODUCT_INTEL_82945GM_IGD: 153 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 154 case PCI_PRODUCT_INTEL_82965Q_IGD: 155 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 156 case PCI_PRODUCT_INTEL_82965PM_IGD: 157 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 158 case PCI_PRODUCT_INTEL_82G33_IGD: 159 case PCI_PRODUCT_INTEL_82G33_IGD_1: 160 case PCI_PRODUCT_INTEL_82965G_IGD: 161 case PCI_PRODUCT_INTEL_82965G_IGD_1: 162 return (1); 163 } 164 165 return (0); 166 } 167 168 static int 169 agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 170 { 171 /* 172 * Find the aperture. Don't map it (yet), this would 173 * eat KVA. 174 */ 175 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 176 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, &sc->as_apsize, 177 &sc->as_apflags) != 0) 178 return ENXIO; 179 180 sc->as_apt = pa->pa_memt; 181 182 return 0; 183 } 184 185 int 186 agp_i810_attach(struct device *parent, struct device *self, void *aux) 187 { 188 struct agp_softc *sc = (void *)self; 189 struct agp_i810_softc *isc; 190 struct agp_gatt *gatt; 191 int error, apbase; 192 bus_size_t mmadrsize; 193 194 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 195 if (isc == NULL) { 196 aprint_error(": can't allocate chipset-specific softc\n"); 197 return ENOMEM; 198 } 199 sc->as_chipc = isc; 200 sc->as_methods = &agp_i810_methods; 201 202 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 203 #if NAGP_INTEL > 0 204 const struct pci_attach_args *pa = aux; 205 206 switch (PCI_PRODUCT(pa->pa_id)) { 207 case PCI_PRODUCT_INTEL_82840_HB: 208 case PCI_PRODUCT_INTEL_82865_HB: 209 case PCI_PRODUCT_INTEL_82845G_DRAM: 210 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 211 return agp_intel_attach(parent, self, aux); 212 } 213 #endif 214 aprint_error(": can't find internal VGA device config space\n"); 215 free(isc, M_AGP); 216 return ENOENT; 217 } 218 219 /* XXXfvdl */ 220 sc->as_dmat = isc->vga_pa.pa_dmat; 221 222 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 223 case PCI_PRODUCT_INTEL_82810_GC: 224 case PCI_PRODUCT_INTEL_82810_DC100_GC: 225 case PCI_PRODUCT_INTEL_82810E_GC: 226 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 227 isc->chiptype = CHIP_I810; 228 break; 229 case PCI_PRODUCT_INTEL_82830MP_IV: 230 case PCI_PRODUCT_INTEL_82845G_IGD: 231 isc->chiptype = CHIP_I830; 232 break; 233 case PCI_PRODUCT_INTEL_82855GM_IGD: 234 case PCI_PRODUCT_INTEL_82865_IGD: 235 isc->chiptype = CHIP_I855; 236 break; 237 case PCI_PRODUCT_INTEL_82915G_IGD: 238 case PCI_PRODUCT_INTEL_82915GM_IGD: 239 case PCI_PRODUCT_INTEL_82945P_IGD: 240 case PCI_PRODUCT_INTEL_82945GM_IGD: 241 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 242 isc->chiptype = CHIP_I915; 243 break; 244 case PCI_PRODUCT_INTEL_82965Q_IGD: 245 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 246 case PCI_PRODUCT_INTEL_82965PM_IGD: 247 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 248 case PCI_PRODUCT_INTEL_82965G_IGD: 249 case PCI_PRODUCT_INTEL_82965G_IGD_1: 250 isc->chiptype = CHIP_I965; 251 break; 252 case PCI_PRODUCT_INTEL_82G33_IGD: 253 case PCI_PRODUCT_INTEL_82G33_IGD_1: 254 isc->chiptype = CHIP_G33; 255 break; 256 } 257 258 switch (isc->chiptype) { 259 case CHIP_I915: 260 case CHIP_G33: 261 apbase = AGP_I915_GMADR; 262 break; 263 default: 264 apbase = AGP_I810_GMADR; 265 break; 266 } 267 if (isc->chiptype == CHIP_I965) { 268 error = agp_i965_map_aperture(&isc->vga_pa, sc, AGP_I965_GMADR); 269 } else { 270 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 271 } 272 if (error != 0) { 273 aprint_error(": can't map aperture\n"); 274 free(isc, M_AGP); 275 return error; 276 } 277 278 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { 279 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 280 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 281 NULL, &mmadrsize); 282 if (error != 0) { 283 aprint_error(": can't map mmadr registers\n"); 284 agp_generic_detach(sc); 285 return error; 286 } 287 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 288 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 289 NULL, NULL); 290 if (error != 0) { 291 aprint_error(": can't map gttadr registers\n"); 292 /* XXX we should release mmadr here */ 293 agp_generic_detach(sc); 294 return error; 295 } 296 } else if (isc->chiptype == CHIP_I965) { 297 error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR, 298 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 299 NULL, &mmadrsize); 300 if (error != 0) { 301 aprint_error(": can't map mmadr registers\n"); 302 agp_generic_detach(sc); 303 return error; 304 } 305 } else { 306 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 307 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 308 NULL, &mmadrsize); 309 if (error != 0) { 310 aprint_error(": can't map mmadr registers\n"); 311 agp_generic_detach(sc); 312 return error; 313 } 314 } 315 316 isc->initial_aperture = AGP_GET_APERTURE(sc); 317 318 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 319 if (!gatt) { 320 agp_generic_detach(sc); 321 return ENOMEM; 322 } 323 isc->gatt = gatt; 324 325 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 326 327 if (!pnp_device_register(self, NULL, agp_i810_resume)) 328 aprint_error_dev(self, "couldn't establish power handler\n"); 329 330 return agp_i810_init(sc); 331 } 332 333 static int agp_i810_init(struct agp_softc *sc) 334 { 335 struct agp_i810_softc *isc; 336 struct agp_gatt *gatt; 337 338 isc = sc->as_chipc; 339 gatt = isc->gatt; 340 341 if (isc->chiptype == CHIP_I810) { 342 void *virtual; 343 int dummyseg; 344 345 /* Some i810s have on-chip memory called dcache */ 346 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 347 isc->dcache_size = 4 * 1024 * 1024; 348 else 349 isc->dcache_size = 0; 350 351 /* According to the specs the gatt on the i810 must be 64k */ 352 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 353 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 354 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 355 free(gatt, M_AGP); 356 agp_generic_detach(sc); 357 return ENOMEM; 358 } 359 gatt->ag_virtual = (uint32_t *)virtual; 360 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 361 memset(gatt->ag_virtual, 0, gatt->ag_size); 362 363 agp_flush_cache(); 364 /* Install the GATT. */ 365 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 366 } else if (isc->chiptype == CHIP_I830) { 367 /* The i830 automatically initializes the 128k gatt on boot. */ 368 pcireg_t reg; 369 u_int32_t pgtblctl; 370 u_int16_t gcc1; 371 372 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 373 gcc1 = (u_int16_t)(reg >> 16); 374 switch (gcc1 & AGP_I830_GCC1_GMS) { 375 case AGP_I830_GCC1_GMS_STOLEN_512: 376 isc->stolen = (512 - 132) * 1024 / 4096; 377 break; 378 case AGP_I830_GCC1_GMS_STOLEN_1024: 379 isc->stolen = (1024 - 132) * 1024 / 4096; 380 break; 381 case AGP_I830_GCC1_GMS_STOLEN_8192: 382 isc->stolen = (8192 - 132) * 1024 / 4096; 383 break; 384 default: 385 isc->stolen = 0; 386 aprint_error( 387 ": unknown memory configuration, disabling\n"); 388 agp_generic_detach(sc); 389 return EINVAL; 390 } 391 392 if (isc->stolen > 0) { 393 aprint_error(": detected %dk stolen memory\n%s", 394 isc->stolen * 4, sc->as_dev.dv_xname); 395 } 396 397 /* GATT address is already in there, make sure it's enabled */ 398 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 399 pgtblctl |= 1; 400 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 401 402 gatt->ag_physical = pgtblctl & ~1; 403 } else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 || 404 isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G33) { 405 pcireg_t reg; 406 u_int32_t pgtblctl, stolen; 407 u_int16_t gcc1; 408 409 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 410 gcc1 = (u_int16_t)(reg >> 16); 411 412 /* Stolen memory is set up at the beginning of the aperture by 413 * the BIOS, consisting of the GATT followed by 4kb for the 414 * BIOS display. 415 */ 416 switch (isc->chiptype) { 417 case CHIP_I855: 418 stolen = 128 + 4; 419 break; 420 case CHIP_I915: 421 stolen = 256 + 4; 422 break; 423 case CHIP_I965: 424 stolen = 512 + 4; 425 break; 426 case CHIP_G33: 427 switch (gcc1 & AGP_G33_PGTBL_SIZE_MASK) { 428 case AGP_G33_PGTBL_SIZE_1M: 429 stolen = 1024 + 4; 430 break; 431 case AGP_G33_PGTBL_SIZE_2M: 432 stolen = 2048 + 4; 433 break; 434 default: 435 aprint_error(": bad gtt size\n"); 436 agp_generic_detach(sc); 437 return EINVAL; 438 } 439 break; 440 default: 441 aprint_error(": bad chiptype\n"); 442 agp_generic_detach(sc); 443 return EINVAL; 444 } 445 446 switch (gcc1 & AGP_I855_GCC1_GMS) { 447 case AGP_I855_GCC1_GMS_STOLEN_1M: 448 isc->stolen = (1024 - stolen) * 1024 / 4096; 449 break; 450 case AGP_I855_GCC1_GMS_STOLEN_4M: 451 isc->stolen = (4096 - stolen) * 1024 / 4096; 452 break; 453 case AGP_I855_GCC1_GMS_STOLEN_8M: 454 isc->stolen = (8192 - stolen) * 1024 / 4096; 455 break; 456 case AGP_I855_GCC1_GMS_STOLEN_16M: 457 isc->stolen = (16384 - stolen) * 1024 / 4096; 458 break; 459 case AGP_I855_GCC1_GMS_STOLEN_32M: 460 isc->stolen = (32768 - stolen) * 1024 / 4096; 461 break; 462 case AGP_I915_GCC1_GMS_STOLEN_48M: 463 isc->stolen = (49152 - stolen) * 1024 / 4096; 464 break; 465 case AGP_I915_GCC1_GMS_STOLEN_64M: 466 isc->stolen = (65536 - stolen) * 1024 / 4096; 467 break; 468 default: 469 isc->stolen = 0; 470 aprint_error( 471 ": unknown memory configuration, disabling\n"); 472 agp_generic_detach(sc); 473 return EINVAL; 474 } 475 if (isc->stolen > 0) { 476 aprint_error(": detected %dk stolen memory\n%s", 477 isc->stolen * 4, sc->as_dev.dv_xname); 478 } 479 480 /* GATT address is already in there, make sure it's enabled */ 481 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 482 pgtblctl |= 1; 483 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 484 485 gatt->ag_physical = pgtblctl & ~1; 486 } 487 488 /* 489 * Make sure the chipset can see everything. 490 */ 491 agp_flush_cache(); 492 493 #if 0 494 /* 495 * another device (drm) may need access to this region 496 * we do not need it anymore 497 */ 498 bus_space_unmap(isc->bst, isc->bsh, mmadrsize); 499 #endif 500 501 return 0; 502 } 503 504 #if 0 505 static int 506 agp_i810_detach(struct agp_softc *sc) 507 { 508 int error; 509 struct agp_i810_softc *isc = sc->as_chipc; 510 511 error = agp_generic_detach(sc); 512 if (error) 513 return error; 514 515 /* Clear the GATT base. */ 516 if (sc->chiptype == CHIP_I810) { 517 WRITE4(AGP_I810_PGTBL_CTL, 0); 518 } else { 519 unsigned int pgtblctl; 520 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 521 pgtblctl &= ~1; 522 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 523 } 524 525 /* Put the aperture back the way it started. */ 526 AGP_SET_APERTURE(sc, isc->initial_aperture); 527 528 if (sc->chiptype == CHIP_I810) { 529 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 530 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 531 } 532 free(sc->gatt, M_AGP); 533 534 return 0; 535 } 536 #endif 537 538 static u_int32_t 539 agp_i810_get_aperture(struct agp_softc *sc) 540 { 541 struct agp_i810_softc *isc = sc->as_chipc; 542 pcireg_t reg; 543 u_int16_t miscc, gcc1, msac; 544 545 switch (isc->chiptype) { 546 case CHIP_I810: 547 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 548 miscc = (u_int16_t)(reg >> 16); 549 if ((miscc & AGP_I810_MISCC_WINSIZE) == 550 AGP_I810_MISCC_WINSIZE_32) 551 return 32 * 1024 * 1024; 552 else 553 return 64 * 1024 * 1024; 554 case CHIP_I830: 555 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 556 gcc1 = (u_int16_t)(reg >> 16); 557 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 558 return 64 * 1024 * 1024; 559 else 560 return 128 * 1024 * 1024; 561 case CHIP_I855: 562 return 128 * 1024 * 1024; 563 case CHIP_I915: 564 case CHIP_G33: 565 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 566 msac = (u_int16_t)(reg >> 16); 567 if (msac & AGP_I915_MSAC_APER_128M) 568 return 128 * 1024 * 1024; 569 else 570 return 256 * 1024 * 1024; 571 case CHIP_I965: 572 return 512 * 1024 * 1024; 573 default: 574 aprint_error(": Unknown chipset\n"); 575 } 576 577 return 0; 578 } 579 580 static int 581 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 582 { 583 struct agp_i810_softc *isc = sc->as_chipc; 584 pcireg_t reg; 585 u_int16_t miscc, gcc1; 586 587 switch (isc->chiptype) { 588 case CHIP_I810: 589 /* 590 * Double check for sanity. 591 */ 592 if (aperture != (32 * 1024 * 1024) && 593 aperture != (64 * 1024 * 1024)) { 594 printf("%s: bad aperture size %d\n", 595 sc->as_dev.dv_xname, aperture); 596 return EINVAL; 597 } 598 599 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 600 miscc = (u_int16_t)(reg >> 16); 601 miscc &= ~AGP_I810_MISCC_WINSIZE; 602 if (aperture == 32 * 1024 * 1024) 603 miscc |= AGP_I810_MISCC_WINSIZE_32; 604 else 605 miscc |= AGP_I810_MISCC_WINSIZE_64; 606 607 reg &= 0x0000ffff; 608 reg |= ((pcireg_t)miscc) << 16; 609 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 610 break; 611 case CHIP_I830: 612 if (aperture != (64 * 1024 * 1024) && 613 aperture != (128 * 1024 * 1024)) { 614 printf("%s: bad aperture size %d\n", 615 sc->as_dev.dv_xname, aperture); 616 return EINVAL; 617 } 618 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 619 gcc1 = (u_int16_t)(reg >> 16); 620 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 621 if (aperture == 64 * 1024 * 1024) 622 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 623 else 624 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 625 626 reg &= 0x0000ffff; 627 reg |= ((pcireg_t)gcc1) << 16; 628 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 629 break; 630 case CHIP_I855: 631 case CHIP_I915: 632 if (aperture != agp_i810_get_aperture(sc)) { 633 printf("%s: bad aperture size %d\n", 634 sc->as_dev.dv_xname, aperture); 635 return EINVAL; 636 } 637 break; 638 case CHIP_I965: 639 if (aperture != 512 * 1024 * 1024) { 640 printf("%s: bad aperture size %d\n", 641 sc->as_dev.dv_xname, aperture); 642 return EINVAL; 643 } 644 break; 645 } 646 647 return 0; 648 } 649 650 static int 651 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 652 { 653 struct agp_i810_softc *isc = sc->as_chipc; 654 655 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 656 #ifdef AGP_DEBUG 657 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 658 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 659 isc->gatt->ag_entries); 660 #endif 661 return EINVAL; 662 } 663 664 if (isc->chiptype != CHIP_I830) { 665 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 666 #ifdef AGP_DEBUG 667 printf("%s: trying to bind into stolen memory", 668 sc->as_dev.dv_xname); 669 #endif 670 return EINVAL; 671 } 672 } 673 674 WRITEGTT(offset, physical | 1); 675 return 0; 676 } 677 678 static int 679 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 680 { 681 struct agp_i810_softc *isc = sc->as_chipc; 682 683 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 684 return EINVAL; 685 686 if (isc->chiptype != CHIP_I810 ) { 687 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 688 #ifdef AGP_DEBUG 689 printf("%s: trying to unbind from stolen memory", 690 sc->as_dev.dv_xname); 691 #endif 692 return EINVAL; 693 } 694 } 695 696 WRITEGTT(offset, 0); 697 return 0; 698 } 699 700 /* 701 * Writing via memory mapped registers already flushes all TLBs. 702 */ 703 static void 704 agp_i810_flush_tlb(struct agp_softc *sc) 705 { 706 } 707 708 static int 709 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 710 { 711 712 return 0; 713 } 714 715 static struct agp_memory * 716 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 717 { 718 struct agp_i810_softc *isc = sc->as_chipc; 719 struct agp_memory *mem; 720 721 #ifdef AGP_DEBUG 722 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 723 #endif 724 725 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 726 return 0; 727 728 if (sc->as_allocated + size > sc->as_maxmem) 729 return 0; 730 731 if (type == 1) { 732 /* 733 * Mapping local DRAM into GATT. 734 */ 735 if (isc->chiptype != CHIP_I810 ) 736 return 0; 737 if (size != isc->dcache_size) 738 return 0; 739 } else if (type == 2) { 740 /* 741 * Bogus mapping for the hardware cursor. 742 */ 743 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 744 return 0; 745 } 746 747 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 748 if (mem == NULL) 749 return NULL; 750 mem->am_id = sc->as_nextid++; 751 mem->am_size = size; 752 mem->am_type = type; 753 754 if (type == 2) { 755 /* 756 * Allocate and wire down the memory now so that we can 757 * get its physical address. 758 */ 759 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 760 M_WAITOK); 761 if (mem->am_dmaseg == NULL) { 762 free(mem, M_AGP); 763 return NULL; 764 } 765 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 766 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 767 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 768 free(mem->am_dmaseg, M_AGP); 769 free(mem, M_AGP); 770 return NULL; 771 } 772 memset(mem->am_virtual, 0, size); 773 } else if (type != 1) { 774 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 775 size, 0, BUS_DMA_NOWAIT, 776 &mem->am_dmamap) != 0) { 777 free(mem, M_AGP); 778 return NULL; 779 } 780 } 781 782 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 783 sc->as_allocated += size; 784 785 return mem; 786 } 787 788 static int 789 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 790 { 791 if (mem->am_is_bound) 792 return EBUSY; 793 794 if (mem->am_type == 2) { 795 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 796 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 797 free(mem->am_dmaseg, M_AGP); 798 } 799 800 sc->as_allocated -= mem->am_size; 801 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 802 free(mem, M_AGP); 803 return 0; 804 } 805 806 static int 807 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 808 off_t offset) 809 { 810 struct agp_i810_softc *isc = sc->as_chipc; 811 u_int32_t regval, i; 812 813 /* 814 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 815 * X server for mysterious reasons which leads to crashes if we write 816 * to the GTT through the MMIO window. 817 * Until the issue is solved, simply restore it. 818 */ 819 820 #if 0 821 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 822 if (regval != (isc->gatt->ag_physical | 1)) { 823 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 824 regval); 825 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 826 isc->gatt->ag_physical | 1); 827 } 828 #endif 829 regval = 0; 830 831 if (mem->am_type == 2) { 832 WRITEGTT(offset, mem->am_physical | 1); 833 mem->am_offset = offset; 834 mem->am_is_bound = 1; 835 return 0; 836 } 837 838 if (mem->am_type != 1) 839 return agp_generic_bind_memory(sc, mem, offset); 840 841 if (isc->chiptype != CHIP_I810) 842 return EINVAL; 843 844 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 845 WRITEGTT(offset, i | 3); 846 mem->am_is_bound = 1; 847 return 0; 848 } 849 850 static int 851 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 852 { 853 struct agp_i810_softc *isc = sc->as_chipc; 854 u_int32_t i; 855 856 if (mem->am_type == 2) { 857 WRITEGTT(mem->am_offset, 0); 858 mem->am_offset = 0; 859 mem->am_is_bound = 0; 860 return 0; 861 } 862 863 if (mem->am_type != 1) 864 return agp_generic_unbind_memory(sc, mem); 865 866 if (isc->chiptype != CHIP_I810) 867 return EINVAL; 868 869 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 870 WRITEGTT(i, 0); 871 mem->am_is_bound = 0; 872 return 0; 873 } 874 875 static bool 876 agp_i810_resume(device_t dv) 877 { 878 struct agp_softc *sc = device_private(dv); 879 struct agp_i810_softc *isc = sc->as_chipc; 880 881 isc->pgtblctl = READ4(AGP_I810_PGTBL_CTL); 882 agp_flush_cache(); 883 884 return true; 885 } 886
Indexes created Tue Oct 07 21:09:53 GMT 2025