agp_i810.c revision 1.41.6.3
1 /* $NetBSD: agp_i810.c,v 1.41.6.3 2007/08/07 02:11:27 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.41.6.3 2007/08/07 02:11:27 jmcneill Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <machine/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 #define WRITEGTT(off, v) \ 62 do { \ 63 if (isc->chiptype == CHIP_I915) { \ 64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 66 (v)); \ 67 } else { \ 68 WRITE4(AGP_I810_GTT + \ 69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 70 (v)); \ 71 } \ 72 } while (0) 73 74 #define CHIP_I810 0 /* i810/i815 */ 75 #define CHIP_I830 1 /* 830M/845G */ 76 #define CHIP_I855 2 /* 852GM/855GM/865G */ 77 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */ 78 79 struct agp_i810_softc { 80 u_int32_t initial_aperture; /* aperture size at startup */ 81 struct agp_gatt *gatt; 82 int chiptype; /* i810-like or i830 */ 83 u_int32_t dcache_size; /* i810 only */ 84 u_int32_t stolen; /* number of i830/845 gtt entries 85 for stolen memory */ 86 bus_space_tag_t bst; /* register bus_space tag */ 87 bus_space_handle_t bsh; /* register bus_space handle */ 88 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 89 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 90 struct pci_attach_args vga_pa; 91 92 u_int32_t pgtblctl; 93 }; 94 95 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 96 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 97 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 98 static int agp_i810_unbind_page(struct agp_softc *, off_t); 99 static void agp_i810_flush_tlb(struct agp_softc *); 100 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 101 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 102 vsize_t); 103 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 104 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 105 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 106 107 static pnp_status_t agp_i810_power(device_t, pnp_request_t, void *); 108 static int agp_i810_init(struct agp_softc *); 109 110 static struct agp_methods agp_i810_methods = { 111 agp_i810_get_aperture, 112 agp_i810_set_aperture, 113 agp_i810_bind_page, 114 agp_i810_unbind_page, 115 agp_i810_flush_tlb, 116 agp_i810_enable, 117 agp_i810_alloc_memory, 118 agp_i810_free_memory, 119 agp_i810_bind_memory, 120 agp_i810_unbind_memory, 121 }; 122 123 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 124 static int 125 agp_i810_vgamatch(struct pci_attach_args *pa) 126 { 127 128 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 129 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 130 return (0); 131 132 switch (PCI_PRODUCT(pa->pa_id)) { 133 case PCI_PRODUCT_INTEL_82810_GC: 134 case PCI_PRODUCT_INTEL_82810_DC100_GC: 135 case PCI_PRODUCT_INTEL_82810E_GC: 136 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 137 case PCI_PRODUCT_INTEL_82830MP_IV: 138 case PCI_PRODUCT_INTEL_82845G_IGD: 139 case PCI_PRODUCT_INTEL_82855GM_IGD: 140 case PCI_PRODUCT_INTEL_82865_IGD: 141 case PCI_PRODUCT_INTEL_82915G_IGD: 142 case PCI_PRODUCT_INTEL_82915GM_IGD: 143 case PCI_PRODUCT_INTEL_82945P_IGD: 144 case PCI_PRODUCT_INTEL_82945GM_IGD: 145 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 146 return (1); 147 } 148 149 return (0); 150 } 151 152 int 153 agp_i810_attach(struct device *parent, struct device *self, void *aux) 154 { 155 struct agp_softc *sc = (void *)self; 156 struct agp_i810_softc *isc; 157 struct agp_gatt *gatt; 158 int error, apbase; 159 bus_size_t mmadrsize; 160 161 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 162 if (isc == NULL) { 163 aprint_error(": can't allocate chipset-specific softc\n"); 164 return ENOMEM; 165 } 166 sc->as_chipc = isc; 167 sc->as_methods = &agp_i810_methods; 168 169 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 170 #if NAGP_INTEL > 0 171 const struct pci_attach_args *pa = aux; 172 173 switch (PCI_PRODUCT(pa->pa_id)) { 174 case PCI_PRODUCT_INTEL_82840_HB: 175 case PCI_PRODUCT_INTEL_82865_HB: 176 case PCI_PRODUCT_INTEL_82845G_DRAM: 177 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 178 return agp_intel_attach(parent, self, aux); 179 } 180 #endif 181 aprint_error(": can't find internal VGA device config space\n"); 182 free(isc, M_AGP); 183 return ENOENT; 184 } 185 186 /* XXXfvdl */ 187 sc->as_dmat = isc->vga_pa.pa_dmat; 188 189 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 190 case PCI_PRODUCT_INTEL_82810_GC: 191 case PCI_PRODUCT_INTEL_82810_DC100_GC: 192 case PCI_PRODUCT_INTEL_82810E_GC: 193 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 194 isc->chiptype = CHIP_I810; 195 break; 196 case PCI_PRODUCT_INTEL_82830MP_IV: 197 case PCI_PRODUCT_INTEL_82845G_IGD: 198 isc->chiptype = CHIP_I830; 199 break; 200 case PCI_PRODUCT_INTEL_82855GM_IGD: 201 case PCI_PRODUCT_INTEL_82865_IGD: 202 isc->chiptype = CHIP_I855; 203 break; 204 case PCI_PRODUCT_INTEL_82915G_IGD: 205 case PCI_PRODUCT_INTEL_82915GM_IGD: 206 case PCI_PRODUCT_INTEL_82945P_IGD: 207 case PCI_PRODUCT_INTEL_82945GM_IGD: 208 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 209 isc->chiptype = CHIP_I915; 210 break; 211 } 212 213 apbase = isc->chiptype == CHIP_I915 ? AGP_I915_GMADR : AGP_I810_GMADR; 214 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 215 if (error != 0) { 216 aprint_error(": can't map aperture\n"); 217 free(isc, M_AGP); 218 return error; 219 } 220 221 if (isc->chiptype == CHIP_I915) { 222 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 223 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 224 NULL, &mmadrsize); 225 if (error != 0) { 226 aprint_error(": can't map mmadr registers\n"); 227 agp_generic_detach(sc); 228 return error; 229 } 230 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 231 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 232 NULL, NULL); 233 if (error != 0) { 234 aprint_error(": can't map gttadr registers\n"); 235 /* XXX we should release mmadr here */ 236 agp_generic_detach(sc); 237 return error; 238 } 239 } else { 240 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 241 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 242 NULL, &mmadrsize); 243 if (error != 0) { 244 aprint_error(": can't map mmadr registers\n"); 245 agp_generic_detach(sc); 246 return error; 247 } 248 } 249 250 isc->initial_aperture = AGP_GET_APERTURE(sc); 251 252 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 253 if (!gatt) { 254 agp_generic_detach(sc); 255 return ENOMEM; 256 } 257 isc->gatt = gatt; 258 259 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 260 261 if (pnp_register(self, agp_i810_power) != PNP_STATUS_SUCCESS) 262 aprint_error("%s: couldn't establish power handler\n", 263 device_xname(&sc->as_dev)); 264 265 return agp_i810_init(sc); 266 } 267 268 static int agp_i810_init(struct agp_softc *sc) 269 { 270 struct agp_i810_softc *isc; 271 struct agp_gatt *gatt; 272 273 isc = sc->as_chipc; 274 gatt = isc->gatt; 275 276 if (isc->chiptype == CHIP_I810) { 277 void *virtual; 278 int dummyseg; 279 280 /* Some i810s have on-chip memory called dcache */ 281 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 282 isc->dcache_size = 4 * 1024 * 1024; 283 else 284 isc->dcache_size = 0; 285 286 /* According to the specs the gatt on the i810 must be 64k */ 287 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 288 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 289 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 290 free(gatt, M_AGP); 291 agp_generic_detach(sc); 292 return ENOMEM; 293 } 294 gatt->ag_virtual = (uint32_t *)virtual; 295 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 296 memset(gatt->ag_virtual, 0, gatt->ag_size); 297 298 agp_flush_cache(); 299 /* Install the GATT. */ 300 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 301 } else if (isc->chiptype == CHIP_I830) { 302 /* The i830 automatically initializes the 128k gatt on boot. */ 303 pcireg_t reg; 304 u_int32_t pgtblctl; 305 u_int16_t gcc1; 306 307 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 308 gcc1 = (u_int16_t)(reg >> 16); 309 switch (gcc1 & AGP_I830_GCC1_GMS) { 310 case AGP_I830_GCC1_GMS_STOLEN_512: 311 isc->stolen = (512 - 132) * 1024 / 4096; 312 break; 313 case AGP_I830_GCC1_GMS_STOLEN_1024: 314 isc->stolen = (1024 - 132) * 1024 / 4096; 315 break; 316 case AGP_I830_GCC1_GMS_STOLEN_8192: 317 isc->stolen = (8192 - 132) * 1024 / 4096; 318 break; 319 default: 320 isc->stolen = 0; 321 aprint_error( 322 ": unknown memory configuration, disabling\n"); 323 agp_generic_detach(sc); 324 return EINVAL; 325 } 326 327 if (isc->stolen > 0) { 328 aprint_error(": detected %dk stolen memory\n%s", 329 isc->stolen * 4, sc->as_dev.dv_xname); 330 } 331 332 /* GATT address is already in there, make sure it's enabled */ 333 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 334 pgtblctl |= 1; 335 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 336 337 gatt->ag_physical = pgtblctl & ~1; 338 } else if (isc->chiptype == CHIP_I855) { 339 /* The 855GM automatically initializes the 128k gatt on boot. */ 340 pcireg_t reg; 341 u_int32_t pgtblctl; 342 u_int16_t gcc1; 343 344 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 345 gcc1 = (u_int16_t)(reg >> 16); 346 switch (gcc1 & AGP_I855_GCC1_GMS) { 347 case AGP_I855_GCC1_GMS_STOLEN_1M: 348 isc->stolen = (1024 - 132) * 1024 / 4096; 349 break; 350 case AGP_I855_GCC1_GMS_STOLEN_4M: 351 isc->stolen = (4096 - 132) * 1024 / 4096; 352 break; 353 case AGP_I855_GCC1_GMS_STOLEN_8M: 354 isc->stolen = (8192 - 132) * 1024 / 4096; 355 break; 356 case AGP_I855_GCC1_GMS_STOLEN_16M: 357 isc->stolen = (16384 - 132) * 1024 / 4096; 358 break; 359 case AGP_I855_GCC1_GMS_STOLEN_32M: 360 isc->stolen = (32768 - 132) * 1024 / 4096; 361 break; 362 default: 363 isc->stolen = 0; 364 aprint_error( 365 ": unknown memory configuration, disabling\n"); 366 agp_generic_detach(sc); 367 return EINVAL; 368 } 369 if (isc->stolen > 0) { 370 aprint_error(": detected %dk stolen memory\n%s", 371 isc->stolen * 4, sc->as_dev.dv_xname); 372 } 373 374 /* GATT address is already in there, make sure it's enabled */ 375 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 376 pgtblctl |= 1; 377 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 378 379 gatt->ag_physical = pgtblctl & ~1; 380 } else { /* CHIP_I915 */ 381 /* The 915G automatically initializes the 256k gatt on boot. */ 382 pcireg_t reg; 383 u_int32_t pgtblctl; 384 u_int16_t gcc1; 385 386 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_GCC1); 387 gcc1 = (u_int16_t)(reg >> 16); 388 switch (gcc1 & AGP_I915_GCC1_GMS) { 389 case AGP_I915_GCC1_GMS_STOLEN_0M: 390 isc->stolen = 0; 391 break; 392 case AGP_I915_GCC1_GMS_STOLEN_1M: 393 isc->stolen = (1024 - 260) * 1024 / 4096; 394 break; 395 case AGP_I915_GCC1_GMS_STOLEN_8M: 396 isc->stolen = (8192 - 260) * 1024 / 4096; 397 break; 398 case AGP_I915_GCC1_GMS_STOLEN_16M: 399 isc->stolen = (16384 - 260) * 1024 / 4096; 400 break; 401 case AGP_I915_GCC1_GMS_STOLEN_32M: 402 isc->stolen = (32768 - 260) * 1024 / 4096; 403 break; 404 case AGP_I915_GCC1_GMS_STOLEN_48M: 405 isc->stolen = (49152 - 260) * 1024 / 4096; 406 break; 407 case AGP_I915_GCC1_GMS_STOLEN_64M: 408 isc->stolen = (65536 - 260) * 1024 / 4096; 409 break; 410 default: 411 isc->stolen = 0; 412 aprint_error( 413 ": unknown memory configuration, disabling\n"); 414 agp_generic_detach(sc); 415 return EINVAL; 416 } 417 if (isc->stolen > 0) { 418 aprint_error(": detected %dk stolen memory\n%s", 419 isc->stolen * 4, sc->as_dev.dv_xname); 420 } 421 422 /* GATT address is already in there, make sure it's enabled */ 423 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 424 pgtblctl |= 1; 425 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 426 427 gatt->ag_physical = pgtblctl & ~1; 428 } 429 430 /* 431 * Make sure the chipset can see everything. 432 */ 433 agp_flush_cache(); 434 435 #if 0 436 /* 437 * another device (drm) may need access to this region 438 * we do not need it anymore 439 */ 440 bus_space_unmap(isc->bst, isc->bsh, mmadrsize); 441 #endif 442 443 return 0; 444 } 445 446 #if 0 447 static int 448 agp_i810_detach(struct agp_softc *sc) 449 { 450 int error; 451 struct agp_i810_softc *isc = sc->as_chipc; 452 453 error = agp_generic_detach(sc); 454 if (error) 455 return error; 456 457 /* Clear the GATT base. */ 458 if (sc->chiptype == CHIP_I810) { 459 WRITE4(AGP_I810_PGTBL_CTL, 0); 460 } else { 461 unsigned int pgtblctl; 462 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 463 pgtblctl &= ~1; 464 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 465 } 466 467 /* Put the aperture back the way it started. */ 468 AGP_SET_APERTURE(sc, isc->initial_aperture); 469 470 if (sc->chiptype == CHIP_I810) { 471 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 472 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 473 } 474 free(sc->gatt, M_AGP); 475 476 return 0; 477 } 478 #endif 479 480 static u_int32_t 481 agp_i810_get_aperture(struct agp_softc *sc) 482 { 483 struct agp_i810_softc *isc = sc->as_chipc; 484 pcireg_t reg; 485 486 if (isc->chiptype == CHIP_I810) { 487 u_int16_t miscc; 488 489 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 490 miscc = (u_int16_t)(reg >> 16); 491 if ((miscc & AGP_I810_MISCC_WINSIZE) == 492 AGP_I810_MISCC_WINSIZE_32) 493 return 32 * 1024 * 1024; 494 else 495 return 64 * 1024 * 1024; 496 } else if (isc->chiptype == CHIP_I830) { 497 u_int16_t gcc1; 498 499 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 500 gcc1 = (u_int16_t)(reg >> 16); 501 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 502 return 64 * 1024 * 1024; 503 else 504 return 128 * 1024 * 1024; 505 } else if (isc->chiptype == CHIP_I855) { 506 return 128 * 1024 * 1024; 507 } else { /* CHIP_I915 */ 508 u_int16_t msac; 509 510 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 511 msac = (u_int16_t)(reg >> 16); 512 if (msac & AGP_I915_MSAC_APER_128M) 513 return 128 * 1024 * 1024; 514 else 515 return 256 * 1024 * 1024; 516 } 517 } 518 519 static int 520 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 521 { 522 struct agp_i810_softc *isc = sc->as_chipc; 523 pcireg_t reg; 524 525 if (isc->chiptype == CHIP_I810) { 526 u_int16_t miscc; 527 528 /* 529 * Double check for sanity. 530 */ 531 if (aperture != (32 * 1024 * 1024) && 532 aperture != (64 * 1024 * 1024)) { 533 printf("%s: bad aperture size %d\n", 534 sc->as_dev.dv_xname, aperture); 535 return EINVAL; 536 } 537 538 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 539 miscc = (u_int16_t)(reg >> 16); 540 miscc &= ~AGP_I810_MISCC_WINSIZE; 541 if (aperture == 32 * 1024 * 1024) 542 miscc |= AGP_I810_MISCC_WINSIZE_32; 543 else 544 miscc |= AGP_I810_MISCC_WINSIZE_64; 545 546 reg &= 0x0000ffff; 547 reg |= ((pcireg_t)miscc) << 16; 548 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 549 } else if (isc->chiptype == CHIP_I830) { 550 u_int16_t gcc1; 551 552 if (aperture != (64 * 1024 * 1024) && 553 aperture != (128 * 1024 * 1024)) { 554 printf("%s: bad aperture size %d\n", 555 sc->as_dev.dv_xname, aperture); 556 return EINVAL; 557 } 558 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 559 gcc1 = (u_int16_t)(reg >> 16); 560 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 561 if (aperture == 64 * 1024 * 1024) 562 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 563 else 564 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 565 566 reg &= 0x0000ffff; 567 reg |= ((pcireg_t)gcc1) << 16; 568 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 569 } else { /* CHIP_I855 or CHIP_I915 */ 570 if (aperture != agp_i810_get_aperture(sc)) { 571 printf("%s: bad aperture size %d\n", 572 sc->as_dev.dv_xname, aperture); 573 return EINVAL; 574 } 575 } 576 577 return 0; 578 } 579 580 static int 581 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 582 { 583 struct agp_i810_softc *isc = sc->as_chipc; 584 585 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 586 #ifdef AGP_DEBUG 587 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 588 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 589 isc->gatt->ag_entries); 590 #endif 591 return EINVAL; 592 } 593 594 if (isc->chiptype != CHIP_I830) { 595 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 596 #ifdef AGP_DEBUG 597 printf("%s: trying to bind into stolen memory", 598 sc->as_dev.dv_xname); 599 #endif 600 return EINVAL; 601 } 602 } 603 604 WRITEGTT(offset, physical | 1); 605 return 0; 606 } 607 608 static int 609 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 610 { 611 struct agp_i810_softc *isc = sc->as_chipc; 612 613 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 614 return EINVAL; 615 616 if (isc->chiptype != CHIP_I810 ) { 617 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 618 #ifdef AGP_DEBUG 619 printf("%s: trying to unbind from stolen memory", 620 sc->as_dev.dv_xname); 621 #endif 622 return EINVAL; 623 } 624 } 625 626 WRITEGTT(offset, 0); 627 return 0; 628 } 629 630 /* 631 * Writing via memory mapped registers already flushes all TLBs. 632 */ 633 static void 634 agp_i810_flush_tlb(struct agp_softc *sc) 635 { 636 } 637 638 static int 639 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 640 { 641 642 return 0; 643 } 644 645 static struct agp_memory * 646 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 647 { 648 struct agp_i810_softc *isc = sc->as_chipc; 649 struct agp_memory *mem; 650 651 #ifdef AGP_DEBUG 652 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 653 #endif 654 655 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 656 return 0; 657 658 if (sc->as_allocated + size > sc->as_maxmem) 659 return 0; 660 661 if (type == 1) { 662 /* 663 * Mapping local DRAM into GATT. 664 */ 665 if (isc->chiptype != CHIP_I810 ) 666 return 0; 667 if (size != isc->dcache_size) 668 return 0; 669 } else if (type == 2) { 670 /* 671 * Bogus mapping for the hardware cursor. 672 */ 673 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 674 return 0; 675 } 676 677 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 678 if (mem == NULL) 679 return NULL; 680 mem->am_id = sc->as_nextid++; 681 mem->am_size = size; 682 mem->am_type = type; 683 684 if (type == 2) { 685 /* 686 * Allocate and wire down the memory now so that we can 687 * get its physical address. 688 */ 689 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 690 M_WAITOK); 691 if (mem->am_dmaseg == NULL) { 692 free(mem, M_AGP); 693 return NULL; 694 } 695 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 696 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 697 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 698 free(mem->am_dmaseg, M_AGP); 699 free(mem, M_AGP); 700 return NULL; 701 } 702 memset(mem->am_virtual, 0, size); 703 } else if (type != 1) { 704 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 705 size, 0, BUS_DMA_NOWAIT, 706 &mem->am_dmamap) != 0) { 707 free(mem, M_AGP); 708 return NULL; 709 } 710 } 711 712 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 713 sc->as_allocated += size; 714 715 return mem; 716 } 717 718 static int 719 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 720 { 721 if (mem->am_is_bound) 722 return EBUSY; 723 724 if (mem->am_type == 2) { 725 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 726 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 727 free(mem->am_dmaseg, M_AGP); 728 } 729 730 sc->as_allocated -= mem->am_size; 731 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 732 free(mem, M_AGP); 733 return 0; 734 } 735 736 static int 737 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 738 off_t offset) 739 { 740 struct agp_i810_softc *isc = sc->as_chipc; 741 u_int32_t regval, i; 742 743 /* 744 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 745 * X server for mysterious reasons which leads to crashes if we write 746 * to the GTT through the MMIO window. 747 * Until the issue is solved, simply restore it. 748 */ 749 750 #if 0 751 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 752 if (regval != (isc->gatt->ag_physical | 1)) { 753 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 754 regval); 755 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 756 isc->gatt->ag_physical | 1); 757 } 758 #endif 759 regval = 0; 760 761 if (mem->am_type == 2) { 762 WRITEGTT(offset, mem->am_physical | 1); 763 mem->am_offset = offset; 764 mem->am_is_bound = 1; 765 return 0; 766 } 767 768 if (mem->am_type != 1) 769 return agp_generic_bind_memory(sc, mem, offset); 770 771 if (isc->chiptype != CHIP_I810) 772 return EINVAL; 773 774 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 775 WRITEGTT(offset, i | 3); 776 mem->am_is_bound = 1; 777 return 0; 778 } 779 780 static int 781 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 782 { 783 struct agp_i810_softc *isc = sc->as_chipc; 784 u_int32_t i; 785 786 if (mem->am_type == 2) { 787 WRITEGTT(mem->am_offset, 0); 788 mem->am_offset = 0; 789 mem->am_is_bound = 0; 790 return 0; 791 } 792 793 if (mem->am_type != 1) 794 return agp_generic_unbind_memory(sc, mem); 795 796 if (isc->chiptype != CHIP_I810) 797 return EINVAL; 798 799 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 800 WRITEGTT(i, 0); 801 mem->am_is_bound = 0; 802 return 0; 803 } 804 805 static pnp_status_t 806 agp_i810_power(device_t dv, pnp_request_t req, void *opaque) 807 { 808 struct agp_softc *sc; 809 struct agp_i810_softc *isc; 810 pnp_state_t *pstate; 811 812 sc = (struct agp_softc *)dv; 813 isc = sc->as_chipc; 814 815 switch (req) { 816 case PNP_REQUEST_GET_CAPABILITIES: 817 case PNP_REQUEST_GET_STATE: 818 return agp_power(dv, req, opaque); 819 case PNP_REQUEST_SET_STATE: 820 pstate = opaque; 821 switch (*pstate) { 822 case PNP_STATE_D0: 823 agp_power(dv, req, opaque); 824 WRITE4(AGP_I810_PGTBL_CTL, isc->pgtblctl); 825 break; 826 case PNP_STATE_D3: 827 isc->pgtblctl = READ4(AGP_I810_PGTBL_CTL); 828 agp_power(dv, req, opaque); 829 break; 830 default: 831 return PNP_STATUS_UNSUPPORTED; 832 } 833 break; 834 default: 835 return agp_power(dv, req, opaque); 836 } 837 838 return PNP_STATUS_SUCCESS; 839 } 840
Indexes created Tue Oct 07 21:09:53 GMT 2025