agp_i810.c revision 1.41.6.5
1 /* $NetBSD: agp_i810.c,v 1.41.6.5 2007/08/27 03:15:52 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.41.6.5 2007/08/27 03:15:52 jmcneill Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <machine/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 #define WRITEGTT(off, v) \ 62 do { \ 63 if (isc->chiptype == CHIP_I915) { \ 64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 66 (v)); \ 67 } else if (isc->chiptype == CHIP_I965) { \ 68 WRITE4(AGP_I965_GTT + \ 69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 70 (v)); \ 71 } else { \ 72 WRITE4(AGP_I810_GTT + \ 73 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 74 (v)); \ 75 } \ 76 } while (0) 77 78 #define CHIP_I810 0 /* i810/i815 */ 79 #define CHIP_I830 1 /* 830M/845G */ 80 #define CHIP_I855 2 /* 852GM/855GM/865G */ 81 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */ 82 #define CHIP_I965 4 /* 965Q/965PM */ 83 84 struct agp_i810_softc { 85 u_int32_t initial_aperture; /* aperture size at startup */ 86 struct agp_gatt *gatt; 87 int chiptype; /* i810-like or i830 */ 88 u_int32_t dcache_size; /* i810 only */ 89 u_int32_t stolen; /* number of i830/845 gtt entries 90 for stolen memory */ 91 bus_space_tag_t bst; /* register bus_space tag */ 92 bus_space_handle_t bsh; /* register bus_space handle */ 93 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 94 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 95 struct pci_attach_args vga_pa; 96 97 u_int32_t pgtblctl; 98 }; 99 100 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 101 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 102 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 103 static int agp_i810_unbind_page(struct agp_softc *, off_t); 104 static void agp_i810_flush_tlb(struct agp_softc *); 105 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 106 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 107 vsize_t); 108 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 109 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 110 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 111 112 static pnp_status_t agp_i810_power(device_t, pnp_request_t, void *); 113 static int agp_i810_init(struct agp_softc *); 114 115 static struct agp_methods agp_i810_methods = { 116 agp_i810_get_aperture, 117 agp_i810_set_aperture, 118 agp_i810_bind_page, 119 agp_i810_unbind_page, 120 agp_i810_flush_tlb, 121 agp_i810_enable, 122 agp_i810_alloc_memory, 123 agp_i810_free_memory, 124 agp_i810_bind_memory, 125 agp_i810_unbind_memory, 126 }; 127 128 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 129 static int 130 agp_i810_vgamatch(struct pci_attach_args *pa) 131 { 132 133 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 134 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 135 return (0); 136 137 switch (PCI_PRODUCT(pa->pa_id)) { 138 case PCI_PRODUCT_INTEL_82810_GC: 139 case PCI_PRODUCT_INTEL_82810_DC100_GC: 140 case PCI_PRODUCT_INTEL_82810E_GC: 141 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 142 case PCI_PRODUCT_INTEL_82830MP_IV: 143 case PCI_PRODUCT_INTEL_82845G_IGD: 144 case PCI_PRODUCT_INTEL_82855GM_IGD: 145 case PCI_PRODUCT_INTEL_82865_IGD: 146 case PCI_PRODUCT_INTEL_82915G_IGD: 147 case PCI_PRODUCT_INTEL_82915GM_IGD: 148 case PCI_PRODUCT_INTEL_82945P_IGD: 149 case PCI_PRODUCT_INTEL_82945GM_IGD: 150 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 151 case PCI_PRODUCT_INTEL_82965Q_IGD: 152 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 153 case PCI_PRODUCT_INTEL_82965PM_IGD: 154 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 155 return (1); 156 } 157 158 return (0); 159 } 160 161 static int 162 agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 163 { 164 /* 165 * Find the aperture. Don't map it (yet), this would 166 * eat KVA. 167 */ 168 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 169 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, &sc->as_apsize, 170 &sc->as_apflags) != 0) 171 return ENXIO; 172 173 sc->as_apt = pa->pa_memt; 174 175 return 0; 176 } 177 178 int 179 agp_i810_attach(struct device *parent, struct device *self, void *aux) 180 { 181 struct agp_softc *sc = (void *)self; 182 struct agp_i810_softc *isc; 183 struct agp_gatt *gatt; 184 int error, apbase; 185 bus_size_t mmadrsize; 186 187 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 188 if (isc == NULL) { 189 aprint_error(": can't allocate chipset-specific softc\n"); 190 return ENOMEM; 191 } 192 sc->as_chipc = isc; 193 sc->as_methods = &agp_i810_methods; 194 195 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 196 #if NAGP_INTEL > 0 197 const struct pci_attach_args *pa = aux; 198 199 switch (PCI_PRODUCT(pa->pa_id)) { 200 case PCI_PRODUCT_INTEL_82840_HB: 201 case PCI_PRODUCT_INTEL_82865_HB: 202 case PCI_PRODUCT_INTEL_82845G_DRAM: 203 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 204 return agp_intel_attach(parent, self, aux); 205 } 206 #endif 207 aprint_error(": can't find internal VGA device config space\n"); 208 free(isc, M_AGP); 209 return ENOENT; 210 } 211 212 /* XXXfvdl */ 213 sc->as_dmat = isc->vga_pa.pa_dmat; 214 215 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 216 case PCI_PRODUCT_INTEL_82810_GC: 217 case PCI_PRODUCT_INTEL_82810_DC100_GC: 218 case PCI_PRODUCT_INTEL_82810E_GC: 219 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 220 isc->chiptype = CHIP_I810; 221 break; 222 case PCI_PRODUCT_INTEL_82830MP_IV: 223 case PCI_PRODUCT_INTEL_82845G_IGD: 224 isc->chiptype = CHIP_I830; 225 break; 226 case PCI_PRODUCT_INTEL_82855GM_IGD: 227 case PCI_PRODUCT_INTEL_82865_IGD: 228 isc->chiptype = CHIP_I855; 229 break; 230 case PCI_PRODUCT_INTEL_82915G_IGD: 231 case PCI_PRODUCT_INTEL_82915GM_IGD: 232 case PCI_PRODUCT_INTEL_82945P_IGD: 233 case PCI_PRODUCT_INTEL_82945GM_IGD: 234 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 235 isc->chiptype = CHIP_I915; 236 break; 237 case PCI_PRODUCT_INTEL_82965Q_IGD: 238 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 239 case PCI_PRODUCT_INTEL_82965PM_IGD: 240 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 241 isc->chiptype = CHIP_I965; 242 break; 243 } 244 245 apbase = isc->chiptype == CHIP_I915 ? AGP_I915_GMADR : AGP_I810_GMADR; 246 if (isc->chiptype == CHIP_I965) { 247 error = agp_i965_map_aperture(&isc->vga_pa, sc, AGP_I965_GMADR); 248 } else { 249 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 250 } 251 if (error != 0) { 252 aprint_error(": can't map aperture\n"); 253 free(isc, M_AGP); 254 return error; 255 } 256 257 if (isc->chiptype == CHIP_I915) { 258 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 259 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 260 NULL, &mmadrsize); 261 if (error != 0) { 262 aprint_error(": can't map mmadr registers\n"); 263 agp_generic_detach(sc); 264 return error; 265 } 266 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 267 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 268 NULL, NULL); 269 if (error != 0) { 270 aprint_error(": can't map gttadr registers\n"); 271 /* XXX we should release mmadr here */ 272 agp_generic_detach(sc); 273 return error; 274 } 275 } else if (isc->chiptype == CHIP_I965) { 276 error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR, 277 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 278 NULL, &mmadrsize); 279 if (error != 0) { 280 aprint_error(": can't map mmadr registers\n"); 281 agp_generic_detach(sc); 282 return error; 283 } 284 } else { 285 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 286 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 287 NULL, &mmadrsize); 288 if (error != 0) { 289 aprint_error(": can't map mmadr registers\n"); 290 agp_generic_detach(sc); 291 return error; 292 } 293 } 294 295 isc->initial_aperture = AGP_GET_APERTURE(sc); 296 297 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 298 if (!gatt) { 299 agp_generic_detach(sc); 300 return ENOMEM; 301 } 302 isc->gatt = gatt; 303 304 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 305 306 if (pnp_register(self, agp_i810_power) != PNP_STATUS_SUCCESS) 307 aprint_error("%s: couldn't establish power handler\n", 308 device_xname(&sc->as_dev)); 309 310 return agp_i810_init(sc); 311 } 312 313 static int agp_i810_init(struct agp_softc *sc) 314 { 315 struct agp_i810_softc *isc; 316 struct agp_gatt *gatt; 317 318 isc = sc->as_chipc; 319 gatt = isc->gatt; 320 321 if (isc->chiptype == CHIP_I810) { 322 void *virtual; 323 int dummyseg; 324 325 /* Some i810s have on-chip memory called dcache */ 326 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 327 isc->dcache_size = 4 * 1024 * 1024; 328 else 329 isc->dcache_size = 0; 330 331 /* According to the specs the gatt on the i810 must be 64k */ 332 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 333 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 334 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 335 free(gatt, M_AGP); 336 agp_generic_detach(sc); 337 return ENOMEM; 338 } 339 gatt->ag_virtual = (uint32_t *)virtual; 340 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 341 memset(gatt->ag_virtual, 0, gatt->ag_size); 342 343 agp_flush_cache(); 344 /* Install the GATT. */ 345 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 346 } else if (isc->chiptype == CHIP_I830) { 347 /* The i830 automatically initializes the 128k gatt on boot. */ 348 pcireg_t reg; 349 u_int32_t pgtblctl; 350 u_int16_t gcc1; 351 352 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 353 gcc1 = (u_int16_t)(reg >> 16); 354 switch (gcc1 & AGP_I830_GCC1_GMS) { 355 case AGP_I830_GCC1_GMS_STOLEN_512: 356 isc->stolen = (512 - 132) * 1024 / 4096; 357 break; 358 case AGP_I830_GCC1_GMS_STOLEN_1024: 359 isc->stolen = (1024 - 132) * 1024 / 4096; 360 break; 361 case AGP_I830_GCC1_GMS_STOLEN_8192: 362 isc->stolen = (8192 - 132) * 1024 / 4096; 363 break; 364 default: 365 isc->stolen = 0; 366 aprint_error( 367 ": unknown memory configuration, disabling\n"); 368 agp_generic_detach(sc); 369 return EINVAL; 370 } 371 372 if (isc->stolen > 0) { 373 aprint_error(": detected %dk stolen memory\n%s", 374 isc->stolen * 4, sc->as_dev.dv_xname); 375 } 376 377 /* GATT address is already in there, make sure it's enabled */ 378 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 379 pgtblctl |= 1; 380 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 381 382 gatt->ag_physical = pgtblctl & ~1; 383 } else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 || 384 isc->chiptype == CHIP_I965) { 385 pcireg_t reg; 386 u_int32_t pgtblctl, stolen; 387 u_int16_t gcc1; 388 389 /* Stolen memory is set up at the beginning of the aperture by 390 * the BIOS, consisting of the GATT followed by 4kb for the 391 * BIOS display. 392 */ 393 switch (isc->chiptype) { 394 case CHIP_I855: 395 stolen = 128 + 4; 396 break; 397 case CHIP_I915: 398 stolen = 256 + 4; 399 break; 400 case CHIP_I965: 401 stolen = 512 + 4; 402 break; 403 default: 404 aprint_error(": bad chiptype\n"); 405 agp_generic_detach(sc); 406 return EINVAL; 407 } 408 409 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 410 gcc1 = (u_int16_t)(reg >> 16); 411 switch (gcc1 & AGP_I855_GCC1_GMS) { 412 case AGP_I855_GCC1_GMS_STOLEN_1M: 413 isc->stolen = (1024 - stolen) * 1024 / 4096; 414 break; 415 case AGP_I855_GCC1_GMS_STOLEN_4M: 416 isc->stolen = (4096 - stolen) * 1024 / 4096; 417 break; 418 case AGP_I855_GCC1_GMS_STOLEN_8M: 419 isc->stolen = (8192 - stolen) * 1024 / 4096; 420 break; 421 case AGP_I855_GCC1_GMS_STOLEN_16M: 422 isc->stolen = (16384 - stolen) * 1024 / 4096; 423 break; 424 case AGP_I855_GCC1_GMS_STOLEN_32M: 425 isc->stolen = (32768 - stolen) * 1024 / 4096; 426 break; 427 case AGP_I915_GCC1_GMS_STOLEN_48M: 428 isc->stolen = (49152 - stolen) * 1024 / 4096; 429 break; 430 case AGP_I915_GCC1_GMS_STOLEN_64M: 431 isc->stolen = (65536 - stolen) * 1024 / 4096; 432 break; 433 default: 434 isc->stolen = 0; 435 aprint_error( 436 ": unknown memory configuration, disabling\n"); 437 agp_generic_detach(sc); 438 return EINVAL; 439 } 440 if (isc->stolen > 0) { 441 aprint_error(": detected %dk stolen memory\n%s", 442 isc->stolen * 4, sc->as_dev.dv_xname); 443 } 444 445 /* GATT address is already in there, make sure it's enabled */ 446 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 447 pgtblctl |= 1; 448 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 449 450 gatt->ag_physical = pgtblctl & ~1; 451 } 452 453 /* 454 * Make sure the chipset can see everything. 455 */ 456 agp_flush_cache(); 457 458 #if 0 459 /* 460 * another device (drm) may need access to this region 461 * we do not need it anymore 462 */ 463 bus_space_unmap(isc->bst, isc->bsh, mmadrsize); 464 #endif 465 466 return 0; 467 } 468 469 #if 0 470 static int 471 agp_i810_detach(struct agp_softc *sc) 472 { 473 int error; 474 struct agp_i810_softc *isc = sc->as_chipc; 475 476 error = agp_generic_detach(sc); 477 if (error) 478 return error; 479 480 /* Clear the GATT base. */ 481 if (sc->chiptype == CHIP_I810) { 482 WRITE4(AGP_I810_PGTBL_CTL, 0); 483 } else { 484 unsigned int pgtblctl; 485 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 486 pgtblctl &= ~1; 487 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 488 } 489 490 /* Put the aperture back the way it started. */ 491 AGP_SET_APERTURE(sc, isc->initial_aperture); 492 493 if (sc->chiptype == CHIP_I810) { 494 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 495 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 496 } 497 free(sc->gatt, M_AGP); 498 499 return 0; 500 } 501 #endif 502 503 static u_int32_t 504 agp_i810_get_aperture(struct agp_softc *sc) 505 { 506 struct agp_i810_softc *isc = sc->as_chipc; 507 pcireg_t reg; 508 u_int16_t miscc, gcc1, msac; 509 510 switch (isc->chiptype) { 511 case CHIP_I810: 512 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 513 miscc = (u_int16_t)(reg >> 16); 514 if ((miscc & AGP_I810_MISCC_WINSIZE) == 515 AGP_I810_MISCC_WINSIZE_32) 516 return 32 * 1024 * 1024; 517 else 518 return 64 * 1024 * 1024; 519 case CHIP_I830: 520 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 521 gcc1 = (u_int16_t)(reg >> 16); 522 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 523 return 64 * 1024 * 1024; 524 else 525 return 128 * 1024 * 1024; 526 case CHIP_I855: 527 return 128 * 1024 * 1024; 528 case CHIP_I915: 529 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 530 msac = (u_int16_t)(reg >> 16); 531 if (msac & AGP_I915_MSAC_APER_128M) 532 return 128 * 1024 * 1024; 533 else 534 return 256 * 1024 * 1024; 535 case CHIP_I965: 536 return 512 * 1024 * 1024; 537 default: 538 aprint_error(": Unknown chipset\n"); 539 } 540 541 return 0; 542 } 543 544 static int 545 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 546 { 547 struct agp_i810_softc *isc = sc->as_chipc; 548 pcireg_t reg; 549 u_int16_t miscc, gcc1; 550 551 switch (isc->chiptype) { 552 case CHIP_I810: 553 /* 554 * Double check for sanity. 555 */ 556 if (aperture != (32 * 1024 * 1024) && 557 aperture != (64 * 1024 * 1024)) { 558 printf("%s: bad aperture size %d\n", 559 sc->as_dev.dv_xname, aperture); 560 return EINVAL; 561 } 562 563 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 564 miscc = (u_int16_t)(reg >> 16); 565 miscc &= ~AGP_I810_MISCC_WINSIZE; 566 if (aperture == 32 * 1024 * 1024) 567 miscc |= AGP_I810_MISCC_WINSIZE_32; 568 else 569 miscc |= AGP_I810_MISCC_WINSIZE_64; 570 571 reg &= 0x0000ffff; 572 reg |= ((pcireg_t)miscc) << 16; 573 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 574 break; 575 case CHIP_I830: 576 if (aperture != (64 * 1024 * 1024) && 577 aperture != (128 * 1024 * 1024)) { 578 printf("%s: bad aperture size %d\n", 579 sc->as_dev.dv_xname, aperture); 580 return EINVAL; 581 } 582 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 583 gcc1 = (u_int16_t)(reg >> 16); 584 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 585 if (aperture == 64 * 1024 * 1024) 586 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 587 else 588 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 589 590 reg &= 0x0000ffff; 591 reg |= ((pcireg_t)gcc1) << 16; 592 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 593 break; 594 case CHIP_I855: 595 case CHIP_I915: 596 if (aperture != agp_i810_get_aperture(sc)) { 597 printf("%s: bad aperture size %d\n", 598 sc->as_dev.dv_xname, aperture); 599 return EINVAL; 600 } 601 break; 602 case CHIP_I965: 603 if (aperture != 512 * 1024 * 1024) { 604 printf("%s: bad aperture size %d\n", 605 sc->as_dev.dv_xname, aperture); 606 return EINVAL; 607 } 608 break; 609 } 610 611 return 0; 612 } 613 614 static int 615 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 616 { 617 struct agp_i810_softc *isc = sc->as_chipc; 618 619 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 620 #ifdef AGP_DEBUG 621 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 622 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 623 isc->gatt->ag_entries); 624 #endif 625 return EINVAL; 626 } 627 628 if (isc->chiptype != CHIP_I830) { 629 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 630 #ifdef AGP_DEBUG 631 printf("%s: trying to bind into stolen memory", 632 sc->as_dev.dv_xname); 633 #endif 634 return EINVAL; 635 } 636 } 637 638 WRITEGTT(offset, physical | 1); 639 return 0; 640 } 641 642 static int 643 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 644 { 645 struct agp_i810_softc *isc = sc->as_chipc; 646 647 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 648 return EINVAL; 649 650 if (isc->chiptype != CHIP_I810 ) { 651 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 652 #ifdef AGP_DEBUG 653 printf("%s: trying to unbind from stolen memory", 654 sc->as_dev.dv_xname); 655 #endif 656 return EINVAL; 657 } 658 } 659 660 WRITEGTT(offset, 0); 661 return 0; 662 } 663 664 /* 665 * Writing via memory mapped registers already flushes all TLBs. 666 */ 667 static void 668 agp_i810_flush_tlb(struct agp_softc *sc) 669 { 670 } 671 672 static int 673 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 674 { 675 676 return 0; 677 } 678 679 static struct agp_memory * 680 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 681 { 682 struct agp_i810_softc *isc = sc->as_chipc; 683 struct agp_memory *mem; 684 685 #ifdef AGP_DEBUG 686 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 687 #endif 688 689 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 690 return 0; 691 692 if (sc->as_allocated + size > sc->as_maxmem) 693 return 0; 694 695 if (type == 1) { 696 /* 697 * Mapping local DRAM into GATT. 698 */ 699 if (isc->chiptype != CHIP_I810 ) 700 return 0; 701 if (size != isc->dcache_size) 702 return 0; 703 } else if (type == 2) { 704 /* 705 * Bogus mapping for the hardware cursor. 706 */ 707 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 708 return 0; 709 } 710 711 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 712 if (mem == NULL) 713 return NULL; 714 mem->am_id = sc->as_nextid++; 715 mem->am_size = size; 716 mem->am_type = type; 717 718 if (type == 2) { 719 /* 720 * Allocate and wire down the memory now so that we can 721 * get its physical address. 722 */ 723 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 724 M_WAITOK); 725 if (mem->am_dmaseg == NULL) { 726 free(mem, M_AGP); 727 return NULL; 728 } 729 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 730 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 731 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 732 free(mem->am_dmaseg, M_AGP); 733 free(mem, M_AGP); 734 return NULL; 735 } 736 memset(mem->am_virtual, 0, size); 737 } else if (type != 1) { 738 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 739 size, 0, BUS_DMA_NOWAIT, 740 &mem->am_dmamap) != 0) { 741 free(mem, M_AGP); 742 return NULL; 743 } 744 } 745 746 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 747 sc->as_allocated += size; 748 749 return mem; 750 } 751 752 static int 753 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 754 { 755 if (mem->am_is_bound) 756 return EBUSY; 757 758 if (mem->am_type == 2) { 759 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 760 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 761 free(mem->am_dmaseg, M_AGP); 762 } 763 764 sc->as_allocated -= mem->am_size; 765 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 766 free(mem, M_AGP); 767 return 0; 768 } 769 770 static int 771 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 772 off_t offset) 773 { 774 struct agp_i810_softc *isc = sc->as_chipc; 775 u_int32_t regval, i; 776 777 /* 778 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 779 * X server for mysterious reasons which leads to crashes if we write 780 * to the GTT through the MMIO window. 781 * Until the issue is solved, simply restore it. 782 */ 783 784 #if 0 785 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 786 if (regval != (isc->gatt->ag_physical | 1)) { 787 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 788 regval); 789 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 790 isc->gatt->ag_physical | 1); 791 } 792 #endif 793 regval = 0; 794 795 if (mem->am_type == 2) { 796 WRITEGTT(offset, mem->am_physical | 1); 797 mem->am_offset = offset; 798 mem->am_is_bound = 1; 799 return 0; 800 } 801 802 if (mem->am_type != 1) 803 return agp_generic_bind_memory(sc, mem, offset); 804 805 if (isc->chiptype != CHIP_I810) 806 return EINVAL; 807 808 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 809 WRITEGTT(offset, i | 3); 810 mem->am_is_bound = 1; 811 return 0; 812 } 813 814 static int 815 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 816 { 817 struct agp_i810_softc *isc = sc->as_chipc; 818 u_int32_t i; 819 820 if (mem->am_type == 2) { 821 WRITEGTT(mem->am_offset, 0); 822 mem->am_offset = 0; 823 mem->am_is_bound = 0; 824 return 0; 825 } 826 827 if (mem->am_type != 1) 828 return agp_generic_unbind_memory(sc, mem); 829 830 if (isc->chiptype != CHIP_I810) 831 return EINVAL; 832 833 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 834 WRITEGTT(i, 0); 835 mem->am_is_bound = 0; 836 return 0; 837 } 838 839 static pnp_status_t 840 agp_i810_power(device_t dv, pnp_request_t req, void *opaque) 841 { 842 struct agp_softc *sc; 843 struct agp_i810_softc *isc; 844 pnp_state_t *pstate; 845 846 sc = (struct agp_softc *)dv; 847 isc = sc->as_chipc; 848 849 switch (req) { 850 case PNP_REQUEST_GET_CAPABILITIES: 851 case PNP_REQUEST_GET_STATE: 852 return agp_power(dv, req, opaque); 853 case PNP_REQUEST_SET_STATE: 854 pstate = opaque; 855 switch (*pstate) { 856 case PNP_STATE_D0: 857 agp_power(dv, req, opaque); 858 WRITE4(AGP_I810_PGTBL_CTL, isc->pgtblctl); 859 break; 860 case PNP_STATE_D3: 861 isc->pgtblctl = READ4(AGP_I810_PGTBL_CTL); 862 agp_power(dv, req, opaque); 863 break; 864 default: 865 return PNP_STATUS_UNSUPPORTED; 866 } 867 break; 868 default: 869 return agp_power(dv, req, opaque); 870 } 871 872 return PNP_STATUS_SUCCESS; 873 } 874
Indexes created Tue Oct 07 21:09:53 GMT 2025