agp_i810.c revision 1.41.6.8
1 /* $NetBSD: agp_i810.c,v 1.41.6.8 2007/10/26 15:45:51 joerg Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.41.6.8 2007/10/26 15:45:51 joerg Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <sys/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 #define WRITEGTT(off, v) \ 62 do { \ 63 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { \ 64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 66 (v)); \ 67 } else if (isc->chiptype == CHIP_I965) { \ 68 WRITE4(AGP_I965_GTT + \ 69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 70 (v)); \ 71 } else { \ 72 WRITE4(AGP_I810_GTT + \ 73 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 74 (v)); \ 75 } \ 76 } while (0) 77 78 #define CHIP_I810 0 /* i810/i815 */ 79 #define CHIP_I830 1 /* 830M/845G */ 80 #define CHIP_I855 2 /* 852GM/855GM/865G */ 81 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */ 82 #define CHIP_I965 4 /* 965Q/965PM */ 83 #define CHIP_G33 5 /* G33/Q33/Q35 */ 84 85 struct agp_i810_softc { 86 u_int32_t initial_aperture; /* aperture size at startup */ 87 struct agp_gatt *gatt; 88 int chiptype; /* i810-like or i830 */ 89 u_int32_t dcache_size; /* i810 only */ 90 u_int32_t stolen; /* number of i830/845 gtt entries 91 for stolen memory */ 92 bus_space_tag_t bst; /* register bus_space tag */ 93 bus_space_handle_t bsh; /* register bus_space handle */ 94 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 95 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 96 struct pci_attach_args vga_pa; 97 98 u_int32_t pgtblctl; 99 }; 100 101 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 102 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 103 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 104 static int agp_i810_unbind_page(struct agp_softc *, off_t); 105 static void agp_i810_flush_tlb(struct agp_softc *); 106 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 107 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 108 vsize_t); 109 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 110 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 111 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 112 113 static void agp_i810_resume(device_t); 114 static int agp_i810_init(struct agp_softc *); 115 116 static struct agp_methods agp_i810_methods = { 117 agp_i810_get_aperture, 118 agp_i810_set_aperture, 119 agp_i810_bind_page, 120 agp_i810_unbind_page, 121 agp_i810_flush_tlb, 122 agp_i810_enable, 123 agp_i810_alloc_memory, 124 agp_i810_free_memory, 125 agp_i810_bind_memory, 126 agp_i810_unbind_memory, 127 }; 128 129 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 130 static int 131 agp_i810_vgamatch(struct pci_attach_args *pa) 132 { 133 134 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 135 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 136 return (0); 137 138 switch (PCI_PRODUCT(pa->pa_id)) { 139 case PCI_PRODUCT_INTEL_82810_GC: 140 case PCI_PRODUCT_INTEL_82810_DC100_GC: 141 case PCI_PRODUCT_INTEL_82810E_GC: 142 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 143 case PCI_PRODUCT_INTEL_82830MP_IV: 144 case PCI_PRODUCT_INTEL_82845G_IGD: 145 case PCI_PRODUCT_INTEL_82855GM_IGD: 146 case PCI_PRODUCT_INTEL_82865_IGD: 147 case PCI_PRODUCT_INTEL_82915G_IGD: 148 case PCI_PRODUCT_INTEL_82915GM_IGD: 149 case PCI_PRODUCT_INTEL_82945P_IGD: 150 case PCI_PRODUCT_INTEL_82945GM_IGD: 151 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 152 case PCI_PRODUCT_INTEL_82965Q_IGD: 153 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 154 case PCI_PRODUCT_INTEL_82965PM_IGD: 155 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 156 case PCI_PRODUCT_INTEL_82G33_IGD: 157 case PCI_PRODUCT_INTEL_82G33_IGD_1: 158 return (1); 159 } 160 161 return (0); 162 } 163 164 static int 165 agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 166 { 167 /* 168 * Find the aperture. Don't map it (yet), this would 169 * eat KVA. 170 */ 171 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 172 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, &sc->as_apsize, 173 &sc->as_apflags) != 0) 174 return ENXIO; 175 176 sc->as_apt = pa->pa_memt; 177 178 return 0; 179 } 180 181 int 182 agp_i810_attach(struct device *parent, struct device *self, void *aux) 183 { 184 struct agp_softc *sc = (void *)self; 185 struct agp_i810_softc *isc; 186 struct agp_gatt *gatt; 187 int error, apbase; 188 bus_size_t mmadrsize; 189 pnp_status_t pnp_status; 190 191 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 192 if (isc == NULL) { 193 aprint_error(": can't allocate chipset-specific softc\n"); 194 return ENOMEM; 195 } 196 sc->as_chipc = isc; 197 sc->as_methods = &agp_i810_methods; 198 199 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 200 #if NAGP_INTEL > 0 201 const struct pci_attach_args *pa = aux; 202 203 switch (PCI_PRODUCT(pa->pa_id)) { 204 case PCI_PRODUCT_INTEL_82840_HB: 205 case PCI_PRODUCT_INTEL_82865_HB: 206 case PCI_PRODUCT_INTEL_82845G_DRAM: 207 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 208 return agp_intel_attach(parent, self, aux); 209 } 210 #endif 211 aprint_error(": can't find internal VGA device config space\n"); 212 free(isc, M_AGP); 213 return ENOENT; 214 } 215 216 /* XXXfvdl */ 217 sc->as_dmat = isc->vga_pa.pa_dmat; 218 219 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 220 case PCI_PRODUCT_INTEL_82810_GC: 221 case PCI_PRODUCT_INTEL_82810_DC100_GC: 222 case PCI_PRODUCT_INTEL_82810E_GC: 223 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 224 isc->chiptype = CHIP_I810; 225 break; 226 case PCI_PRODUCT_INTEL_82830MP_IV: 227 case PCI_PRODUCT_INTEL_82845G_IGD: 228 isc->chiptype = CHIP_I830; 229 break; 230 case PCI_PRODUCT_INTEL_82855GM_IGD: 231 case PCI_PRODUCT_INTEL_82865_IGD: 232 isc->chiptype = CHIP_I855; 233 break; 234 case PCI_PRODUCT_INTEL_82915G_IGD: 235 case PCI_PRODUCT_INTEL_82915GM_IGD: 236 case PCI_PRODUCT_INTEL_82945P_IGD: 237 case PCI_PRODUCT_INTEL_82945GM_IGD: 238 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 239 isc->chiptype = CHIP_I915; 240 break; 241 case PCI_PRODUCT_INTEL_82965Q_IGD: 242 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 243 case PCI_PRODUCT_INTEL_82965PM_IGD: 244 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 245 isc->chiptype = CHIP_I965; 246 break; 247 case PCI_PRODUCT_INTEL_82G33_IGD: 248 case PCI_PRODUCT_INTEL_82G33_IGD_1: 249 isc->chiptype = CHIP_G33; 250 break; 251 } 252 253 switch (isc->chiptype) { 254 case CHIP_I915: 255 case CHIP_G33: 256 apbase = AGP_I915_GMADR; 257 break; 258 default: 259 apbase = AGP_I810_GMADR; 260 break; 261 } 262 if (isc->chiptype == CHIP_I965) { 263 error = agp_i965_map_aperture(&isc->vga_pa, sc, AGP_I965_GMADR); 264 } else { 265 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 266 } 267 if (error != 0) { 268 aprint_error(": can't map aperture\n"); 269 free(isc, M_AGP); 270 return error; 271 } 272 273 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { 274 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 275 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 276 NULL, &mmadrsize); 277 if (error != 0) { 278 aprint_error(": can't map mmadr registers\n"); 279 agp_generic_detach(sc); 280 return error; 281 } 282 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 283 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 284 NULL, NULL); 285 if (error != 0) { 286 aprint_error(": can't map gttadr registers\n"); 287 /* XXX we should release mmadr here */ 288 agp_generic_detach(sc); 289 return error; 290 } 291 } else if (isc->chiptype == CHIP_I965) { 292 error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR, 293 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 294 NULL, &mmadrsize); 295 if (error != 0) { 296 aprint_error(": can't map mmadr registers\n"); 297 agp_generic_detach(sc); 298 return error; 299 } 300 } else { 301 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 302 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 303 NULL, &mmadrsize); 304 if (error != 0) { 305 aprint_error(": can't map mmadr registers\n"); 306 agp_generic_detach(sc); 307 return error; 308 } 309 } 310 311 isc->initial_aperture = AGP_GET_APERTURE(sc); 312 313 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 314 if (!gatt) { 315 agp_generic_detach(sc); 316 return ENOMEM; 317 } 318 isc->gatt = gatt; 319 320 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 321 322 pnp_status = pci_generic_power_register(self, 323 isc->vga_pa.pa_pc, isc->vga_pa.pa_tag, NULL, agp_i810_resume); 324 325 if (pnp_status != PNP_STATUS_SUCCESS) 326 aprint_error("%s: couldn't establish power handler\n", 327 device_xname(self)); 328 329 return agp_i810_init(sc); 330 } 331 332 static int agp_i810_init(struct agp_softc *sc) 333 { 334 struct agp_i810_softc *isc; 335 struct agp_gatt *gatt; 336 337 isc = sc->as_chipc; 338 gatt = isc->gatt; 339 340 if (isc->chiptype == CHIP_I810) { 341 void *virtual; 342 int dummyseg; 343 344 /* Some i810s have on-chip memory called dcache */ 345 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 346 isc->dcache_size = 4 * 1024 * 1024; 347 else 348 isc->dcache_size = 0; 349 350 /* According to the specs the gatt on the i810 must be 64k */ 351 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 352 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 353 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 354 free(gatt, M_AGP); 355 agp_generic_detach(sc); 356 return ENOMEM; 357 } 358 gatt->ag_virtual = (uint32_t *)virtual; 359 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 360 memset(gatt->ag_virtual, 0, gatt->ag_size); 361 362 agp_flush_cache(); 363 /* Install the GATT. */ 364 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 365 } else if (isc->chiptype == CHIP_I830) { 366 /* The i830 automatically initializes the 128k gatt on boot. */ 367 pcireg_t reg; 368 u_int32_t pgtblctl; 369 u_int16_t gcc1; 370 371 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 372 gcc1 = (u_int16_t)(reg >> 16); 373 switch (gcc1 & AGP_I830_GCC1_GMS) { 374 case AGP_I830_GCC1_GMS_STOLEN_512: 375 isc->stolen = (512 - 132) * 1024 / 4096; 376 break; 377 case AGP_I830_GCC1_GMS_STOLEN_1024: 378 isc->stolen = (1024 - 132) * 1024 / 4096; 379 break; 380 case AGP_I830_GCC1_GMS_STOLEN_8192: 381 isc->stolen = (8192 - 132) * 1024 / 4096; 382 break; 383 default: 384 isc->stolen = 0; 385 aprint_error( 386 ": unknown memory configuration, disabling\n"); 387 agp_generic_detach(sc); 388 return EINVAL; 389 } 390 391 if (isc->stolen > 0) { 392 aprint_error(": detected %dk stolen memory\n%s", 393 isc->stolen * 4, sc->as_dev.dv_xname); 394 } 395 396 /* GATT address is already in there, make sure it's enabled */ 397 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 398 pgtblctl |= 1; 399 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 400 401 gatt->ag_physical = pgtblctl & ~1; 402 } else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 || 403 isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G33) { 404 pcireg_t reg; 405 u_int32_t pgtblctl, stolen; 406 u_int16_t gcc1; 407 408 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 409 gcc1 = (u_int16_t)(reg >> 16); 410 411 /* Stolen memory is set up at the beginning of the aperture by 412 * the BIOS, consisting of the GATT followed by 4kb for the 413 * BIOS display. 414 */ 415 switch (isc->chiptype) { 416 case CHIP_I855: 417 stolen = 128 + 4; 418 break; 419 case CHIP_I915: 420 stolen = 256 + 4; 421 break; 422 case CHIP_I965: 423 stolen = 512 + 4; 424 break; 425 case CHIP_G33: 426 switch (gcc1 & AGP_G33_PGTBL_SIZE_MASK) { 427 case AGP_G33_PGTBL_SIZE_1M: 428 stolen = 1024 + 4; 429 break; 430 case AGP_G33_PGTBL_SIZE_2M: 431 stolen = 2048 + 4; 432 break; 433 default: 434 aprint_error(": bad gtt size\n"); 435 agp_generic_detach(sc); 436 return EINVAL; 437 } 438 break; 439 default: 440 aprint_error(": bad chiptype\n"); 441 agp_generic_detach(sc); 442 return EINVAL; 443 } 444 445 switch (gcc1 & AGP_I855_GCC1_GMS) { 446 case AGP_I855_GCC1_GMS_STOLEN_1M: 447 isc->stolen = (1024 - stolen) * 1024 / 4096; 448 break; 449 case AGP_I855_GCC1_GMS_STOLEN_4M: 450 isc->stolen = (4096 - stolen) * 1024 / 4096; 451 break; 452 case AGP_I855_GCC1_GMS_STOLEN_8M: 453 isc->stolen = (8192 - stolen) * 1024 / 4096; 454 break; 455 case AGP_I855_GCC1_GMS_STOLEN_16M: 456 isc->stolen = (16384 - stolen) * 1024 / 4096; 457 break; 458 case AGP_I855_GCC1_GMS_STOLEN_32M: 459 isc->stolen = (32768 - stolen) * 1024 / 4096; 460 break; 461 case AGP_I915_GCC1_GMS_STOLEN_48M: 462 isc->stolen = (49152 - stolen) * 1024 / 4096; 463 break; 464 case AGP_I915_GCC1_GMS_STOLEN_64M: 465 isc->stolen = (65536 - stolen) * 1024 / 4096; 466 break; 467 default: 468 isc->stolen = 0; 469 aprint_error( 470 ": unknown memory configuration, disabling\n"); 471 agp_generic_detach(sc); 472 return EINVAL; 473 } 474 if (isc->stolen > 0) { 475 aprint_error(": detected %dk stolen memory\n%s", 476 isc->stolen * 4, sc->as_dev.dv_xname); 477 } 478 479 /* GATT address is already in there, make sure it's enabled */ 480 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 481 pgtblctl |= 1; 482 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 483 484 gatt->ag_physical = pgtblctl & ~1; 485 } 486 487 /* 488 * Make sure the chipset can see everything. 489 */ 490 agp_flush_cache(); 491 492 #if 0 493 /* 494 * another device (drm) may need access to this region 495 * we do not need it anymore 496 */ 497 bus_space_unmap(isc->bst, isc->bsh, mmadrsize); 498 #endif 499 500 return 0; 501 } 502 503 #if 0 504 static int 505 agp_i810_detach(struct agp_softc *sc) 506 { 507 int error; 508 struct agp_i810_softc *isc = sc->as_chipc; 509 510 error = agp_generic_detach(sc); 511 if (error) 512 return error; 513 514 /* Clear the GATT base. */ 515 if (sc->chiptype == CHIP_I810) { 516 WRITE4(AGP_I810_PGTBL_CTL, 0); 517 } else { 518 unsigned int pgtblctl; 519 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 520 pgtblctl &= ~1; 521 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 522 } 523 524 /* Put the aperture back the way it started. */ 525 AGP_SET_APERTURE(sc, isc->initial_aperture); 526 527 if (sc->chiptype == CHIP_I810) { 528 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 529 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 530 } 531 free(sc->gatt, M_AGP); 532 533 return 0; 534 } 535 #endif 536 537 static u_int32_t 538 agp_i810_get_aperture(struct agp_softc *sc) 539 { 540 struct agp_i810_softc *isc = sc->as_chipc; 541 pcireg_t reg; 542 u_int16_t miscc, gcc1, msac; 543 544 switch (isc->chiptype) { 545 case CHIP_I810: 546 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 547 miscc = (u_int16_t)(reg >> 16); 548 if ((miscc & AGP_I810_MISCC_WINSIZE) == 549 AGP_I810_MISCC_WINSIZE_32) 550 return 32 * 1024 * 1024; 551 else 552 return 64 * 1024 * 1024; 553 case CHIP_I830: 554 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 555 gcc1 = (u_int16_t)(reg >> 16); 556 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 557 return 64 * 1024 * 1024; 558 else 559 return 128 * 1024 * 1024; 560 case CHIP_I855: 561 return 128 * 1024 * 1024; 562 case CHIP_I915: 563 case CHIP_G33: 564 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 565 msac = (u_int16_t)(reg >> 16); 566 if (msac & AGP_I915_MSAC_APER_128M) 567 return 128 * 1024 * 1024; 568 else 569 return 256 * 1024 * 1024; 570 case CHIP_I965: 571 return 512 * 1024 * 1024; 572 default: 573 aprint_error(": Unknown chipset\n"); 574 } 575 576 return 0; 577 } 578 579 static int 580 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 581 { 582 struct agp_i810_softc *isc = sc->as_chipc; 583 pcireg_t reg; 584 u_int16_t miscc, gcc1; 585 586 switch (isc->chiptype) { 587 case CHIP_I810: 588 /* 589 * Double check for sanity. 590 */ 591 if (aperture != (32 * 1024 * 1024) && 592 aperture != (64 * 1024 * 1024)) { 593 printf("%s: bad aperture size %d\n", 594 sc->as_dev.dv_xname, aperture); 595 return EINVAL; 596 } 597 598 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 599 miscc = (u_int16_t)(reg >> 16); 600 miscc &= ~AGP_I810_MISCC_WINSIZE; 601 if (aperture == 32 * 1024 * 1024) 602 miscc |= AGP_I810_MISCC_WINSIZE_32; 603 else 604 miscc |= AGP_I810_MISCC_WINSIZE_64; 605 606 reg &= 0x0000ffff; 607 reg |= ((pcireg_t)miscc) << 16; 608 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 609 break; 610 case CHIP_I830: 611 if (aperture != (64 * 1024 * 1024) && 612 aperture != (128 * 1024 * 1024)) { 613 printf("%s: bad aperture size %d\n", 614 sc->as_dev.dv_xname, aperture); 615 return EINVAL; 616 } 617 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 618 gcc1 = (u_int16_t)(reg >> 16); 619 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 620 if (aperture == 64 * 1024 * 1024) 621 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 622 else 623 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 624 625 reg &= 0x0000ffff; 626 reg |= ((pcireg_t)gcc1) << 16; 627 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 628 break; 629 case CHIP_I855: 630 case CHIP_I915: 631 if (aperture != agp_i810_get_aperture(sc)) { 632 printf("%s: bad aperture size %d\n", 633 sc->as_dev.dv_xname, aperture); 634 return EINVAL; 635 } 636 break; 637 case CHIP_I965: 638 if (aperture != 512 * 1024 * 1024) { 639 printf("%s: bad aperture size %d\n", 640 sc->as_dev.dv_xname, aperture); 641 return EINVAL; 642 } 643 break; 644 } 645 646 return 0; 647 } 648 649 static int 650 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 651 { 652 struct agp_i810_softc *isc = sc->as_chipc; 653 654 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 655 #ifdef AGP_DEBUG 656 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 657 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 658 isc->gatt->ag_entries); 659 #endif 660 return EINVAL; 661 } 662 663 if (isc->chiptype != CHIP_I830) { 664 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 665 #ifdef AGP_DEBUG 666 printf("%s: trying to bind into stolen memory", 667 sc->as_dev.dv_xname); 668 #endif 669 return EINVAL; 670 } 671 } 672 673 WRITEGTT(offset, physical | 1); 674 return 0; 675 } 676 677 static int 678 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 679 { 680 struct agp_i810_softc *isc = sc->as_chipc; 681 682 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 683 return EINVAL; 684 685 if (isc->chiptype != CHIP_I810 ) { 686 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 687 #ifdef AGP_DEBUG 688 printf("%s: trying to unbind from stolen memory", 689 sc->as_dev.dv_xname); 690 #endif 691 return EINVAL; 692 } 693 } 694 695 WRITEGTT(offset, 0); 696 return 0; 697 } 698 699 /* 700 * Writing via memory mapped registers already flushes all TLBs. 701 */ 702 static void 703 agp_i810_flush_tlb(struct agp_softc *sc) 704 { 705 } 706 707 static int 708 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 709 { 710 711 return 0; 712 } 713 714 static struct agp_memory * 715 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 716 { 717 struct agp_i810_softc *isc = sc->as_chipc; 718 struct agp_memory *mem; 719 720 #ifdef AGP_DEBUG 721 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 722 #endif 723 724 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 725 return 0; 726 727 if (sc->as_allocated + size > sc->as_maxmem) 728 return 0; 729 730 if (type == 1) { 731 /* 732 * Mapping local DRAM into GATT. 733 */ 734 if (isc->chiptype != CHIP_I810 ) 735 return 0; 736 if (size != isc->dcache_size) 737 return 0; 738 } else if (type == 2) { 739 /* 740 * Bogus mapping for the hardware cursor. 741 */ 742 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 743 return 0; 744 } 745 746 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 747 if (mem == NULL) 748 return NULL; 749 mem->am_id = sc->as_nextid++; 750 mem->am_size = size; 751 mem->am_type = type; 752 753 if (type == 2) { 754 /* 755 * Allocate and wire down the memory now so that we can 756 * get its physical address. 757 */ 758 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 759 M_WAITOK); 760 if (mem->am_dmaseg == NULL) { 761 free(mem, M_AGP); 762 return NULL; 763 } 764 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 765 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 766 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 767 free(mem->am_dmaseg, M_AGP); 768 free(mem, M_AGP); 769 return NULL; 770 } 771 memset(mem->am_virtual, 0, size); 772 } else if (type != 1) { 773 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 774 size, 0, BUS_DMA_NOWAIT, 775 &mem->am_dmamap) != 0) { 776 free(mem, M_AGP); 777 return NULL; 778 } 779 } 780 781 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 782 sc->as_allocated += size; 783 784 return mem; 785 } 786 787 static int 788 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 789 { 790 if (mem->am_is_bound) 791 return EBUSY; 792 793 if (mem->am_type == 2) { 794 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 795 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 796 free(mem->am_dmaseg, M_AGP); 797 } 798 799 sc->as_allocated -= mem->am_size; 800 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 801 free(mem, M_AGP); 802 return 0; 803 } 804 805 static int 806 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 807 off_t offset) 808 { 809 struct agp_i810_softc *isc = sc->as_chipc; 810 u_int32_t regval, i; 811 812 /* 813 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 814 * X server for mysterious reasons which leads to crashes if we write 815 * to the GTT through the MMIO window. 816 * Until the issue is solved, simply restore it. 817 */ 818 819 #if 0 820 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 821 if (regval != (isc->gatt->ag_physical | 1)) { 822 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 823 regval); 824 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 825 isc->gatt->ag_physical | 1); 826 } 827 #endif 828 regval = 0; 829 830 if (mem->am_type == 2) { 831 WRITEGTT(offset, mem->am_physical | 1); 832 mem->am_offset = offset; 833 mem->am_is_bound = 1; 834 return 0; 835 } 836 837 if (mem->am_type != 1) 838 return agp_generic_bind_memory(sc, mem, offset); 839 840 if (isc->chiptype != CHIP_I810) 841 return EINVAL; 842 843 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 844 WRITEGTT(offset, i | 3); 845 mem->am_is_bound = 1; 846 return 0; 847 } 848 849 static int 850 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 851 { 852 struct agp_i810_softc *isc = sc->as_chipc; 853 u_int32_t i; 854 855 if (mem->am_type == 2) { 856 WRITEGTT(mem->am_offset, 0); 857 mem->am_offset = 0; 858 mem->am_is_bound = 0; 859 return 0; 860 } 861 862 if (mem->am_type != 1) 863 return agp_generic_unbind_memory(sc, mem); 864 865 if (isc->chiptype != CHIP_I810) 866 return EINVAL; 867 868 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 869 WRITEGTT(i, 0); 870 mem->am_is_bound = 0; 871 return 0; 872 } 873 874 static void 875 agp_i810_resume(device_t dv) 876 { 877 struct agp_softc *sc = device_private(dv); 878 struct agp_i810_softc *isc = sc->as_chipc; 879 880 isc->pgtblctl = READ4(AGP_I810_PGTBL_CTL); 881 agp_flush_cache(); 882 } 883
Indexes created Tue Oct 07 21:09:53 GMT 2025