agp_i810.c revision 1.41.6.9
1 /* $NetBSD: agp_i810.c,v 1.41.6.9 2007/10/31 23:14:05 joerg Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.41.6.9 2007/10/31 23:14:05 joerg Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <sys/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 #define WRITEGTT(off, v) \ 62 do { \ 63 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { \ 64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 66 (v)); \ 67 } else if (isc->chiptype == CHIP_I965) { \ 68 WRITE4(AGP_I965_GTT + \ 69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 70 (v)); \ 71 } else { \ 72 WRITE4(AGP_I810_GTT + \ 73 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 74 (v)); \ 75 } \ 76 } while (0) 77 78 #define CHIP_I810 0 /* i810/i815 */ 79 #define CHIP_I830 1 /* 830M/845G */ 80 #define CHIP_I855 2 /* 852GM/855GM/865G */ 81 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */ 82 #define CHIP_I965 4 /* 965Q/965PM */ 83 #define CHIP_G33 5 /* G33/Q33/Q35 */ 84 85 struct agp_i810_softc { 86 u_int32_t initial_aperture; /* aperture size at startup */ 87 struct agp_gatt *gatt; 88 int chiptype; /* i810-like or i830 */ 89 u_int32_t dcache_size; /* i810 only */ 90 u_int32_t stolen; /* number of i830/845 gtt entries 91 for stolen memory */ 92 bus_space_tag_t bst; /* register bus_space tag */ 93 bus_space_handle_t bsh; /* register bus_space handle */ 94 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 95 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 96 struct pci_attach_args vga_pa; 97 98 u_int32_t pgtblctl; 99 }; 100 101 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 102 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 103 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 104 static int agp_i810_unbind_page(struct agp_softc *, off_t); 105 static void agp_i810_flush_tlb(struct agp_softc *); 106 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 107 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 108 vsize_t); 109 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 110 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 111 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 112 113 static void agp_i810_resume(device_t); 114 static int agp_i810_init(struct agp_softc *); 115 116 static struct agp_methods agp_i810_methods = { 117 agp_i810_get_aperture, 118 agp_i810_set_aperture, 119 agp_i810_bind_page, 120 agp_i810_unbind_page, 121 agp_i810_flush_tlb, 122 agp_i810_enable, 123 agp_i810_alloc_memory, 124 agp_i810_free_memory, 125 agp_i810_bind_memory, 126 agp_i810_unbind_memory, 127 }; 128 129 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 130 static int 131 agp_i810_vgamatch(struct pci_attach_args *pa) 132 { 133 134 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 135 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 136 return (0); 137 138 switch (PCI_PRODUCT(pa->pa_id)) { 139 case PCI_PRODUCT_INTEL_82810_GC: 140 case PCI_PRODUCT_INTEL_82810_DC100_GC: 141 case PCI_PRODUCT_INTEL_82810E_GC: 142 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 143 case PCI_PRODUCT_INTEL_82830MP_IV: 144 case PCI_PRODUCT_INTEL_82845G_IGD: 145 case PCI_PRODUCT_INTEL_82855GM_IGD: 146 case PCI_PRODUCT_INTEL_82865_IGD: 147 case PCI_PRODUCT_INTEL_82915G_IGD: 148 case PCI_PRODUCT_INTEL_82915GM_IGD: 149 case PCI_PRODUCT_INTEL_82945P_IGD: 150 case PCI_PRODUCT_INTEL_82945GM_IGD: 151 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 152 case PCI_PRODUCT_INTEL_82965Q_IGD: 153 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 154 case PCI_PRODUCT_INTEL_82965PM_IGD: 155 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 156 case PCI_PRODUCT_INTEL_82G33_IGD: 157 case PCI_PRODUCT_INTEL_82G33_IGD_1: 158 case PCI_PRODUCT_INTEL_82965G_IGD: 159 case PCI_PRODUCT_INTEL_82965G_IGD_1: 160 return (1); 161 } 162 163 return (0); 164 } 165 166 static int 167 agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 168 { 169 /* 170 * Find the aperture. Don't map it (yet), this would 171 * eat KVA. 172 */ 173 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 174 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, &sc->as_apsize, 175 &sc->as_apflags) != 0) 176 return ENXIO; 177 178 sc->as_apt = pa->pa_memt; 179 180 return 0; 181 } 182 183 int 184 agp_i810_attach(struct device *parent, struct device *self, void *aux) 185 { 186 struct agp_softc *sc = (void *)self; 187 struct agp_i810_softc *isc; 188 struct agp_gatt *gatt; 189 int error, apbase; 190 bus_size_t mmadrsize; 191 pnp_status_t pnp_status; 192 193 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 194 if (isc == NULL) { 195 aprint_error(": can't allocate chipset-specific softc\n"); 196 return ENOMEM; 197 } 198 sc->as_chipc = isc; 199 sc->as_methods = &agp_i810_methods; 200 201 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 202 #if NAGP_INTEL > 0 203 const struct pci_attach_args *pa = aux; 204 205 switch (PCI_PRODUCT(pa->pa_id)) { 206 case PCI_PRODUCT_INTEL_82840_HB: 207 case PCI_PRODUCT_INTEL_82865_HB: 208 case PCI_PRODUCT_INTEL_82845G_DRAM: 209 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 210 return agp_intel_attach(parent, self, aux); 211 } 212 #endif 213 aprint_error(": can't find internal VGA device config space\n"); 214 free(isc, M_AGP); 215 return ENOENT; 216 } 217 218 /* XXXfvdl */ 219 sc->as_dmat = isc->vga_pa.pa_dmat; 220 221 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 222 case PCI_PRODUCT_INTEL_82810_GC: 223 case PCI_PRODUCT_INTEL_82810_DC100_GC: 224 case PCI_PRODUCT_INTEL_82810E_GC: 225 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 226 isc->chiptype = CHIP_I810; 227 break; 228 case PCI_PRODUCT_INTEL_82830MP_IV: 229 case PCI_PRODUCT_INTEL_82845G_IGD: 230 isc->chiptype = CHIP_I830; 231 break; 232 case PCI_PRODUCT_INTEL_82855GM_IGD: 233 case PCI_PRODUCT_INTEL_82865_IGD: 234 isc->chiptype = CHIP_I855; 235 break; 236 case PCI_PRODUCT_INTEL_82915G_IGD: 237 case PCI_PRODUCT_INTEL_82915GM_IGD: 238 case PCI_PRODUCT_INTEL_82945P_IGD: 239 case PCI_PRODUCT_INTEL_82945GM_IGD: 240 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 241 isc->chiptype = CHIP_I915; 242 break; 243 case PCI_PRODUCT_INTEL_82965Q_IGD: 244 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 245 case PCI_PRODUCT_INTEL_82965PM_IGD: 246 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 247 case PCI_PRODUCT_INTEL_82965G_IGD: 248 case PCI_PRODUCT_INTEL_82965G_IGD_1: 249 isc->chiptype = CHIP_I965; 250 break; 251 case PCI_PRODUCT_INTEL_82G33_IGD: 252 case PCI_PRODUCT_INTEL_82G33_IGD_1: 253 isc->chiptype = CHIP_G33; 254 break; 255 } 256 257 switch (isc->chiptype) { 258 case CHIP_I915: 259 case CHIP_G33: 260 apbase = AGP_I915_GMADR; 261 break; 262 default: 263 apbase = AGP_I810_GMADR; 264 break; 265 } 266 if (isc->chiptype == CHIP_I965) { 267 error = agp_i965_map_aperture(&isc->vga_pa, sc, AGP_I965_GMADR); 268 } else { 269 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 270 } 271 if (error != 0) { 272 aprint_error(": can't map aperture\n"); 273 free(isc, M_AGP); 274 return error; 275 } 276 277 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { 278 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 279 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 280 NULL, &mmadrsize); 281 if (error != 0) { 282 aprint_error(": can't map mmadr registers\n"); 283 agp_generic_detach(sc); 284 return error; 285 } 286 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 287 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 288 NULL, NULL); 289 if (error != 0) { 290 aprint_error(": can't map gttadr registers\n"); 291 /* XXX we should release mmadr here */ 292 agp_generic_detach(sc); 293 return error; 294 } 295 } else if (isc->chiptype == CHIP_I965) { 296 error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR, 297 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 298 NULL, &mmadrsize); 299 if (error != 0) { 300 aprint_error(": can't map mmadr registers\n"); 301 agp_generic_detach(sc); 302 return error; 303 } 304 } else { 305 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 306 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 307 NULL, &mmadrsize); 308 if (error != 0) { 309 aprint_error(": can't map mmadr registers\n"); 310 agp_generic_detach(sc); 311 return error; 312 } 313 } 314 315 isc->initial_aperture = AGP_GET_APERTURE(sc); 316 317 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 318 if (!gatt) { 319 agp_generic_detach(sc); 320 return ENOMEM; 321 } 322 isc->gatt = gatt; 323 324 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 325 326 pnp_status = pci_generic_power_register(self, 327 isc->vga_pa.pa_pc, isc->vga_pa.pa_tag, NULL, agp_i810_resume); 328 329 if (pnp_status != PNP_STATUS_SUCCESS) 330 aprint_error("%s: couldn't establish power handler\n", 331 device_xname(self)); 332 333 return agp_i810_init(sc); 334 } 335 336 static int agp_i810_init(struct agp_softc *sc) 337 { 338 struct agp_i810_softc *isc; 339 struct agp_gatt *gatt; 340 341 isc = sc->as_chipc; 342 gatt = isc->gatt; 343 344 if (isc->chiptype == CHIP_I810) { 345 void *virtual; 346 int dummyseg; 347 348 /* Some i810s have on-chip memory called dcache */ 349 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 350 isc->dcache_size = 4 * 1024 * 1024; 351 else 352 isc->dcache_size = 0; 353 354 /* According to the specs the gatt on the i810 must be 64k */ 355 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 356 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 357 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 358 free(gatt, M_AGP); 359 agp_generic_detach(sc); 360 return ENOMEM; 361 } 362 gatt->ag_virtual = (uint32_t *)virtual; 363 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 364 memset(gatt->ag_virtual, 0, gatt->ag_size); 365 366 agp_flush_cache(); 367 /* Install the GATT. */ 368 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 369 } else if (isc->chiptype == CHIP_I830) { 370 /* The i830 automatically initializes the 128k gatt on boot. */ 371 pcireg_t reg; 372 u_int32_t pgtblctl; 373 u_int16_t gcc1; 374 375 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 376 gcc1 = (u_int16_t)(reg >> 16); 377 switch (gcc1 & AGP_I830_GCC1_GMS) { 378 case AGP_I830_GCC1_GMS_STOLEN_512: 379 isc->stolen = (512 - 132) * 1024 / 4096; 380 break; 381 case AGP_I830_GCC1_GMS_STOLEN_1024: 382 isc->stolen = (1024 - 132) * 1024 / 4096; 383 break; 384 case AGP_I830_GCC1_GMS_STOLEN_8192: 385 isc->stolen = (8192 - 132) * 1024 / 4096; 386 break; 387 default: 388 isc->stolen = 0; 389 aprint_error( 390 ": unknown memory configuration, disabling\n"); 391 agp_generic_detach(sc); 392 return EINVAL; 393 } 394 395 if (isc->stolen > 0) { 396 aprint_error(": detected %dk stolen memory\n%s", 397 isc->stolen * 4, sc->as_dev.dv_xname); 398 } 399 400 /* GATT address is already in there, make sure it's enabled */ 401 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 402 pgtblctl |= 1; 403 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 404 405 gatt->ag_physical = pgtblctl & ~1; 406 } else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 || 407 isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G33) { 408 pcireg_t reg; 409 u_int32_t pgtblctl, stolen; 410 u_int16_t gcc1; 411 412 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 413 gcc1 = (u_int16_t)(reg >> 16); 414 415 /* Stolen memory is set up at the beginning of the aperture by 416 * the BIOS, consisting of the GATT followed by 4kb for the 417 * BIOS display. 418 */ 419 switch (isc->chiptype) { 420 case CHIP_I855: 421 stolen = 128 + 4; 422 break; 423 case CHIP_I915: 424 stolen = 256 + 4; 425 break; 426 case CHIP_I965: 427 stolen = 512 + 4; 428 break; 429 case CHIP_G33: 430 switch (gcc1 & AGP_G33_PGTBL_SIZE_MASK) { 431 case AGP_G33_PGTBL_SIZE_1M: 432 stolen = 1024 + 4; 433 break; 434 case AGP_G33_PGTBL_SIZE_2M: 435 stolen = 2048 + 4; 436 break; 437 default: 438 aprint_error(": bad gtt size\n"); 439 agp_generic_detach(sc); 440 return EINVAL; 441 } 442 break; 443 default: 444 aprint_error(": bad chiptype\n"); 445 agp_generic_detach(sc); 446 return EINVAL; 447 } 448 449 switch (gcc1 & AGP_I855_GCC1_GMS) { 450 case AGP_I855_GCC1_GMS_STOLEN_1M: 451 isc->stolen = (1024 - stolen) * 1024 / 4096; 452 break; 453 case AGP_I855_GCC1_GMS_STOLEN_4M: 454 isc->stolen = (4096 - stolen) * 1024 / 4096; 455 break; 456 case AGP_I855_GCC1_GMS_STOLEN_8M: 457 isc->stolen = (8192 - stolen) * 1024 / 4096; 458 break; 459 case AGP_I855_GCC1_GMS_STOLEN_16M: 460 isc->stolen = (16384 - stolen) * 1024 / 4096; 461 break; 462 case AGP_I855_GCC1_GMS_STOLEN_32M: 463 isc->stolen = (32768 - stolen) * 1024 / 4096; 464 break; 465 case AGP_I915_GCC1_GMS_STOLEN_48M: 466 isc->stolen = (49152 - stolen) * 1024 / 4096; 467 break; 468 case AGP_I915_GCC1_GMS_STOLEN_64M: 469 isc->stolen = (65536 - stolen) * 1024 / 4096; 470 break; 471 default: 472 isc->stolen = 0; 473 aprint_error( 474 ": unknown memory configuration, disabling\n"); 475 agp_generic_detach(sc); 476 return EINVAL; 477 } 478 if (isc->stolen > 0) { 479 aprint_error(": detected %dk stolen memory\n%s", 480 isc->stolen * 4, sc->as_dev.dv_xname); 481 } 482 483 /* GATT address is already in there, make sure it's enabled */ 484 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 485 pgtblctl |= 1; 486 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 487 488 gatt->ag_physical = pgtblctl & ~1; 489 } 490 491 /* 492 * Make sure the chipset can see everything. 493 */ 494 agp_flush_cache(); 495 496 #if 0 497 /* 498 * another device (drm) may need access to this region 499 * we do not need it anymore 500 */ 501 bus_space_unmap(isc->bst, isc->bsh, mmadrsize); 502 #endif 503 504 return 0; 505 } 506 507 #if 0 508 static int 509 agp_i810_detach(struct agp_softc *sc) 510 { 511 int error; 512 struct agp_i810_softc *isc = sc->as_chipc; 513 514 error = agp_generic_detach(sc); 515 if (error) 516 return error; 517 518 /* Clear the GATT base. */ 519 if (sc->chiptype == CHIP_I810) { 520 WRITE4(AGP_I810_PGTBL_CTL, 0); 521 } else { 522 unsigned int pgtblctl; 523 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 524 pgtblctl &= ~1; 525 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 526 } 527 528 /* Put the aperture back the way it started. */ 529 AGP_SET_APERTURE(sc, isc->initial_aperture); 530 531 if (sc->chiptype == CHIP_I810) { 532 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 533 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 534 } 535 free(sc->gatt, M_AGP); 536 537 return 0; 538 } 539 #endif 540 541 static u_int32_t 542 agp_i810_get_aperture(struct agp_softc *sc) 543 { 544 struct agp_i810_softc *isc = sc->as_chipc; 545 pcireg_t reg; 546 u_int16_t miscc, gcc1, msac; 547 548 switch (isc->chiptype) { 549 case CHIP_I810: 550 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 551 miscc = (u_int16_t)(reg >> 16); 552 if ((miscc & AGP_I810_MISCC_WINSIZE) == 553 AGP_I810_MISCC_WINSIZE_32) 554 return 32 * 1024 * 1024; 555 else 556 return 64 * 1024 * 1024; 557 case CHIP_I830: 558 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 559 gcc1 = (u_int16_t)(reg >> 16); 560 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 561 return 64 * 1024 * 1024; 562 else 563 return 128 * 1024 * 1024; 564 case CHIP_I855: 565 return 128 * 1024 * 1024; 566 case CHIP_I915: 567 case CHIP_G33: 568 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 569 msac = (u_int16_t)(reg >> 16); 570 if (msac & AGP_I915_MSAC_APER_128M) 571 return 128 * 1024 * 1024; 572 else 573 return 256 * 1024 * 1024; 574 case CHIP_I965: 575 return 512 * 1024 * 1024; 576 default: 577 aprint_error(": Unknown chipset\n"); 578 } 579 580 return 0; 581 } 582 583 static int 584 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 585 { 586 struct agp_i810_softc *isc = sc->as_chipc; 587 pcireg_t reg; 588 u_int16_t miscc, gcc1; 589 590 switch (isc->chiptype) { 591 case CHIP_I810: 592 /* 593 * Double check for sanity. 594 */ 595 if (aperture != (32 * 1024 * 1024) && 596 aperture != (64 * 1024 * 1024)) { 597 printf("%s: bad aperture size %d\n", 598 sc->as_dev.dv_xname, aperture); 599 return EINVAL; 600 } 601 602 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 603 miscc = (u_int16_t)(reg >> 16); 604 miscc &= ~AGP_I810_MISCC_WINSIZE; 605 if (aperture == 32 * 1024 * 1024) 606 miscc |= AGP_I810_MISCC_WINSIZE_32; 607 else 608 miscc |= AGP_I810_MISCC_WINSIZE_64; 609 610 reg &= 0x0000ffff; 611 reg |= ((pcireg_t)miscc) << 16; 612 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 613 break; 614 case CHIP_I830: 615 if (aperture != (64 * 1024 * 1024) && 616 aperture != (128 * 1024 * 1024)) { 617 printf("%s: bad aperture size %d\n", 618 sc->as_dev.dv_xname, aperture); 619 return EINVAL; 620 } 621 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 622 gcc1 = (u_int16_t)(reg >> 16); 623 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 624 if (aperture == 64 * 1024 * 1024) 625 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 626 else 627 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 628 629 reg &= 0x0000ffff; 630 reg |= ((pcireg_t)gcc1) << 16; 631 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 632 break; 633 case CHIP_I855: 634 case CHIP_I915: 635 if (aperture != agp_i810_get_aperture(sc)) { 636 printf("%s: bad aperture size %d\n", 637 sc->as_dev.dv_xname, aperture); 638 return EINVAL; 639 } 640 break; 641 case CHIP_I965: 642 if (aperture != 512 * 1024 * 1024) { 643 printf("%s: bad aperture size %d\n", 644 sc->as_dev.dv_xname, aperture); 645 return EINVAL; 646 } 647 break; 648 } 649 650 return 0; 651 } 652 653 static int 654 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 655 { 656 struct agp_i810_softc *isc = sc->as_chipc; 657 658 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 659 #ifdef AGP_DEBUG 660 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 661 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 662 isc->gatt->ag_entries); 663 #endif 664 return EINVAL; 665 } 666 667 if (isc->chiptype != CHIP_I830) { 668 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 669 #ifdef AGP_DEBUG 670 printf("%s: trying to bind into stolen memory", 671 sc->as_dev.dv_xname); 672 #endif 673 return EINVAL; 674 } 675 } 676 677 WRITEGTT(offset, physical | 1); 678 return 0; 679 } 680 681 static int 682 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 683 { 684 struct agp_i810_softc *isc = sc->as_chipc; 685 686 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 687 return EINVAL; 688 689 if (isc->chiptype != CHIP_I810 ) { 690 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 691 #ifdef AGP_DEBUG 692 printf("%s: trying to unbind from stolen memory", 693 sc->as_dev.dv_xname); 694 #endif 695 return EINVAL; 696 } 697 } 698 699 WRITEGTT(offset, 0); 700 return 0; 701 } 702 703 /* 704 * Writing via memory mapped registers already flushes all TLBs. 705 */ 706 static void 707 agp_i810_flush_tlb(struct agp_softc *sc) 708 { 709 } 710 711 static int 712 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 713 { 714 715 return 0; 716 } 717 718 static struct agp_memory * 719 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 720 { 721 struct agp_i810_softc *isc = sc->as_chipc; 722 struct agp_memory *mem; 723 724 #ifdef AGP_DEBUG 725 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 726 #endif 727 728 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 729 return 0; 730 731 if (sc->as_allocated + size > sc->as_maxmem) 732 return 0; 733 734 if (type == 1) { 735 /* 736 * Mapping local DRAM into GATT. 737 */ 738 if (isc->chiptype != CHIP_I810 ) 739 return 0; 740 if (size != isc->dcache_size) 741 return 0; 742 } else if (type == 2) { 743 /* 744 * Bogus mapping for the hardware cursor. 745 */ 746 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 747 return 0; 748 } 749 750 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 751 if (mem == NULL) 752 return NULL; 753 mem->am_id = sc->as_nextid++; 754 mem->am_size = size; 755 mem->am_type = type; 756 757 if (type == 2) { 758 /* 759 * Allocate and wire down the memory now so that we can 760 * get its physical address. 761 */ 762 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 763 M_WAITOK); 764 if (mem->am_dmaseg == NULL) { 765 free(mem, M_AGP); 766 return NULL; 767 } 768 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 769 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 770 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 771 free(mem->am_dmaseg, M_AGP); 772 free(mem, M_AGP); 773 return NULL; 774 } 775 memset(mem->am_virtual, 0, size); 776 } else if (type != 1) { 777 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 778 size, 0, BUS_DMA_NOWAIT, 779 &mem->am_dmamap) != 0) { 780 free(mem, M_AGP); 781 return NULL; 782 } 783 } 784 785 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 786 sc->as_allocated += size; 787 788 return mem; 789 } 790 791 static int 792 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 793 { 794 if (mem->am_is_bound) 795 return EBUSY; 796 797 if (mem->am_type == 2) { 798 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 799 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 800 free(mem->am_dmaseg, M_AGP); 801 } 802 803 sc->as_allocated -= mem->am_size; 804 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 805 free(mem, M_AGP); 806 return 0; 807 } 808 809 static int 810 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 811 off_t offset) 812 { 813 struct agp_i810_softc *isc = sc->as_chipc; 814 u_int32_t regval, i; 815 816 /* 817 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 818 * X server for mysterious reasons which leads to crashes if we write 819 * to the GTT through the MMIO window. 820 * Until the issue is solved, simply restore it. 821 */ 822 823 #if 0 824 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 825 if (regval != (isc->gatt->ag_physical | 1)) { 826 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 827 regval); 828 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 829 isc->gatt->ag_physical | 1); 830 } 831 #endif 832 regval = 0; 833 834 if (mem->am_type == 2) { 835 WRITEGTT(offset, mem->am_physical | 1); 836 mem->am_offset = offset; 837 mem->am_is_bound = 1; 838 return 0; 839 } 840 841 if (mem->am_type != 1) 842 return agp_generic_bind_memory(sc, mem, offset); 843 844 if (isc->chiptype != CHIP_I810) 845 return EINVAL; 846 847 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 848 WRITEGTT(offset, i | 3); 849 mem->am_is_bound = 1; 850 return 0; 851 } 852 853 static int 854 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 855 { 856 struct agp_i810_softc *isc = sc->as_chipc; 857 u_int32_t i; 858 859 if (mem->am_type == 2) { 860 WRITEGTT(mem->am_offset, 0); 861 mem->am_offset = 0; 862 mem->am_is_bound = 0; 863 return 0; 864 } 865 866 if (mem->am_type != 1) 867 return agp_generic_unbind_memory(sc, mem); 868 869 if (isc->chiptype != CHIP_I810) 870 return EINVAL; 871 872 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 873 WRITEGTT(i, 0); 874 mem->am_is_bound = 0; 875 return 0; 876 } 877 878 static void 879 agp_i810_resume(device_t dv) 880 { 881 struct agp_softc *sc = device_private(dv); 882 struct agp_i810_softc *isc = sc->as_chipc; 883 884 isc->pgtblctl = READ4(AGP_I810_PGTBL_CTL); 885 agp_flush_cache(); 886 } 887
Indexes created Tue Oct 07 21:09:53 GMT 2025