agp_i810.c revision 1.43
1 /* $NetBSD: agp_i810.c,v 1.43 2007/10/19 12:00:39 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.43 2007/10/19 12:00:39 ad Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <sys/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 #define WRITEGTT(off, v) \ 62 do { \ 63 if (isc->chiptype == CHIP_I915) { \ 64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 66 (v)); \ 67 } else if (isc->chiptype == CHIP_I965) { \ 68 WRITE4(AGP_I965_GTT + \ 69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 70 (v)); \ 71 } else { \ 72 WRITE4(AGP_I810_GTT + \ 73 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 74 (v)); \ 75 } \ 76 } while (0) 77 78 #define CHIP_I810 0 /* i810/i815 */ 79 #define CHIP_I830 1 /* 830M/845G */ 80 #define CHIP_I855 2 /* 852GM/855GM/865G */ 81 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */ 82 #define CHIP_I965 4 /* 965Q */ 83 84 struct agp_i810_softc { 85 u_int32_t initial_aperture; /* aperture size at startup */ 86 struct agp_gatt *gatt; 87 int chiptype; /* i810-like or i830 */ 88 u_int32_t dcache_size; /* i810 only */ 89 u_int32_t stolen; /* number of i830/845 gtt entries 90 for stolen memory */ 91 bus_space_tag_t bst; /* register bus_space tag */ 92 bus_space_handle_t bsh; /* register bus_space handle */ 93 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 94 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 95 struct pci_attach_args vga_pa; 96 97 void *sc_powerhook; 98 struct pci_conf_state sc_pciconf; 99 }; 100 101 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 102 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 103 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 104 static int agp_i810_unbind_page(struct agp_softc *, off_t); 105 static void agp_i810_flush_tlb(struct agp_softc *); 106 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 107 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 108 vsize_t); 109 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 110 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 111 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 112 static void agp_i810_powerhook(int, void *); 113 114 static struct agp_methods agp_i810_methods = { 115 agp_i810_get_aperture, 116 agp_i810_set_aperture, 117 agp_i810_bind_page, 118 agp_i810_unbind_page, 119 agp_i810_flush_tlb, 120 agp_i810_enable, 121 agp_i810_alloc_memory, 122 agp_i810_free_memory, 123 agp_i810_bind_memory, 124 agp_i810_unbind_memory, 125 }; 126 127 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 128 static int 129 agp_i810_vgamatch(struct pci_attach_args *pa) 130 { 131 132 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 133 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 134 return (0); 135 136 switch (PCI_PRODUCT(pa->pa_id)) { 137 case PCI_PRODUCT_INTEL_82810_GC: 138 case PCI_PRODUCT_INTEL_82810_DC100_GC: 139 case PCI_PRODUCT_INTEL_82810E_GC: 140 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 141 case PCI_PRODUCT_INTEL_82830MP_IV: 142 case PCI_PRODUCT_INTEL_82845G_IGD: 143 case PCI_PRODUCT_INTEL_82855GM_IGD: 144 case PCI_PRODUCT_INTEL_82865_IGD: 145 case PCI_PRODUCT_INTEL_82915G_IGD: 146 case PCI_PRODUCT_INTEL_82915GM_IGD: 147 case PCI_PRODUCT_INTEL_82945P_IGD: 148 case PCI_PRODUCT_INTEL_82945GM_IGD: 149 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 150 case PCI_PRODUCT_INTEL_82965Q_IGD: 151 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 152 return (1); 153 } 154 155 return (0); 156 } 157 158 static int 159 agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 160 { 161 /* 162 * Find the aperture. Don't map it (yet), this would 163 * eat KVA. 164 */ 165 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 166 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, &sc->as_apsize, 167 &sc->as_apflags) != 0) 168 return ENXIO; 169 170 sc->as_apt = pa->pa_memt; 171 172 return 0; 173 } 174 175 int 176 agp_i810_attach(struct device *parent, struct device *self, void *aux) 177 { 178 struct agp_softc *sc = (void *)self; 179 struct agp_i810_softc *isc; 180 struct agp_gatt *gatt; 181 int error, apbase; 182 bus_size_t mmadrsize; 183 184 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 185 if (isc == NULL) { 186 aprint_error(": can't allocate chipset-specific softc\n"); 187 return ENOMEM; 188 } 189 sc->as_chipc = isc; 190 sc->as_methods = &agp_i810_methods; 191 192 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 193 #if NAGP_INTEL > 0 194 const struct pci_attach_args *pa = aux; 195 196 switch (PCI_PRODUCT(pa->pa_id)) { 197 case PCI_PRODUCT_INTEL_82840_HB: 198 case PCI_PRODUCT_INTEL_82865_HB: 199 case PCI_PRODUCT_INTEL_82845G_DRAM: 200 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 201 return agp_intel_attach(parent, self, aux); 202 } 203 #endif 204 aprint_error(": can't find internal VGA device config space\n"); 205 free(isc, M_AGP); 206 return ENOENT; 207 } 208 209 /* XXXfvdl */ 210 sc->as_dmat = isc->vga_pa.pa_dmat; 211 212 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 213 case PCI_PRODUCT_INTEL_82810_GC: 214 case PCI_PRODUCT_INTEL_82810_DC100_GC: 215 case PCI_PRODUCT_INTEL_82810E_GC: 216 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 217 isc->chiptype = CHIP_I810; 218 break; 219 case PCI_PRODUCT_INTEL_82830MP_IV: 220 case PCI_PRODUCT_INTEL_82845G_IGD: 221 isc->chiptype = CHIP_I830; 222 break; 223 case PCI_PRODUCT_INTEL_82855GM_IGD: 224 case PCI_PRODUCT_INTEL_82865_IGD: 225 isc->chiptype = CHIP_I855; 226 break; 227 case PCI_PRODUCT_INTEL_82915G_IGD: 228 case PCI_PRODUCT_INTEL_82915GM_IGD: 229 case PCI_PRODUCT_INTEL_82945P_IGD: 230 case PCI_PRODUCT_INTEL_82945GM_IGD: 231 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 232 isc->chiptype = CHIP_I915; 233 break; 234 case PCI_PRODUCT_INTEL_82965Q_IGD: 235 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 236 isc->chiptype = CHIP_I965; 237 break; 238 } 239 240 apbase = isc->chiptype == CHIP_I915 ? AGP_I915_GMADR : AGP_I810_GMADR; 241 if (isc->chiptype == CHIP_I965) { 242 error = agp_i965_map_aperture(&isc->vga_pa, sc, AGP_I965_GMADR); 243 } else { 244 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 245 } 246 if (error != 0) { 247 aprint_error(": can't map aperture\n"); 248 free(isc, M_AGP); 249 return error; 250 } 251 252 if (isc->chiptype == CHIP_I915) { 253 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 254 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 255 NULL, &mmadrsize); 256 if (error != 0) { 257 aprint_error(": can't map mmadr registers\n"); 258 agp_generic_detach(sc); 259 return error; 260 } 261 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 262 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 263 NULL, NULL); 264 if (error != 0) { 265 aprint_error(": can't map gttadr registers\n"); 266 /* XXX we should release mmadr here */ 267 agp_generic_detach(sc); 268 return error; 269 } 270 } else if (isc->chiptype == CHIP_I965) { 271 error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR, 272 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 273 NULL, &mmadrsize); 274 if (error != 0) { 275 aprint_error(": can't map mmadr registers\n"); 276 agp_generic_detach(sc); 277 return error; 278 } 279 } else { 280 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 281 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 282 NULL, &mmadrsize); 283 if (error != 0) { 284 aprint_error(": can't map mmadr registers\n"); 285 agp_generic_detach(sc); 286 return error; 287 } 288 } 289 290 isc->initial_aperture = AGP_GET_APERTURE(sc); 291 292 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 293 if (!gatt) { 294 agp_generic_detach(sc); 295 return ENOMEM; 296 } 297 isc->gatt = gatt; 298 299 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 300 301 if (isc->chiptype == CHIP_I810) { 302 void *virtual; 303 int dummyseg; 304 305 /* Some i810s have on-chip memory called dcache */ 306 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 307 isc->dcache_size = 4 * 1024 * 1024; 308 else 309 isc->dcache_size = 0; 310 311 /* According to the specs the gatt on the i810 must be 64k */ 312 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 313 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 314 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 315 free(gatt, M_AGP); 316 agp_generic_detach(sc); 317 return ENOMEM; 318 } 319 gatt->ag_virtual = (uint32_t *)virtual; 320 321 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 322 memset(gatt->ag_virtual, 0, gatt->ag_size); 323 324 agp_flush_cache(); 325 /* Install the GATT. */ 326 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 327 } else if (isc->chiptype == CHIP_I830) { 328 /* The i830 automatically initializes the 128k gatt on boot. */ 329 pcireg_t reg; 330 u_int32_t pgtblctl; 331 u_int16_t gcc1; 332 333 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 334 gcc1 = (u_int16_t)(reg >> 16); 335 switch (gcc1 & AGP_I830_GCC1_GMS) { 336 case AGP_I830_GCC1_GMS_STOLEN_512: 337 isc->stolen = (512 - 132) * 1024 / 4096; 338 break; 339 case AGP_I830_GCC1_GMS_STOLEN_1024: 340 isc->stolen = (1024 - 132) * 1024 / 4096; 341 break; 342 case AGP_I830_GCC1_GMS_STOLEN_8192: 343 isc->stolen = (8192 - 132) * 1024 / 4096; 344 break; 345 default: 346 isc->stolen = 0; 347 aprint_error( 348 ": unknown memory configuration, disabling\n"); 349 agp_generic_detach(sc); 350 return EINVAL; 351 } 352 if (isc->stolen > 0) { 353 aprint_error(": detected %dk stolen memory\n%s", 354 isc->stolen * 4, sc->as_dev.dv_xname); 355 } 356 357 /* GATT address is already in there, make sure it's enabled */ 358 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 359 pgtblctl |= 1; 360 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 361 362 gatt->ag_physical = pgtblctl & ~1; 363 } else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 || 364 isc->chiptype == CHIP_I965) { 365 pcireg_t reg; 366 u_int32_t pgtblctl, stolen; 367 u_int16_t gcc1; 368 369 /* Stolen memory is set up at the beginning of the aperture by 370 * the BIOS, consisting of the GATT followed by 4kb for the 371 * BIOS display. 372 */ 373 switch (isc->chiptype) { 374 case CHIP_I855: 375 stolen = 128 + 4; 376 break; 377 case CHIP_I915: 378 stolen = 256 + 4; 379 break; 380 case CHIP_I965: 381 stolen = 512 + 4; 382 break; 383 default: 384 aprint_error(": bad chiptype\n"); 385 agp_generic_detach(sc); 386 return EINVAL; 387 } 388 389 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 390 gcc1 = (u_int16_t)(reg >> 16); 391 switch (gcc1 & AGP_I855_GCC1_GMS) { 392 case AGP_I855_GCC1_GMS_STOLEN_1M: 393 isc->stolen = (1024 - stolen) * 1024 / 4096; 394 break; 395 case AGP_I855_GCC1_GMS_STOLEN_4M: 396 isc->stolen = (4096 - stolen) * 1024 / 4096; 397 break; 398 case AGP_I855_GCC1_GMS_STOLEN_8M: 399 isc->stolen = (8192 - stolen) * 1024 / 4096; 400 break; 401 case AGP_I855_GCC1_GMS_STOLEN_16M: 402 isc->stolen = (16384 - stolen) * 1024 / 4096; 403 break; 404 case AGP_I855_GCC1_GMS_STOLEN_32M: 405 isc->stolen = (32768 - stolen) * 1024 / 4096; 406 break; 407 case AGP_I915_GCC1_GMS_STOLEN_48M: 408 isc->stolen = (49152 - stolen) * 1024 / 4096; 409 break; 410 case AGP_I915_GCC1_GMS_STOLEN_64M: 411 isc->stolen = (65536 - stolen) * 1024 / 4096; 412 break; 413 default: 414 isc->stolen = 0; 415 aprint_error( 416 ": unknown memory configuration, disabling\n"); 417 agp_generic_detach(sc); 418 return EINVAL; 419 } 420 if (isc->stolen > 0) { 421 aprint_error(": detected %dk stolen memory\n%s", 422 isc->stolen * 4, sc->as_dev.dv_xname); 423 } 424 425 /* GATT address is already in there, make sure it's enabled */ 426 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 427 pgtblctl |= 1; 428 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 429 430 gatt->ag_physical = pgtblctl & ~1; 431 } 432 433 /* 434 * Make sure the chipset can see everything. 435 */ 436 agp_flush_cache(); 437 438 isc->sc_powerhook = powerhook_establish(sc->as_dev.dv_xname, 439 agp_i810_powerhook, sc); 440 if (isc->sc_powerhook == NULL) 441 printf("%s: WARNING: unable to establish PCI power hook\n", 442 sc->as_dev.dv_xname); 443 444 #if 0 445 /* 446 * another device (drm) may need access to this region 447 * we do not need it anymore 448 */ 449 bus_space_unmap(isc->bst, isc->bsh, mmadrsize); 450 #endif 451 452 return 0; 453 } 454 455 #if 0 456 static int 457 agp_i810_detach(struct agp_softc *sc) 458 { 459 int error; 460 struct agp_i810_softc *isc = sc->as_chipc; 461 462 error = agp_generic_detach(sc); 463 if (error) 464 return error; 465 466 /* Clear the GATT base. */ 467 if (sc->chiptype == CHIP_I810) { 468 WRITE4(AGP_I810_PGTBL_CTL, 0); 469 } else { 470 unsigned int pgtblctl; 471 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 472 pgtblctl &= ~1; 473 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 474 } 475 476 /* Put the aperture back the way it started. */ 477 AGP_SET_APERTURE(sc, isc->initial_aperture); 478 479 if (sc->chiptype == CHIP_I810) { 480 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 481 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 482 } 483 free(sc->gatt, M_AGP); 484 485 return 0; 486 } 487 #endif 488 489 static u_int32_t 490 agp_i810_get_aperture(struct agp_softc *sc) 491 { 492 struct agp_i810_softc *isc = sc->as_chipc; 493 pcireg_t reg; 494 u_int16_t miscc, gcc1, msac; 495 496 switch (isc->chiptype) { 497 case CHIP_I810: 498 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 499 miscc = (u_int16_t)(reg >> 16); 500 if ((miscc & AGP_I810_MISCC_WINSIZE) == 501 AGP_I810_MISCC_WINSIZE_32) 502 return 32 * 1024 * 1024; 503 else 504 return 64 * 1024 * 1024; 505 case CHIP_I830: 506 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 507 gcc1 = (u_int16_t)(reg >> 16); 508 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 509 return 64 * 1024 * 1024; 510 else 511 return 128 * 1024 * 1024; 512 case CHIP_I855: 513 return 128 * 1024 * 1024; 514 case CHIP_I915: 515 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 516 msac = (u_int16_t)(reg >> 16); 517 if (msac & AGP_I915_MSAC_APER_128M) 518 return 128 * 1024 * 1024; 519 else 520 return 256 * 1024 * 1024; 521 case CHIP_I965: 522 return 512 * 1024 * 1024; 523 default: 524 aprint_error(": Unknown chipset\n"); 525 } 526 527 return 0; 528 } 529 530 static int 531 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 532 { 533 struct agp_i810_softc *isc = sc->as_chipc; 534 pcireg_t reg; 535 u_int16_t miscc, gcc1; 536 537 switch (isc->chiptype) { 538 case CHIP_I810: 539 /* 540 * Double check for sanity. 541 */ 542 if (aperture != (32 * 1024 * 1024) && 543 aperture != (64 * 1024 * 1024)) { 544 printf("%s: bad aperture size %d\n", 545 sc->as_dev.dv_xname, aperture); 546 return EINVAL; 547 } 548 549 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 550 miscc = (u_int16_t)(reg >> 16); 551 miscc &= ~AGP_I810_MISCC_WINSIZE; 552 if (aperture == 32 * 1024 * 1024) 553 miscc |= AGP_I810_MISCC_WINSIZE_32; 554 else 555 miscc |= AGP_I810_MISCC_WINSIZE_64; 556 557 reg &= 0x0000ffff; 558 reg |= ((pcireg_t)miscc) << 16; 559 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 560 break; 561 case CHIP_I830: 562 if (aperture != (64 * 1024 * 1024) && 563 aperture != (128 * 1024 * 1024)) { 564 printf("%s: bad aperture size %d\n", 565 sc->as_dev.dv_xname, aperture); 566 return EINVAL; 567 } 568 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 569 gcc1 = (u_int16_t)(reg >> 16); 570 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 571 if (aperture == 64 * 1024 * 1024) 572 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 573 else 574 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 575 576 reg &= 0x0000ffff; 577 reg |= ((pcireg_t)gcc1) << 16; 578 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 579 break; 580 case CHIP_I855: 581 case CHIP_I915: 582 if (aperture != agp_i810_get_aperture(sc)) { 583 printf("%s: bad aperture size %d\n", 584 sc->as_dev.dv_xname, aperture); 585 return EINVAL; 586 } 587 break; 588 case CHIP_I965: 589 if (aperture != 512 * 1024 * 1024) { 590 printf("%s: bad aperture size %d\n", 591 sc->as_dev.dv_xname, aperture); 592 return EINVAL; 593 } 594 break; 595 } 596 597 return 0; 598 } 599 600 static int 601 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 602 { 603 struct agp_i810_softc *isc = sc->as_chipc; 604 605 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 606 #ifdef AGP_DEBUG 607 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 608 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 609 isc->gatt->ag_entries); 610 #endif 611 return EINVAL; 612 } 613 614 if (isc->chiptype != CHIP_I830) { 615 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 616 #ifdef AGP_DEBUG 617 printf("%s: trying to bind into stolen memory", 618 sc->as_dev.dv_xname); 619 #endif 620 return EINVAL; 621 } 622 } 623 624 WRITEGTT(offset, physical | 1); 625 return 0; 626 } 627 628 static int 629 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 630 { 631 struct agp_i810_softc *isc = sc->as_chipc; 632 633 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 634 return EINVAL; 635 636 if (isc->chiptype != CHIP_I810 ) { 637 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 638 #ifdef AGP_DEBUG 639 printf("%s: trying to unbind from stolen memory", 640 sc->as_dev.dv_xname); 641 #endif 642 return EINVAL; 643 } 644 } 645 646 WRITEGTT(offset, 0); 647 return 0; 648 } 649 650 /* 651 * Writing via memory mapped registers already flushes all TLBs. 652 */ 653 static void 654 agp_i810_flush_tlb(struct agp_softc *sc) 655 { 656 } 657 658 static int 659 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 660 { 661 662 return 0; 663 } 664 665 static struct agp_memory * 666 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 667 { 668 struct agp_i810_softc *isc = sc->as_chipc; 669 struct agp_memory *mem; 670 671 #ifdef AGP_DEBUG 672 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 673 #endif 674 675 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 676 return 0; 677 678 if (sc->as_allocated + size > sc->as_maxmem) 679 return 0; 680 681 if (type == 1) { 682 /* 683 * Mapping local DRAM into GATT. 684 */ 685 if (isc->chiptype != CHIP_I810 ) 686 return 0; 687 if (size != isc->dcache_size) 688 return 0; 689 } else if (type == 2) { 690 /* 691 * Bogus mapping for the hardware cursor. 692 */ 693 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 694 return 0; 695 } 696 697 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 698 if (mem == NULL) 699 return NULL; 700 mem->am_id = sc->as_nextid++; 701 mem->am_size = size; 702 mem->am_type = type; 703 704 if (type == 2) { 705 /* 706 * Allocate and wire down the memory now so that we can 707 * get its physical address. 708 */ 709 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 710 M_WAITOK); 711 if (mem->am_dmaseg == NULL) { 712 free(mem, M_AGP); 713 return NULL; 714 } 715 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 716 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 717 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 718 free(mem->am_dmaseg, M_AGP); 719 free(mem, M_AGP); 720 return NULL; 721 } 722 memset(mem->am_virtual, 0, size); 723 } else if (type != 1) { 724 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 725 size, 0, BUS_DMA_NOWAIT, 726 &mem->am_dmamap) != 0) { 727 free(mem, M_AGP); 728 return NULL; 729 } 730 } 731 732 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 733 sc->as_allocated += size; 734 735 return mem; 736 } 737 738 static int 739 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 740 { 741 if (mem->am_is_bound) 742 return EBUSY; 743 744 if (mem->am_type == 2) { 745 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 746 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 747 free(mem->am_dmaseg, M_AGP); 748 } 749 750 sc->as_allocated -= mem->am_size; 751 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 752 free(mem, M_AGP); 753 return 0; 754 } 755 756 static int 757 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 758 off_t offset) 759 { 760 struct agp_i810_softc *isc = sc->as_chipc; 761 u_int32_t regval, i; 762 763 /* 764 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 765 * X server for mysterious reasons which leads to crashes if we write 766 * to the GTT through the MMIO window. 767 * Until the issue is solved, simply restore it. 768 */ 769 770 #if 0 771 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 772 if (regval != (isc->gatt->ag_physical | 1)) { 773 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 774 regval); 775 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 776 isc->gatt->ag_physical | 1); 777 } 778 #endif 779 regval = 0; 780 781 if (mem->am_type == 2) { 782 WRITEGTT(offset, mem->am_physical | 1); 783 mem->am_offset = offset; 784 mem->am_is_bound = 1; 785 return 0; 786 } 787 788 if (mem->am_type != 1) 789 return agp_generic_bind_memory(sc, mem, offset); 790 791 if (isc->chiptype != CHIP_I810) 792 return EINVAL; 793 794 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 795 WRITEGTT(offset, i | 3); 796 mem->am_is_bound = 1; 797 return 0; 798 } 799 800 static int 801 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 802 { 803 struct agp_i810_softc *isc = sc->as_chipc; 804 u_int32_t i; 805 806 if (mem->am_type == 2) { 807 WRITEGTT(mem->am_offset, 0); 808 mem->am_offset = 0; 809 mem->am_is_bound = 0; 810 return 0; 811 } 812 813 if (mem->am_type != 1) 814 return agp_generic_unbind_memory(sc, mem); 815 816 if (isc->chiptype != CHIP_I810) 817 return EINVAL; 818 819 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 820 WRITEGTT(i, 0); 821 mem->am_is_bound = 0; 822 return 0; 823 } 824 825 static void 826 agp_i810_powerhook(int why, void *arg) 827 { 828 struct agp_softc *sc = (struct agp_softc *)arg; 829 struct agp_i810_softc *isc = sc->as_chipc; 830 831 if (why == PWR_RESUME) { 832 pci_conf_restore(sc->as_pc, sc->as_tag, &isc->sc_pciconf); 833 agp_flush_cache(); 834 } else if ((why == PWR_STANDBY) || (why == PWR_SUSPEND)) 835 pci_conf_capture(sc->as_pc, sc->as_tag, &isc->sc_pciconf); 836 837 return; 838 } 839
Indexes created Wed Sep 24 15:09:51 GMT 2025