agp_i810.c revision 1.44.2.1
1 /* $NetBSD: agp_i810.c,v 1.44.2.1 2007/11/19 00:48:05 mjf Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.44.2.1 2007/11/19 00:48:05 mjf Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/lock.h> 40 #include <sys/proc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/agpvar.h> 50 #include <dev/pci/agpreg.h> 51 52 #include <sys/agpio.h> 53 54 #include <sys/bus.h> 55 56 #include "agp_intel.h" 57 58 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 59 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 60 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 61 #define WRITEGTT(off, v) \ 62 do { \ 63 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { \ 64 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 65 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 66 (v)); \ 67 } else if (isc->chiptype == CHIP_I965) { \ 68 WRITE4(AGP_I965_GTT + \ 69 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 70 (v)); \ 71 } else { \ 72 WRITE4(AGP_I810_GTT + \ 73 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 74 (v)); \ 75 } \ 76 } while (0) 77 78 #define CHIP_I810 0 /* i810/i815 */ 79 #define CHIP_I830 1 /* 830M/845G */ 80 #define CHIP_I855 2 /* 852GM/855GM/865G */ 81 #define CHIP_I915 3 /* 915G/915GM/945G/945GM */ 82 #define CHIP_I965 4 /* 965Q/965PM */ 83 #define CHIP_G33 5 /* G33/Q33/Q35 */ 84 85 struct agp_i810_softc { 86 u_int32_t initial_aperture; /* aperture size at startup */ 87 struct agp_gatt *gatt; 88 int chiptype; /* i810-like or i830 */ 89 u_int32_t dcache_size; /* i810 only */ 90 u_int32_t stolen; /* number of i830/845 gtt entries 91 for stolen memory */ 92 bus_space_tag_t bst; /* register bus_space tag */ 93 bus_space_handle_t bsh; /* register bus_space handle */ 94 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 95 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 96 struct pci_attach_args vga_pa; 97 98 void *sc_powerhook; 99 struct pci_conf_state sc_pciconf; 100 }; 101 102 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 103 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 104 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 105 static int agp_i810_unbind_page(struct agp_softc *, off_t); 106 static void agp_i810_flush_tlb(struct agp_softc *); 107 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 108 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 109 vsize_t); 110 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 111 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 112 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 113 static void agp_i810_powerhook(int, void *); 114 115 static int agp_i810_init(struct agp_softc *); 116 117 static struct agp_methods agp_i810_methods = { 118 agp_i810_get_aperture, 119 agp_i810_set_aperture, 120 agp_i810_bind_page, 121 agp_i810_unbind_page, 122 agp_i810_flush_tlb, 123 agp_i810_enable, 124 agp_i810_alloc_memory, 125 agp_i810_free_memory, 126 agp_i810_bind_memory, 127 agp_i810_unbind_memory, 128 }; 129 130 /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */ 131 static int 132 agp_i810_vgamatch(struct pci_attach_args *pa) 133 { 134 135 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 136 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 137 return (0); 138 139 switch (PCI_PRODUCT(pa->pa_id)) { 140 case PCI_PRODUCT_INTEL_82810_GC: 141 case PCI_PRODUCT_INTEL_82810_DC100_GC: 142 case PCI_PRODUCT_INTEL_82810E_GC: 143 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 144 case PCI_PRODUCT_INTEL_82830MP_IV: 145 case PCI_PRODUCT_INTEL_82845G_IGD: 146 case PCI_PRODUCT_INTEL_82855GM_IGD: 147 case PCI_PRODUCT_INTEL_82865_IGD: 148 case PCI_PRODUCT_INTEL_82915G_IGD: 149 case PCI_PRODUCT_INTEL_82915GM_IGD: 150 case PCI_PRODUCT_INTEL_82945P_IGD: 151 case PCI_PRODUCT_INTEL_82945GM_IGD: 152 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 153 case PCI_PRODUCT_INTEL_82965Q_IGD: 154 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 155 case PCI_PRODUCT_INTEL_82965PM_IGD: 156 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 157 case PCI_PRODUCT_INTEL_82G33_IGD: 158 case PCI_PRODUCT_INTEL_82G33_IGD_1: 159 case PCI_PRODUCT_INTEL_82965G_IGD: 160 case PCI_PRODUCT_INTEL_82965G_IGD_1: 161 return (1); 162 } 163 164 return (0); 165 } 166 167 static int 168 agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 169 { 170 /* 171 * Find the aperture. Don't map it (yet), this would 172 * eat KVA. 173 */ 174 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 175 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, &sc->as_apsize, 176 &sc->as_apflags) != 0) 177 return ENXIO; 178 179 sc->as_apt = pa->pa_memt; 180 181 return 0; 182 } 183 184 int 185 agp_i810_attach(struct device *parent, struct device *self, void *aux) 186 { 187 struct agp_softc *sc = (void *)self; 188 struct agp_i810_softc *isc; 189 struct agp_gatt *gatt; 190 int error, apbase; 191 bus_size_t mmadrsize; 192 193 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 194 if (isc == NULL) { 195 aprint_error(": can't allocate chipset-specific softc\n"); 196 return ENOMEM; 197 } 198 sc->as_chipc = isc; 199 sc->as_methods = &agp_i810_methods; 200 201 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 202 #if NAGP_INTEL > 0 203 const struct pci_attach_args *pa = aux; 204 205 switch (PCI_PRODUCT(pa->pa_id)) { 206 case PCI_PRODUCT_INTEL_82840_HB: 207 case PCI_PRODUCT_INTEL_82865_HB: 208 case PCI_PRODUCT_INTEL_82845G_DRAM: 209 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 210 return agp_intel_attach(parent, self, aux); 211 } 212 #endif 213 aprint_error(": can't find internal VGA device config space\n"); 214 free(isc, M_AGP); 215 return ENOENT; 216 } 217 218 /* XXXfvdl */ 219 sc->as_dmat = isc->vga_pa.pa_dmat; 220 221 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 222 case PCI_PRODUCT_INTEL_82810_GC: 223 case PCI_PRODUCT_INTEL_82810_DC100_GC: 224 case PCI_PRODUCT_INTEL_82810E_GC: 225 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 226 isc->chiptype = CHIP_I810; 227 break; 228 case PCI_PRODUCT_INTEL_82830MP_IV: 229 case PCI_PRODUCT_INTEL_82845G_IGD: 230 isc->chiptype = CHIP_I830; 231 break; 232 case PCI_PRODUCT_INTEL_82855GM_IGD: 233 case PCI_PRODUCT_INTEL_82865_IGD: 234 isc->chiptype = CHIP_I855; 235 break; 236 case PCI_PRODUCT_INTEL_82915G_IGD: 237 case PCI_PRODUCT_INTEL_82915GM_IGD: 238 case PCI_PRODUCT_INTEL_82945P_IGD: 239 case PCI_PRODUCT_INTEL_82945GM_IGD: 240 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 241 isc->chiptype = CHIP_I915; 242 break; 243 case PCI_PRODUCT_INTEL_82965Q_IGD: 244 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 245 case PCI_PRODUCT_INTEL_82965PM_IGD: 246 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 247 case PCI_PRODUCT_INTEL_82965G_IGD: 248 case PCI_PRODUCT_INTEL_82965G_IGD_1: 249 isc->chiptype = CHIP_I965; 250 break; 251 case PCI_PRODUCT_INTEL_82G33_IGD: 252 case PCI_PRODUCT_INTEL_82G33_IGD_1: 253 isc->chiptype = CHIP_G33; 254 break; 255 } 256 257 switch (isc->chiptype) { 258 case CHIP_I915: 259 case CHIP_G33: 260 apbase = AGP_I915_GMADR; 261 break; 262 default: 263 apbase = AGP_I810_GMADR; 264 break; 265 } 266 if (isc->chiptype == CHIP_I965) { 267 error = agp_i965_map_aperture(&isc->vga_pa, sc, AGP_I965_GMADR); 268 } else { 269 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 270 } 271 if (error != 0) { 272 aprint_error(": can't map aperture\n"); 273 free(isc, M_AGP); 274 return error; 275 } 276 277 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { 278 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 279 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 280 NULL, &mmadrsize); 281 if (error != 0) { 282 aprint_error(": can't map mmadr registers\n"); 283 agp_generic_detach(sc); 284 return error; 285 } 286 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 287 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 288 NULL, NULL); 289 if (error != 0) { 290 aprint_error(": can't map gttadr registers\n"); 291 /* XXX we should release mmadr here */ 292 agp_generic_detach(sc); 293 return error; 294 } 295 } else if (isc->chiptype == CHIP_I965) { 296 error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR, 297 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 298 NULL, &mmadrsize); 299 if (error != 0) { 300 aprint_error(": can't map mmadr registers\n"); 301 agp_generic_detach(sc); 302 return error; 303 } 304 } else { 305 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 306 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 307 NULL, &mmadrsize); 308 if (error != 0) { 309 aprint_error(": can't map mmadr registers\n"); 310 agp_generic_detach(sc); 311 return error; 312 } 313 } 314 315 isc->initial_aperture = AGP_GET_APERTURE(sc); 316 317 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 318 if (!gatt) { 319 agp_generic_detach(sc); 320 return ENOMEM; 321 } 322 isc->gatt = gatt; 323 324 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 325 326 return agp_i810_init(sc); 327 } 328 329 static int agp_i810_init(struct agp_softc *sc) 330 { 331 struct agp_i810_softc *isc; 332 struct agp_gatt *gatt; 333 334 isc = sc->as_chipc; 335 gatt = isc->gatt; 336 337 if (isc->chiptype == CHIP_I810) { 338 void *virtual; 339 int dummyseg; 340 341 /* Some i810s have on-chip memory called dcache */ 342 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 343 isc->dcache_size = 4 * 1024 * 1024; 344 else 345 isc->dcache_size = 0; 346 347 /* According to the specs the gatt on the i810 must be 64k */ 348 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 349 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 350 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 351 free(gatt, M_AGP); 352 agp_generic_detach(sc); 353 return ENOMEM; 354 } 355 gatt->ag_virtual = (uint32_t *)virtual; 356 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 357 memset(gatt->ag_virtual, 0, gatt->ag_size); 358 359 agp_flush_cache(); 360 /* Install the GATT. */ 361 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 362 } else if (isc->chiptype == CHIP_I830) { 363 /* The i830 automatically initializes the 128k gatt on boot. */ 364 pcireg_t reg; 365 u_int32_t pgtblctl; 366 u_int16_t gcc1; 367 368 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 369 gcc1 = (u_int16_t)(reg >> 16); 370 switch (gcc1 & AGP_I830_GCC1_GMS) { 371 case AGP_I830_GCC1_GMS_STOLEN_512: 372 isc->stolen = (512 - 132) * 1024 / 4096; 373 break; 374 case AGP_I830_GCC1_GMS_STOLEN_1024: 375 isc->stolen = (1024 - 132) * 1024 / 4096; 376 break; 377 case AGP_I830_GCC1_GMS_STOLEN_8192: 378 isc->stolen = (8192 - 132) * 1024 / 4096; 379 break; 380 default: 381 isc->stolen = 0; 382 aprint_error( 383 ": unknown memory configuration, disabling\n"); 384 agp_generic_detach(sc); 385 return EINVAL; 386 } 387 388 if (isc->stolen > 0) { 389 aprint_error(": detected %dk stolen memory\n%s", 390 isc->stolen * 4, sc->as_dev.dv_xname); 391 } 392 393 /* GATT address is already in there, make sure it's enabled */ 394 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 395 pgtblctl |= 1; 396 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 397 398 gatt->ag_physical = pgtblctl & ~1; 399 } else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 || 400 isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G33) { 401 pcireg_t reg; 402 u_int32_t pgtblctl, stolen; 403 u_int16_t gcc1; 404 405 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 406 gcc1 = (u_int16_t)(reg >> 16); 407 408 /* Stolen memory is set up at the beginning of the aperture by 409 * the BIOS, consisting of the GATT followed by 4kb for the 410 * BIOS display. 411 */ 412 switch (isc->chiptype) { 413 case CHIP_I855: 414 stolen = 128 + 4; 415 break; 416 case CHIP_I915: 417 stolen = 256 + 4; 418 break; 419 case CHIP_I965: 420 stolen = 512 + 4; 421 break; 422 case CHIP_G33: 423 switch (gcc1 & AGP_G33_PGTBL_SIZE_MASK) { 424 case AGP_G33_PGTBL_SIZE_1M: 425 stolen = 1024 + 4; 426 break; 427 case AGP_G33_PGTBL_SIZE_2M: 428 stolen = 2048 + 4; 429 break; 430 default: 431 aprint_error(": bad gtt size\n"); 432 agp_generic_detach(sc); 433 return EINVAL; 434 } 435 break; 436 default: 437 aprint_error(": bad chiptype\n"); 438 agp_generic_detach(sc); 439 return EINVAL; 440 } 441 442 switch (gcc1 & AGP_I855_GCC1_GMS) { 443 case AGP_I855_GCC1_GMS_STOLEN_1M: 444 isc->stolen = (1024 - stolen) * 1024 / 4096; 445 break; 446 case AGP_I855_GCC1_GMS_STOLEN_4M: 447 isc->stolen = (4096 - stolen) * 1024 / 4096; 448 break; 449 case AGP_I855_GCC1_GMS_STOLEN_8M: 450 isc->stolen = (8192 - stolen) * 1024 / 4096; 451 break; 452 case AGP_I855_GCC1_GMS_STOLEN_16M: 453 isc->stolen = (16384 - stolen) * 1024 / 4096; 454 break; 455 case AGP_I855_GCC1_GMS_STOLEN_32M: 456 isc->stolen = (32768 - stolen) * 1024 / 4096; 457 break; 458 case AGP_I915_GCC1_GMS_STOLEN_48M: 459 isc->stolen = (49152 - stolen) * 1024 / 4096; 460 break; 461 case AGP_I915_GCC1_GMS_STOLEN_64M: 462 isc->stolen = (65536 - stolen) * 1024 / 4096; 463 break; 464 default: 465 isc->stolen = 0; 466 aprint_error( 467 ": unknown memory configuration, disabling\n"); 468 agp_generic_detach(sc); 469 return EINVAL; 470 } 471 if (isc->stolen > 0) { 472 aprint_error(": detected %dk stolen memory\n%s", 473 isc->stolen * 4, sc->as_dev.dv_xname); 474 } 475 476 /* GATT address is already in there, make sure it's enabled */ 477 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 478 pgtblctl |= 1; 479 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 480 481 gatt->ag_physical = pgtblctl & ~1; 482 } 483 484 /* 485 * Make sure the chipset can see everything. 486 */ 487 agp_flush_cache(); 488 489 isc->sc_powerhook = powerhook_establish(sc->as_dev.dv_xname, 490 agp_i810_powerhook, sc); 491 if (isc->sc_powerhook == NULL) 492 printf("%s: WARNING: unable to establish PCI power hook\n", 493 sc->as_dev.dv_xname); 494 495 #if 0 496 /* 497 * another device (drm) may need access to this region 498 * we do not need it anymore 499 */ 500 bus_space_unmap(isc->bst, isc->bsh, mmadrsize); 501 #endif 502 503 return 0; 504 } 505 506 #if 0 507 static int 508 agp_i810_detach(struct agp_softc *sc) 509 { 510 int error; 511 struct agp_i810_softc *isc = sc->as_chipc; 512 513 error = agp_generic_detach(sc); 514 if (error) 515 return error; 516 517 /* Clear the GATT base. */ 518 if (sc->chiptype == CHIP_I810) { 519 WRITE4(AGP_I810_PGTBL_CTL, 0); 520 } else { 521 unsigned int pgtblctl; 522 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 523 pgtblctl &= ~1; 524 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 525 } 526 527 /* Put the aperture back the way it started. */ 528 AGP_SET_APERTURE(sc, isc->initial_aperture); 529 530 if (sc->chiptype == CHIP_I810) { 531 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 532 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 533 } 534 free(sc->gatt, M_AGP); 535 536 return 0; 537 } 538 #endif 539 540 static u_int32_t 541 agp_i810_get_aperture(struct agp_softc *sc) 542 { 543 struct agp_i810_softc *isc = sc->as_chipc; 544 pcireg_t reg; 545 u_int16_t miscc, gcc1, msac; 546 547 switch (isc->chiptype) { 548 case CHIP_I810: 549 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 550 miscc = (u_int16_t)(reg >> 16); 551 if ((miscc & AGP_I810_MISCC_WINSIZE) == 552 AGP_I810_MISCC_WINSIZE_32) 553 return 32 * 1024 * 1024; 554 else 555 return 64 * 1024 * 1024; 556 case CHIP_I830: 557 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 558 gcc1 = (u_int16_t)(reg >> 16); 559 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 560 return 64 * 1024 * 1024; 561 else 562 return 128 * 1024 * 1024; 563 case CHIP_I855: 564 return 128 * 1024 * 1024; 565 case CHIP_I915: 566 case CHIP_G33: 567 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 568 msac = (u_int16_t)(reg >> 16); 569 if (msac & AGP_I915_MSAC_APER_128M) 570 return 128 * 1024 * 1024; 571 else 572 return 256 * 1024 * 1024; 573 case CHIP_I965: 574 return 512 * 1024 * 1024; 575 default: 576 aprint_error(": Unknown chipset\n"); 577 } 578 579 return 0; 580 } 581 582 static int 583 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 584 { 585 struct agp_i810_softc *isc = sc->as_chipc; 586 pcireg_t reg; 587 u_int16_t miscc, gcc1; 588 589 switch (isc->chiptype) { 590 case CHIP_I810: 591 /* 592 * Double check for sanity. 593 */ 594 if (aperture != (32 * 1024 * 1024) && 595 aperture != (64 * 1024 * 1024)) { 596 printf("%s: bad aperture size %d\n", 597 sc->as_dev.dv_xname, aperture); 598 return EINVAL; 599 } 600 601 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 602 miscc = (u_int16_t)(reg >> 16); 603 miscc &= ~AGP_I810_MISCC_WINSIZE; 604 if (aperture == 32 * 1024 * 1024) 605 miscc |= AGP_I810_MISCC_WINSIZE_32; 606 else 607 miscc |= AGP_I810_MISCC_WINSIZE_64; 608 609 reg &= 0x0000ffff; 610 reg |= ((pcireg_t)miscc) << 16; 611 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 612 break; 613 case CHIP_I830: 614 if (aperture != (64 * 1024 * 1024) && 615 aperture != (128 * 1024 * 1024)) { 616 printf("%s: bad aperture size %d\n", 617 sc->as_dev.dv_xname, aperture); 618 return EINVAL; 619 } 620 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 621 gcc1 = (u_int16_t)(reg >> 16); 622 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 623 if (aperture == 64 * 1024 * 1024) 624 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 625 else 626 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 627 628 reg &= 0x0000ffff; 629 reg |= ((pcireg_t)gcc1) << 16; 630 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 631 break; 632 case CHIP_I855: 633 case CHIP_I915: 634 if (aperture != agp_i810_get_aperture(sc)) { 635 printf("%s: bad aperture size %d\n", 636 sc->as_dev.dv_xname, aperture); 637 return EINVAL; 638 } 639 break; 640 case CHIP_I965: 641 if (aperture != 512 * 1024 * 1024) { 642 printf("%s: bad aperture size %d\n", 643 sc->as_dev.dv_xname, aperture); 644 return EINVAL; 645 } 646 break; 647 } 648 649 return 0; 650 } 651 652 static int 653 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 654 { 655 struct agp_i810_softc *isc = sc->as_chipc; 656 657 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 658 #ifdef AGP_DEBUG 659 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 660 sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT, 661 isc->gatt->ag_entries); 662 #endif 663 return EINVAL; 664 } 665 666 if (isc->chiptype != CHIP_I830) { 667 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 668 #ifdef AGP_DEBUG 669 printf("%s: trying to bind into stolen memory", 670 sc->as_dev.dv_xname); 671 #endif 672 return EINVAL; 673 } 674 } 675 676 WRITEGTT(offset, physical | 1); 677 return 0; 678 } 679 680 static int 681 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 682 { 683 struct agp_i810_softc *isc = sc->as_chipc; 684 685 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 686 return EINVAL; 687 688 if (isc->chiptype != CHIP_I810 ) { 689 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 690 #ifdef AGP_DEBUG 691 printf("%s: trying to unbind from stolen memory", 692 sc->as_dev.dv_xname); 693 #endif 694 return EINVAL; 695 } 696 } 697 698 WRITEGTT(offset, 0); 699 return 0; 700 } 701 702 /* 703 * Writing via memory mapped registers already flushes all TLBs. 704 */ 705 static void 706 agp_i810_flush_tlb(struct agp_softc *sc) 707 { 708 } 709 710 static int 711 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 712 { 713 714 return 0; 715 } 716 717 static struct agp_memory * 718 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 719 { 720 struct agp_i810_softc *isc = sc->as_chipc; 721 struct agp_memory *mem; 722 723 #ifdef AGP_DEBUG 724 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 725 #endif 726 727 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 728 return 0; 729 730 if (sc->as_allocated + size > sc->as_maxmem) 731 return 0; 732 733 if (type == 1) { 734 /* 735 * Mapping local DRAM into GATT. 736 */ 737 if (isc->chiptype != CHIP_I810 ) 738 return 0; 739 if (size != isc->dcache_size) 740 return 0; 741 } else if (type == 2) { 742 /* 743 * Bogus mapping for the hardware cursor. 744 */ 745 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 746 return 0; 747 } 748 749 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 750 if (mem == NULL) 751 return NULL; 752 mem->am_id = sc->as_nextid++; 753 mem->am_size = size; 754 mem->am_type = type; 755 756 if (type == 2) { 757 /* 758 * Allocate and wire down the memory now so that we can 759 * get its physical address. 760 */ 761 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 762 M_WAITOK); 763 if (mem->am_dmaseg == NULL) { 764 free(mem, M_AGP); 765 return NULL; 766 } 767 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 768 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 769 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 770 free(mem->am_dmaseg, M_AGP); 771 free(mem, M_AGP); 772 return NULL; 773 } 774 memset(mem->am_virtual, 0, size); 775 } else if (type != 1) { 776 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 777 size, 0, BUS_DMA_NOWAIT, 778 &mem->am_dmamap) != 0) { 779 free(mem, M_AGP); 780 return NULL; 781 } 782 } 783 784 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 785 sc->as_allocated += size; 786 787 return mem; 788 } 789 790 static int 791 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 792 { 793 if (mem->am_is_bound) 794 return EBUSY; 795 796 if (mem->am_type == 2) { 797 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 798 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 799 free(mem->am_dmaseg, M_AGP); 800 } 801 802 sc->as_allocated -= mem->am_size; 803 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 804 free(mem, M_AGP); 805 return 0; 806 } 807 808 static int 809 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 810 off_t offset) 811 { 812 struct agp_i810_softc *isc = sc->as_chipc; 813 u_int32_t regval, i; 814 815 /* 816 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 817 * X server for mysterious reasons which leads to crashes if we write 818 * to the GTT through the MMIO window. 819 * Until the issue is solved, simply restore it. 820 */ 821 822 #if 0 823 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 824 if (regval != (isc->gatt->ag_physical | 1)) { 825 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 826 regval); 827 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 828 isc->gatt->ag_physical | 1); 829 } 830 #endif 831 regval = 0; 832 833 if (mem->am_type == 2) { 834 WRITEGTT(offset, mem->am_physical | 1); 835 mem->am_offset = offset; 836 mem->am_is_bound = 1; 837 return 0; 838 } 839 840 if (mem->am_type != 1) 841 return agp_generic_bind_memory(sc, mem, offset); 842 843 if (isc->chiptype != CHIP_I810) 844 return EINVAL; 845 846 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 847 WRITEGTT(offset, i | 3); 848 mem->am_is_bound = 1; 849 return 0; 850 } 851 852 static int 853 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 854 { 855 struct agp_i810_softc *isc = sc->as_chipc; 856 u_int32_t i; 857 858 if (mem->am_type == 2) { 859 WRITEGTT(mem->am_offset, 0); 860 mem->am_offset = 0; 861 mem->am_is_bound = 0; 862 return 0; 863 } 864 865 if (mem->am_type != 1) 866 return agp_generic_unbind_memory(sc, mem); 867 868 if (isc->chiptype != CHIP_I810) 869 return EINVAL; 870 871 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 872 WRITEGTT(i, 0); 873 mem->am_is_bound = 0; 874 return 0; 875 } 876 877 static void 878 agp_i810_powerhook(int why, void *arg) 879 { 880 struct agp_softc *sc = (struct agp_softc *)arg; 881 struct agp_i810_softc *isc = sc->as_chipc; 882 883 if (why == PWR_RESUME) { 884 pci_conf_restore(sc->as_pc, sc->as_tag, &isc->sc_pciconf); 885 agp_flush_cache(); 886 } else if ((why == PWR_STANDBY) || (why == PWR_SUSPEND)) 887 pci_conf_capture(sc->as_pc, sc->as_tag, &isc->sc_pciconf); 888 889 return; 890 } 891
Indexes created Tue Oct 07 21:09:53 GMT 2025