agp_i810.c revision 1.57
1 /* $NetBSD: agp_i810.c,v 1.57 2008/11/08 17:26:28 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * Copyright (c) 2000 Ruslan Ermilov 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $ 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.57 2008/11/08 17:26:28 christos Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/proc.h> 40 #include <sys/device.h> 41 #include <sys/conf.h> 42 43 #include <uvm/uvm_extern.h> 44 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pcireg.h> 47 #include <dev/pci/pcidevs.h> 48 #include <dev/pci/agpvar.h> 49 #include <dev/pci/agpreg.h> 50 51 #include <sys/agpio.h> 52 53 #include <sys/bus.h> 54 55 #include "agp_intel.h" 56 57 #define READ1(off) bus_space_read_1(isc->bst, isc->bsh, off) 58 #define READ4(off) bus_space_read_4(isc->bst, isc->bsh, off) 59 #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v) 60 #define WRITEGTT(off, v) \ 61 do { \ 62 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { \ 63 bus_space_write_4(isc->gtt_bst, isc->gtt_bsh, \ 64 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 65 (v)); \ 66 } else if (isc->chiptype == CHIP_I965) { \ 67 WRITE4(AGP_I965_GTT + \ 68 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 69 (v)); \ 70 } else { \ 71 WRITE4(AGP_I810_GTT + \ 72 (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4, \ 73 (v)); \ 74 } \ 75 } while (0) 76 77 #define CHIP_I810 0 /* i810/i815 */ 78 #define CHIP_I830 1 /* 830M/845G */ 79 #define CHIP_I855 2 /* 852GM/855GM/865G */ 80 #define CHIP_I915 3 /* 915G/915GM/945G/945GM/945GME */ 81 #define CHIP_I965 4 /* 965Q/965PM */ 82 #define CHIP_G33 5 /* G33/Q33/Q35 */ 83 84 struct agp_i810_softc { 85 u_int32_t initial_aperture; /* aperture size at startup */ 86 struct agp_gatt *gatt; 87 int chiptype; /* i810-like or i830 */ 88 u_int32_t dcache_size; /* i810 only */ 89 u_int32_t stolen; /* number of i830/845 gtt entries 90 for stolen memory */ 91 bus_space_tag_t bst; /* register bus_space tag */ 92 bus_space_handle_t bsh; /* register bus_space handle */ 93 bus_space_tag_t gtt_bst; /* GTT bus_space tag */ 94 bus_space_handle_t gtt_bsh; /* GTT bus_space handle */ 95 struct pci_attach_args vga_pa; 96 97 u_int32_t pgtblctl; 98 }; 99 100 /* XXX hack, see below */ 101 static bus_addr_t agp_i810_vga_regbase; 102 static bus_space_handle_t agp_i810_vga_bsh; 103 104 static u_int32_t agp_i810_get_aperture(struct agp_softc *); 105 static int agp_i810_set_aperture(struct agp_softc *, u_int32_t); 106 static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t); 107 static int agp_i810_unbind_page(struct agp_softc *, off_t); 108 static void agp_i810_flush_tlb(struct agp_softc *); 109 static int agp_i810_enable(struct agp_softc *, u_int32_t mode); 110 static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int, 111 vsize_t); 112 static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *); 113 static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, off_t); 114 static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *); 115 116 static bool agp_i810_resume(device_t PMF_FN_PROTO); 117 static int agp_i810_init(struct agp_softc *); 118 119 static int agp_i810_init(struct agp_softc *); 120 121 static struct agp_methods agp_i810_methods = { 122 agp_i810_get_aperture, 123 agp_i810_set_aperture, 124 agp_i810_bind_page, 125 agp_i810_unbind_page, 126 agp_i810_flush_tlb, 127 agp_i810_enable, 128 agp_i810_alloc_memory, 129 agp_i810_free_memory, 130 agp_i810_bind_memory, 131 agp_i810_unbind_memory, 132 }; 133 134 /* XXXthorpej -- duplicated code (see arch/x86/pci/pchb.c) */ 135 static int 136 agp_i810_vgamatch(struct pci_attach_args *pa) 137 { 138 139 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 140 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 141 return (0); 142 143 switch (PCI_PRODUCT(pa->pa_id)) { 144 case PCI_PRODUCT_INTEL_82810_GC: 145 case PCI_PRODUCT_INTEL_82810_DC100_GC: 146 case PCI_PRODUCT_INTEL_82810E_GC: 147 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 148 case PCI_PRODUCT_INTEL_82830MP_IV: 149 case PCI_PRODUCT_INTEL_82845G_IGD: 150 case PCI_PRODUCT_INTEL_82855GM_IGD: 151 case PCI_PRODUCT_INTEL_82865_IGD: 152 case PCI_PRODUCT_INTEL_82915G_IGD: 153 case PCI_PRODUCT_INTEL_82915GM_IGD: 154 case PCI_PRODUCT_INTEL_82945P_IGD: 155 case PCI_PRODUCT_INTEL_82945GM_IGD: 156 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 157 case PCI_PRODUCT_INTEL_82945GME_IGD: 158 case PCI_PRODUCT_INTEL_82965Q_IGD: 159 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 160 case PCI_PRODUCT_INTEL_82965PM_IGD: 161 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 162 case PCI_PRODUCT_INTEL_82G33_IGD: 163 case PCI_PRODUCT_INTEL_82G33_IGD_1: 164 case PCI_PRODUCT_INTEL_82965G_IGD: 165 case PCI_PRODUCT_INTEL_82965G_IGD_1: 166 case PCI_PRODUCT_INTEL_82Q35_IGD: 167 case PCI_PRODUCT_INTEL_82Q35_IGD_1: 168 case PCI_PRODUCT_INTEL_82Q33_IGD: 169 case PCI_PRODUCT_INTEL_82Q33_IGD_1: 170 case PCI_PRODUCT_INTEL_82G35_IGD: 171 case PCI_PRODUCT_INTEL_82G35_IGD_1: 172 case PCI_PRODUCT_INTEL_82946GZ_IGD: 173 return (1); 174 } 175 176 return (0); 177 } 178 179 static int 180 agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 181 { 182 /* 183 * Find the aperture. Don't map it (yet), this would 184 * eat KVA. 185 */ 186 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 187 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, &sc->as_apsize, 188 &sc->as_apflags) != 0) 189 return ENXIO; 190 191 sc->as_apt = pa->pa_memt; 192 193 return 0; 194 } 195 196 int 197 agp_i810_attach(device_t parent, device_t self, void *aux) 198 { 199 struct agp_softc *sc = device_private(self); 200 struct agp_i810_softc *isc; 201 struct agp_gatt *gatt; 202 int error, apbase; 203 bus_addr_t mmadr; 204 bus_size_t mmadrsize; 205 206 isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO); 207 if (isc == NULL) { 208 aprint_error(": can't allocate chipset-specific softc\n"); 209 return ENOMEM; 210 } 211 sc->as_chipc = isc; 212 sc->as_methods = &agp_i810_methods; 213 214 if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) { 215 #if NAGP_INTEL > 0 216 const struct pci_attach_args *pa = aux; 217 218 switch (PCI_PRODUCT(pa->pa_id)) { 219 case PCI_PRODUCT_INTEL_82840_HB: 220 case PCI_PRODUCT_INTEL_82865_HB: 221 case PCI_PRODUCT_INTEL_82845G_DRAM: 222 case PCI_PRODUCT_INTEL_82815_FULL_HUB: 223 return agp_intel_attach(parent, self, aux); 224 } 225 #endif 226 aprint_error(": can't find internal VGA device config space\n"); 227 free(isc, M_AGP); 228 return ENOENT; 229 } 230 231 /* XXXfvdl */ 232 sc->as_dmat = isc->vga_pa.pa_dmat; 233 234 switch (PCI_PRODUCT(isc->vga_pa.pa_id)) { 235 case PCI_PRODUCT_INTEL_82810_GC: 236 case PCI_PRODUCT_INTEL_82810_DC100_GC: 237 case PCI_PRODUCT_INTEL_82810E_GC: 238 case PCI_PRODUCT_INTEL_82815_FULL_GRAPH: 239 isc->chiptype = CHIP_I810; 240 break; 241 case PCI_PRODUCT_INTEL_82830MP_IV: 242 case PCI_PRODUCT_INTEL_82845G_IGD: 243 isc->chiptype = CHIP_I830; 244 break; 245 case PCI_PRODUCT_INTEL_82855GM_IGD: 246 case PCI_PRODUCT_INTEL_82865_IGD: 247 isc->chiptype = CHIP_I855; 248 break; 249 case PCI_PRODUCT_INTEL_82915G_IGD: 250 case PCI_PRODUCT_INTEL_82915GM_IGD: 251 case PCI_PRODUCT_INTEL_82945P_IGD: 252 case PCI_PRODUCT_INTEL_82945GM_IGD: 253 case PCI_PRODUCT_INTEL_82945GM_IGD_1: 254 case PCI_PRODUCT_INTEL_82945GME_IGD: 255 isc->chiptype = CHIP_I915; 256 break; 257 case PCI_PRODUCT_INTEL_82965Q_IGD: 258 case PCI_PRODUCT_INTEL_82965Q_IGD_1: 259 case PCI_PRODUCT_INTEL_82965PM_IGD: 260 case PCI_PRODUCT_INTEL_82965PM_IGD_1: 261 case PCI_PRODUCT_INTEL_82965G_IGD: 262 case PCI_PRODUCT_INTEL_82965G_IGD_1: 263 case PCI_PRODUCT_INTEL_82946GZ_IGD: 264 case PCI_PRODUCT_INTEL_82G35_IGD: 265 case PCI_PRODUCT_INTEL_82G35_IGD_1: 266 isc->chiptype = CHIP_I965; 267 break; 268 case PCI_PRODUCT_INTEL_82Q35_IGD: 269 case PCI_PRODUCT_INTEL_82Q35_IGD_1: 270 case PCI_PRODUCT_INTEL_82G33_IGD: 271 case PCI_PRODUCT_INTEL_82G33_IGD_1: 272 case PCI_PRODUCT_INTEL_82Q33_IGD: 273 case PCI_PRODUCT_INTEL_82Q33_IGD_1: 274 isc->chiptype = CHIP_G33; 275 break; 276 } 277 278 switch (isc->chiptype) { 279 case CHIP_I915: 280 case CHIP_G33: 281 apbase = AGP_I915_GMADR; 282 break; 283 default: 284 apbase = AGP_I810_GMADR; 285 break; 286 } 287 if (isc->chiptype == CHIP_I965) { 288 error = agp_i965_map_aperture(&isc->vga_pa, sc, AGP_I965_GMADR); 289 } else { 290 error = agp_map_aperture(&isc->vga_pa, sc, apbase); 291 } 292 if (error != 0) { 293 aprint_error(": can't map aperture\n"); 294 free(isc, M_AGP); 295 return error; 296 } 297 298 if (isc->chiptype == CHIP_I915 || isc->chiptype == CHIP_G33) { 299 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR, 300 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 301 &mmadr, &mmadrsize); 302 if (error != 0) { 303 aprint_error(": can't map mmadr registers\n"); 304 agp_generic_detach(sc); 305 return error; 306 } 307 error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR, 308 PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh, 309 NULL, NULL); 310 if (error != 0) { 311 aprint_error(": can't map gttadr registers\n"); 312 /* XXX we should release mmadr here */ 313 agp_generic_detach(sc); 314 return error; 315 } 316 } else if (isc->chiptype == CHIP_I965) { 317 error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR, 318 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 319 &mmadr, &mmadrsize); 320 if (error != 0) { 321 aprint_error(": can't map mmadr registers\n"); 322 agp_generic_detach(sc); 323 return error; 324 } 325 } else { 326 error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR, 327 PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, 328 &mmadr, &mmadrsize); 329 if (error != 0) { 330 aprint_error(": can't map mmadr registers\n"); 331 agp_generic_detach(sc); 332 return error; 333 } 334 } 335 336 isc->initial_aperture = AGP_GET_APERTURE(sc); 337 338 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 339 if (!gatt) { 340 agp_generic_detach(sc); 341 return ENOMEM; 342 } 343 isc->gatt = gatt; 344 345 gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT; 346 347 if (!pmf_device_register(self, NULL, agp_i810_resume)) 348 aprint_error_dev(self, "couldn't establish power handler\n"); 349 350 /* 351 * XXX horrible hack to allow drm code to use our mapping 352 * of VGA chip registers 353 */ 354 agp_i810_vga_regbase = mmadr; 355 agp_i810_vga_bsh = isc->bsh; 356 357 return agp_i810_init(sc); 358 } 359 360 /* 361 * XXX horrible hack to allow drm code to use our mapping 362 * of VGA chip registers 363 */ 364 int 365 agp_i810_borrow(bus_addr_t base, bus_space_handle_t *hdlp) 366 { 367 368 if (!agp_i810_vga_regbase || base != agp_i810_vga_regbase) 369 return 0; 370 *hdlp = agp_i810_vga_bsh; 371 return 1; 372 } 373 374 static int agp_i810_init(struct agp_softc *sc) 375 { 376 struct agp_i810_softc *isc; 377 struct agp_gatt *gatt; 378 379 isc = sc->as_chipc; 380 gatt = isc->gatt; 381 382 if (isc->chiptype == CHIP_I810) { 383 void *virtual; 384 int dummyseg; 385 386 /* Some i810s have on-chip memory called dcache */ 387 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 388 isc->dcache_size = 4 * 1024 * 1024; 389 else 390 isc->dcache_size = 0; 391 392 /* According to the specs the gatt on the i810 must be 64k */ 393 if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024, 394 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 395 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 396 free(gatt, M_AGP); 397 agp_generic_detach(sc); 398 return ENOMEM; 399 } 400 gatt->ag_virtual = (uint32_t *)virtual; 401 gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t); 402 memset(gatt->ag_virtual, 0, gatt->ag_size); 403 404 agp_flush_cache(); 405 /* Install the GATT. */ 406 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 407 } else if (isc->chiptype == CHIP_I830) { 408 /* The i830 automatically initializes the 128k gatt on boot. */ 409 pcireg_t reg; 410 u_int32_t pgtblctl; 411 u_int16_t gcc1; 412 413 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 414 gcc1 = (u_int16_t)(reg >> 16); 415 switch (gcc1 & AGP_I830_GCC1_GMS) { 416 case AGP_I830_GCC1_GMS_STOLEN_512: 417 isc->stolen = (512 - 132) * 1024 / 4096; 418 break; 419 case AGP_I830_GCC1_GMS_STOLEN_1024: 420 isc->stolen = (1024 - 132) * 1024 / 4096; 421 break; 422 case AGP_I830_GCC1_GMS_STOLEN_8192: 423 isc->stolen = (8192 - 132) * 1024 / 4096; 424 break; 425 default: 426 isc->stolen = 0; 427 aprint_error( 428 ": unknown memory configuration, disabling\n"); 429 agp_generic_detach(sc); 430 return EINVAL; 431 } 432 433 if (isc->stolen > 0) { 434 aprint_normal(": detected %dk stolen memory\n%s", 435 isc->stolen * 4, device_xname(sc->as_dev)); 436 } 437 438 /* GATT address is already in there, make sure it's enabled */ 439 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 440 pgtblctl |= 1; 441 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 442 443 gatt->ag_physical = pgtblctl & ~1; 444 } else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 || 445 isc->chiptype == CHIP_I965 || isc->chiptype == CHIP_G33) { 446 pcireg_t reg; 447 u_int32_t pgtblctl, stolen; 448 u_int16_t gcc1; 449 450 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1); 451 gcc1 = (u_int16_t)(reg >> 16); 452 453 /* Stolen memory is set up at the beginning of the aperture by 454 * the BIOS, consisting of the GATT followed by 4kb for the 455 * BIOS display. 456 */ 457 switch (isc->chiptype) { 458 case CHIP_I855: 459 stolen = 128 + 4; 460 break; 461 case CHIP_I915: 462 stolen = 256 + 4; 463 break; 464 case CHIP_I965: 465 stolen = 512 + 4; 466 break; 467 case CHIP_G33: 468 switch (gcc1 & AGP_G33_PGTBL_SIZE_MASK) { 469 case AGP_G33_PGTBL_SIZE_1M: 470 stolen = 1024 + 4; 471 break; 472 case AGP_G33_PGTBL_SIZE_2M: 473 stolen = 2048 + 4; 474 break; 475 default: 476 aprint_error(": bad gtt size\n"); 477 agp_generic_detach(sc); 478 return EINVAL; 479 } 480 break; 481 default: 482 aprint_error(": bad chiptype\n"); 483 agp_generic_detach(sc); 484 return EINVAL; 485 } 486 487 switch (gcc1 & AGP_I855_GCC1_GMS) { 488 case AGP_I855_GCC1_GMS_STOLEN_1M: 489 isc->stolen = (1024 - stolen) * 1024 / 4096; 490 break; 491 case AGP_I855_GCC1_GMS_STOLEN_4M: 492 isc->stolen = (4096 - stolen) * 1024 / 4096; 493 break; 494 case AGP_I855_GCC1_GMS_STOLEN_8M: 495 isc->stolen = (8192 - stolen) * 1024 / 4096; 496 break; 497 case AGP_I855_GCC1_GMS_STOLEN_16M: 498 isc->stolen = (16384 - stolen) * 1024 / 4096; 499 break; 500 case AGP_I855_GCC1_GMS_STOLEN_32M: 501 isc->stolen = (32768 - stolen) * 1024 / 4096; 502 break; 503 case AGP_I915_GCC1_GMS_STOLEN_48M: 504 isc->stolen = (49152 - stolen) * 1024 / 4096; 505 break; 506 case AGP_I915_GCC1_GMS_STOLEN_64M: 507 isc->stolen = (65536 - stolen) * 1024 / 4096; 508 break; 509 case AGP_G33_GCC1_GMS_STOLEN_128M: 510 isc->stolen = ((128 * 1024) - stolen) * 1024 / 4096; 511 break; 512 case AGP_G33_GCC1_GMS_STOLEN_256M: 513 isc->stolen = ((256 * 1024) - stolen) * 1024 / 4096; 514 break; 515 default: 516 isc->stolen = 0; 517 aprint_error( 518 ": unknown memory configuration, disabling\n"); 519 agp_generic_detach(sc); 520 return EINVAL; 521 } 522 if (isc->stolen > 0) { 523 aprint_normal(": detected %dk stolen memory\n%s", 524 isc->stolen * 4, device_xname(sc->as_dev)); 525 } 526 527 /* GATT address is already in there, make sure it's enabled */ 528 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 529 pgtblctl |= 1; 530 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 531 532 gatt->ag_physical = pgtblctl & ~1; 533 } 534 535 /* 536 * Make sure the chipset can see everything. 537 */ 538 agp_flush_cache(); 539 540 return 0; 541 } 542 543 #if 0 544 static int 545 agp_i810_detach(struct agp_softc *sc) 546 { 547 int error; 548 struct agp_i810_softc *isc = sc->as_chipc; 549 550 error = agp_generic_detach(sc); 551 if (error) 552 return error; 553 554 /* Clear the GATT base. */ 555 if (sc->chiptype == CHIP_I810) { 556 WRITE4(AGP_I810_PGTBL_CTL, 0); 557 } else { 558 unsigned int pgtblctl; 559 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 560 pgtblctl &= ~1; 561 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 562 } 563 564 /* Put the aperture back the way it started. */ 565 AGP_SET_APERTURE(sc, isc->initial_aperture); 566 567 if (sc->chiptype == CHIP_I810) { 568 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 569 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 570 } 571 free(sc->gatt, M_AGP); 572 573 return 0; 574 } 575 #endif 576 577 static u_int32_t 578 agp_i810_get_aperture(struct agp_softc *sc) 579 { 580 struct agp_i810_softc *isc = sc->as_chipc; 581 pcireg_t reg; 582 u_int16_t miscc, gcc1, msac; 583 584 switch (isc->chiptype) { 585 case CHIP_I810: 586 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 587 miscc = (u_int16_t)(reg >> 16); 588 if ((miscc & AGP_I810_MISCC_WINSIZE) == 589 AGP_I810_MISCC_WINSIZE_32) 590 return 32 * 1024 * 1024; 591 else 592 return 64 * 1024 * 1024; 593 case CHIP_I830: 594 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 595 gcc1 = (u_int16_t)(reg >> 16); 596 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 597 return 64 * 1024 * 1024; 598 else 599 return 128 * 1024 * 1024; 600 case CHIP_I855: 601 return 128 * 1024 * 1024; 602 case CHIP_I915: 603 case CHIP_G33: 604 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC); 605 msac = (u_int16_t)(reg >> 16); 606 if (msac & AGP_I915_MSAC_APER_128M) 607 return 128 * 1024 * 1024; 608 else 609 return 256 * 1024 * 1024; 610 case CHIP_I965: 611 return 512 * 1024 * 1024; 612 default: 613 aprint_error(": Unknown chipset\n"); 614 } 615 616 return 0; 617 } 618 619 static int 620 agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture) 621 { 622 struct agp_i810_softc *isc = sc->as_chipc; 623 pcireg_t reg; 624 u_int16_t miscc, gcc1; 625 626 switch (isc->chiptype) { 627 case CHIP_I810: 628 /* 629 * Double check for sanity. 630 */ 631 if (aperture != (32 * 1024 * 1024) && 632 aperture != (64 * 1024 * 1024)) { 633 aprint_error_dev(sc->as_dev, "bad aperture size %d\n", 634 aperture); 635 return EINVAL; 636 } 637 638 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM); 639 miscc = (u_int16_t)(reg >> 16); 640 miscc &= ~AGP_I810_MISCC_WINSIZE; 641 if (aperture == 32 * 1024 * 1024) 642 miscc |= AGP_I810_MISCC_WINSIZE_32; 643 else 644 miscc |= AGP_I810_MISCC_WINSIZE_64; 645 646 reg &= 0x0000ffff; 647 reg |= ((pcireg_t)miscc) << 16; 648 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg); 649 break; 650 case CHIP_I830: 651 if (aperture != (64 * 1024 * 1024) && 652 aperture != (128 * 1024 * 1024)) { 653 aprint_error_dev(sc->as_dev, "bad aperture size %d\n", 654 aperture); 655 return EINVAL; 656 } 657 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0); 658 gcc1 = (u_int16_t)(reg >> 16); 659 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 660 if (aperture == 64 * 1024 * 1024) 661 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 662 else 663 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 664 665 reg &= 0x0000ffff; 666 reg |= ((pcireg_t)gcc1) << 16; 667 pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg); 668 break; 669 case CHIP_I855: 670 case CHIP_I915: 671 if (aperture != agp_i810_get_aperture(sc)) { 672 aprint_error_dev(sc->as_dev, "bad aperture size %d\n", 673 aperture); 674 return EINVAL; 675 } 676 break; 677 case CHIP_I965: 678 if (aperture != 512 * 1024 * 1024) { 679 aprint_error_dev(sc->as_dev, "bad aperture size %d\n", 680 aperture); 681 return EINVAL; 682 } 683 break; 684 } 685 686 return 0; 687 } 688 689 static int 690 agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) 691 { 692 struct agp_i810_softc *isc = sc->as_chipc; 693 694 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 695 #ifdef AGP_DEBUG 696 printf("%s: failed: offset 0x%08x, shift %d, entries %d\n", 697 device_xname(sc->as_dev), (int)offset, AGP_PAGE_SHIFT, 698 isc->gatt->ag_entries); 699 #endif 700 return EINVAL; 701 } 702 703 if (isc->chiptype != CHIP_I830) { 704 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 705 #ifdef AGP_DEBUG 706 printf("%s: trying to bind into stolen memory", 707 device_xname(sc->as_dev)); 708 #endif 709 return EINVAL; 710 } 711 } 712 713 WRITEGTT(offset, physical | 1); 714 return 0; 715 } 716 717 static int 718 agp_i810_unbind_page(struct agp_softc *sc, off_t offset) 719 { 720 struct agp_i810_softc *isc = sc->as_chipc; 721 722 if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) 723 return EINVAL; 724 725 if (isc->chiptype != CHIP_I810 ) { 726 if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) { 727 #ifdef AGP_DEBUG 728 printf("%s: trying to unbind from stolen memory", 729 device_xname(sc->as_dev)); 730 #endif 731 return EINVAL; 732 } 733 } 734 735 WRITEGTT(offset, 0); 736 return 0; 737 } 738 739 /* 740 * Writing via memory mapped registers already flushes all TLBs. 741 */ 742 static void 743 agp_i810_flush_tlb(struct agp_softc *sc) 744 { 745 } 746 747 static int 748 agp_i810_enable(struct agp_softc *sc, u_int32_t mode) 749 { 750 751 return 0; 752 } 753 754 static struct agp_memory * 755 agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 756 { 757 struct agp_i810_softc *isc = sc->as_chipc; 758 struct agp_memory *mem; 759 760 #ifdef AGP_DEBUG 761 printf("AGP: alloc(%d, 0x%x)\n", type, (int) size); 762 #endif 763 764 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 765 return 0; 766 767 if (sc->as_allocated + size > sc->as_maxmem) 768 return 0; 769 770 if (type == 1) { 771 /* 772 * Mapping local DRAM into GATT. 773 */ 774 if (isc->chiptype != CHIP_I810 ) 775 return 0; 776 if (size != isc->dcache_size) 777 return 0; 778 } else if (type == 2) { 779 /* 780 * Bogus mapping for the hardware cursor. 781 */ 782 if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE) 783 return 0; 784 } 785 786 mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO); 787 if (mem == NULL) 788 return NULL; 789 mem->am_id = sc->as_nextid++; 790 mem->am_size = size; 791 mem->am_type = type; 792 793 if (type == 2) { 794 /* 795 * Allocate and wire down the memory now so that we can 796 * get its physical address. 797 */ 798 mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP, 799 M_WAITOK); 800 if (mem->am_dmaseg == NULL) { 801 free(mem, M_AGP); 802 return NULL; 803 } 804 if (agp_alloc_dmamem(sc->as_dmat, size, 0, 805 &mem->am_dmamap, &mem->am_virtual, &mem->am_physical, 806 mem->am_dmaseg, 1, &mem->am_nseg) != 0) { 807 free(mem->am_dmaseg, M_AGP); 808 free(mem, M_AGP); 809 return NULL; 810 } 811 memset(mem->am_virtual, 0, size); 812 } else if (type != 1) { 813 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 814 size, 0, BUS_DMA_NOWAIT, 815 &mem->am_dmamap) != 0) { 816 free(mem, M_AGP); 817 return NULL; 818 } 819 } 820 821 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 822 sc->as_allocated += size; 823 824 return mem; 825 } 826 827 static int 828 agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem) 829 { 830 if (mem->am_is_bound) 831 return EBUSY; 832 833 if (mem->am_type == 2) { 834 agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap, 835 mem->am_virtual, mem->am_dmaseg, mem->am_nseg); 836 free(mem->am_dmaseg, M_AGP); 837 } 838 839 sc->as_allocated -= mem->am_size; 840 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 841 free(mem, M_AGP); 842 return 0; 843 } 844 845 static int 846 agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 847 off_t offset) 848 { 849 struct agp_i810_softc *isc = sc->as_chipc; 850 u_int32_t regval, i; 851 852 /* 853 * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the 854 * X server for mysterious reasons which leads to crashes if we write 855 * to the GTT through the MMIO window. 856 * Until the issue is solved, simply restore it. 857 */ 858 regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL); 859 if (regval != (isc->gatt->ag_physical | 1)) { 860 printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n", 861 regval); 862 bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL, 863 isc->gatt->ag_physical | 1); 864 } 865 866 if (mem->am_type == 2) { 867 WRITEGTT(offset, mem->am_physical | 1); 868 mem->am_offset = offset; 869 mem->am_is_bound = 1; 870 return 0; 871 } 872 873 if (mem->am_type != 1) 874 return agp_generic_bind_memory(sc, mem, offset); 875 876 if (isc->chiptype != CHIP_I810) 877 return EINVAL; 878 879 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 880 WRITEGTT(offset, i | 3); 881 mem->am_is_bound = 1; 882 return 0; 883 } 884 885 static int 886 agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 887 { 888 struct agp_i810_softc *isc = sc->as_chipc; 889 u_int32_t i; 890 891 if (mem->am_type == 2) { 892 WRITEGTT(mem->am_offset, 0); 893 mem->am_offset = 0; 894 mem->am_is_bound = 0; 895 return 0; 896 } 897 898 if (mem->am_type != 1) 899 return agp_generic_unbind_memory(sc, mem); 900 901 if (isc->chiptype != CHIP_I810) 902 return EINVAL; 903 904 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 905 WRITEGTT(i, 0); 906 mem->am_is_bound = 0; 907 return 0; 908 } 909 910 static bool 911 agp_i810_resume(device_t dv PMF_FN_ARGS) 912 { 913 struct agp_softc *sc = device_private(dv); 914 struct agp_i810_softc *isc = sc->as_chipc; 915 916 isc->pgtblctl = READ4(AGP_I810_PGTBL_CTL); 917 agp_flush_cache(); 918 919 return true; 920 } 921
Indexes created Thu Sep 25 16:09:42 GMT 2025