ahc_pci.c revision 1.21 1 1.21 thorpej /* $NetBSD: ahc_pci.c,v 1.21 2000/01/26 06:44:18 thorpej Exp $ */
2 1.2 thorpej
3 1.1 mycroft /*
4 1.1 mycroft * Product specific probe and attach routines for:
5 1.1 mycroft * 3940, 2940, aic7880, aic7870, aic7860 and aic7850 SCSI controllers
6 1.1 mycroft *
7 1.1 mycroft * Copyright (c) 1995, 1996 Justin T. Gibbs.
8 1.1 mycroft * All rights reserved.
9 1.1 mycroft *
10 1.1 mycroft * Redistribution and use in source and binary forms, with or without
11 1.1 mycroft * modification, are permitted provided that the following conditions
12 1.1 mycroft * are met:
13 1.1 mycroft * 1. Redistributions of source code must retain the above copyright
14 1.1 mycroft * notice immediately at the beginning of the file, without modification,
15 1.1 mycroft * this list of conditions, and the following disclaimer.
16 1.1 mycroft * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 mycroft * notice, this list of conditions and the following disclaimer in the
18 1.1 mycroft * documentation and/or other materials provided with the distribution.
19 1.1 mycroft * 3. The name of the author may not be used to endorse or promote products
20 1.1 mycroft * derived from this software without specific prior written permission.
21 1.1 mycroft *
22 1.1 mycroft * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 1.1 mycroft * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.1 mycroft * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.1 mycroft * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
26 1.1 mycroft * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.1 mycroft * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 1.1 mycroft * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 1.1 mycroft * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 1.1 mycroft * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 1.1 mycroft * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 mycroft * SUCH DAMAGE.
33 1.3 explorer *
34 1.3 explorer * from Id: aic7870.c,v 1.37 1996/06/08 06:55:55 gibbs Exp
35 1.1 mycroft */
36 1.1 mycroft
37 1.1 mycroft #include <sys/param.h>
38 1.1 mycroft #include <sys/systm.h>
39 1.1 mycroft #include <sys/malloc.h>
40 1.1 mycroft #include <sys/kernel.h>
41 1.1 mycroft #include <sys/queue.h>
42 1.1 mycroft #include <sys/device.h>
43 1.21 thorpej
44 1.1 mycroft #include <machine/bus.h>
45 1.1 mycroft #include <machine/intr.h>
46 1.1 mycroft
47 1.16 bouyer #include <dev/scsipi/scsi_all.h>
48 1.16 bouyer #include <dev/scsipi/scsipi_all.h>
49 1.16 bouyer #include <dev/scsipi/scsiconf.h>
50 1.1 mycroft
51 1.1 mycroft #include <dev/pci/pcireg.h>
52 1.1 mycroft #include <dev/pci/pcivar.h>
53 1.1 mycroft
54 1.1 mycroft #include <dev/ic/aic7xxxreg.h>
55 1.1 mycroft #include <dev/ic/aic7xxxvar.h>
56 1.1 mycroft
57 1.5 thorpej /*
58 1.5 thorpej * Under normal circumstances, these messages are unnecessary
59 1.5 thorpej * and not terribly cosmetic.
60 1.5 thorpej */
61 1.5 thorpej #ifdef DEBUG
62 1.1 mycroft #define bootverbose 1
63 1.5 thorpej #else
64 1.5 thorpej #define bootverbose 0
65 1.5 thorpej #endif
66 1.5 thorpej
67 1.12 cgd #define PCI_BASEADR_IO 0x10
68 1.12 cgd #define PCI_BASEADR_MEM 0x14
69 1.12 cgd
70 1.1 mycroft #define PCI_DEVICE_ID_ADAPTEC_3940U 0x82789004ul
71 1.1 mycroft #define PCI_DEVICE_ID_ADAPTEC_2944U 0x84789004ul
72 1.1 mycroft #define PCI_DEVICE_ID_ADAPTEC_2940U 0x81789004ul
73 1.19 hannken #define PCI_DEVICE_ID_ADAPTEC_2940UP 0x87789004ul
74 1.6 gibbs #define PCI_DEVICE_ID_ADAPTEC_2940AU 0x61789004ul
75 1.1 mycroft #define PCI_DEVICE_ID_ADAPTEC_3940 0x72789004ul
76 1.1 mycroft #define PCI_DEVICE_ID_ADAPTEC_2944 0x74789004ul
77 1.1 mycroft #define PCI_DEVICE_ID_ADAPTEC_2940 0x71789004ul
78 1.1 mycroft #define PCI_DEVICE_ID_ADAPTEC_AIC7880 0x80789004ul
79 1.1 mycroft #define PCI_DEVICE_ID_ADAPTEC_AIC7870 0x70789004ul
80 1.1 mycroft #define PCI_DEVICE_ID_ADAPTEC_AIC7860 0x60789004ul
81 1.1 mycroft #define PCI_DEVICE_ID_ADAPTEC_AIC7855 0x55789004ul
82 1.1 mycroft #define PCI_DEVICE_ID_ADAPTEC_AIC7850 0x50789004ul
83 1.1 mycroft
84 1.1 mycroft #define DEVCONFIG 0x40
85 1.1 mycroft #define MPORTMODE 0x00000400ul /* aic7870 only */
86 1.1 mycroft #define RAMPSM 0x00000200ul /* aic7870 only */
87 1.1 mycroft #define VOLSENSE 0x00000100ul
88 1.1 mycroft #define SCBRAMSEL 0x00000080ul
89 1.1 mycroft #define MRDCEN 0x00000040ul
90 1.1 mycroft #define EXTSCBTIME 0x00000020ul /* aic7870 only */
91 1.1 mycroft #define EXTSCBPEN 0x00000010ul /* aic7870 only */
92 1.1 mycroft #define BERREN 0x00000008ul
93 1.1 mycroft #define DACEN 0x00000004ul
94 1.1 mycroft #define STPWLEVEL 0x00000002ul
95 1.1 mycroft #define DIFACTNEGEN 0x00000001ul /* aic7870 only */
96 1.1 mycroft
97 1.1 mycroft #define CSIZE_LATTIME 0x0c
98 1.1 mycroft #define CACHESIZE 0x0000003ful /* only 5 bits */
99 1.1 mycroft #define LATTIME 0x0000ff00ul
100 1.1 mycroft
101 1.1 mycroft static u_char aic3940_count;
102 1.1 mycroft
103 1.10 cgd int ahc_pci_probe __P((struct device *, struct cfdata *, void *));
104 1.1 mycroft void ahc_pci_attach __P((struct device *, struct device *, void *));
105 1.1 mycroft
106 1.1 mycroft struct cfattach ahc_pci_ca = {
107 1.1 mycroft sizeof(struct ahc_data), ahc_pci_probe, ahc_pci_attach
108 1.1 mycroft };
109 1.1 mycroft
110 1.1 mycroft int
111 1.1 mycroft ahc_pci_probe(parent, match, aux)
112 1.1 mycroft struct device *parent;
113 1.11 cgd struct cfdata *match;
114 1.11 cgd void *aux;
115 1.1 mycroft {
116 1.1 mycroft struct pci_attach_args *pa = aux;
117 1.1 mycroft
118 1.1 mycroft switch (pa->pa_id) {
119 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_3940U:
120 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_2944U:
121 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_2940U:
122 1.19 hannken case PCI_DEVICE_ID_ADAPTEC_2940UP:
123 1.6 gibbs case PCI_DEVICE_ID_ADAPTEC_2940AU:
124 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_3940:
125 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_2944:
126 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_2940:
127 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_AIC7880:
128 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_AIC7870:
129 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_AIC7860:
130 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_AIC7855:
131 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_AIC7850:
132 1.1 mycroft return 1;
133 1.1 mycroft }
134 1.1 mycroft return 0;
135 1.1 mycroft }
136 1.1 mycroft
137 1.1 mycroft void
138 1.1 mycroft ahc_pci_attach(parent, self, aux)
139 1.1 mycroft struct device *parent, *self;
140 1.1 mycroft void *aux;
141 1.1 mycroft {
142 1.1 mycroft struct pci_attach_args *pa = aux;
143 1.1 mycroft struct ahc_data *ahc = (void *)self;
144 1.13 cgd bus_space_tag_t st, iot, memt;
145 1.13 cgd bus_space_handle_t sh, ioh, memh;
146 1.13 cgd int ioh_valid, memh_valid;
147 1.1 mycroft pci_intr_handle_t ih;
148 1.1 mycroft const char *intrstr;
149 1.1 mycroft u_long id;
150 1.1 mycroft unsigned opri = 0;
151 1.1 mycroft ahc_type ahc_t = AHC_NONE;
152 1.1 mycroft ahc_flag ahc_f = AHC_FNONE;
153 1.1 mycroft u_char ultra_enb = 0;
154 1.1 mycroft u_char our_id = 0;
155 1.1 mycroft
156 1.14 cgd ioh_valid = (pci_mapreg_map(pa, PCI_BASEADR_IO,
157 1.13 cgd PCI_MAPREG_TYPE_IO, 0,
158 1.13 cgd &iot, &ioh, NULL, NULL) == 0);
159 1.14 cgd memh_valid = (pci_mapreg_map(pa, PCI_BASEADR_MEM,
160 1.13 cgd PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
161 1.13 cgd &memt, &memh, NULL, NULL) == 0);
162 1.13 cgd
163 1.13 cgd if (memh_valid) {
164 1.13 cgd st = memt;
165 1.13 cgd sh = memh;
166 1.13 cgd } else if (ioh_valid) {
167 1.13 cgd st = iot;
168 1.13 cgd sh = ioh;
169 1.12 cgd } else {
170 1.13 cgd printf(": unable to map registers\n");
171 1.1 mycroft return;
172 1.12 cgd }
173 1.12 cgd printf("\n");
174 1.1 mycroft
175 1.1 mycroft switch (id = pa->pa_id) {
176 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_3940U:
177 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_3940:
178 1.1 mycroft if (id == PCI_DEVICE_ID_ADAPTEC_3940U)
179 1.1 mycroft ahc_t = AHC_394U;
180 1.1 mycroft else
181 1.1 mycroft ahc_t = AHC_394;
182 1.1 mycroft aic3940_count++;
183 1.1 mycroft if(!(aic3940_count & 0x01))
184 1.1 mycroft /* Even count implies second channel */
185 1.1 mycroft ahc_f |= AHC_CHNLB;
186 1.1 mycroft break;
187 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_2944U:
188 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_2940U:
189 1.19 hannken case PCI_DEVICE_ID_ADAPTEC_2940UP:
190 1.1 mycroft ahc_t = AHC_294U;
191 1.1 mycroft break;
192 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_2944:
193 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_2940:
194 1.1 mycroft ahc_t = AHC_294;
195 1.1 mycroft break;
196 1.6 gibbs case PCI_DEVICE_ID_ADAPTEC_2940AU:
197 1.6 gibbs ahc_t = AHC_294AU;
198 1.6 gibbs break;
199 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_AIC7880:
200 1.1 mycroft ahc_t = AHC_AIC7880;
201 1.1 mycroft break;
202 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_AIC7870:
203 1.1 mycroft ahc_t = AHC_AIC7870;
204 1.1 mycroft break;
205 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_AIC7860:
206 1.1 mycroft ahc_t = AHC_AIC7860;
207 1.1 mycroft break;
208 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_AIC7855:
209 1.1 mycroft case PCI_DEVICE_ID_ADAPTEC_AIC7850:
210 1.1 mycroft ahc_t = AHC_AIC7850;
211 1.1 mycroft break;
212 1.1 mycroft default:
213 1.1 mycroft break;
214 1.1 mycroft }
215 1.1 mycroft
216 1.1 mycroft /* On all PCI adapters, we allow SCB paging */
217 1.1 mycroft ahc_f |= AHC_PAGESCBS;
218 1.1 mycroft
219 1.1 mycroft /* Remeber how the card was setup in case there is no SEEPROM */
220 1.12 cgd our_id = bus_space_read_1(st, sh, SCSIID) & OID;
221 1.1 mycroft if(ahc_t & AHC_ULTRA)
222 1.12 cgd ultra_enb = bus_space_read_1(st, sh, SXFRCTL0) & ULTRAEN;
223 1.1 mycroft
224 1.12 cgd ahc_reset(ahc->sc_dev.dv_xname, st, sh);
225 1.1 mycroft
226 1.1 mycroft if(ahc_t & AHC_AIC7870){
227 1.1 mycroft u_long devconfig =
228 1.1 mycroft pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG);
229 1.1 mycroft
230 1.1 mycroft if(devconfig & (RAMPSM)) {
231 1.1 mycroft /*
232 1.1 mycroft * External SRAM present. Have the probe walk
233 1.1 mycroft * the SCBs to see how much SRAM we have and set
234 1.1 mycroft * the number of SCBs accordingly. We have to
235 1.1 mycroft * turn off SCBRAMSEL to access the external
236 1.1 mycroft * SCB SRAM.
237 1.1 mycroft *
238 1.1 mycroft * It seems that early versions of the aic7870
239 1.1 mycroft * didn't use these bits, hence the hack for the
240 1.1 mycroft * 3940 above. I would guess that recent 3940s
241 1.1 mycroft * using later aic7870 or aic7880 chips do
242 1.1 mycroft * actually set RAMPSM.
243 1.1 mycroft *
244 1.1 mycroft * The documentation isn't clear, but it sounds
245 1.1 mycroft * like the value written to devconfig must not
246 1.1 mycroft * have RAMPSM set. The second sixteen bits of
247 1.1 mycroft * the register are R/O anyway, so it shouldn't
248 1.1 mycroft * affect RAMPSM either way.
249 1.1 mycroft */
250 1.1 mycroft devconfig &= ~(RAMPSM|SCBRAMSEL);
251 1.1 mycroft pci_conf_write(pa->pa_pc, pa->pa_tag,
252 1.1 mycroft DEVCONFIG, devconfig);
253 1.1 mycroft }
254 1.1 mycroft }
255 1.1 mycroft
256 1.17 leo ahc_construct(ahc, st, sh, pa->pa_dmat, ahc_t, ahc_f);
257 1.1 mycroft
258 1.1 mycroft if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
259 1.1 mycroft pa->pa_intrline, &ih)) {
260 1.8 christos printf("%s: couldn't map interrupt\n", ahc->sc_dev.dv_xname);
261 1.1 mycroft ahc_free(ahc);
262 1.1 mycroft return;
263 1.1 mycroft }
264 1.1 mycroft intrstr = pci_intr_string(pa->pa_pc, ih);
265 1.4 cgd ahc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ahc_intr, ahc);
266 1.1 mycroft if (ahc->sc_ih == NULL) {
267 1.8 christos printf("%s: couldn't establish interrupt",
268 1.1 mycroft ahc->sc_dev.dv_xname);
269 1.1 mycroft if (intrstr != NULL)
270 1.8 christos printf(" at %s", intrstr);
271 1.8 christos printf("\n");
272 1.1 mycroft ahc_free(ahc);
273 1.1 mycroft return;
274 1.1 mycroft }
275 1.1 mycroft if (intrstr != NULL)
276 1.8 christos printf("%s: interrupting at %s\n", ahc->sc_dev.dv_xname,
277 1.1 mycroft intrstr);
278 1.21 thorpej
279 1.1 mycroft /*
280 1.1 mycroft * Protect ourself from spurrious interrupts during
281 1.1 mycroft * intialization.
282 1.1 mycroft */
283 1.1 mycroft opri = splbio();
284 1.1 mycroft
285 1.1 mycroft /*
286 1.1 mycroft * Do aic7870/aic7880/aic7850 specific initialization
287 1.1 mycroft */
288 1.1 mycroft {
289 1.1 mycroft u_char sblkctl;
290 1.1 mycroft char *id_string;
291 1.1 mycroft
292 1.1 mycroft switch(ahc->type) {
293 1.1 mycroft case AHC_394U:
294 1.1 mycroft case AHC_294U:
295 1.1 mycroft case AHC_AIC7880:
296 1.1 mycroft {
297 1.1 mycroft id_string = "aic7880 ";
298 1.20 thorpej ahc_load_seeprom(ahc);
299 1.1 mycroft break;
300 1.1 mycroft }
301 1.1 mycroft case AHC_394:
302 1.1 mycroft case AHC_294:
303 1.1 mycroft case AHC_AIC7870:
304 1.1 mycroft {
305 1.1 mycroft id_string = "aic7870 ";
306 1.20 thorpej ahc_load_seeprom(ahc);
307 1.1 mycroft break;
308 1.1 mycroft }
309 1.6 gibbs case AHC_294AU:
310 1.1 mycroft case AHC_AIC7860:
311 1.1 mycroft {
312 1.1 mycroft id_string = "aic7860 ";
313 1.20 thorpej ahc_load_seeprom(ahc);
314 1.1 mycroft break;
315 1.1 mycroft }
316 1.1 mycroft case AHC_AIC7850:
317 1.1 mycroft {
318 1.1 mycroft id_string = "aic7850 ";
319 1.1 mycroft /*
320 1.1 mycroft * Use defaults, if the chip wasn't initialized by
321 1.1 mycroft * a BIOS.
322 1.1 mycroft */
323 1.1 mycroft ahc->flags |= AHC_USEDEFAULTS;
324 1.1 mycroft break;
325 1.1 mycroft }
326 1.1 mycroft default:
327 1.1 mycroft {
328 1.8 christos printf("ahc: Unknown controller type. Ignoring.\n");
329 1.1 mycroft ahc_free(ahc);
330 1.1 mycroft splx(opri);
331 1.1 mycroft return;
332 1.1 mycroft }
333 1.1 mycroft }
334 1.1 mycroft
335 1.1 mycroft /*
336 1.1 mycroft * Take the LED out of diagnostic mode
337 1.1 mycroft */
338 1.1 mycroft sblkctl = AHC_INB(ahc, SBLKCTL);
339 1.1 mycroft AHC_OUTB(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON)));
340 1.1 mycroft
341 1.1 mycroft /*
342 1.1 mycroft * I don't know where this is set in the SEEPROM or by the
343 1.1 mycroft * BIOS, so we default to 100%.
344 1.1 mycroft */
345 1.1 mycroft AHC_OUTB(ahc, DSPCISTATUS, DFTHRSH_100);
346 1.1 mycroft
347 1.1 mycroft if(ahc->flags & AHC_USEDEFAULTS) {
348 1.1 mycroft /*
349 1.1 mycroft * PCI Adapter default setup
350 1.1 mycroft * Should only be used if the adapter does not have
351 1.1 mycroft * an SEEPROM.
352 1.1 mycroft */
353 1.1 mycroft /* See if someone else set us up already */
354 1.1 mycroft u_long i;
355 1.1 mycroft for(i = TARG_SCRATCH; i < 0x60; i++) {
356 1.3 explorer if(AHC_INB(ahc, i) != 0x00)
357 1.1 mycroft break;
358 1.1 mycroft }
359 1.3 explorer if(i == TARG_SCRATCH) {
360 1.3 explorer /*
361 1.3 explorer * Try looking for all ones. You can get
362 1.3 explorer * either.
363 1.3 explorer */
364 1.3 explorer for (i = TARG_SCRATCH; i < 0x60; i++) {
365 1.3 explorer if(AHC_INB(ahc, i) != 0xff)
366 1.3 explorer break;
367 1.3 explorer }
368 1.3 explorer }
369 1.3 explorer if((i != 0x60) && (our_id != 0)) {
370 1.8 christos printf("%s: Using left over BIOS settings\n",
371 1.1 mycroft ahc_name(ahc));
372 1.1 mycroft ahc->flags &= ~AHC_USEDEFAULTS;
373 1.1 mycroft }
374 1.1 mycroft else
375 1.1 mycroft our_id = 0x07;
376 1.1 mycroft AHC_OUTB(ahc, SCSICONF,
377 1.1 mycroft (our_id & 0x07)|ENSPCHK|RESET_SCSI);
378 1.1 mycroft /* In case we are a wide card */
379 1.1 mycroft AHC_OUTB(ahc, SCSICONF + 1, our_id);
380 1.1 mycroft
381 1.1 mycroft if(!ultra_enb || (ahc->flags & AHC_USEDEFAULTS)) {
382 1.1 mycroft /*
383 1.1 mycroft * If there wasn't a BIOS or the board
384 1.1 mycroft * wasn't in this mode to begin with,
385 1.1 mycroft * turn off ultra.
386 1.1 mycroft */
387 1.1 mycroft ahc->type &= ~AHC_ULTRA;
388 1.1 mycroft }
389 1.1 mycroft }
390 1.1 mycroft
391 1.8 christos printf("%s: %s", ahc_name(ahc), id_string);
392 1.1 mycroft }
393 1.1 mycroft
394 1.1 mycroft if(ahc_init(ahc)){
395 1.1 mycroft ahc_free(ahc);
396 1.1 mycroft splx(opri);
397 1.1 mycroft return; /* XXX PCI code should take return status */
398 1.1 mycroft }
399 1.1 mycroft splx(opri);
400 1.1 mycroft
401 1.1 mycroft ahc_attach(ahc);
402 1.1 mycroft }
403