ahc_pci.c revision 1.12
1 /* $NetBSD: ahc_pci.c,v 1.12 1997/04/10 02:48:45 cgd Exp $ */ 2 3 /* 4 * Product specific probe and attach routines for: 5 * 3940, 2940, aic7880, aic7870, aic7860 and aic7850 SCSI controllers 6 * 7 * Copyright (c) 1995, 1996 Justin T. Gibbs. 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice immediately at the beginning of the file, without modification, 15 * this list of conditions, and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from Id: aic7870.c,v 1.37 1996/06/08 06:55:55 gibbs Exp 35 */ 36 37 #if defined(__FreeBSD__) 38 #include <pci.h> 39 #endif 40 #if NPCI > 0 || defined(__NetBSD__) 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/malloc.h> 44 #include <sys/kernel.h> 45 #include <sys/queue.h> 46 #if defined(__NetBSD__) 47 #include <sys/device.h> 48 #include <machine/bus.h> 49 #include <machine/intr.h> 50 #endif /* defined(__NetBSD__) */ 51 52 #include <scsi/scsi_all.h> 53 #include <scsi/scsiconf.h> 54 55 #if defined(__FreeBSD__) 56 57 #include <pci/pcireg.h> 58 #include <pci/pcivar.h> 59 60 #include <machine/clock.h> 61 62 #include <i386/scsi/aic7xxx.h> 63 #include <i386/scsi/93cx6.h> 64 65 #include <dev/aic7xxx/aic7xxx_reg.h> 66 67 #define PCI_BASEADR0 PCI_MAP_REG_START 68 69 #elif defined(__NetBSD__) 70 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcivar.h> 73 74 #include <dev/ic/aic7xxxreg.h> 75 #include <dev/ic/aic7xxxvar.h> 76 #include <dev/ic/smc93cx6var.h> 77 78 /* 79 * Under normal circumstances, these messages are unnecessary 80 * and not terribly cosmetic. 81 */ 82 #ifdef DEBUG 83 #define bootverbose 1 84 #else 85 #define bootverbose 0 86 #endif 87 88 #define PCI_BASEADR_IO 0x10 89 #define PCI_BASEADR_MEM 0x14 90 91 int ahc_pci_prefer_io = 0; /* 1 -> map via I/O (patchable data) */ 92 93 #endif /* defined(__NetBSD__) */ 94 95 #define PCI_DEVICE_ID_ADAPTEC_3940U 0x82789004ul 96 #define PCI_DEVICE_ID_ADAPTEC_2944U 0x84789004ul 97 #define PCI_DEVICE_ID_ADAPTEC_2940U 0x81789004ul 98 #define PCI_DEVICE_ID_ADAPTEC_2940AU 0x61789004ul 99 #define PCI_DEVICE_ID_ADAPTEC_3940 0x72789004ul 100 #define PCI_DEVICE_ID_ADAPTEC_2944 0x74789004ul 101 #define PCI_DEVICE_ID_ADAPTEC_2940 0x71789004ul 102 #define PCI_DEVICE_ID_ADAPTEC_AIC7880 0x80789004ul 103 #define PCI_DEVICE_ID_ADAPTEC_AIC7870 0x70789004ul 104 #define PCI_DEVICE_ID_ADAPTEC_AIC7860 0x60789004ul 105 #define PCI_DEVICE_ID_ADAPTEC_AIC7855 0x55789004ul 106 #define PCI_DEVICE_ID_ADAPTEC_AIC7850 0x50789004ul 107 108 #define DEVCONFIG 0x40 109 #define MPORTMODE 0x00000400ul /* aic7870 only */ 110 #define RAMPSM 0x00000200ul /* aic7870 only */ 111 #define VOLSENSE 0x00000100ul 112 #define SCBRAMSEL 0x00000080ul 113 #define MRDCEN 0x00000040ul 114 #define EXTSCBTIME 0x00000020ul /* aic7870 only */ 115 #define EXTSCBPEN 0x00000010ul /* aic7870 only */ 116 #define BERREN 0x00000008ul 117 #define DACEN 0x00000004ul 118 #define STPWLEVEL 0x00000002ul 119 #define DIFACTNEGEN 0x00000001ul /* aic7870 only */ 120 121 #define CSIZE_LATTIME 0x0c 122 #define CACHESIZE 0x0000003ful /* only 5 bits */ 123 #define LATTIME 0x0000ff00ul 124 125 /* 126 * Define the format of the aic78X0 SEEPROM registers (16 bits). 127 * 128 */ 129 130 struct seeprom_config { 131 132 /* 133 * SCSI ID Configuration Flags 134 */ 135 #define CFXFER 0x0007 /* synchronous transfer rate */ 136 #define CFSYNCH 0x0008 /* enable synchronous transfer */ 137 #define CFDISC 0x0010 /* enable disconnection */ 138 #define CFWIDEB 0x0020 /* wide bus device */ 139 /* UNUSED 0x00C0 */ 140 #define CFSTART 0x0100 /* send start unit SCSI command */ 141 #define CFINCBIOS 0x0200 /* include in BIOS scan */ 142 #define CFRNFOUND 0x0400 /* report even if not found */ 143 /* UNUSED 0xf800 */ 144 u_int16_t device_flags[16]; /* words 0-15 */ 145 146 /* 147 * BIOS Control Bits 148 */ 149 #define CFSUPREM 0x0001 /* support all removeable drives */ 150 #define CFSUPREMB 0x0002 /* support removeable drives for boot only */ 151 #define CFBIOSEN 0x0004 /* BIOS enabled */ 152 /* UNUSED 0x0008 */ 153 #define CFSM2DRV 0x0010 /* support more than two drives */ 154 /* UNUSED 0x0060 */ 155 #define CFEXTEND 0x0080 /* extended translation enabled */ 156 /* UNUSED 0xff00 */ 157 u_int16_t bios_control; /* word 16 */ 158 159 /* 160 * Host Adapter Control Bits 161 */ 162 /* UNUSED 0x0001 */ 163 #define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */ 164 #define CFSTERM 0x0004 /* SCSI low byte termination (non-wide cards) */ 165 #define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */ 166 #define CFSPARITY 0x0010 /* SCSI parity */ 167 /* UNUSED 0x0020 */ 168 #define CFRESETB 0x0040 /* reset SCSI bus at IC initialization */ 169 /* UNUSED 0xff80 */ 170 u_int16_t adapter_control; /* word 17 */ 171 172 /* 173 * Bus Release, Host Adapter ID 174 */ 175 #define CFSCSIID 0x000f /* host adapter SCSI ID */ 176 /* UNUSED 0x00f0 */ 177 #define CFBRTIME 0xff00 /* bus release time */ 178 u_int16_t brtime_id; /* word 18 */ 179 180 /* 181 * Maximum targets 182 */ 183 #define CFMAXTARG 0x00ff /* maximum targets */ 184 /* UNUSED 0xff00 */ 185 u_int16_t max_targets; /* word 19 */ 186 187 u_int16_t res_1[11]; /* words 20-30 */ 188 u_int16_t checksum; /* word 31 */ 189 }; 190 191 static void load_seeprom __P((struct ahc_data *ahc)); 192 static int acquire_seeprom __P((struct seeprom_descriptor *sd)); 193 static void release_seeprom __P((struct seeprom_descriptor *sd)); 194 195 static u_char aic3940_count; 196 197 #if defined(__FreeBSD__) 198 199 static char* aic7870_probe __P((pcici_t tag, pcidi_t type)); 200 static void aic7870_attach __P((pcici_t config_id, int unit)); 201 202 static struct pci_device ahc_pci_driver = { 203 "ahc", 204 aic7870_probe, 205 aic7870_attach, 206 &ahc_unit, 207 NULL 208 }; 209 210 DATA_SET (pcidevice_set, ahc_pci_driver); 211 212 static char* 213 aic7870_probe (pcici_t tag, pcidi_t type) 214 { 215 switch(type) { 216 case PCI_DEVICE_ID_ADAPTEC_3940U: 217 return ("Adaptec 3940 Ultra SCSI host adapter"); 218 break; 219 case PCI_DEVICE_ID_ADAPTEC_3940: 220 return ("Adaptec 3940 SCSI host adapter"); 221 break; 222 case PCI_DEVICE_ID_ADAPTEC_2944U: 223 return ("Adaptec 2944 Ultra SCSI host adapter"); 224 break; 225 case PCI_DEVICE_ID_ADAPTEC_2940U: 226 return ("Adaptec 2940 Ultra SCSI host adapter"); 227 break; 228 case PCI_DEVICE_ID_ADAPTEC_2944: 229 return ("Adaptec 2944 SCSI host adapter"); 230 break; 231 case PCI_DEVICE_ID_ADAPTEC_2940: 232 return ("Adaptec 2940 SCSI host adapter"); 233 break; 234 case PCI_DEVICE_ID_ADAPTEC_2940AU: 235 return ("Adaptec 2940A Ultra SCSI host adapter"); 236 break; 237 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 238 return ("Adaptec aic7880 Ultra SCSI host adapter"); 239 break; 240 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 241 return ("Adaptec aic7870 SCSI host adapter"); 242 break; 243 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 244 return ("Adaptec aic7860 SCSI host adapter"); 245 break; 246 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 247 return ("Adaptec aic7855 SCSI host adapter"); 248 break; 249 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 250 return ("Adaptec aic7850 SCSI host adapter"); 251 break; 252 default: 253 break; 254 } 255 return (0); 256 257 } 258 259 #elif defined(__NetBSD__) 260 261 #ifdef __BROKEN_INDIRECT_CONFIG 262 int ahc_pci_probe __P((struct device *, void *, void *)); 263 #else 264 int ahc_pci_probe __P((struct device *, struct cfdata *, void *)); 265 #endif 266 void ahc_pci_attach __P((struct device *, struct device *, void *)); 267 268 struct cfattach ahc_pci_ca = { 269 sizeof(struct ahc_data), ahc_pci_probe, ahc_pci_attach 270 }; 271 272 int 273 ahc_pci_probe(parent, match, aux) 274 struct device *parent; 275 #ifdef __BROKEN_INDIRECT_CONFIG 276 void *match; 277 #else 278 struct cfdata *match; 279 #endif 280 void *aux; 281 { 282 struct pci_attach_args *pa = aux; 283 284 switch (pa->pa_id) { 285 case PCI_DEVICE_ID_ADAPTEC_3940U: 286 case PCI_DEVICE_ID_ADAPTEC_2944U: 287 case PCI_DEVICE_ID_ADAPTEC_2940U: 288 case PCI_DEVICE_ID_ADAPTEC_2940AU: 289 case PCI_DEVICE_ID_ADAPTEC_3940: 290 case PCI_DEVICE_ID_ADAPTEC_2944: 291 case PCI_DEVICE_ID_ADAPTEC_2940: 292 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 293 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 294 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 295 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 296 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 297 return 1; 298 } 299 return 0; 300 } 301 #endif /* defined(__NetBSD__) */ 302 303 #if defined(__FreeBSD__) 304 static void 305 aic7870_attach(config_id, unit) 306 pcici_t config_id; 307 int unit; 308 #elif defined(__NetBSD__) 309 void 310 ahc_pci_attach(parent, self, aux) 311 struct device *parent, *self; 312 void *aux; 313 #endif 314 { 315 #if defined(__FreeBSD__) 316 u_long io_port; 317 int unit = ahc->sc_dev.dv_unit; 318 #elif defined(__NetBSD__) 319 struct pci_attach_args *pa = aux; 320 struct ahc_data *ahc = (void *)self; 321 bus_addr_t busbase; 322 bus_size_t bussize; 323 bus_space_tag_t st; 324 bus_space_handle_t sh; 325 pci_intr_handle_t ih; 326 const char *intrstr; 327 #endif 328 u_long id; 329 unsigned opri = 0; 330 ahc_type ahc_t = AHC_NONE; 331 ahc_flag ahc_f = AHC_FNONE; 332 #if defined(__FreeBSD__) 333 struct ahc_data *ahc; 334 #endif 335 u_char ultra_enb = 0; 336 u_char our_id = 0; 337 338 #if defined(__FreeBSD__) 339 if(!(io_port = pci_conf_read(config_id, PCI_BASEADR0))) 340 return; 341 /* 342 * The first bit of PCI_BASEADR0 is always 343 * set hence we mask it off. 344 */ 345 io_port &= 0xfffffffe; 346 #elif defined(__NetBSD__) 347 if (ahc_pci_prefer_io) { 348 if (pci_io_find(pa->pa_pc, pa->pa_tag, PCI_BASEADR_IO, 349 &busbase, &bussize)) { 350 printf(": unable to find PCI I/O base\n"); 351 return; 352 } 353 st = pa->pa_iot; 354 } else { 355 if (pci_mem_find(pa->pa_pc, pa->pa_tag, PCI_BASEADR_MEM, 356 &busbase, &bussize, NULL)) { 357 printf(": unable to find PCI memory base\n"); 358 return; 359 } 360 st = pa->pa_memt; 361 } 362 if (bus_space_map(st, busbase, bussize, 0, &sh)) { 363 printf(": unable to map %s registers\n", 364 ahc_pci_prefer_io ? "I/O" : "memory"); 365 return; 366 } 367 printf("\n"); 368 #endif 369 370 #if defined(__FreeBSD__) 371 switch ((id = pci_conf_read(config_id, PCI_ID_REG))) { 372 #elif defined(__NetBSD__) 373 switch (id = pa->pa_id) { 374 #endif 375 case PCI_DEVICE_ID_ADAPTEC_3940U: 376 case PCI_DEVICE_ID_ADAPTEC_3940: 377 if (id == PCI_DEVICE_ID_ADAPTEC_3940U) 378 ahc_t = AHC_394U; 379 else 380 ahc_t = AHC_394; 381 aic3940_count++; 382 if(!(aic3940_count & 0x01)) 383 /* Even count implies second channel */ 384 ahc_f |= AHC_CHNLB; 385 break; 386 case PCI_DEVICE_ID_ADAPTEC_2944U: 387 case PCI_DEVICE_ID_ADAPTEC_2940U: 388 ahc_t = AHC_294U; 389 break; 390 case PCI_DEVICE_ID_ADAPTEC_2944: 391 case PCI_DEVICE_ID_ADAPTEC_2940: 392 ahc_t = AHC_294; 393 break; 394 case PCI_DEVICE_ID_ADAPTEC_2940AU: 395 ahc_t = AHC_294AU; 396 break; 397 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 398 ahc_t = AHC_AIC7880; 399 break; 400 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 401 ahc_t = AHC_AIC7870; 402 break; 403 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 404 ahc_t = AHC_AIC7860; 405 break; 406 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 407 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 408 ahc_t = AHC_AIC7850; 409 break; 410 default: 411 break; 412 } 413 414 /* On all PCI adapters, we allow SCB paging */ 415 ahc_f |= AHC_PAGESCBS; 416 417 /* Remeber how the card was setup in case there is no SEEPROM */ 418 #if defined(__FreeBSD__) 419 our_id = inb(SCSIID + io_port) & OID; 420 if(ahc_t & AHC_ULTRA) 421 ultra_enb = inb(SXFRCTL0 + io_port) & ULTRAEN; 422 #else 423 our_id = bus_space_read_1(st, sh, SCSIID) & OID; 424 if(ahc_t & AHC_ULTRA) 425 ultra_enb = bus_space_read_1(st, sh, SXFRCTL0) & ULTRAEN; 426 #endif 427 428 #if defined(__FreeBSD__) 429 ahc_reset(io_port); 430 #elif defined(__NetBSD__) 431 ahc_reset(ahc->sc_dev.dv_xname, st, sh); 432 #endif 433 434 if(ahc_t & AHC_AIC7870){ 435 #if defined(__FreeBSD__) 436 u_long devconfig = pci_conf_read(config_id, DEVCONFIG); 437 #elif defined(__NetBSD__) 438 u_long devconfig = 439 pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG); 440 #endif 441 442 if(devconfig & (RAMPSM)) { 443 /* 444 * External SRAM present. Have the probe walk 445 * the SCBs to see how much SRAM we have and set 446 * the number of SCBs accordingly. We have to 447 * turn off SCBRAMSEL to access the external 448 * SCB SRAM. 449 * 450 * It seems that early versions of the aic7870 451 * didn't use these bits, hence the hack for the 452 * 3940 above. I would guess that recent 3940s 453 * using later aic7870 or aic7880 chips do 454 * actually set RAMPSM. 455 * 456 * The documentation isn't clear, but it sounds 457 * like the value written to devconfig must not 458 * have RAMPSM set. The second sixteen bits of 459 * the register are R/O anyway, so it shouldn't 460 * affect RAMPSM either way. 461 */ 462 devconfig &= ~(RAMPSM|SCBRAMSEL); 463 #if defined(__FreeBSD__) 464 pci_conf_write(config_id, DEVCONFIG, devconfig); 465 #elif defined(__NetBSD__) 466 pci_conf_write(pa->pa_pc, pa->pa_tag, 467 DEVCONFIG, devconfig); 468 #endif 469 } 470 } 471 472 #if defined(__FreeBSD__) 473 if(!(ahc = ahc_alloc(unit, io_port, ahc_t, ahc_f))) 474 return; /* XXX PCI code should take return status */ 475 476 if(!(pci_map_int(config_id, ahc_intr, (void *)ahc, &bio_imask))) { 477 ahc_free(ahc); 478 return; 479 } 480 #elif defined(__NetBSD__) 481 ahc_construct(ahc, st, sh, ahc_t, ahc_f); 482 483 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 484 pa->pa_intrline, &ih)) { 485 printf("%s: couldn't map interrupt\n", ahc->sc_dev.dv_xname); 486 ahc_free(ahc); 487 return; 488 } 489 intrstr = pci_intr_string(pa->pa_pc, ih); 490 #if defined(__OpenBSD__) 491 ahc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ahc_intr, ahc, 492 ahc->sc_dev.dv_xname); 493 #else 494 ahc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ahc_intr, ahc); 495 #endif 496 if (ahc->sc_ih == NULL) { 497 printf("%s: couldn't establish interrupt", 498 ahc->sc_dev.dv_xname); 499 if (intrstr != NULL) 500 printf(" at %s", intrstr); 501 printf("\n"); 502 ahc_free(ahc); 503 return; 504 } 505 if (intrstr != NULL) 506 printf("%s: interrupting at %s\n", ahc->sc_dev.dv_xname, 507 intrstr); 508 #endif 509 /* 510 * Protect ourself from spurrious interrupts during 511 * intialization. 512 */ 513 opri = splbio(); 514 515 /* 516 * Do aic7870/aic7880/aic7850 specific initialization 517 */ 518 { 519 u_char sblkctl; 520 char *id_string; 521 522 switch(ahc->type) { 523 case AHC_394U: 524 case AHC_294U: 525 case AHC_AIC7880: 526 { 527 id_string = "aic7880 "; 528 load_seeprom(ahc); 529 break; 530 } 531 case AHC_394: 532 case AHC_294: 533 case AHC_AIC7870: 534 { 535 id_string = "aic7870 "; 536 load_seeprom(ahc); 537 break; 538 } 539 case AHC_294AU: 540 case AHC_AIC7860: 541 { 542 id_string = "aic7860 "; 543 load_seeprom(ahc); 544 break; 545 } 546 case AHC_AIC7850: 547 { 548 id_string = "aic7850 "; 549 /* 550 * Use defaults, if the chip wasn't initialized by 551 * a BIOS. 552 */ 553 ahc->flags |= AHC_USEDEFAULTS; 554 break; 555 } 556 default: 557 { 558 printf("ahc: Unknown controller type. Ignoring.\n"); 559 ahc_free(ahc); 560 splx(opri); 561 return; 562 } 563 } 564 565 /* 566 * Take the LED out of diagnostic mode 567 */ 568 sblkctl = AHC_INB(ahc, SBLKCTL); 569 AHC_OUTB(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON))); 570 571 /* 572 * I don't know where this is set in the SEEPROM or by the 573 * BIOS, so we default to 100%. 574 */ 575 AHC_OUTB(ahc, DSPCISTATUS, DFTHRSH_100); 576 577 if(ahc->flags & AHC_USEDEFAULTS) { 578 /* 579 * PCI Adapter default setup 580 * Should only be used if the adapter does not have 581 * an SEEPROM. 582 */ 583 /* See if someone else set us up already */ 584 u_long i; 585 for(i = TARG_SCRATCH; i < 0x60; i++) { 586 if(AHC_INB(ahc, i) != 0x00) 587 break; 588 } 589 if(i == TARG_SCRATCH) { 590 /* 591 * Try looking for all ones. You can get 592 * either. 593 */ 594 for (i = TARG_SCRATCH; i < 0x60; i++) { 595 if(AHC_INB(ahc, i) != 0xff) 596 break; 597 } 598 } 599 if((i != 0x60) && (our_id != 0)) { 600 printf("%s: Using left over BIOS settings\n", 601 ahc_name(ahc)); 602 ahc->flags &= ~AHC_USEDEFAULTS; 603 } 604 else 605 our_id = 0x07; 606 AHC_OUTB(ahc, SCSICONF, 607 (our_id & 0x07)|ENSPCHK|RESET_SCSI); 608 /* In case we are a wide card */ 609 AHC_OUTB(ahc, SCSICONF + 1, our_id); 610 611 if(!ultra_enb || (ahc->flags & AHC_USEDEFAULTS)) { 612 /* 613 * If there wasn't a BIOS or the board 614 * wasn't in this mode to begin with, 615 * turn off ultra. 616 */ 617 ahc->type &= ~AHC_ULTRA; 618 } 619 } 620 621 printf("%s: %s", ahc_name(ahc), id_string); 622 } 623 624 if(ahc_init(ahc)){ 625 ahc_free(ahc); 626 splx(opri); 627 return; /* XXX PCI code should take return status */ 628 } 629 splx(opri); 630 631 ahc_attach(ahc); 632 } 633 634 /* 635 * Read the SEEPROM. Return 0 on failure 636 */ 637 void 638 load_seeprom(ahc) 639 struct ahc_data *ahc; 640 { 641 struct seeprom_descriptor sd; 642 struct seeprom_config sc; 643 u_short *scarray = (u_short *)≻ 644 u_short checksum = 0; 645 u_char scsi_conf; 646 u_char host_id; 647 int have_seeprom; 648 649 #if defined(__FreeBSD__) 650 sd.sd_iobase = ahc->baseport + SEECTL; 651 #elif defined(__NetBSD__) 652 sd.sd_st = ahc->sc_st; 653 sd.sd_sh = ahc->sc_sh; 654 sd.sd_offset = SEECTL; 655 #endif 656 sd.sd_MS = SEEMS; 657 sd.sd_RDY = SEERDY; 658 sd.sd_CS = SEECS; 659 sd.sd_CK = SEECK; 660 sd.sd_DO = SEEDO; 661 sd.sd_DI = SEEDI; 662 663 if(bootverbose) 664 printf("%s: Reading SEEPROM...", ahc_name(ahc)); 665 have_seeprom = acquire_seeprom(&sd); 666 if (have_seeprom) { 667 have_seeprom = read_seeprom(&sd, 668 (u_int16_t *)&sc, 669 ahc->flags & AHC_CHNLB, 670 sizeof(sc)/2); 671 release_seeprom(&sd); 672 if (have_seeprom) { 673 /* Check checksum */ 674 int i; 675 676 for (i = 0;i < (sizeof(sc)/2 - 1);i = i + 1) 677 checksum = checksum + scarray[i]; 678 if (checksum != sc.checksum) { 679 if(bootverbose) 680 printf ("checksum error"); 681 have_seeprom = 0; 682 } 683 else if(bootverbose) 684 printf("done.\n"); 685 } 686 } 687 if (!have_seeprom) { 688 if(bootverbose) 689 printf("\n%s: No SEEPROM availible\n", ahc_name(ahc)); 690 ahc->flags |= AHC_USEDEFAULTS; 691 } 692 else { 693 /* 694 * Put the data we've collected down into SRAM 695 * where ahc_init will find it. 696 */ 697 int i; 698 int max_targ = sc.max_targets & CFMAXTARG; 699 700 for(i = 0; i < max_targ; i++){ 701 u_char target_settings; 702 target_settings = (sc.device_flags[i] & CFXFER) << 4; 703 if (sc.device_flags[i] & CFSYNCH) 704 target_settings |= SOFS; 705 if (sc.device_flags[i] & CFWIDEB) 706 target_settings |= WIDEXFER; 707 if (sc.device_flags[i] & CFDISC) 708 ahc->discenable |= (0x01 << i); 709 AHC_OUTB(ahc, TARG_SCRATCH+i, target_settings); 710 } 711 AHC_OUTB(ahc, DISC_DSB, ~(ahc->discenable & 0xff)); 712 AHC_OUTB(ahc, DISC_DSB + 1, ~((ahc->discenable >> 8) & 0xff)); 713 714 host_id = sc.brtime_id & CFSCSIID; 715 716 scsi_conf = (host_id & 0x7); 717 if(sc.adapter_control & CFSPARITY) 718 scsi_conf |= ENSPCHK; 719 if(sc.adapter_control & CFRESETB) 720 scsi_conf |= RESET_SCSI; 721 722 if(ahc->type & AHC_ULTRA) { 723 /* Should we enable Ultra mode? */ 724 if(!(sc.adapter_control & CFULTRAEN)) 725 /* Treat us as a non-ultra card */ 726 ahc->type &= ~AHC_ULTRA; 727 } 728 /* Set the host ID */ 729 AHC_OUTB(ahc, SCSICONF, scsi_conf); 730 /* In case we are a wide card */ 731 AHC_OUTB(ahc, SCSICONF + 1, host_id); 732 } 733 } 734 735 static int 736 acquire_seeprom(sd) 737 struct seeprom_descriptor *sd; 738 { 739 int wait; 740 741 /* 742 * Request access of the memory port. When access is 743 * granted, SEERDY will go high. We use a 1 second 744 * timeout which should be near 1 second more than 745 * is needed. Reason: after the chip reset, there 746 * should be no contention. 747 */ 748 SEEPROM_OUTB(sd, sd->sd_MS); 749 wait = 1000; /* 1 second timeout in msec */ 750 while (--wait && ((SEEPROM_INB(sd) & sd->sd_RDY) == 0)) { 751 DELAY (1000); /* delay 1 msec */ 752 } 753 if ((SEEPROM_INB(sd) & sd->sd_RDY) == 0) { 754 SEEPROM_OUTB(sd, 0); 755 return (0); 756 } 757 return(1); 758 } 759 760 static void 761 release_seeprom(sd) 762 struct seeprom_descriptor *sd; 763 { 764 /* Release access to the memory port and the serial EEPROM. */ 765 SEEPROM_OUTB(sd, 0); 766 } 767 768 #endif /* NPCI > 0 */ 769
Indexes created Wed Oct 01 19:09:53 GMT 2025