ahc_pci.c revision 1.15.2.1
1 /* $NetBSD: ahc_pci.c,v 1.15.2.1 1997/07/01 17:35:33 bouyer Exp $ */ 2 3 /* 4 * Product specific probe and attach routines for: 5 * 3940, 2940, aic7880, aic7870, aic7860 and aic7850 SCSI controllers 6 * 7 * Copyright (c) 1995, 1996 Justin T. Gibbs. 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice immediately at the beginning of the file, without modification, 15 * this list of conditions, and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from Id: aic7870.c,v 1.37 1996/06/08 06:55:55 gibbs Exp 35 */ 36 37 #if defined(__FreeBSD__) 38 #include <pci.h> 39 #endif 40 #if NPCI > 0 || defined(__NetBSD__) 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/malloc.h> 44 #include <sys/kernel.h> 45 #include <sys/queue.h> 46 #if defined(__NetBSD__) 47 #include <sys/device.h> 48 #include <machine/bus.h> 49 #include <machine/intr.h> 50 #endif /* defined(__NetBSD__) */ 51 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsipi_all.h> 54 #if defined (__NetBSD__) 55 #endif 56 #include <dev/scsipi/scsiconf.h> 57 58 #if defined(__FreeBSD__) 59 60 #include <pci/pcireg.h> 61 #include <pci/pcivar.h> 62 63 #include <machine/clock.h> 64 65 #include <i386/scsi/aic7xxx.h> 66 #include <i386/scsi/93cx6.h> 67 68 #include <dev/aic7xxx/aic7xxx_reg.h> 69 70 #define PCI_BASEADR0 PCI_MAP_REG_START 71 72 #elif defined(__NetBSD__) 73 74 #include <dev/pci/pcireg.h> 75 #include <dev/pci/pcivar.h> 76 77 #include <dev/ic/aic7xxxreg.h> 78 #include <dev/ic/aic7xxxvar.h> 79 #include <dev/ic/smc93cx6var.h> 80 81 /* 82 * Under normal circumstances, these messages are unnecessary 83 * and not terribly cosmetic. 84 */ 85 #ifdef DEBUG 86 #define bootverbose 1 87 #else 88 #define bootverbose 0 89 #endif 90 91 #define PCI_BASEADR_IO 0x10 92 #define PCI_BASEADR_MEM 0x14 93 94 #endif /* defined(__NetBSD__) */ 95 96 #define PCI_DEVICE_ID_ADAPTEC_3940U 0x82789004ul 97 #define PCI_DEVICE_ID_ADAPTEC_2944U 0x84789004ul 98 #define PCI_DEVICE_ID_ADAPTEC_2940U 0x81789004ul 99 #define PCI_DEVICE_ID_ADAPTEC_2940AU 0x61789004ul 100 #define PCI_DEVICE_ID_ADAPTEC_3940 0x72789004ul 101 #define PCI_DEVICE_ID_ADAPTEC_2944 0x74789004ul 102 #define PCI_DEVICE_ID_ADAPTEC_2940 0x71789004ul 103 #define PCI_DEVICE_ID_ADAPTEC_AIC7880 0x80789004ul 104 #define PCI_DEVICE_ID_ADAPTEC_AIC7870 0x70789004ul 105 #define PCI_DEVICE_ID_ADAPTEC_AIC7860 0x60789004ul 106 #define PCI_DEVICE_ID_ADAPTEC_AIC7855 0x55789004ul 107 #define PCI_DEVICE_ID_ADAPTEC_AIC7850 0x50789004ul 108 109 #define DEVCONFIG 0x40 110 #define MPORTMODE 0x00000400ul /* aic7870 only */ 111 #define RAMPSM 0x00000200ul /* aic7870 only */ 112 #define VOLSENSE 0x00000100ul 113 #define SCBRAMSEL 0x00000080ul 114 #define MRDCEN 0x00000040ul 115 #define EXTSCBTIME 0x00000020ul /* aic7870 only */ 116 #define EXTSCBPEN 0x00000010ul /* aic7870 only */ 117 #define BERREN 0x00000008ul 118 #define DACEN 0x00000004ul 119 #define STPWLEVEL 0x00000002ul 120 #define DIFACTNEGEN 0x00000001ul /* aic7870 only */ 121 122 #define CSIZE_LATTIME 0x0c 123 #define CACHESIZE 0x0000003ful /* only 5 bits */ 124 #define LATTIME 0x0000ff00ul 125 126 /* 127 * Define the format of the aic78X0 SEEPROM registers (16 bits). 128 * 129 */ 130 131 struct seeprom_config { 132 133 /* 134 * SCSI ID Configuration Flags 135 */ 136 #define CFXFER 0x0007 /* synchronous transfer rate */ 137 #define CFSYNCH 0x0008 /* enable synchronous transfer */ 138 #define CFDISC 0x0010 /* enable disconnection */ 139 #define CFWIDEB 0x0020 /* wide bus device */ 140 /* UNUSED 0x00C0 */ 141 #define CFSTART 0x0100 /* send start unit SCSI command */ 142 #define CFINCBIOS 0x0200 /* include in BIOS scan */ 143 #define CFRNFOUND 0x0400 /* report even if not found */ 144 /* UNUSED 0xf800 */ 145 u_int16_t device_flags[16]; /* words 0-15 */ 146 147 /* 148 * BIOS Control Bits 149 */ 150 #define CFSUPREM 0x0001 /* support all removeable drives */ 151 #define CFSUPREMB 0x0002 /* support removeable drives for boot only */ 152 #define CFBIOSEN 0x0004 /* BIOS enabled */ 153 /* UNUSED 0x0008 */ 154 #define CFSM2DRV 0x0010 /* support more than two drives */ 155 /* UNUSED 0x0060 */ 156 #define CFEXTEND 0x0080 /* extended translation enabled */ 157 /* UNUSED 0xff00 */ 158 u_int16_t bios_control; /* word 16 */ 159 160 /* 161 * Host Adapter Control Bits 162 */ 163 /* UNUSED 0x0001 */ 164 #define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */ 165 #define CFSTERM 0x0004 /* SCSI low byte termination (non-wide cards) */ 166 #define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */ 167 #define CFSPARITY 0x0010 /* SCSI parity */ 168 /* UNUSED 0x0020 */ 169 #define CFRESETB 0x0040 /* reset SCSI bus at IC initialization */ 170 /* UNUSED 0xff80 */ 171 u_int16_t adapter_control; /* word 17 */ 172 173 /* 174 * Bus Release, Host Adapter ID 175 */ 176 #define CFSCSIID 0x000f /* host adapter SCSI ID */ 177 /* UNUSED 0x00f0 */ 178 #define CFBRTIME 0xff00 /* bus release time */ 179 u_int16_t brtime_id; /* word 18 */ 180 181 /* 182 * Maximum targets 183 */ 184 #define CFMAXTARG 0x00ff /* maximum targets */ 185 /* UNUSED 0xff00 */ 186 u_int16_t max_targets; /* word 19 */ 187 188 u_int16_t res_1[11]; /* words 20-30 */ 189 u_int16_t checksum; /* word 31 */ 190 }; 191 192 static void load_seeprom __P((struct ahc_data *ahc)); 193 static int acquire_seeprom __P((struct seeprom_descriptor *sd)); 194 static void release_seeprom __P((struct seeprom_descriptor *sd)); 195 196 static u_char aic3940_count; 197 198 #if defined(__FreeBSD__) 199 200 static char* aic7870_probe __P((pcici_t tag, pcidi_t type)); 201 static void aic7870_attach __P((pcici_t config_id, int unit)); 202 203 static struct pci_device ahc_pci_driver = { 204 "ahc", 205 aic7870_probe, 206 aic7870_attach, 207 &ahc_unit, 208 NULL 209 }; 210 211 DATA_SET (pcidevice_set, ahc_pci_driver); 212 213 static char* 214 aic7870_probe (pcici_t tag, pcidi_t type) 215 { 216 switch(type) { 217 case PCI_DEVICE_ID_ADAPTEC_3940U: 218 return ("Adaptec 3940 Ultra SCSI host adapter"); 219 break; 220 case PCI_DEVICE_ID_ADAPTEC_3940: 221 return ("Adaptec 3940 SCSI host adapter"); 222 break; 223 case PCI_DEVICE_ID_ADAPTEC_2944U: 224 return ("Adaptec 2944 Ultra SCSI host adapter"); 225 break; 226 case PCI_DEVICE_ID_ADAPTEC_2940U: 227 return ("Adaptec 2940 Ultra SCSI host adapter"); 228 break; 229 case PCI_DEVICE_ID_ADAPTEC_2944: 230 return ("Adaptec 2944 SCSI host adapter"); 231 break; 232 case PCI_DEVICE_ID_ADAPTEC_2940: 233 return ("Adaptec 2940 SCSI host adapter"); 234 break; 235 case PCI_DEVICE_ID_ADAPTEC_2940AU: 236 return ("Adaptec 2940A Ultra SCSI host adapter"); 237 break; 238 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 239 return ("Adaptec aic7880 Ultra SCSI host adapter"); 240 break; 241 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 242 return ("Adaptec aic7870 SCSI host adapter"); 243 break; 244 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 245 return ("Adaptec aic7860 SCSI host adapter"); 246 break; 247 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 248 return ("Adaptec aic7855 SCSI host adapter"); 249 break; 250 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 251 return ("Adaptec aic7850 SCSI host adapter"); 252 break; 253 default: 254 break; 255 } 256 return (0); 257 258 } 259 260 #elif defined(__NetBSD__) 261 262 #ifdef __BROKEN_INDIRECT_CONFIG 263 int ahc_pci_probe __P((struct device *, void *, void *)); 264 #else 265 int ahc_pci_probe __P((struct device *, struct cfdata *, void *)); 266 #endif 267 void ahc_pci_attach __P((struct device *, struct device *, void *)); 268 269 struct cfattach ahc_pci_ca = { 270 sizeof(struct ahc_data), ahc_pci_probe, ahc_pci_attach 271 }; 272 273 int 274 ahc_pci_probe(parent, match, aux) 275 struct device *parent; 276 #ifdef __BROKEN_INDIRECT_CONFIG 277 void *match; 278 #else 279 struct cfdata *match; 280 #endif 281 void *aux; 282 { 283 struct pci_attach_args *pa = aux; 284 285 switch (pa->pa_id) { 286 case PCI_DEVICE_ID_ADAPTEC_3940U: 287 case PCI_DEVICE_ID_ADAPTEC_2944U: 288 case PCI_DEVICE_ID_ADAPTEC_2940U: 289 case PCI_DEVICE_ID_ADAPTEC_2940AU: 290 case PCI_DEVICE_ID_ADAPTEC_3940: 291 case PCI_DEVICE_ID_ADAPTEC_2944: 292 case PCI_DEVICE_ID_ADAPTEC_2940: 293 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 294 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 295 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 296 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 297 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 298 return 1; 299 } 300 return 0; 301 } 302 #endif /* defined(__NetBSD__) */ 303 304 #if defined(__FreeBSD__) 305 static void 306 aic7870_attach(config_id, unit) 307 pcici_t config_id; 308 int unit; 309 #elif defined(__NetBSD__) 310 void 311 ahc_pci_attach(parent, self, aux) 312 struct device *parent, *self; 313 void *aux; 314 #endif 315 { 316 #if defined(__FreeBSD__) 317 u_long io_port; 318 int unit = ahc->sc_dev.dv_unit; 319 #elif defined(__NetBSD__) 320 struct pci_attach_args *pa = aux; 321 struct ahc_data *ahc = (void *)self; 322 bus_space_tag_t st, iot, memt; 323 bus_space_handle_t sh, ioh, memh; 324 int ioh_valid, memh_valid; 325 pci_intr_handle_t ih; 326 const char *intrstr; 327 #endif 328 u_long id; 329 unsigned opri = 0; 330 ahc_type ahc_t = AHC_NONE; 331 ahc_flag ahc_f = AHC_FNONE; 332 #if defined(__FreeBSD__) 333 struct ahc_data *ahc; 334 #endif 335 u_char ultra_enb = 0; 336 u_char our_id = 0; 337 338 #if defined(__FreeBSD__) 339 if(!(io_port = pci_conf_read(config_id, PCI_BASEADR0))) 340 return; 341 /* 342 * The first bit of PCI_BASEADR0 is always 343 * set hence we mask it off. 344 */ 345 io_port &= 0xfffffffe; 346 #elif defined(__NetBSD__) 347 ioh_valid = (pci_mapreg_map(pa, PCI_BASEADR_IO, 348 PCI_MAPREG_TYPE_IO, 0, 349 &iot, &ioh, NULL, NULL) == 0); 350 memh_valid = (pci_mapreg_map(pa, PCI_BASEADR_MEM, 351 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, 352 &memt, &memh, NULL, NULL) == 0); 353 354 if (memh_valid) { 355 st = memt; 356 sh = memh; 357 } else if (ioh_valid) { 358 st = iot; 359 sh = ioh; 360 } else { 361 printf(": unable to map registers\n"); 362 return; 363 } 364 printf("\n"); 365 #endif 366 367 #if defined(__FreeBSD__) 368 switch ((id = pci_conf_read(config_id, PCI_ID_REG))) { 369 #elif defined(__NetBSD__) 370 switch (id = pa->pa_id) { 371 #endif 372 case PCI_DEVICE_ID_ADAPTEC_3940U: 373 case PCI_DEVICE_ID_ADAPTEC_3940: 374 if (id == PCI_DEVICE_ID_ADAPTEC_3940U) 375 ahc_t = AHC_394U; 376 else 377 ahc_t = AHC_394; 378 aic3940_count++; 379 if(!(aic3940_count & 0x01)) 380 /* Even count implies second channel */ 381 ahc_f |= AHC_CHNLB; 382 break; 383 case PCI_DEVICE_ID_ADAPTEC_2944U: 384 case PCI_DEVICE_ID_ADAPTEC_2940U: 385 ahc_t = AHC_294U; 386 break; 387 case PCI_DEVICE_ID_ADAPTEC_2944: 388 case PCI_DEVICE_ID_ADAPTEC_2940: 389 ahc_t = AHC_294; 390 break; 391 case PCI_DEVICE_ID_ADAPTEC_2940AU: 392 ahc_t = AHC_294AU; 393 break; 394 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 395 ahc_t = AHC_AIC7880; 396 break; 397 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 398 ahc_t = AHC_AIC7870; 399 break; 400 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 401 ahc_t = AHC_AIC7860; 402 break; 403 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 404 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 405 ahc_t = AHC_AIC7850; 406 break; 407 default: 408 break; 409 } 410 411 /* On all PCI adapters, we allow SCB paging */ 412 ahc_f |= AHC_PAGESCBS; 413 414 /* Remeber how the card was setup in case there is no SEEPROM */ 415 #if defined(__FreeBSD__) 416 our_id = inb(SCSIID + io_port) & OID; 417 if(ahc_t & AHC_ULTRA) 418 ultra_enb = inb(SXFRCTL0 + io_port) & ULTRAEN; 419 #else 420 our_id = bus_space_read_1(st, sh, SCSIID) & OID; 421 if(ahc_t & AHC_ULTRA) 422 ultra_enb = bus_space_read_1(st, sh, SXFRCTL0) & ULTRAEN; 423 #endif 424 425 #if defined(__FreeBSD__) 426 ahc_reset(io_port); 427 #elif defined(__NetBSD__) 428 ahc_reset(ahc->sc_dev.dv_xname, st, sh); 429 #endif 430 431 if(ahc_t & AHC_AIC7870){ 432 #if defined(__FreeBSD__) 433 u_long devconfig = pci_conf_read(config_id, DEVCONFIG); 434 #elif defined(__NetBSD__) 435 u_long devconfig = 436 pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG); 437 #endif 438 439 if(devconfig & (RAMPSM)) { 440 /* 441 * External SRAM present. Have the probe walk 442 * the SCBs to see how much SRAM we have and set 443 * the number of SCBs accordingly. We have to 444 * turn off SCBRAMSEL to access the external 445 * SCB SRAM. 446 * 447 * It seems that early versions of the aic7870 448 * didn't use these bits, hence the hack for the 449 * 3940 above. I would guess that recent 3940s 450 * using later aic7870 or aic7880 chips do 451 * actually set RAMPSM. 452 * 453 * The documentation isn't clear, but it sounds 454 * like the value written to devconfig must not 455 * have RAMPSM set. The second sixteen bits of 456 * the register are R/O anyway, so it shouldn't 457 * affect RAMPSM either way. 458 */ 459 devconfig &= ~(RAMPSM|SCBRAMSEL); 460 #if defined(__FreeBSD__) 461 pci_conf_write(config_id, DEVCONFIG, devconfig); 462 #elif defined(__NetBSD__) 463 pci_conf_write(pa->pa_pc, pa->pa_tag, 464 DEVCONFIG, devconfig); 465 #endif 466 } 467 } 468 469 #if defined(__FreeBSD__) 470 if(!(ahc = ahc_alloc(unit, io_port, ahc_t, ahc_f))) 471 return; /* XXX PCI code should take return status */ 472 473 if(!(pci_map_int(config_id, ahc_intr, (void *)ahc, &bio_imask))) { 474 ahc_free(ahc); 475 return; 476 } 477 #elif defined(__NetBSD__) 478 ahc_construct(ahc, st, sh, ahc_t, ahc_f); 479 480 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 481 pa->pa_intrline, &ih)) { 482 printf("%s: couldn't map interrupt\n", ahc->sc_dev.dv_xname); 483 ahc_free(ahc); 484 return; 485 } 486 intrstr = pci_intr_string(pa->pa_pc, ih); 487 ahc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ahc_intr, ahc); 488 if (ahc->sc_ih == NULL) { 489 printf("%s: couldn't establish interrupt", 490 ahc->sc_dev.dv_xname); 491 if (intrstr != NULL) 492 printf(" at %s", intrstr); 493 printf("\n"); 494 ahc_free(ahc); 495 return; 496 } 497 if (intrstr != NULL) 498 printf("%s: interrupting at %s\n", ahc->sc_dev.dv_xname, 499 intrstr); 500 #endif 501 /* 502 * Protect ourself from spurrious interrupts during 503 * intialization. 504 */ 505 opri = splbio(); 506 507 /* 508 * Do aic7870/aic7880/aic7850 specific initialization 509 */ 510 { 511 u_char sblkctl; 512 char *id_string; 513 514 switch(ahc->type) { 515 case AHC_394U: 516 case AHC_294U: 517 case AHC_AIC7880: 518 { 519 id_string = "aic7880 "; 520 load_seeprom(ahc); 521 break; 522 } 523 case AHC_394: 524 case AHC_294: 525 case AHC_AIC7870: 526 { 527 id_string = "aic7870 "; 528 load_seeprom(ahc); 529 break; 530 } 531 case AHC_294AU: 532 case AHC_AIC7860: 533 { 534 id_string = "aic7860 "; 535 load_seeprom(ahc); 536 break; 537 } 538 case AHC_AIC7850: 539 { 540 id_string = "aic7850 "; 541 /* 542 * Use defaults, if the chip wasn't initialized by 543 * a BIOS. 544 */ 545 ahc->flags |= AHC_USEDEFAULTS; 546 break; 547 } 548 default: 549 { 550 printf("ahc: Unknown controller type. Ignoring.\n"); 551 ahc_free(ahc); 552 splx(opri); 553 return; 554 } 555 } 556 557 /* 558 * Take the LED out of diagnostic mode 559 */ 560 sblkctl = AHC_INB(ahc, SBLKCTL); 561 AHC_OUTB(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON))); 562 563 /* 564 * I don't know where this is set in the SEEPROM or by the 565 * BIOS, so we default to 100%. 566 */ 567 AHC_OUTB(ahc, DSPCISTATUS, DFTHRSH_100); 568 569 if(ahc->flags & AHC_USEDEFAULTS) { 570 /* 571 * PCI Adapter default setup 572 * Should only be used if the adapter does not have 573 * an SEEPROM. 574 */ 575 /* See if someone else set us up already */ 576 u_long i; 577 for(i = TARG_SCRATCH; i < 0x60; i++) { 578 if(AHC_INB(ahc, i) != 0x00) 579 break; 580 } 581 if(i == TARG_SCRATCH) { 582 /* 583 * Try looking for all ones. You can get 584 * either. 585 */ 586 for (i = TARG_SCRATCH; i < 0x60; i++) { 587 if(AHC_INB(ahc, i) != 0xff) 588 break; 589 } 590 } 591 if((i != 0x60) && (our_id != 0)) { 592 printf("%s: Using left over BIOS settings\n", 593 ahc_name(ahc)); 594 ahc->flags &= ~AHC_USEDEFAULTS; 595 } 596 else 597 our_id = 0x07; 598 AHC_OUTB(ahc, SCSICONF, 599 (our_id & 0x07)|ENSPCHK|RESET_SCSI); 600 /* In case we are a wide card */ 601 AHC_OUTB(ahc, SCSICONF + 1, our_id); 602 603 if(!ultra_enb || (ahc->flags & AHC_USEDEFAULTS)) { 604 /* 605 * If there wasn't a BIOS or the board 606 * wasn't in this mode to begin with, 607 * turn off ultra. 608 */ 609 ahc->type &= ~AHC_ULTRA; 610 } 611 } 612 613 printf("%s: %s", ahc_name(ahc), id_string); 614 } 615 616 if(ahc_init(ahc)){ 617 ahc_free(ahc); 618 splx(opri); 619 return; /* XXX PCI code should take return status */ 620 } 621 splx(opri); 622 623 ahc_attach(ahc); 624 } 625 626 /* 627 * Read the SEEPROM. Return 0 on failure 628 */ 629 void 630 load_seeprom(ahc) 631 struct ahc_data *ahc; 632 { 633 struct seeprom_descriptor sd; 634 struct seeprom_config sc; 635 u_short *scarray = (u_short *)≻ 636 u_short checksum = 0; 637 u_char scsi_conf; 638 u_char host_id; 639 int have_seeprom; 640 641 #if defined(__FreeBSD__) 642 sd.sd_iobase = ahc->baseport + SEECTL; 643 #elif defined(__NetBSD__) 644 sd.sd_st = ahc->sc_st; 645 sd.sd_sh = ahc->sc_sh; 646 sd.sd_offset = SEECTL; 647 #endif 648 sd.sd_MS = SEEMS; 649 sd.sd_RDY = SEERDY; 650 sd.sd_CS = SEECS; 651 sd.sd_CK = SEECK; 652 sd.sd_DO = SEEDO; 653 sd.sd_DI = SEEDI; 654 655 if(bootverbose) 656 printf("%s: Reading SEEPROM...", ahc_name(ahc)); 657 have_seeprom = acquire_seeprom(&sd); 658 if (have_seeprom) { 659 have_seeprom = read_seeprom(&sd, 660 (u_int16_t *)&sc, 661 ahc->flags & AHC_CHNLB, 662 sizeof(sc)/2); 663 release_seeprom(&sd); 664 if (have_seeprom) { 665 /* Check checksum */ 666 int i; 667 668 for (i = 0;i < (sizeof(sc)/2 - 1);i = i + 1) 669 checksum = checksum + scarray[i]; 670 if (checksum != sc.checksum) { 671 if(bootverbose) 672 printf ("checksum error"); 673 have_seeprom = 0; 674 } 675 else if(bootverbose) 676 printf("done.\n"); 677 } 678 } 679 if (!have_seeprom) { 680 if(bootverbose) 681 printf("\n%s: No SEEPROM availible\n", ahc_name(ahc)); 682 ahc->flags |= AHC_USEDEFAULTS; 683 } 684 else { 685 /* 686 * Put the data we've collected down into SRAM 687 * where ahc_init will find it. 688 */ 689 int i; 690 int max_targ = sc.max_targets & CFMAXTARG; 691 692 for(i = 0; i < max_targ; i++){ 693 u_char target_settings; 694 target_settings = (sc.device_flags[i] & CFXFER) << 4; 695 if (sc.device_flags[i] & CFSYNCH) 696 target_settings |= SOFS; 697 if (sc.device_flags[i] & CFWIDEB) 698 target_settings |= WIDEXFER; 699 if (sc.device_flags[i] & CFDISC) 700 ahc->discenable |= (0x01 << i); 701 AHC_OUTB(ahc, TARG_SCRATCH+i, target_settings); 702 } 703 AHC_OUTB(ahc, DISC_DSB, ~(ahc->discenable & 0xff)); 704 AHC_OUTB(ahc, DISC_DSB + 1, ~((ahc->discenable >> 8) & 0xff)); 705 706 host_id = sc.brtime_id & CFSCSIID; 707 708 scsi_conf = (host_id & 0x7); 709 if(sc.adapter_control & CFSPARITY) 710 scsi_conf |= ENSPCHK; 711 if(sc.adapter_control & CFRESETB) 712 scsi_conf |= RESET_SCSI; 713 714 if(ahc->type & AHC_ULTRA) { 715 /* Should we enable Ultra mode? */ 716 if(!(sc.adapter_control & CFULTRAEN)) 717 /* Treat us as a non-ultra card */ 718 ahc->type &= ~AHC_ULTRA; 719 } 720 /* Set the host ID */ 721 AHC_OUTB(ahc, SCSICONF, scsi_conf); 722 /* In case we are a wide card */ 723 AHC_OUTB(ahc, SCSICONF + 1, host_id); 724 } 725 } 726 727 static int 728 acquire_seeprom(sd) 729 struct seeprom_descriptor *sd; 730 { 731 int wait; 732 733 /* 734 * Request access of the memory port. When access is 735 * granted, SEERDY will go high. We use a 1 second 736 * timeout which should be near 1 second more than 737 * is needed. Reason: after the chip reset, there 738 * should be no contention. 739 */ 740 SEEPROM_OUTB(sd, sd->sd_MS); 741 wait = 1000; /* 1 second timeout in msec */ 742 while (--wait && ((SEEPROM_INB(sd) & sd->sd_RDY) == 0)) { 743 DELAY (1000); /* delay 1 msec */ 744 } 745 if ((SEEPROM_INB(sd) & sd->sd_RDY) == 0) { 746 SEEPROM_OUTB(sd, 0); 747 return (0); 748 } 749 return(1); 750 } 751 752 static void 753 release_seeprom(sd) 754 struct seeprom_descriptor *sd; 755 { 756 /* Release access to the memory port and the serial EEPROM. */ 757 SEEPROM_OUTB(sd, 0); 758 } 759 760 #endif /* NPCI > 0 */ 761
Indexes created Wed Oct 01 19:09:53 GMT 2025