ahc_pci.c revision 1.18.14.1
1 /* $NetBSD: ahc_pci.c,v 1.18.14.1 1999/12/27 18:35:14 wrstuden Exp $ */ 2 3 /* 4 * Product specific probe and attach routines for: 5 * 3940, 2940, aic7880, aic7870, aic7860 and aic7850 SCSI controllers 6 * 7 * Copyright (c) 1995, 1996 Justin T. Gibbs. 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice immediately at the beginning of the file, without modification, 15 * this list of conditions, and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from Id: aic7870.c,v 1.37 1996/06/08 06:55:55 gibbs Exp 35 */ 36 37 #if defined(__FreeBSD__) 38 #include <pci.h> 39 #endif 40 #if NPCI > 0 || defined(__NetBSD__) 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/malloc.h> 44 #include <sys/kernel.h> 45 #include <sys/queue.h> 46 #if defined(__NetBSD__) 47 #include <sys/device.h> 48 #include <machine/bus.h> 49 #include <machine/intr.h> 50 #endif /* defined(__NetBSD__) */ 51 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsipi_all.h> 54 #if defined (__NetBSD__) 55 #endif 56 #include <dev/scsipi/scsiconf.h> 57 58 #if defined(__FreeBSD__) 59 60 #include <pci/pcireg.h> 61 #include <pci/pcivar.h> 62 63 #include <machine/clock.h> 64 65 #include <i386/scsi/aic7xxx.h> 66 #include <i386/scsi/93cx6.h> 67 68 #include <dev/aic7xxx/aic7xxx_reg.h> 69 70 #define PCI_BASEADR0 PCI_MAP_REG_START 71 72 #elif defined(__NetBSD__) 73 74 #include <dev/pci/pcireg.h> 75 #include <dev/pci/pcivar.h> 76 77 #include <dev/ic/aic7xxxreg.h> 78 #include <dev/ic/aic7xxxvar.h> 79 #include <dev/ic/smc93cx6var.h> 80 81 /* 82 * Under normal circumstances, these messages are unnecessary 83 * and not terribly cosmetic. 84 */ 85 #ifdef DEBUG 86 #define bootverbose 1 87 #else 88 #define bootverbose 0 89 #endif 90 91 #define PCI_BASEADR_IO 0x10 92 #define PCI_BASEADR_MEM 0x14 93 94 #endif /* defined(__NetBSD__) */ 95 96 #define PCI_DEVICE_ID_ADAPTEC_3940U 0x82789004ul 97 #define PCI_DEVICE_ID_ADAPTEC_2944U 0x84789004ul 98 #define PCI_DEVICE_ID_ADAPTEC_2940U 0x81789004ul 99 #define PCI_DEVICE_ID_ADAPTEC_2940UP 0x87789004ul 100 #define PCI_DEVICE_ID_ADAPTEC_2940AU 0x61789004ul 101 #define PCI_DEVICE_ID_ADAPTEC_3940 0x72789004ul 102 #define PCI_DEVICE_ID_ADAPTEC_2944 0x74789004ul 103 #define PCI_DEVICE_ID_ADAPTEC_2940 0x71789004ul 104 #define PCI_DEVICE_ID_ADAPTEC_AIC7880 0x80789004ul 105 #define PCI_DEVICE_ID_ADAPTEC_AIC7870 0x70789004ul 106 #define PCI_DEVICE_ID_ADAPTEC_AIC7860 0x60789004ul 107 #define PCI_DEVICE_ID_ADAPTEC_AIC7855 0x55789004ul 108 #define PCI_DEVICE_ID_ADAPTEC_AIC7850 0x50789004ul 109 110 #define DEVCONFIG 0x40 111 #define MPORTMODE 0x00000400ul /* aic7870 only */ 112 #define RAMPSM 0x00000200ul /* aic7870 only */ 113 #define VOLSENSE 0x00000100ul 114 #define SCBRAMSEL 0x00000080ul 115 #define MRDCEN 0x00000040ul 116 #define EXTSCBTIME 0x00000020ul /* aic7870 only */ 117 #define EXTSCBPEN 0x00000010ul /* aic7870 only */ 118 #define BERREN 0x00000008ul 119 #define DACEN 0x00000004ul 120 #define STPWLEVEL 0x00000002ul 121 #define DIFACTNEGEN 0x00000001ul /* aic7870 only */ 122 123 #define CSIZE_LATTIME 0x0c 124 #define CACHESIZE 0x0000003ful /* only 5 bits */ 125 #define LATTIME 0x0000ff00ul 126 127 /* 128 * Define the format of the aic78X0 SEEPROM registers (16 bits). 129 * 130 */ 131 132 struct seeprom_config { 133 134 /* 135 * SCSI ID Configuration Flags 136 */ 137 #define CFXFER 0x0007 /* synchronous transfer rate */ 138 #define CFSYNCH 0x0008 /* enable synchronous transfer */ 139 #define CFDISC 0x0010 /* enable disconnection */ 140 #define CFWIDEB 0x0020 /* wide bus device */ 141 /* UNUSED 0x00C0 */ 142 #define CFSTART 0x0100 /* send start unit SCSI command */ 143 #define CFINCBIOS 0x0200 /* include in BIOS scan */ 144 #define CFRNFOUND 0x0400 /* report even if not found */ 145 /* UNUSED 0xf800 */ 146 u_int16_t device_flags[16]; /* words 0-15 */ 147 148 /* 149 * BIOS Control Bits 150 */ 151 #define CFSUPREM 0x0001 /* support all removeable drives */ 152 #define CFSUPREMB 0x0002 /* support removeable drives for boot only */ 153 #define CFBIOSEN 0x0004 /* BIOS enabled */ 154 /* UNUSED 0x0008 */ 155 #define CFSM2DRV 0x0010 /* support more than two drives */ 156 /* UNUSED 0x0060 */ 157 #define CFEXTEND 0x0080 /* extended translation enabled */ 158 /* UNUSED 0xff00 */ 159 u_int16_t bios_control; /* word 16 */ 160 161 /* 162 * Host Adapter Control Bits 163 */ 164 /* UNUSED 0x0001 */ 165 #define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */ 166 #define CFSTERM 0x0004 /* SCSI low byte termination (non-wide cards) */ 167 #define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */ 168 #define CFSPARITY 0x0010 /* SCSI parity */ 169 /* UNUSED 0x0020 */ 170 #define CFRESETB 0x0040 /* reset SCSI bus at IC initialization */ 171 /* UNUSED 0xff80 */ 172 u_int16_t adapter_control; /* word 17 */ 173 174 /* 175 * Bus Release, Host Adapter ID 176 */ 177 #define CFSCSIID 0x000f /* host adapter SCSI ID */ 178 /* UNUSED 0x00f0 */ 179 #define CFBRTIME 0xff00 /* bus release time */ 180 u_int16_t brtime_id; /* word 18 */ 181 182 /* 183 * Maximum targets 184 */ 185 #define CFMAXTARG 0x00ff /* maximum targets */ 186 /* UNUSED 0xff00 */ 187 u_int16_t max_targets; /* word 19 */ 188 189 u_int16_t res_1[11]; /* words 20-30 */ 190 u_int16_t checksum; /* word 31 */ 191 }; 192 193 static void load_seeprom __P((struct ahc_data *ahc)); 194 static int acquire_seeprom __P((struct seeprom_descriptor *sd)); 195 static void release_seeprom __P((struct seeprom_descriptor *sd)); 196 197 static u_char aic3940_count; 198 199 #if defined(__FreeBSD__) 200 201 static char* aic7870_probe __P((pcici_t tag, pcidi_t type)); 202 static void aic7870_attach __P((pcici_t config_id, int unit)); 203 204 static struct pci_device ahc_pci_driver = { 205 "ahc", 206 aic7870_probe, 207 aic7870_attach, 208 &ahc_unit, 209 NULL 210 }; 211 212 DATA_SET (pcidevice_set, ahc_pci_driver); 213 214 static char* 215 aic7870_probe (pcici_t tag, pcidi_t type) 216 { 217 switch(type) { 218 case PCI_DEVICE_ID_ADAPTEC_3940U: 219 return ("Adaptec 3940 Ultra SCSI host adapter"); 220 break; 221 case PCI_DEVICE_ID_ADAPTEC_3940: 222 return ("Adaptec 3940 SCSI host adapter"); 223 break; 224 case PCI_DEVICE_ID_ADAPTEC_2944U: 225 return ("Adaptec 2944 Ultra SCSI host adapter"); 226 break; 227 case PCI_DEVICE_ID_ADAPTEC_2940U: 228 return ("Adaptec 2940 Ultra SCSI host adapter"); 229 break; 230 case PCI_DEVICE_ID_ADAPTEC_2940UP: 231 return ("Adaptec 2940 Ultra SCSI Pro host adapter"); 232 break; 233 case PCI_DEVICE_ID_ADAPTEC_2944: 234 return ("Adaptec 2944 SCSI host adapter"); 235 break; 236 case PCI_DEVICE_ID_ADAPTEC_2940: 237 return ("Adaptec 2940 SCSI host adapter"); 238 break; 239 case PCI_DEVICE_ID_ADAPTEC_2940AU: 240 return ("Adaptec 2940A Ultra SCSI host adapter"); 241 break; 242 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 243 return ("Adaptec aic7880 Ultra SCSI host adapter"); 244 break; 245 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 246 return ("Adaptec aic7870 SCSI host adapter"); 247 break; 248 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 249 return ("Adaptec aic7860 SCSI host adapter"); 250 break; 251 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 252 return ("Adaptec aic7855 SCSI host adapter"); 253 break; 254 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 255 return ("Adaptec aic7850 SCSI host adapter"); 256 break; 257 default: 258 break; 259 } 260 return (0); 261 262 } 263 264 #elif defined(__NetBSD__) 265 266 int ahc_pci_probe __P((struct device *, struct cfdata *, void *)); 267 void ahc_pci_attach __P((struct device *, struct device *, void *)); 268 269 struct cfattach ahc_pci_ca = { 270 sizeof(struct ahc_data), ahc_pci_probe, ahc_pci_attach 271 }; 272 273 int 274 ahc_pci_probe(parent, match, aux) 275 struct device *parent; 276 struct cfdata *match; 277 void *aux; 278 { 279 struct pci_attach_args *pa = aux; 280 281 switch (pa->pa_id) { 282 case PCI_DEVICE_ID_ADAPTEC_3940U: 283 case PCI_DEVICE_ID_ADAPTEC_2944U: 284 case PCI_DEVICE_ID_ADAPTEC_2940U: 285 case PCI_DEVICE_ID_ADAPTEC_2940UP: 286 case PCI_DEVICE_ID_ADAPTEC_2940AU: 287 case PCI_DEVICE_ID_ADAPTEC_3940: 288 case PCI_DEVICE_ID_ADAPTEC_2944: 289 case PCI_DEVICE_ID_ADAPTEC_2940: 290 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 291 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 292 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 293 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 294 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 295 return 1; 296 } 297 return 0; 298 } 299 #endif /* defined(__NetBSD__) */ 300 301 #if defined(__FreeBSD__) 302 static void 303 aic7870_attach(config_id, unit) 304 pcici_t config_id; 305 int unit; 306 #elif defined(__NetBSD__) 307 void 308 ahc_pci_attach(parent, self, aux) 309 struct device *parent, *self; 310 void *aux; 311 #endif 312 { 313 #if defined(__FreeBSD__) 314 u_long io_port; 315 int unit = ahc->sc_dev.dv_unit; 316 #elif defined(__NetBSD__) 317 struct pci_attach_args *pa = aux; 318 struct ahc_data *ahc = (void *)self; 319 bus_space_tag_t st, iot, memt; 320 bus_space_handle_t sh, ioh, memh; 321 int ioh_valid, memh_valid; 322 pci_intr_handle_t ih; 323 const char *intrstr; 324 #endif 325 u_long id; 326 unsigned opri = 0; 327 ahc_type ahc_t = AHC_NONE; 328 ahc_flag ahc_f = AHC_FNONE; 329 #if defined(__FreeBSD__) 330 struct ahc_data *ahc; 331 #endif 332 u_char ultra_enb = 0; 333 u_char our_id = 0; 334 335 #if defined(__FreeBSD__) 336 if(!(io_port = pci_conf_read(config_id, PCI_BASEADR0))) 337 return; 338 /* 339 * The first bit of PCI_BASEADR0 is always 340 * set hence we mask it off. 341 */ 342 io_port &= 0xfffffffe; 343 #elif defined(__NetBSD__) 344 ioh_valid = (pci_mapreg_map(pa, PCI_BASEADR_IO, 345 PCI_MAPREG_TYPE_IO, 0, 346 &iot, &ioh, NULL, NULL) == 0); 347 memh_valid = (pci_mapreg_map(pa, PCI_BASEADR_MEM, 348 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, 349 &memt, &memh, NULL, NULL) == 0); 350 351 if (memh_valid) { 352 st = memt; 353 sh = memh; 354 } else if (ioh_valid) { 355 st = iot; 356 sh = ioh; 357 } else { 358 printf(": unable to map registers\n"); 359 return; 360 } 361 printf("\n"); 362 #endif 363 364 #if defined(__FreeBSD__) 365 switch ((id = pci_conf_read(config_id, PCI_ID_REG))) { 366 #elif defined(__NetBSD__) 367 switch (id = pa->pa_id) { 368 #endif 369 case PCI_DEVICE_ID_ADAPTEC_3940U: 370 case PCI_DEVICE_ID_ADAPTEC_3940: 371 if (id == PCI_DEVICE_ID_ADAPTEC_3940U) 372 ahc_t = AHC_394U; 373 else 374 ahc_t = AHC_394; 375 aic3940_count++; 376 if(!(aic3940_count & 0x01)) 377 /* Even count implies second channel */ 378 ahc_f |= AHC_CHNLB; 379 break; 380 case PCI_DEVICE_ID_ADAPTEC_2944U: 381 case PCI_DEVICE_ID_ADAPTEC_2940U: 382 case PCI_DEVICE_ID_ADAPTEC_2940UP: 383 ahc_t = AHC_294U; 384 break; 385 case PCI_DEVICE_ID_ADAPTEC_2944: 386 case PCI_DEVICE_ID_ADAPTEC_2940: 387 ahc_t = AHC_294; 388 break; 389 case PCI_DEVICE_ID_ADAPTEC_2940AU: 390 ahc_t = AHC_294AU; 391 break; 392 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 393 ahc_t = AHC_AIC7880; 394 break; 395 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 396 ahc_t = AHC_AIC7870; 397 break; 398 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 399 ahc_t = AHC_AIC7860; 400 break; 401 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 402 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 403 ahc_t = AHC_AIC7850; 404 break; 405 default: 406 break; 407 } 408 409 /* On all PCI adapters, we allow SCB paging */ 410 ahc_f |= AHC_PAGESCBS; 411 412 /* Remeber how the card was setup in case there is no SEEPROM */ 413 #if defined(__FreeBSD__) 414 our_id = inb(SCSIID + io_port) & OID; 415 if(ahc_t & AHC_ULTRA) 416 ultra_enb = inb(SXFRCTL0 + io_port) & ULTRAEN; 417 #else 418 our_id = bus_space_read_1(st, sh, SCSIID) & OID; 419 if(ahc_t & AHC_ULTRA) 420 ultra_enb = bus_space_read_1(st, sh, SXFRCTL0) & ULTRAEN; 421 #endif 422 423 #if defined(__FreeBSD__) 424 ahc_reset(io_port); 425 #elif defined(__NetBSD__) 426 ahc_reset(ahc->sc_dev.dv_xname, st, sh); 427 #endif 428 429 if(ahc_t & AHC_AIC7870){ 430 #if defined(__FreeBSD__) 431 u_long devconfig = pci_conf_read(config_id, DEVCONFIG); 432 #elif defined(__NetBSD__) 433 u_long devconfig = 434 pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG); 435 #endif 436 437 if(devconfig & (RAMPSM)) { 438 /* 439 * External SRAM present. Have the probe walk 440 * the SCBs to see how much SRAM we have and set 441 * the number of SCBs accordingly. We have to 442 * turn off SCBRAMSEL to access the external 443 * SCB SRAM. 444 * 445 * It seems that early versions of the aic7870 446 * didn't use these bits, hence the hack for the 447 * 3940 above. I would guess that recent 3940s 448 * using later aic7870 or aic7880 chips do 449 * actually set RAMPSM. 450 * 451 * The documentation isn't clear, but it sounds 452 * like the value written to devconfig must not 453 * have RAMPSM set. The second sixteen bits of 454 * the register are R/O anyway, so it shouldn't 455 * affect RAMPSM either way. 456 */ 457 devconfig &= ~(RAMPSM|SCBRAMSEL); 458 #if defined(__FreeBSD__) 459 pci_conf_write(config_id, DEVCONFIG, devconfig); 460 #elif defined(__NetBSD__) 461 pci_conf_write(pa->pa_pc, pa->pa_tag, 462 DEVCONFIG, devconfig); 463 #endif 464 } 465 } 466 467 #if defined(__FreeBSD__) 468 if(!(ahc = ahc_alloc(unit, io_port, ahc_t, ahc_f))) 469 return; /* XXX PCI code should take return status */ 470 471 if(!(pci_map_int(config_id, ahc_intr, (void *)ahc, &bio_imask))) { 472 ahc_free(ahc); 473 return; 474 } 475 #elif defined(__NetBSD__) 476 ahc_construct(ahc, st, sh, pa->pa_dmat, ahc_t, ahc_f); 477 478 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 479 pa->pa_intrline, &ih)) { 480 printf("%s: couldn't map interrupt\n", ahc->sc_dev.dv_xname); 481 ahc_free(ahc); 482 return; 483 } 484 intrstr = pci_intr_string(pa->pa_pc, ih); 485 ahc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ahc_intr, ahc); 486 if (ahc->sc_ih == NULL) { 487 printf("%s: couldn't establish interrupt", 488 ahc->sc_dev.dv_xname); 489 if (intrstr != NULL) 490 printf(" at %s", intrstr); 491 printf("\n"); 492 ahc_free(ahc); 493 return; 494 } 495 if (intrstr != NULL) 496 printf("%s: interrupting at %s\n", ahc->sc_dev.dv_xname, 497 intrstr); 498 #endif 499 /* 500 * Protect ourself from spurrious interrupts during 501 * intialization. 502 */ 503 opri = splbio(); 504 505 /* 506 * Do aic7870/aic7880/aic7850 specific initialization 507 */ 508 { 509 u_char sblkctl; 510 char *id_string; 511 512 switch(ahc->type) { 513 case AHC_394U: 514 case AHC_294U: 515 case AHC_AIC7880: 516 { 517 id_string = "aic7880 "; 518 load_seeprom(ahc); 519 break; 520 } 521 case AHC_394: 522 case AHC_294: 523 case AHC_AIC7870: 524 { 525 id_string = "aic7870 "; 526 load_seeprom(ahc); 527 break; 528 } 529 case AHC_294AU: 530 case AHC_AIC7860: 531 { 532 id_string = "aic7860 "; 533 load_seeprom(ahc); 534 break; 535 } 536 case AHC_AIC7850: 537 { 538 id_string = "aic7850 "; 539 /* 540 * Use defaults, if the chip wasn't initialized by 541 * a BIOS. 542 */ 543 ahc->flags |= AHC_USEDEFAULTS; 544 break; 545 } 546 default: 547 { 548 printf("ahc: Unknown controller type. Ignoring.\n"); 549 ahc_free(ahc); 550 splx(opri); 551 return; 552 } 553 } 554 555 /* 556 * Take the LED out of diagnostic mode 557 */ 558 sblkctl = AHC_INB(ahc, SBLKCTL); 559 AHC_OUTB(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON))); 560 561 /* 562 * I don't know where this is set in the SEEPROM or by the 563 * BIOS, so we default to 100%. 564 */ 565 AHC_OUTB(ahc, DSPCISTATUS, DFTHRSH_100); 566 567 if(ahc->flags & AHC_USEDEFAULTS) { 568 /* 569 * PCI Adapter default setup 570 * Should only be used if the adapter does not have 571 * an SEEPROM. 572 */ 573 /* See if someone else set us up already */ 574 u_long i; 575 for(i = TARG_SCRATCH; i < 0x60; i++) { 576 if(AHC_INB(ahc, i) != 0x00) 577 break; 578 } 579 if(i == TARG_SCRATCH) { 580 /* 581 * Try looking for all ones. You can get 582 * either. 583 */ 584 for (i = TARG_SCRATCH; i < 0x60; i++) { 585 if(AHC_INB(ahc, i) != 0xff) 586 break; 587 } 588 } 589 if((i != 0x60) && (our_id != 0)) { 590 printf("%s: Using left over BIOS settings\n", 591 ahc_name(ahc)); 592 ahc->flags &= ~AHC_USEDEFAULTS; 593 } 594 else 595 our_id = 0x07; 596 AHC_OUTB(ahc, SCSICONF, 597 (our_id & 0x07)|ENSPCHK|RESET_SCSI); 598 /* In case we are a wide card */ 599 AHC_OUTB(ahc, SCSICONF + 1, our_id); 600 601 if(!ultra_enb || (ahc->flags & AHC_USEDEFAULTS)) { 602 /* 603 * If there wasn't a BIOS or the board 604 * wasn't in this mode to begin with, 605 * turn off ultra. 606 */ 607 ahc->type &= ~AHC_ULTRA; 608 } 609 } 610 611 printf("%s: %s", ahc_name(ahc), id_string); 612 } 613 614 if(ahc_init(ahc)){ 615 ahc_free(ahc); 616 splx(opri); 617 return; /* XXX PCI code should take return status */ 618 } 619 splx(opri); 620 621 ahc_attach(ahc); 622 } 623 624 /* 625 * Read the SEEPROM. Return 0 on failure 626 */ 627 void 628 load_seeprom(ahc) 629 struct ahc_data *ahc; 630 { 631 struct seeprom_descriptor sd; 632 struct seeprom_config sc; 633 u_short *scarray = (u_short *)≻ 634 u_short checksum = 0; 635 u_char scsi_conf; 636 u_char host_id; 637 int have_seeprom; 638 639 #if defined(__FreeBSD__) 640 sd.sd_iobase = ahc->baseport + SEECTL; 641 #elif defined(__NetBSD__) 642 sd.sd_st = ahc->sc_st; 643 sd.sd_sh = ahc->sc_sh; 644 sd.sd_offset = SEECTL; 645 #endif 646 sd.sd_MS = SEEMS; 647 sd.sd_RDY = SEERDY; 648 sd.sd_CS = SEECS; 649 sd.sd_CK = SEECK; 650 sd.sd_DO = SEEDO; 651 sd.sd_DI = SEEDI; 652 653 if(bootverbose) 654 printf("%s: Reading SEEPROM...", ahc_name(ahc)); 655 have_seeprom = acquire_seeprom(&sd); 656 if (have_seeprom) { 657 have_seeprom = read_seeprom(&sd, 658 (u_int16_t *)&sc, 659 ahc->flags & AHC_CHNLB, 660 sizeof(sc)/2); 661 release_seeprom(&sd); 662 if (have_seeprom) { 663 /* Check checksum */ 664 int i; 665 666 for (i = 0;i < (sizeof(sc)/2 - 1);i = i + 1) 667 checksum = checksum + scarray[i]; 668 if (checksum != sc.checksum) { 669 if(bootverbose) 670 printf ("checksum error"); 671 have_seeprom = 0; 672 } 673 else if(bootverbose) 674 printf("done.\n"); 675 } 676 } 677 if (!have_seeprom) { 678 if(bootverbose) 679 printf("\n%s: No SEEPROM availible\n", ahc_name(ahc)); 680 ahc->flags |= AHC_USEDEFAULTS; 681 } 682 else { 683 /* 684 * Put the data we've collected down into SRAM 685 * where ahc_init will find it. 686 */ 687 int i; 688 int max_targ = sc.max_targets & CFMAXTARG; 689 690 for(i = 0; i < max_targ; i++){ 691 u_char target_settings; 692 target_settings = (sc.device_flags[i] & CFXFER) << 4; 693 if (sc.device_flags[i] & CFSYNCH) 694 target_settings |= SOFS; 695 if (sc.device_flags[i] & CFWIDEB) 696 target_settings |= WIDEXFER; 697 if (sc.device_flags[i] & CFDISC) 698 ahc->discenable |= (0x01 << i); 699 AHC_OUTB(ahc, TARG_SCRATCH+i, target_settings); 700 } 701 AHC_OUTB(ahc, DISC_DSB, ~(ahc->discenable & 0xff)); 702 AHC_OUTB(ahc, DISC_DSB + 1, ~((ahc->discenable >> 8) & 0xff)); 703 704 host_id = sc.brtime_id & CFSCSIID; 705 706 scsi_conf = (host_id & 0x7); 707 if(sc.adapter_control & CFSPARITY) 708 scsi_conf |= ENSPCHK; 709 if(sc.adapter_control & CFRESETB) 710 scsi_conf |= RESET_SCSI; 711 712 if(ahc->type & AHC_ULTRA) { 713 /* Should we enable Ultra mode? */ 714 if(!(sc.adapter_control & CFULTRAEN)) 715 /* Treat us as a non-ultra card */ 716 ahc->type &= ~AHC_ULTRA; 717 } 718 /* Set the host ID */ 719 AHC_OUTB(ahc, SCSICONF, scsi_conf); 720 /* In case we are a wide card */ 721 AHC_OUTB(ahc, SCSICONF + 1, host_id); 722 } 723 } 724 725 static int 726 acquire_seeprom(sd) 727 struct seeprom_descriptor *sd; 728 { 729 int wait; 730 731 /* 732 * Request access of the memory port. When access is 733 * granted, SEERDY will go high. We use a 1 second 734 * timeout which should be near 1 second more than 735 * is needed. Reason: after the chip reset, there 736 * should be no contention. 737 */ 738 SEEPROM_OUTB(sd, sd->sd_MS); 739 wait = 1000; /* 1 second timeout in msec */ 740 while (--wait && ((SEEPROM_INB(sd) & sd->sd_RDY) == 0)) { 741 DELAY (1000); /* delay 1 msec */ 742 } 743 if ((SEEPROM_INB(sd) & sd->sd_RDY) == 0) { 744 SEEPROM_OUTB(sd, 0); 745 return (0); 746 } 747 return(1); 748 } 749 750 static void 751 release_seeprom(sd) 752 struct seeprom_descriptor *sd; 753 { 754 /* Release access to the memory port and the serial EEPROM. */ 755 SEEPROM_OUTB(sd, 0); 756 } 757 758 #endif /* NPCI > 0 */ 759
Indexes created Wed Oct 01 19:09:53 GMT 2025