ahc_pci.c revision 1.4
1 /* $NetBSD: ahc_pci.c,v 1.4 1996/07/14 20:13:08 cgd Exp $ */ 2 3 /* 4 * Product specific probe and attach routines for: 5 * 3940, 2940, aic7880, aic7870, aic7860 and aic7850 SCSI controllers 6 * 7 * Copyright (c) 1995, 1996 Justin T. Gibbs. 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice immediately at the beginning of the file, without modification, 15 * this list of conditions, and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from Id: aic7870.c,v 1.37 1996/06/08 06:55:55 gibbs Exp 35 */ 36 37 #if defined(__FreeBSD__) 38 #include <pci.h> 39 #endif 40 #if NPCI > 0 || defined(__NetBSD__) 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/malloc.h> 44 #include <sys/kernel.h> 45 #include <sys/queue.h> 46 #if defined(__NetBSD__) 47 #include <sys/device.h> 48 #include <machine/bus.h> 49 #include <machine/intr.h> 50 #endif /* defined(__NetBSD__) */ 51 52 #include <scsi/scsi_all.h> 53 #include <scsi/scsiconf.h> 54 55 #if defined(__FreeBSD__) 56 57 #include <pci/pcireg.h> 58 #include <pci/pcivar.h> 59 60 #include <machine/clock.h> 61 62 #include <i386/scsi/aic7xxx.h> 63 #include <i386/scsi/93cx6.h> 64 65 #include <dev/aic7xxx/aic7xxx_reg.h> 66 67 #define PCI_BASEADR0 PCI_MAP_REG_START 68 69 #elif defined(__NetBSD__) 70 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcivar.h> 73 74 #include <dev/ic/aic7xxxreg.h> 75 #include <dev/ic/aic7xxxvar.h> 76 #include <dev/ic/smc93cx6var.h> 77 78 #define bootverbose 1 79 #define PCI_BASEADR0 PCI_MAPREG_START 80 81 #endif /* defined(__NetBSD__) */ 82 83 #define PCI_DEVICE_ID_ADAPTEC_3940U 0x82789004ul 84 #define PCI_DEVICE_ID_ADAPTEC_2944U 0x84789004ul 85 #define PCI_DEVICE_ID_ADAPTEC_2940U 0x81789004ul 86 #define PCI_DEVICE_ID_ADAPTEC_3940 0x72789004ul 87 #define PCI_DEVICE_ID_ADAPTEC_2944 0x74789004ul 88 #define PCI_DEVICE_ID_ADAPTEC_2940 0x71789004ul 89 #define PCI_DEVICE_ID_ADAPTEC_AIC7880 0x80789004ul 90 #define PCI_DEVICE_ID_ADAPTEC_AIC7870 0x70789004ul 91 #define PCI_DEVICE_ID_ADAPTEC_AIC7860 0x60789004ul 92 #define PCI_DEVICE_ID_ADAPTEC_AIC7855 0x55789004ul 93 #define PCI_DEVICE_ID_ADAPTEC_AIC7850 0x50789004ul 94 95 #define DEVCONFIG 0x40 96 #define MPORTMODE 0x00000400ul /* aic7870 only */ 97 #define RAMPSM 0x00000200ul /* aic7870 only */ 98 #define VOLSENSE 0x00000100ul 99 #define SCBRAMSEL 0x00000080ul 100 #define MRDCEN 0x00000040ul 101 #define EXTSCBTIME 0x00000020ul /* aic7870 only */ 102 #define EXTSCBPEN 0x00000010ul /* aic7870 only */ 103 #define BERREN 0x00000008ul 104 #define DACEN 0x00000004ul 105 #define STPWLEVEL 0x00000002ul 106 #define DIFACTNEGEN 0x00000001ul /* aic7870 only */ 107 108 #define CSIZE_LATTIME 0x0c 109 #define CACHESIZE 0x0000003ful /* only 5 bits */ 110 #define LATTIME 0x0000ff00ul 111 112 /* 113 * Define the format of the aic78X0 SEEPROM registers (16 bits). 114 * 115 */ 116 117 struct seeprom_config { 118 119 /* 120 * SCSI ID Configuration Flags 121 */ 122 #define CFXFER 0x0007 /* synchronous transfer rate */ 123 #define CFSYNCH 0x0008 /* enable synchronous transfer */ 124 #define CFDISC 0x0010 /* enable disconnection */ 125 #define CFWIDEB 0x0020 /* wide bus device */ 126 /* UNUSED 0x00C0 */ 127 #define CFSTART 0x0100 /* send start unit SCSI command */ 128 #define CFINCBIOS 0x0200 /* include in BIOS scan */ 129 #define CFRNFOUND 0x0400 /* report even if not found */ 130 /* UNUSED 0xf800 */ 131 u_int16_t device_flags[16]; /* words 0-15 */ 132 133 /* 134 * BIOS Control Bits 135 */ 136 #define CFSUPREM 0x0001 /* support all removeable drives */ 137 #define CFSUPREMB 0x0002 /* support removeable drives for boot only */ 138 #define CFBIOSEN 0x0004 /* BIOS enabled */ 139 /* UNUSED 0x0008 */ 140 #define CFSM2DRV 0x0010 /* support more than two drives */ 141 /* UNUSED 0x0060 */ 142 #define CFEXTEND 0x0080 /* extended translation enabled */ 143 /* UNUSED 0xff00 */ 144 u_int16_t bios_control; /* word 16 */ 145 146 /* 147 * Host Adapter Control Bits 148 */ 149 /* UNUSED 0x0001 */ 150 #define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */ 151 #define CFSTERM 0x0004 /* SCSI low byte termination (non-wide cards) */ 152 #define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */ 153 #define CFSPARITY 0x0010 /* SCSI parity */ 154 /* UNUSED 0x0020 */ 155 #define CFRESETB 0x0040 /* reset SCSI bus at IC initialization */ 156 /* UNUSED 0xff80 */ 157 u_int16_t adapter_control; /* word 17 */ 158 159 /* 160 * Bus Release, Host Adapter ID 161 */ 162 #define CFSCSIID 0x000f /* host adapter SCSI ID */ 163 /* UNUSED 0x00f0 */ 164 #define CFBRTIME 0xff00 /* bus release time */ 165 u_int16_t brtime_id; /* word 18 */ 166 167 /* 168 * Maximum targets 169 */ 170 #define CFMAXTARG 0x00ff /* maximum targets */ 171 /* UNUSED 0xff00 */ 172 u_int16_t max_targets; /* word 19 */ 173 174 u_int16_t res_1[11]; /* words 20-30 */ 175 u_int16_t checksum; /* word 31 */ 176 }; 177 178 static void load_seeprom __P((struct ahc_data *ahc)); 179 static int acquire_seeprom __P((struct seeprom_descriptor *sd)); 180 static void release_seeprom __P((struct seeprom_descriptor *sd)); 181 182 static u_char aic3940_count; 183 184 #if defined(__FreeBSD__) 185 186 static char* aic7870_probe __P((pcici_t tag, pcidi_t type)); 187 static void aic7870_attach __P((pcici_t config_id, int unit)); 188 189 static struct pci_device ahc_pci_driver = { 190 "ahc", 191 aic7870_probe, 192 aic7870_attach, 193 &ahc_unit, 194 NULL 195 }; 196 197 DATA_SET (pcidevice_set, ahc_pci_driver); 198 199 static char* 200 aic7870_probe (pcici_t tag, pcidi_t type) 201 { 202 switch(type) { 203 case PCI_DEVICE_ID_ADAPTEC_3940U: 204 return ("Adaptec 3940 Ultra SCSI host adapter"); 205 break; 206 case PCI_DEVICE_ID_ADAPTEC_3940: 207 return ("Adaptec 3940 SCSI host adapter"); 208 break; 209 case PCI_DEVICE_ID_ADAPTEC_2944U: 210 return ("Adaptec 2944 Ultra SCSI host adapter"); 211 break; 212 case PCI_DEVICE_ID_ADAPTEC_2940U: 213 return ("Adaptec 2940 Ultra SCSI host adapter"); 214 break; 215 case PCI_DEVICE_ID_ADAPTEC_2944: 216 return ("Adaptec 2944 SCSI host adapter"); 217 break; 218 case PCI_DEVICE_ID_ADAPTEC_2940: 219 return ("Adaptec 2940 SCSI host adapter"); 220 break; 221 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 222 return ("Adaptec aic7880 Ultra SCSI host adapter"); 223 break; 224 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 225 return ("Adaptec aic7870 SCSI host adapter"); 226 break; 227 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 228 return ("Adaptec aic7860 SCSI host adapter"); 229 break; 230 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 231 return ("Adaptec aic7855 SCSI host adapter"); 232 break; 233 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 234 return ("Adaptec aic7850 SCSI host adapter"); 235 break; 236 default: 237 break; 238 } 239 return (0); 240 241 } 242 243 #elif defined(__NetBSD__) 244 245 int ahc_pci_probe __P((struct device *, void *, void *)); 246 void ahc_pci_attach __P((struct device *, struct device *, void *)); 247 248 struct cfattach ahc_pci_ca = { 249 sizeof(struct ahc_data), ahc_pci_probe, ahc_pci_attach 250 }; 251 252 int 253 ahc_pci_probe(parent, match, aux) 254 struct device *parent; 255 void *match, *aux; 256 { 257 struct pci_attach_args *pa = aux; 258 259 switch (pa->pa_id) { 260 case PCI_DEVICE_ID_ADAPTEC_3940U: 261 case PCI_DEVICE_ID_ADAPTEC_2944U: 262 case PCI_DEVICE_ID_ADAPTEC_2940U: 263 case PCI_DEVICE_ID_ADAPTEC_3940: 264 case PCI_DEVICE_ID_ADAPTEC_2944: 265 case PCI_DEVICE_ID_ADAPTEC_2940: 266 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 267 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 268 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 269 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 270 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 271 return 1; 272 } 273 return 0; 274 } 275 #endif /* defined(__NetBSD__) */ 276 277 #if defined(__FreeBSD__) 278 static void 279 aic7870_attach(config_id, unit) 280 pcici_t config_id; 281 int unit; 282 #elif defined(__NetBSD__) 283 void 284 ahc_pci_attach(parent, self, aux) 285 struct device *parent, *self; 286 void *aux; 287 #endif 288 { 289 #if defined(__FreeBSD__) 290 u_long io_port; 291 #elif defined(__NetBSD__) 292 struct pci_attach_args *pa = aux; 293 struct ahc_data *ahc = (void *)self; 294 int unit = ahc->sc_dev.dv_unit; 295 bus_io_addr_t iobase; 296 bus_io_size_t iosize; 297 bus_io_handle_t ioh; 298 pci_intr_handle_t ih; 299 const char *intrstr; 300 #endif 301 u_long id; 302 unsigned opri = 0; 303 ahc_type ahc_t = AHC_NONE; 304 ahc_flag ahc_f = AHC_FNONE; 305 #if defined(__FreeBSD__) 306 struct ahc_data *ahc; 307 #endif 308 u_char ultra_enb = 0; 309 u_char our_id = 0; 310 311 #if defined(__FreeBSD__) 312 if(!(io_port = pci_conf_read(config_id, PCI_BASEADR0))) 313 return; 314 /* 315 * The first bit of PCI_BASEADR0 is always 316 * set hence we mask it off. 317 */ 318 io_port &= 0xfffffffe; 319 #elif defined(__NetBSD__) 320 if (pci_io_find(pa->pa_pc, pa->pa_tag, PCI_BASEADR0, &iobase, &iosize)) 321 return; 322 if (bus_io_map(pa->pa_bc, iobase, iosize, &ioh)) 323 return; 324 #endif 325 326 #if defined(__FreeBSD__) 327 switch ((id = pci_conf_read(config_id, PCI_ID_REG))) { 328 #elif defined(__NetBSD__) 329 switch (id = pa->pa_id) { 330 #endif 331 case PCI_DEVICE_ID_ADAPTEC_3940U: 332 case PCI_DEVICE_ID_ADAPTEC_3940: 333 if (id == PCI_DEVICE_ID_ADAPTEC_3940U) 334 ahc_t = AHC_394U; 335 else 336 ahc_t = AHC_394; 337 aic3940_count++; 338 if(!(aic3940_count & 0x01)) 339 /* Even count implies second channel */ 340 ahc_f |= AHC_CHNLB; 341 break; 342 case PCI_DEVICE_ID_ADAPTEC_2944U: 343 case PCI_DEVICE_ID_ADAPTEC_2940U: 344 ahc_t = AHC_294U; 345 break; 346 case PCI_DEVICE_ID_ADAPTEC_2944: 347 case PCI_DEVICE_ID_ADAPTEC_2940: 348 ahc_t = AHC_294; 349 break; 350 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 351 ahc_t = AHC_AIC7880; 352 break; 353 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 354 ahc_t = AHC_AIC7870; 355 break; 356 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 357 ahc_t = AHC_AIC7860; 358 break; 359 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 360 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 361 ahc_t = AHC_AIC7850; 362 break; 363 default: 364 break; 365 } 366 367 /* On all PCI adapters, we allow SCB paging */ 368 ahc_f |= AHC_PAGESCBS; 369 370 /* Remeber how the card was setup in case there is no SEEPROM */ 371 #if defined(__FreeBSD__) 372 our_id = inb(SCSIID + io_port) & OID; 373 if(ahc_t & AHC_ULTRA) 374 ultra_enb = inb(SXFRCTL0 + io_port) & ULTRAEN; 375 #else 376 our_id = bus_io_read_1(pa->pa_bc, ioh, SCSIID) & OID; 377 if(ahc_t & AHC_ULTRA) 378 ultra_enb = bus_io_read_1(pa->pa_bc, ioh, SXFRCTL0) & ULTRAEN; 379 #endif 380 381 #if defined(__FreeBSD__) 382 ahc_reset(io_port); 383 #elif defined(__NetBSD__) 384 printf("\n"); 385 ahc_reset(ahc->sc_dev.dv_xname, pa->pa_bc, ioh); 386 #endif 387 388 if(ahc_t & AHC_AIC7870){ 389 #if defined(__FreeBSD__) 390 u_long devconfig = pci_conf_read(config_id, DEVCONFIG); 391 #elif defined(__NetBSD__) 392 u_long devconfig = 393 pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG); 394 #endif 395 396 if(devconfig & (RAMPSM)) { 397 /* 398 * External SRAM present. Have the probe walk 399 * the SCBs to see how much SRAM we have and set 400 * the number of SCBs accordingly. We have to 401 * turn off SCBRAMSEL to access the external 402 * SCB SRAM. 403 * 404 * It seems that early versions of the aic7870 405 * didn't use these bits, hence the hack for the 406 * 3940 above. I would guess that recent 3940s 407 * using later aic7870 or aic7880 chips do 408 * actually set RAMPSM. 409 * 410 * The documentation isn't clear, but it sounds 411 * like the value written to devconfig must not 412 * have RAMPSM set. The second sixteen bits of 413 * the register are R/O anyway, so it shouldn't 414 * affect RAMPSM either way. 415 */ 416 devconfig &= ~(RAMPSM|SCBRAMSEL); 417 #if defined(__FreeBSD__) 418 pci_conf_write(config_id, DEVCONFIG, devconfig); 419 #elif defined(__NetBSD__) 420 pci_conf_write(pa->pa_pc, pa->pa_tag, 421 DEVCONFIG, devconfig); 422 #endif 423 } 424 } 425 426 #if defined(__FreeBSD__) 427 if(!(ahc = ahc_alloc(unit, io_port, ahc_t, ahc_f))) 428 return; /* XXX PCI code should take return status */ 429 430 if(!(pci_map_int(config_id, ahc_intr, (void *)ahc, &bio_imask))) { 431 ahc_free(ahc); 432 return; 433 } 434 #elif defined(__NetBSD__) 435 ahc_construct(ahc, pa->pa_bc, ioh, ahc_t, ahc_f); 436 437 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 438 pa->pa_intrline, &ih)) { 439 printf("%s: couldn't map interrupt\n", ahc->sc_dev.dv_xname); 440 ahc_free(ahc); 441 return; 442 } 443 intrstr = pci_intr_string(pa->pa_pc, ih); 444 ahc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ahc_intr, ahc); 445 if (ahc->sc_ih == NULL) { 446 printf("%s: couldn't establish interrupt", 447 ahc->sc_dev.dv_xname); 448 if (intrstr != NULL) 449 printf(" at %s", intrstr); 450 printf("\n"); 451 ahc_free(ahc); 452 return; 453 } 454 if (intrstr != NULL) 455 printf("%s: interrupting at %s\n", ahc->sc_dev.dv_xname, 456 intrstr); 457 #endif 458 /* 459 * Protect ourself from spurrious interrupts during 460 * intialization. 461 */ 462 opri = splbio(); 463 464 /* 465 * Do aic7870/aic7880/aic7850 specific initialization 466 */ 467 { 468 u_char sblkctl; 469 char *id_string; 470 471 switch(ahc->type) { 472 case AHC_394U: 473 case AHC_294U: 474 case AHC_AIC7880: 475 { 476 id_string = "aic7880 "; 477 load_seeprom(ahc); 478 break; 479 } 480 case AHC_394: 481 case AHC_294: 482 case AHC_AIC7870: 483 { 484 id_string = "aic7870 "; 485 load_seeprom(ahc); 486 break; 487 } 488 case AHC_AIC7860: 489 { 490 id_string = "aic7860 "; 491 /* 492 * Use defaults, if the chip wasn't initialized by 493 * a BIOS. 494 */ 495 ahc->flags |= AHC_USEDEFAULTS; 496 break; 497 } 498 case AHC_AIC7850: 499 { 500 id_string = "aic7850 "; 501 /* 502 * Use defaults, if the chip wasn't initialized by 503 * a BIOS. 504 */ 505 ahc->flags |= AHC_USEDEFAULTS; 506 break; 507 } 508 default: 509 { 510 printf("ahc: Unknown controller type. Ignoring.\n"); 511 ahc_free(ahc); 512 splx(opri); 513 return; 514 } 515 } 516 517 /* 518 * Take the LED out of diagnostic mode 519 */ 520 sblkctl = AHC_INB(ahc, SBLKCTL); 521 AHC_OUTB(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON))); 522 523 /* 524 * I don't know where this is set in the SEEPROM or by the 525 * BIOS, so we default to 100%. 526 */ 527 AHC_OUTB(ahc, DSPCISTATUS, DFTHRSH_100); 528 529 if(ahc->flags & AHC_USEDEFAULTS) { 530 /* 531 * PCI Adapter default setup 532 * Should only be used if the adapter does not have 533 * an SEEPROM. 534 */ 535 /* See if someone else set us up already */ 536 u_long i; 537 for(i = TARG_SCRATCH; i < 0x60; i++) { 538 if(AHC_INB(ahc, i) != 0x00) 539 break; 540 } 541 if(i == TARG_SCRATCH) { 542 /* 543 * Try looking for all ones. You can get 544 * either. 545 */ 546 for (i = TARG_SCRATCH; i < 0x60; i++) { 547 if(AHC_INB(ahc, i) != 0xff) 548 break; 549 } 550 } 551 if((i != 0x60) && (our_id != 0)) { 552 printf("%s: Using left over BIOS settings\n", 553 ahc_name(ahc)); 554 ahc->flags &= ~AHC_USEDEFAULTS; 555 } 556 else 557 our_id = 0x07; 558 AHC_OUTB(ahc, SCSICONF, 559 (our_id & 0x07)|ENSPCHK|RESET_SCSI); 560 /* In case we are a wide card */ 561 AHC_OUTB(ahc, SCSICONF + 1, our_id); 562 563 if(!ultra_enb || (ahc->flags & AHC_USEDEFAULTS)) { 564 /* 565 * If there wasn't a BIOS or the board 566 * wasn't in this mode to begin with, 567 * turn off ultra. 568 */ 569 ahc->type &= ~AHC_ULTRA; 570 } 571 } 572 573 printf("%s: %s", ahc_name(ahc), id_string); 574 } 575 576 if(ahc_init(ahc)){ 577 ahc_free(ahc); 578 splx(opri); 579 return; /* XXX PCI code should take return status */ 580 } 581 splx(opri); 582 583 ahc_attach(ahc); 584 } 585 586 /* 587 * Read the SEEPROM. Return 0 on failure 588 */ 589 void 590 load_seeprom(ahc) 591 struct ahc_data *ahc; 592 { 593 struct seeprom_descriptor sd; 594 struct seeprom_config sc; 595 u_short *scarray = (u_short *)≻ 596 u_short checksum = 0; 597 u_char scsi_conf; 598 u_char host_id; 599 int have_seeprom; 600 601 #if defined(__FreeBSD__) 602 sd.sd_iobase = ahc->baseport + SEECTL; 603 #elif defined(__NetBSD__) 604 sd.sd_bc = ahc->sc_bc; 605 sd.sd_ioh = ahc->sc_ioh; 606 sd.sd_offset = SEECTL; 607 #endif 608 sd.sd_MS = SEEMS; 609 sd.sd_RDY = SEERDY; 610 sd.sd_CS = SEECS; 611 sd.sd_CK = SEECK; 612 sd.sd_DO = SEEDO; 613 sd.sd_DI = SEEDI; 614 615 if(bootverbose) 616 printf("%s: Reading SEEPROM...", ahc_name(ahc)); 617 have_seeprom = acquire_seeprom(&sd); 618 if (have_seeprom) { 619 have_seeprom = read_seeprom(&sd, 620 (u_int16_t *)&sc, 621 ahc->flags & AHC_CHNLB, 622 sizeof(sc)/2); 623 release_seeprom(&sd); 624 if (have_seeprom) { 625 /* Check checksum */ 626 int i; 627 628 for (i = 0;i < (sizeof(sc)/2 - 1);i = i + 1) 629 checksum = checksum + scarray[i]; 630 if (checksum != sc.checksum) { 631 if(bootverbose) 632 printf ("checksum error"); 633 have_seeprom = 0; 634 } 635 else if(bootverbose) 636 printf("done.\n"); 637 } 638 } 639 if (!have_seeprom) { 640 if(bootverbose) 641 printf("\n%s: No SEEPROM availible\n", ahc_name(ahc)); 642 ahc->flags |= AHC_USEDEFAULTS; 643 } 644 else { 645 /* 646 * Put the data we've collected down into SRAM 647 * where ahc_init will find it. 648 */ 649 int i; 650 int max_targ = sc.max_targets & CFMAXTARG; 651 652 for(i = 0; i < max_targ; i++){ 653 u_char target_settings; 654 target_settings = (sc.device_flags[i] & CFXFER) << 4; 655 if (sc.device_flags[i] & CFSYNCH) 656 target_settings |= SOFS; 657 if (sc.device_flags[i] & CFWIDEB) 658 target_settings |= WIDEXFER; 659 if (sc.device_flags[i] & CFDISC) 660 ahc->discenable |= (0x01 << i); 661 AHC_OUTB(ahc, TARG_SCRATCH+i, target_settings); 662 } 663 AHC_OUTB(ahc, DISC_DSB, ~(ahc->discenable & 0xff)); 664 AHC_OUTB(ahc, DISC_DSB + 1, ~((ahc->discenable >> 8) & 0xff)); 665 666 host_id = sc.brtime_id & CFSCSIID; 667 668 scsi_conf = (host_id & 0x7); 669 if(sc.adapter_control & CFSPARITY) 670 scsi_conf |= ENSPCHK; 671 if(sc.adapter_control & CFRESETB) 672 scsi_conf |= RESET_SCSI; 673 674 if(ahc->type & AHC_ULTRA) { 675 /* Should we enable Ultra mode? */ 676 if(!(sc.adapter_control & CFULTRAEN)) 677 /* Treat us as a non-ultra card */ 678 ahc->type &= ~AHC_ULTRA; 679 } 680 /* Set the host ID */ 681 AHC_OUTB(ahc, SCSICONF, scsi_conf); 682 /* In case we are a wide card */ 683 AHC_OUTB(ahc, SCSICONF + 1, host_id); 684 } 685 } 686 687 static int 688 acquire_seeprom(sd) 689 struct seeprom_descriptor *sd; 690 { 691 int wait; 692 693 /* 694 * Request access of the memory port. When access is 695 * granted, SEERDY will go high. We use a 1 second 696 * timeout which should be near 1 second more than 697 * is needed. Reason: after the chip reset, there 698 * should be no contention. 699 */ 700 SEEPROM_OUTB(sd, sd->sd_MS); 701 wait = 1000; /* 1 second timeout in msec */ 702 while (--wait && ((SEEPROM_INB(sd) & sd->sd_RDY) == 0)) { 703 DELAY (1000); /* delay 1 msec */ 704 } 705 if ((SEEPROM_INB(sd) & sd->sd_RDY) == 0) { 706 SEEPROM_OUTB(sd, 0); 707 return (0); 708 } 709 return(1); 710 } 711 712 static void 713 release_seeprom(sd) 714 struct seeprom_descriptor *sd; 715 { 716 /* Release access to the memory port and the serial EEPROM. */ 717 SEEPROM_OUTB(sd, 0); 718 } 719 720 #endif /* NPCI > 0 */ 721
Indexes created Wed Oct 01 19:09:53 GMT 2025