ahc_pci.c revision 1.5
1 /* $NetBSD: ahc_pci.c,v 1.5 1996/08/28 23:44:56 thorpej Exp $ */ 2 3 /* 4 * Product specific probe and attach routines for: 5 * 3940, 2940, aic7880, aic7870, aic7860 and aic7850 SCSI controllers 6 * 7 * Copyright (c) 1995, 1996 Justin T. Gibbs. 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice immediately at the beginning of the file, without modification, 15 * this list of conditions, and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from Id: aic7870.c,v 1.37 1996/06/08 06:55:55 gibbs Exp 35 */ 36 37 #if defined(__FreeBSD__) 38 #include <pci.h> 39 #endif 40 #if NPCI > 0 || defined(__NetBSD__) 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/malloc.h> 44 #include <sys/kernel.h> 45 #include <sys/queue.h> 46 #if defined(__NetBSD__) 47 #include <sys/device.h> 48 #include <machine/bus.h> 49 #include <machine/intr.h> 50 #endif /* defined(__NetBSD__) */ 51 52 #include <scsi/scsi_all.h> 53 #include <scsi/scsiconf.h> 54 55 #if defined(__FreeBSD__) 56 57 #include <pci/pcireg.h> 58 #include <pci/pcivar.h> 59 60 #include <machine/clock.h> 61 62 #include <i386/scsi/aic7xxx.h> 63 #include <i386/scsi/93cx6.h> 64 65 #include <dev/aic7xxx/aic7xxx_reg.h> 66 67 #define PCI_BASEADR0 PCI_MAP_REG_START 68 69 #elif defined(__NetBSD__) 70 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcivar.h> 73 74 #include <dev/ic/aic7xxxreg.h> 75 #include <dev/ic/aic7xxxvar.h> 76 #include <dev/ic/smc93cx6var.h> 77 78 /* 79 * Under normal circumstances, these messages are unnecessary 80 * and not terribly cosmetic. 81 */ 82 #ifdef DEBUG 83 #define bootverbose 1 84 #else 85 #define bootverbose 0 86 #endif 87 88 #define PCI_BASEADR0 PCI_MAPREG_START 89 90 #endif /* defined(__NetBSD__) */ 91 92 #define PCI_DEVICE_ID_ADAPTEC_3940U 0x82789004ul 93 #define PCI_DEVICE_ID_ADAPTEC_2944U 0x84789004ul 94 #define PCI_DEVICE_ID_ADAPTEC_2940U 0x81789004ul 95 #define PCI_DEVICE_ID_ADAPTEC_3940 0x72789004ul 96 #define PCI_DEVICE_ID_ADAPTEC_2944 0x74789004ul 97 #define PCI_DEVICE_ID_ADAPTEC_2940 0x71789004ul 98 #define PCI_DEVICE_ID_ADAPTEC_AIC7880 0x80789004ul 99 #define PCI_DEVICE_ID_ADAPTEC_AIC7870 0x70789004ul 100 #define PCI_DEVICE_ID_ADAPTEC_AIC7860 0x60789004ul 101 #define PCI_DEVICE_ID_ADAPTEC_AIC7855 0x55789004ul 102 #define PCI_DEVICE_ID_ADAPTEC_AIC7850 0x50789004ul 103 104 #define DEVCONFIG 0x40 105 #define MPORTMODE 0x00000400ul /* aic7870 only */ 106 #define RAMPSM 0x00000200ul /* aic7870 only */ 107 #define VOLSENSE 0x00000100ul 108 #define SCBRAMSEL 0x00000080ul 109 #define MRDCEN 0x00000040ul 110 #define EXTSCBTIME 0x00000020ul /* aic7870 only */ 111 #define EXTSCBPEN 0x00000010ul /* aic7870 only */ 112 #define BERREN 0x00000008ul 113 #define DACEN 0x00000004ul 114 #define STPWLEVEL 0x00000002ul 115 #define DIFACTNEGEN 0x00000001ul /* aic7870 only */ 116 117 #define CSIZE_LATTIME 0x0c 118 #define CACHESIZE 0x0000003ful /* only 5 bits */ 119 #define LATTIME 0x0000ff00ul 120 121 /* 122 * Define the format of the aic78X0 SEEPROM registers (16 bits). 123 * 124 */ 125 126 struct seeprom_config { 127 128 /* 129 * SCSI ID Configuration Flags 130 */ 131 #define CFXFER 0x0007 /* synchronous transfer rate */ 132 #define CFSYNCH 0x0008 /* enable synchronous transfer */ 133 #define CFDISC 0x0010 /* enable disconnection */ 134 #define CFWIDEB 0x0020 /* wide bus device */ 135 /* UNUSED 0x00C0 */ 136 #define CFSTART 0x0100 /* send start unit SCSI command */ 137 #define CFINCBIOS 0x0200 /* include in BIOS scan */ 138 #define CFRNFOUND 0x0400 /* report even if not found */ 139 /* UNUSED 0xf800 */ 140 u_int16_t device_flags[16]; /* words 0-15 */ 141 142 /* 143 * BIOS Control Bits 144 */ 145 #define CFSUPREM 0x0001 /* support all removeable drives */ 146 #define CFSUPREMB 0x0002 /* support removeable drives for boot only */ 147 #define CFBIOSEN 0x0004 /* BIOS enabled */ 148 /* UNUSED 0x0008 */ 149 #define CFSM2DRV 0x0010 /* support more than two drives */ 150 /* UNUSED 0x0060 */ 151 #define CFEXTEND 0x0080 /* extended translation enabled */ 152 /* UNUSED 0xff00 */ 153 u_int16_t bios_control; /* word 16 */ 154 155 /* 156 * Host Adapter Control Bits 157 */ 158 /* UNUSED 0x0001 */ 159 #define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */ 160 #define CFSTERM 0x0004 /* SCSI low byte termination (non-wide cards) */ 161 #define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */ 162 #define CFSPARITY 0x0010 /* SCSI parity */ 163 /* UNUSED 0x0020 */ 164 #define CFRESETB 0x0040 /* reset SCSI bus at IC initialization */ 165 /* UNUSED 0xff80 */ 166 u_int16_t adapter_control; /* word 17 */ 167 168 /* 169 * Bus Release, Host Adapter ID 170 */ 171 #define CFSCSIID 0x000f /* host adapter SCSI ID */ 172 /* UNUSED 0x00f0 */ 173 #define CFBRTIME 0xff00 /* bus release time */ 174 u_int16_t brtime_id; /* word 18 */ 175 176 /* 177 * Maximum targets 178 */ 179 #define CFMAXTARG 0x00ff /* maximum targets */ 180 /* UNUSED 0xff00 */ 181 u_int16_t max_targets; /* word 19 */ 182 183 u_int16_t res_1[11]; /* words 20-30 */ 184 u_int16_t checksum; /* word 31 */ 185 }; 186 187 static void load_seeprom __P((struct ahc_data *ahc)); 188 static int acquire_seeprom __P((struct seeprom_descriptor *sd)); 189 static void release_seeprom __P((struct seeprom_descriptor *sd)); 190 191 static u_char aic3940_count; 192 193 #if defined(__FreeBSD__) 194 195 static char* aic7870_probe __P((pcici_t tag, pcidi_t type)); 196 static void aic7870_attach __P((pcici_t config_id, int unit)); 197 198 static struct pci_device ahc_pci_driver = { 199 "ahc", 200 aic7870_probe, 201 aic7870_attach, 202 &ahc_unit, 203 NULL 204 }; 205 206 DATA_SET (pcidevice_set, ahc_pci_driver); 207 208 static char* 209 aic7870_probe (pcici_t tag, pcidi_t type) 210 { 211 switch(type) { 212 case PCI_DEVICE_ID_ADAPTEC_3940U: 213 return ("Adaptec 3940 Ultra SCSI host adapter"); 214 break; 215 case PCI_DEVICE_ID_ADAPTEC_3940: 216 return ("Adaptec 3940 SCSI host adapter"); 217 break; 218 case PCI_DEVICE_ID_ADAPTEC_2944U: 219 return ("Adaptec 2944 Ultra SCSI host adapter"); 220 break; 221 case PCI_DEVICE_ID_ADAPTEC_2940U: 222 return ("Adaptec 2940 Ultra SCSI host adapter"); 223 break; 224 case PCI_DEVICE_ID_ADAPTEC_2944: 225 return ("Adaptec 2944 SCSI host adapter"); 226 break; 227 case PCI_DEVICE_ID_ADAPTEC_2940: 228 return ("Adaptec 2940 SCSI host adapter"); 229 break; 230 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 231 return ("Adaptec aic7880 Ultra SCSI host adapter"); 232 break; 233 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 234 return ("Adaptec aic7870 SCSI host adapter"); 235 break; 236 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 237 return ("Adaptec aic7860 SCSI host adapter"); 238 break; 239 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 240 return ("Adaptec aic7855 SCSI host adapter"); 241 break; 242 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 243 return ("Adaptec aic7850 SCSI host adapter"); 244 break; 245 default: 246 break; 247 } 248 return (0); 249 250 } 251 252 #elif defined(__NetBSD__) 253 254 int ahc_pci_probe __P((struct device *, void *, void *)); 255 void ahc_pci_attach __P((struct device *, struct device *, void *)); 256 257 struct cfattach ahc_pci_ca = { 258 sizeof(struct ahc_data), ahc_pci_probe, ahc_pci_attach 259 }; 260 261 int 262 ahc_pci_probe(parent, match, aux) 263 struct device *parent; 264 void *match, *aux; 265 { 266 struct pci_attach_args *pa = aux; 267 268 switch (pa->pa_id) { 269 case PCI_DEVICE_ID_ADAPTEC_3940U: 270 case PCI_DEVICE_ID_ADAPTEC_2944U: 271 case PCI_DEVICE_ID_ADAPTEC_2940U: 272 case PCI_DEVICE_ID_ADAPTEC_3940: 273 case PCI_DEVICE_ID_ADAPTEC_2944: 274 case PCI_DEVICE_ID_ADAPTEC_2940: 275 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 276 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 277 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 278 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 279 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 280 return 1; 281 } 282 return 0; 283 } 284 #endif /* defined(__NetBSD__) */ 285 286 #if defined(__FreeBSD__) 287 static void 288 aic7870_attach(config_id, unit) 289 pcici_t config_id; 290 int unit; 291 #elif defined(__NetBSD__) 292 void 293 ahc_pci_attach(parent, self, aux) 294 struct device *parent, *self; 295 void *aux; 296 #endif 297 { 298 #if defined(__FreeBSD__) 299 u_long io_port; 300 #elif defined(__NetBSD__) 301 struct pci_attach_args *pa = aux; 302 struct ahc_data *ahc = (void *)self; 303 int unit = ahc->sc_dev.dv_unit; 304 bus_io_addr_t iobase; 305 bus_io_size_t iosize; 306 bus_io_handle_t ioh; 307 pci_intr_handle_t ih; 308 const char *intrstr; 309 #endif 310 u_long id; 311 unsigned opri = 0; 312 ahc_type ahc_t = AHC_NONE; 313 ahc_flag ahc_f = AHC_FNONE; 314 #if defined(__FreeBSD__) 315 struct ahc_data *ahc; 316 #endif 317 u_char ultra_enb = 0; 318 u_char our_id = 0; 319 320 #if defined(__FreeBSD__) 321 if(!(io_port = pci_conf_read(config_id, PCI_BASEADR0))) 322 return; 323 /* 324 * The first bit of PCI_BASEADR0 is always 325 * set hence we mask it off. 326 */ 327 io_port &= 0xfffffffe; 328 #elif defined(__NetBSD__) 329 if (pci_io_find(pa->pa_pc, pa->pa_tag, PCI_BASEADR0, &iobase, &iosize)) 330 return; 331 if (bus_io_map(pa->pa_bc, iobase, iosize, &ioh)) 332 return; 333 #endif 334 335 #if defined(__FreeBSD__) 336 switch ((id = pci_conf_read(config_id, PCI_ID_REG))) { 337 #elif defined(__NetBSD__) 338 switch (id = pa->pa_id) { 339 #endif 340 case PCI_DEVICE_ID_ADAPTEC_3940U: 341 case PCI_DEVICE_ID_ADAPTEC_3940: 342 if (id == PCI_DEVICE_ID_ADAPTEC_3940U) 343 ahc_t = AHC_394U; 344 else 345 ahc_t = AHC_394; 346 aic3940_count++; 347 if(!(aic3940_count & 0x01)) 348 /* Even count implies second channel */ 349 ahc_f |= AHC_CHNLB; 350 break; 351 case PCI_DEVICE_ID_ADAPTEC_2944U: 352 case PCI_DEVICE_ID_ADAPTEC_2940U: 353 ahc_t = AHC_294U; 354 break; 355 case PCI_DEVICE_ID_ADAPTEC_2944: 356 case PCI_DEVICE_ID_ADAPTEC_2940: 357 ahc_t = AHC_294; 358 break; 359 case PCI_DEVICE_ID_ADAPTEC_AIC7880: 360 ahc_t = AHC_AIC7880; 361 break; 362 case PCI_DEVICE_ID_ADAPTEC_AIC7870: 363 ahc_t = AHC_AIC7870; 364 break; 365 case PCI_DEVICE_ID_ADAPTEC_AIC7860: 366 ahc_t = AHC_AIC7860; 367 break; 368 case PCI_DEVICE_ID_ADAPTEC_AIC7855: 369 case PCI_DEVICE_ID_ADAPTEC_AIC7850: 370 ahc_t = AHC_AIC7850; 371 break; 372 default: 373 break; 374 } 375 376 /* On all PCI adapters, we allow SCB paging */ 377 ahc_f |= AHC_PAGESCBS; 378 379 /* Remeber how the card was setup in case there is no SEEPROM */ 380 #if defined(__FreeBSD__) 381 our_id = inb(SCSIID + io_port) & OID; 382 if(ahc_t & AHC_ULTRA) 383 ultra_enb = inb(SXFRCTL0 + io_port) & ULTRAEN; 384 #else 385 our_id = bus_io_read_1(pa->pa_bc, ioh, SCSIID) & OID; 386 if(ahc_t & AHC_ULTRA) 387 ultra_enb = bus_io_read_1(pa->pa_bc, ioh, SXFRCTL0) & ULTRAEN; 388 #endif 389 390 #if defined(__FreeBSD__) 391 ahc_reset(io_port); 392 #elif defined(__NetBSD__) 393 printf("\n"); 394 ahc_reset(ahc->sc_dev.dv_xname, pa->pa_bc, ioh); 395 #endif 396 397 if(ahc_t & AHC_AIC7870){ 398 #if defined(__FreeBSD__) 399 u_long devconfig = pci_conf_read(config_id, DEVCONFIG); 400 #elif defined(__NetBSD__) 401 u_long devconfig = 402 pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG); 403 #endif 404 405 if(devconfig & (RAMPSM)) { 406 /* 407 * External SRAM present. Have the probe walk 408 * the SCBs to see how much SRAM we have and set 409 * the number of SCBs accordingly. We have to 410 * turn off SCBRAMSEL to access the external 411 * SCB SRAM. 412 * 413 * It seems that early versions of the aic7870 414 * didn't use these bits, hence the hack for the 415 * 3940 above. I would guess that recent 3940s 416 * using later aic7870 or aic7880 chips do 417 * actually set RAMPSM. 418 * 419 * The documentation isn't clear, but it sounds 420 * like the value written to devconfig must not 421 * have RAMPSM set. The second sixteen bits of 422 * the register are R/O anyway, so it shouldn't 423 * affect RAMPSM either way. 424 */ 425 devconfig &= ~(RAMPSM|SCBRAMSEL); 426 #if defined(__FreeBSD__) 427 pci_conf_write(config_id, DEVCONFIG, devconfig); 428 #elif defined(__NetBSD__) 429 pci_conf_write(pa->pa_pc, pa->pa_tag, 430 DEVCONFIG, devconfig); 431 #endif 432 } 433 } 434 435 #if defined(__FreeBSD__) 436 if(!(ahc = ahc_alloc(unit, io_port, ahc_t, ahc_f))) 437 return; /* XXX PCI code should take return status */ 438 439 if(!(pci_map_int(config_id, ahc_intr, (void *)ahc, &bio_imask))) { 440 ahc_free(ahc); 441 return; 442 } 443 #elif defined(__NetBSD__) 444 ahc_construct(ahc, pa->pa_bc, ioh, ahc_t, ahc_f); 445 446 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 447 pa->pa_intrline, &ih)) { 448 printf("%s: couldn't map interrupt\n", ahc->sc_dev.dv_xname); 449 ahc_free(ahc); 450 return; 451 } 452 intrstr = pci_intr_string(pa->pa_pc, ih); 453 ahc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ahc_intr, ahc); 454 if (ahc->sc_ih == NULL) { 455 printf("%s: couldn't establish interrupt", 456 ahc->sc_dev.dv_xname); 457 if (intrstr != NULL) 458 printf(" at %s", intrstr); 459 printf("\n"); 460 ahc_free(ahc); 461 return; 462 } 463 if (intrstr != NULL) 464 printf("%s: interrupting at %s\n", ahc->sc_dev.dv_xname, 465 intrstr); 466 #endif 467 /* 468 * Protect ourself from spurrious interrupts during 469 * intialization. 470 */ 471 opri = splbio(); 472 473 /* 474 * Do aic7870/aic7880/aic7850 specific initialization 475 */ 476 { 477 u_char sblkctl; 478 char *id_string; 479 480 switch(ahc->type) { 481 case AHC_394U: 482 case AHC_294U: 483 case AHC_AIC7880: 484 { 485 id_string = "aic7880 "; 486 load_seeprom(ahc); 487 break; 488 } 489 case AHC_394: 490 case AHC_294: 491 case AHC_AIC7870: 492 { 493 id_string = "aic7870 "; 494 load_seeprom(ahc); 495 break; 496 } 497 case AHC_AIC7860: 498 { 499 id_string = "aic7860 "; 500 /* 501 * Use defaults, if the chip wasn't initialized by 502 * a BIOS. 503 */ 504 ahc->flags |= AHC_USEDEFAULTS; 505 break; 506 } 507 case AHC_AIC7850: 508 { 509 id_string = "aic7850 "; 510 /* 511 * Use defaults, if the chip wasn't initialized by 512 * a BIOS. 513 */ 514 ahc->flags |= AHC_USEDEFAULTS; 515 break; 516 } 517 default: 518 { 519 printf("ahc: Unknown controller type. Ignoring.\n"); 520 ahc_free(ahc); 521 splx(opri); 522 return; 523 } 524 } 525 526 /* 527 * Take the LED out of diagnostic mode 528 */ 529 sblkctl = AHC_INB(ahc, SBLKCTL); 530 AHC_OUTB(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON))); 531 532 /* 533 * I don't know where this is set in the SEEPROM or by the 534 * BIOS, so we default to 100%. 535 */ 536 AHC_OUTB(ahc, DSPCISTATUS, DFTHRSH_100); 537 538 if(ahc->flags & AHC_USEDEFAULTS) { 539 /* 540 * PCI Adapter default setup 541 * Should only be used if the adapter does not have 542 * an SEEPROM. 543 */ 544 /* See if someone else set us up already */ 545 u_long i; 546 for(i = TARG_SCRATCH; i < 0x60; i++) { 547 if(AHC_INB(ahc, i) != 0x00) 548 break; 549 } 550 if(i == TARG_SCRATCH) { 551 /* 552 * Try looking for all ones. You can get 553 * either. 554 */ 555 for (i = TARG_SCRATCH; i < 0x60; i++) { 556 if(AHC_INB(ahc, i) != 0xff) 557 break; 558 } 559 } 560 if((i != 0x60) && (our_id != 0)) { 561 printf("%s: Using left over BIOS settings\n", 562 ahc_name(ahc)); 563 ahc->flags &= ~AHC_USEDEFAULTS; 564 } 565 else 566 our_id = 0x07; 567 AHC_OUTB(ahc, SCSICONF, 568 (our_id & 0x07)|ENSPCHK|RESET_SCSI); 569 /* In case we are a wide card */ 570 AHC_OUTB(ahc, SCSICONF + 1, our_id); 571 572 if(!ultra_enb || (ahc->flags & AHC_USEDEFAULTS)) { 573 /* 574 * If there wasn't a BIOS or the board 575 * wasn't in this mode to begin with, 576 * turn off ultra. 577 */ 578 ahc->type &= ~AHC_ULTRA; 579 } 580 } 581 582 printf("%s: %s", ahc_name(ahc), id_string); 583 } 584 585 if(ahc_init(ahc)){ 586 ahc_free(ahc); 587 splx(opri); 588 return; /* XXX PCI code should take return status */ 589 } 590 splx(opri); 591 592 ahc_attach(ahc); 593 } 594 595 /* 596 * Read the SEEPROM. Return 0 on failure 597 */ 598 void 599 load_seeprom(ahc) 600 struct ahc_data *ahc; 601 { 602 struct seeprom_descriptor sd; 603 struct seeprom_config sc; 604 u_short *scarray = (u_short *)≻ 605 u_short checksum = 0; 606 u_char scsi_conf; 607 u_char host_id; 608 int have_seeprom; 609 610 #if defined(__FreeBSD__) 611 sd.sd_iobase = ahc->baseport + SEECTL; 612 #elif defined(__NetBSD__) 613 sd.sd_bc = ahc->sc_bc; 614 sd.sd_ioh = ahc->sc_ioh; 615 sd.sd_offset = SEECTL; 616 #endif 617 sd.sd_MS = SEEMS; 618 sd.sd_RDY = SEERDY; 619 sd.sd_CS = SEECS; 620 sd.sd_CK = SEECK; 621 sd.sd_DO = SEEDO; 622 sd.sd_DI = SEEDI; 623 624 if(bootverbose) 625 printf("%s: Reading SEEPROM...", ahc_name(ahc)); 626 have_seeprom = acquire_seeprom(&sd); 627 if (have_seeprom) { 628 have_seeprom = read_seeprom(&sd, 629 (u_int16_t *)&sc, 630 ahc->flags & AHC_CHNLB, 631 sizeof(sc)/2); 632 release_seeprom(&sd); 633 if (have_seeprom) { 634 /* Check checksum */ 635 int i; 636 637 for (i = 0;i < (sizeof(sc)/2 - 1);i = i + 1) 638 checksum = checksum + scarray[i]; 639 if (checksum != sc.checksum) { 640 if(bootverbose) 641 printf ("checksum error"); 642 have_seeprom = 0; 643 } 644 else if(bootverbose) 645 printf("done.\n"); 646 } 647 } 648 if (!have_seeprom) { 649 if(bootverbose) 650 printf("\n%s: No SEEPROM availible\n", ahc_name(ahc)); 651 ahc->flags |= AHC_USEDEFAULTS; 652 } 653 else { 654 /* 655 * Put the data we've collected down into SRAM 656 * where ahc_init will find it. 657 */ 658 int i; 659 int max_targ = sc.max_targets & CFMAXTARG; 660 661 for(i = 0; i < max_targ; i++){ 662 u_char target_settings; 663 target_settings = (sc.device_flags[i] & CFXFER) << 4; 664 if (sc.device_flags[i] & CFSYNCH) 665 target_settings |= SOFS; 666 if (sc.device_flags[i] & CFWIDEB) 667 target_settings |= WIDEXFER; 668 if (sc.device_flags[i] & CFDISC) 669 ahc->discenable |= (0x01 << i); 670 AHC_OUTB(ahc, TARG_SCRATCH+i, target_settings); 671 } 672 AHC_OUTB(ahc, DISC_DSB, ~(ahc->discenable & 0xff)); 673 AHC_OUTB(ahc, DISC_DSB + 1, ~((ahc->discenable >> 8) & 0xff)); 674 675 host_id = sc.brtime_id & CFSCSIID; 676 677 scsi_conf = (host_id & 0x7); 678 if(sc.adapter_control & CFSPARITY) 679 scsi_conf |= ENSPCHK; 680 if(sc.adapter_control & CFRESETB) 681 scsi_conf |= RESET_SCSI; 682 683 if(ahc->type & AHC_ULTRA) { 684 /* Should we enable Ultra mode? */ 685 if(!(sc.adapter_control & CFULTRAEN)) 686 /* Treat us as a non-ultra card */ 687 ahc->type &= ~AHC_ULTRA; 688 } 689 /* Set the host ID */ 690 AHC_OUTB(ahc, SCSICONF, scsi_conf); 691 /* In case we are a wide card */ 692 AHC_OUTB(ahc, SCSICONF + 1, host_id); 693 } 694 } 695 696 static int 697 acquire_seeprom(sd) 698 struct seeprom_descriptor *sd; 699 { 700 int wait; 701 702 /* 703 * Request access of the memory port. When access is 704 * granted, SEERDY will go high. We use a 1 second 705 * timeout which should be near 1 second more than 706 * is needed. Reason: after the chip reset, there 707 * should be no contention. 708 */ 709 SEEPROM_OUTB(sd, sd->sd_MS); 710 wait = 1000; /* 1 second timeout in msec */ 711 while (--wait && ((SEEPROM_INB(sd) & sd->sd_RDY) == 0)) { 712 DELAY (1000); /* delay 1 msec */ 713 } 714 if ((SEEPROM_INB(sd) & sd->sd_RDY) == 0) { 715 SEEPROM_OUTB(sd, 0); 716 return (0); 717 } 718 return(1); 719 } 720 721 static void 722 release_seeprom(sd) 723 struct seeprom_descriptor *sd; 724 { 725 /* Release access to the memory port and the serial EEPROM. */ 726 SEEPROM_OUTB(sd, 0); 727 } 728 729 #endif /* NPCI > 0 */ 730
Indexes created Wed Oct 01 19:09:53 GMT 2025