alipm.c revision 1.1.10.3
1 1.1.10.3 skrll /* $NetBSD: alipm.c,v 1.1.10.3 2009/03/03 18:31:07 skrll Exp $ */ 2 1.1.10.2 skrll /* $OpenBSD: alipm.c,v 1.13 2007/05/03 12:19:01 dlg Exp $ */ 3 1.1.10.2 skrll 4 1.1.10.2 skrll /* 5 1.1.10.2 skrll * Copyright (c) 2005 Mark Kettenis 6 1.1.10.2 skrll * 7 1.1.10.2 skrll * Permission to use, copy, modify, and distribute this software for any 8 1.1.10.2 skrll * purpose with or without fee is hereby granted, provided that the above 9 1.1.10.2 skrll * copyright notice and this permission notice appear in all copies. 10 1.1.10.2 skrll * 11 1.1.10.2 skrll * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 1.1.10.2 skrll * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 1.1.10.2 skrll * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 1.1.10.2 skrll * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 1.1.10.2 skrll * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 1.1.10.2 skrll * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 1.1.10.2 skrll * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 1.1.10.2 skrll */ 19 1.1.10.2 skrll 20 1.1.10.2 skrll #include <sys/cdefs.h> 21 1.1.10.3 skrll <<<<<<< alipm.c 22 1.1.10.3 skrll __KERNEL_RCSID(0, "$NetBSD: alipm.c,v 1.1.10.3 2009/03/03 18:31:07 skrll Exp $"); 23 1.1.10.3 skrll ======= 24 1.1.10.3 skrll __KERNEL_RCSID(0, "$NetBSD: alipm.c,v 1.1.10.3 2009/03/03 18:31:07 skrll Exp $"); 25 1.1.10.3 skrll >>>>>>> 1.2 26 1.1.10.2 skrll 27 1.1.10.2 skrll #include <sys/param.h> 28 1.1.10.2 skrll #include <sys/device.h> 29 1.1.10.2 skrll #include <sys/kernel.h> 30 1.1.10.2 skrll #include <sys/rwlock.h> 31 1.1.10.2 skrll #include <sys/proc.h> 32 1.1.10.2 skrll #include <sys/systm.h> 33 1.1.10.2 skrll 34 1.1.10.2 skrll #include <dev/i2c/i2cvar.h> 35 1.1.10.2 skrll 36 1.1.10.2 skrll #include <dev/pci/pcidevs.h> 37 1.1.10.2 skrll #include <dev/pci/pcireg.h> 38 1.1.10.2 skrll #include <dev/pci/pcivar.h> 39 1.1.10.2 skrll 40 1.1.10.2 skrll /* 41 1.1.10.2 skrll * Acer Labs M7101 Power register definitions. 42 1.1.10.2 skrll */ 43 1.1.10.2 skrll 44 1.1.10.2 skrll /* PCI configuration registers. */ 45 1.1.10.2 skrll #define ALIPM_CONF 0xd0 /* general configuration */ 46 1.1.10.2 skrll #define ALIPM_CONF_SMBEN 0x0400 /* enable SMBus */ 47 1.1.10.2 skrll #define ALIPM_BASE 0xe0 /* ACPI and SMBus base address */ 48 1.1.10.2 skrll #define ALIPM_SMB_HOSTC 0xf0 /* host configuration */ 49 1.1.10.2 skrll #define ALIPM_SMB_HOSTC_HSTEN 0x00000001 /* enable host controller */ 50 1.1.10.2 skrll #define ALIPM_SMB_HOSTC_CLOCK 0x00e00000 /* clock speed */ 51 1.1.10.2 skrll #define ALIPM_SMB_HOSTC_149K 0x00000000 /* 149 KHz clock */ 52 1.1.10.2 skrll #define ALIPM_SMB_HOSTC_74K 0x00200000 /* 74 KHz clock */ 53 1.1.10.2 skrll #define ALIPM_SMB_HOSTC_37K 0x00400000 /* 37 KHz clock */ 54 1.1.10.2 skrll #define ALIPM_SMB_HOSTC_223K 0x00800000 /* 223 KHz clock */ 55 1.1.10.2 skrll #define ALIPM_SMB_HOSTC_111K 0x00a00000 /* 111 KHz clock */ 56 1.1.10.2 skrll #define ALIPM_SMB_HOSTC_55K 0x00c00000 /* 55 KHz clock */ 57 1.1.10.2 skrll 58 1.1.10.2 skrll #define ALIPM_SMB_SIZE 32 /* SMBus I/O space size */ 59 1.1.10.2 skrll 60 1.1.10.2 skrll /* SMBus I/O registers */ 61 1.1.10.2 skrll #define ALIPM_SMB_HS 0x00 /* host status */ 62 1.1.10.2 skrll #define ALIPM_SMB_HS_IDLE 0x04 63 1.1.10.2 skrll #define ALIPM_SMB_HS_BUSY 0x08 /* running a command */ 64 1.1.10.2 skrll #define ALIPM_SMB_HS_DONE 0x10 /* command completed */ 65 1.1.10.2 skrll #define ALIPM_SMB_HS_DEVERR 0x20 /* command error */ 66 1.1.10.2 skrll #define ALIPM_SMB_HS_BUSERR 0x40 /* transaction collision */ 67 1.1.10.2 skrll #define ALIPM_SMB_HS_FAILED 0x80 /* failed bus transaction */ 68 1.1.10.2 skrll #define ALIPM_SMB_HS_BITS \ 69 1.1.10.2 skrll "\020\003IDLE\004BUSY\005DONE\006DEVERR\007BUSERR\010FAILED" 70 1.1.10.2 skrll #define ALIPM_SMB_HC 0x01 /* host control */ 71 1.1.10.2 skrll #define ALIPM_SMB_HC_KILL 0x04 /* kill command */ 72 1.1.10.2 skrll #define ALIPM_SMB_HC_RESET 0x08 /* reset bus */ 73 1.1.10.2 skrll #define ALIPM_SMB_HC_CMD_QUICK 0x00 /* QUICK command */ 74 1.1.10.2 skrll #define ALIPM_SMB_HC_CMD_BYTE 0x10 /* BYTE command */ 75 1.1.10.2 skrll #define ALIPM_SMB_HC_CMD_BDATA 0x20 /* BYTE DATA command */ 76 1.1.10.2 skrll #define ALIPM_SMB_HC_CMD_WDATA 0x30 /* WORD DATA command */ 77 1.1.10.2 skrll #define ALIPM_SMB_HC_CMD_BLOCK 0x40 /* BLOCK command */ 78 1.1.10.2 skrll #define ALIPM_SMB_START 0x02 /* start command */ 79 1.1.10.2 skrll #define ALIPM_SMB_TXSLVA 0x03 /* transmit slave address */ 80 1.1.10.2 skrll #define ALIPM_SMB_TXSLVA_READ (1 << 0) /* read direction */ 81 1.1.10.2 skrll #define ALIPM_SMB_TXSLVA_ADDR(x) (((x) & 0x7f) << 1) /* 7-bit address */ 82 1.1.10.2 skrll #define ALIPM_SMB_HD0 0x04 /* host data 0 */ 83 1.1.10.2 skrll #define ALIPM_SMB_HD1 0x05 /* host data 1 */ 84 1.1.10.2 skrll #define ALIPM_SMB_HBDB 0x06 /* host block data byte */ 85 1.1.10.2 skrll #define ALIPM_SMB_HCMD 0x07 /* host command */ 86 1.1.10.2 skrll 87 1.1.10.2 skrll /* 88 1.1.10.2 skrll * Newer chips have a more standard, but different PCI configuration 89 1.1.10.2 skrll * register layout. 90 1.1.10.2 skrll */ 91 1.1.10.2 skrll 92 1.1.10.2 skrll #define ALIPM_SMB_BASE 0x14 /* SMBus base address */ 93 1.1.10.2 skrll #define ALIPM_SMB_HOSTX 0xe0 /* host configuration */ 94 1.1.10.2 skrll 95 1.1.10.2 skrll #ifdef ALIPM_DEBUG 96 1.1.10.2 skrll #define DPRINTF(x) printf x 97 1.1.10.2 skrll #else 98 1.1.10.2 skrll #define DPRINTF(x) 99 1.1.10.2 skrll #endif 100 1.1.10.2 skrll 101 1.1.10.2 skrll #define ALIPM_DELAY 100 102 1.1.10.2 skrll #define ALIPM_TIMEOUT 1 103 1.1.10.2 skrll 104 1.1.10.2 skrll struct alipm_softc { 105 1.1.10.2 skrll struct device sc_dev; 106 1.1.10.2 skrll 107 1.1.10.2 skrll bus_space_tag_t sc_iot; 108 1.1.10.2 skrll bus_space_handle_t sc_ioh; 109 1.1.10.2 skrll 110 1.1.10.2 skrll struct i2c_controller sc_smb_tag; 111 1.1.10.2 skrll krwlock_t sc_smb_lock; 112 1.1.10.2 skrll }; 113 1.1.10.2 skrll 114 1.1.10.2 skrll static int alipm_match(struct device *, cfdata_t, void *); 115 1.1.10.2 skrll static void alipm_attach(struct device *, struct device *, void *); 116 1.1.10.2 skrll 117 1.1.10.2 skrll int alipm_smb_acquire_bus(void *, int); 118 1.1.10.2 skrll void alipm_smb_release_bus(void *, int); 119 1.1.10.2 skrll int alipm_smb_exec(void *, i2c_op_t, i2c_addr_t, const void *, 120 1.1.10.2 skrll size_t, void *, size_t, int); 121 1.1.10.2 skrll 122 1.1.10.2 skrll CFATTACH_DECL(alipm, sizeof(struct alipm_softc), 123 1.1.10.2 skrll alipm_match, alipm_attach, NULL, NULL); 124 1.1.10.2 skrll 125 1.1.10.2 skrll static int 126 1.1.10.2 skrll alipm_match(struct device *parent, cfdata_t match, void *aux) 127 1.1.10.2 skrll { 128 1.1.10.2 skrll struct pci_attach_args *pa = aux; 129 1.1.10.2 skrll 130 1.1.10.2 skrll if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI && 131 1.1.10.2 skrll (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M7101)) 132 1.1.10.2 skrll return (1); 133 1.1.10.2 skrll return (0); 134 1.1.10.2 skrll } 135 1.1.10.2 skrll 136 1.1.10.2 skrll static void 137 1.1.10.2 skrll alipm_attach(struct device *parent, struct device *self, void *aux) 138 1.1.10.2 skrll { 139 1.1.10.2 skrll struct alipm_softc *sc = (struct alipm_softc *) self; 140 1.1.10.2 skrll struct pci_attach_args *pa = aux; 141 1.1.10.2 skrll struct i2cbus_attach_args iba; 142 1.1.10.2 skrll pcireg_t iobase, reg; 143 1.1.10.2 skrll bus_size_t iosize = ALIPM_SMB_SIZE; 144 1.1.10.2 skrll 145 1.1.10.2 skrll /* Old chips don't have the PCI 2.2 Capabilities List. */ 146 1.1.10.2 skrll reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 147 1.1.10.2 skrll if ((reg & PCI_STATUS_CAPLIST_SUPPORT) == 0) { 148 1.1.10.2 skrll /* Map I/O space */ 149 1.1.10.2 skrll iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_BASE); 150 1.1.10.2 skrll sc->sc_iot = pa->pa_iot; 151 1.1.10.2 skrll if (iobase == 0 || 152 1.1.10.2 skrll bus_space_map(sc->sc_iot, iobase >> 16, 153 1.1.10.2 skrll iosize, 0, &sc->sc_ioh)) { 154 1.1.10.2 skrll aprint_error_dev(&sc->sc_dev, "can't map I/O space\n"); 155 1.1.10.2 skrll return; 156 1.1.10.2 skrll } 157 1.1.10.2 skrll 158 1.1.10.2 skrll reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_CONF); 159 1.1.10.2 skrll if ((reg & ALIPM_CONF_SMBEN) == 0) { 160 1.1.10.2 skrll aprint_error_dev(&sc->sc_dev, "SMBus disabled\n"); 161 1.1.10.2 skrll goto fail; 162 1.1.10.2 skrll } 163 1.1.10.2 skrll 164 1.1.10.2 skrll reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_SMB_HOSTC); 165 1.1.10.2 skrll if ((reg & ALIPM_SMB_HOSTC_HSTEN) == 0) { 166 1.1.10.2 skrll aprint_error_dev(&sc->sc_dev, "SMBus host disabled\n"); 167 1.1.10.2 skrll goto fail; 168 1.1.10.2 skrll } 169 1.1.10.2 skrll } else { 170 1.1.10.2 skrll /* Map I/O space */ 171 1.1.10.2 skrll if (pci_mapreg_map(pa, ALIPM_SMB_BASE, PCI_MAPREG_TYPE_IO, 0, 172 1.1.10.2 skrll &sc->sc_iot, &sc->sc_ioh, NULL, &iosize)) { 173 1.1.10.2 skrll aprint_error_dev(&sc->sc_dev, "can't map I/O space\n"); 174 1.1.10.2 skrll return; 175 1.1.10.2 skrll } 176 1.1.10.2 skrll 177 1.1.10.2 skrll reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_SMB_HOSTX); 178 1.1.10.2 skrll if ((reg & ALIPM_SMB_HOSTC_HSTEN) == 0) { 179 1.1.10.2 skrll aprint_error_dev(&sc->sc_dev, "SMBus host disabled\n"); 180 1.1.10.2 skrll goto fail; 181 1.1.10.2 skrll } 182 1.1.10.2 skrll } 183 1.1.10.2 skrll 184 1.1.10.2 skrll switch (reg & ALIPM_SMB_HOSTC_CLOCK) { 185 1.1.10.2 skrll case ALIPM_SMB_HOSTC_149K: 186 1.1.10.2 skrll aprint_normal(": 149KHz clock\n"); 187 1.1.10.2 skrll break; 188 1.1.10.2 skrll case ALIPM_SMB_HOSTC_74K: 189 1.1.10.2 skrll aprint_normal(": 74KHz clock\n"); 190 1.1.10.2 skrll break; 191 1.1.10.2 skrll case ALIPM_SMB_HOSTC_37K: 192 1.1.10.2 skrll aprint_normal(": 37KHz clock\n"); 193 1.1.10.2 skrll break; 194 1.1.10.2 skrll case ALIPM_SMB_HOSTC_223K: 195 1.1.10.2 skrll aprint_normal(": 223KHz clock\n"); 196 1.1.10.2 skrll break; 197 1.1.10.2 skrll case ALIPM_SMB_HOSTC_111K: 198 1.1.10.2 skrll aprint_normal(": 111KHz clock\n"); 199 1.1.10.2 skrll break; 200 1.1.10.2 skrll case ALIPM_SMB_HOSTC_55K: 201 1.1.10.2 skrll aprint_normal(": 55KHz clock\n"); 202 1.1.10.2 skrll break; 203 1.1.10.2 skrll default: 204 1.1.10.2 skrll aprint_normal(" unknown clock speed\n"); 205 1.1.10.2 skrll break; 206 1.1.10.2 skrll } 207 1.1.10.2 skrll 208 1.1.10.2 skrll /* Attach I2C bus */ 209 1.1.10.2 skrll rw_init(&sc->sc_smb_lock); 210 1.1.10.2 skrll sc->sc_smb_tag.ic_cookie = sc; 211 1.1.10.2 skrll sc->sc_smb_tag.ic_acquire_bus = alipm_smb_acquire_bus; 212 1.1.10.2 skrll sc->sc_smb_tag.ic_release_bus = alipm_smb_release_bus; 213 1.1.10.2 skrll sc->sc_smb_tag.ic_exec = alipm_smb_exec; 214 1.1.10.2 skrll 215 1.1.10.2 skrll bzero(&iba, sizeof iba); 216 1.1.10.2 skrll iba.iba_tag = &sc->sc_smb_tag; 217 1.1.10.2 skrll (void)config_found_ia(&sc->sc_dev, "i2cbus", &iba, iicbus_print); 218 1.1.10.2 skrll 219 1.1.10.2 skrll return; 220 1.1.10.2 skrll 221 1.1.10.2 skrll fail: 222 1.1.10.2 skrll bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize); 223 1.1.10.2 skrll } 224 1.1.10.2 skrll 225 1.1.10.2 skrll int 226 1.1.10.2 skrll alipm_smb_acquire_bus(void *cookie, int flags) 227 1.1.10.2 skrll { 228 1.1.10.2 skrll struct alipm_softc *sc = cookie; 229 1.1.10.2 skrll 230 1.1.10.2 skrll if (flags & I2C_F_POLL) 231 1.1.10.2 skrll return (0); 232 1.1.10.2 skrll 233 1.1.10.2 skrll rw_enter(&sc->sc_smb_lock, RW_WRITER); 234 1.1.10.2 skrll return 0; 235 1.1.10.2 skrll } 236 1.1.10.2 skrll 237 1.1.10.2 skrll void 238 1.1.10.2 skrll alipm_smb_release_bus(void *cookie, int flags) 239 1.1.10.2 skrll { 240 1.1.10.2 skrll struct alipm_softc *sc = cookie; 241 1.1.10.2 skrll 242 1.1.10.2 skrll if (flags & I2C_F_POLL) 243 1.1.10.2 skrll return; 244 1.1.10.2 skrll 245 1.1.10.2 skrll rw_exit(&sc->sc_smb_lock); 246 1.1.10.2 skrll } 247 1.1.10.2 skrll 248 1.1.10.2 skrll int 249 1.1.10.2 skrll alipm_smb_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, 250 1.1.10.2 skrll const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags) 251 1.1.10.2 skrll { 252 1.1.10.2 skrll struct alipm_softc *sc = cookie; 253 1.1.10.2 skrll u_int8_t *b; 254 1.1.10.2 skrll u_int8_t ctl, st; 255 1.1.10.2 skrll int retries, error = 0; 256 1.1.10.2 skrll 257 1.1.10.2 skrll DPRINTF(("%s: exec op %d, addr 0x%x, cmdlen %d, len %d, " 258 1.1.10.2 skrll "flags 0x%x\n", sc->sc_dev.dv_xname, op, addr, cmdlen, 259 1.1.10.2 skrll len, flags)); 260 1.1.10.2 skrll 261 1.1.10.2 skrll if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2) 262 1.1.10.2 skrll return (EOPNOTSUPP); 263 1.1.10.2 skrll 264 1.1.10.2 skrll /* Clear status bits */ 265 1.1.10.2 skrll bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 266 1.1.10.2 skrll ALIPM_SMB_HS_DONE | ALIPM_SMB_HS_FAILED | 267 1.1.10.2 skrll ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR); 268 1.1.10.2 skrll bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1, 269 1.1.10.2 skrll BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 270 1.1.10.2 skrll 271 1.1.10.2 skrll /* Wait until bus is idle */ 272 1.1.10.2 skrll for (retries = 1000; retries > 0; retries--) { 273 1.1.10.2 skrll st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS); 274 1.1.10.2 skrll bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1, 275 1.1.10.2 skrll BUS_SPACE_BARRIER_READ); 276 1.1.10.2 skrll if (st & (ALIPM_SMB_HS_IDLE | ALIPM_SMB_HS_FAILED | 277 1.1.10.2 skrll ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) 278 1.1.10.2 skrll break; 279 1.1.10.2 skrll DELAY(ALIPM_DELAY); 280 1.1.10.2 skrll } 281 1.1.10.2 skrll if (retries == 0) { 282 1.1.10.2 skrll aprint_error_dev(&sc->sc_dev, "timeout st 0x%x\n", st); 283 1.1.10.2 skrll return (ETIMEDOUT); 284 1.1.10.2 skrll } 285 1.1.10.2 skrll if (st & (ALIPM_SMB_HS_FAILED | 286 1.1.10.2 skrll ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) { 287 1.1.10.2 skrll aprint_error_dev(&sc->sc_dev, "error st 0x%x\n", st); 288 1.1.10.2 skrll return (EIO); 289 1.1.10.2 skrll } 290 1.1.10.2 skrll 291 1.1.10.2 skrll /* Set slave address and transfer direction. */ 292 1.1.10.2 skrll bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_TXSLVA, 293 1.1.10.2 skrll ALIPM_SMB_TXSLVA_ADDR(addr) | 294 1.1.10.2 skrll (I2C_OP_READ_P(op) ? ALIPM_SMB_TXSLVA_READ : 0)); 295 1.1.10.2 skrll 296 1.1.10.2 skrll if (cmdlen > 0) 297 1.1.10.2 skrll /* Set command byte */ 298 1.1.10.2 skrll bus_space_write_1(sc->sc_iot, sc->sc_ioh, 299 1.1.10.2 skrll ALIPM_SMB_HCMD, ((const u_int8_t *)cmdbuf)[0]); 300 1.1.10.2 skrll 301 1.1.10.2 skrll if (I2C_OP_WRITE_P(op)) { 302 1.1.10.2 skrll /* Write data. */ 303 1.1.10.2 skrll b = buf; 304 1.1.10.2 skrll if (len > 0) 305 1.1.10.2 skrll bus_space_write_1(sc->sc_iot, sc->sc_ioh, 306 1.1.10.2 skrll ALIPM_SMB_HD0, b[0]); 307 1.1.10.2 skrll if (len > 1) 308 1.1.10.2 skrll bus_space_write_1(sc->sc_iot, sc->sc_ioh, 309 1.1.10.2 skrll ALIPM_SMB_HD1, b[1]); 310 1.1.10.2 skrll } 311 1.1.10.2 skrll 312 1.1.10.2 skrll /* Set SMBus command */ 313 1.1.10.3 skrll if (len == 0) { 314 1.1.10.3 skrll if (cmdlen == 0) 315 1.1.10.3 skrll ctl = ALIPM_SMB_HC_CMD_QUICK; 316 1.1.10.3 skrll else 317 1.1.10.3 skrll ctl = ALIPM_SMB_HC_CMD_BYTE; 318 1.1.10.3 skrll } else if (len == 1) 319 1.1.10.2 skrll ctl = ALIPM_SMB_HC_CMD_BDATA; 320 1.1.10.2 skrll else 321 1.1.10.2 skrll ctl = ALIPM_SMB_HC_CMD_WDATA; 322 1.1.10.2 skrll bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC, ctl); 323 1.1.10.2 skrll 324 1.1.10.2 skrll /* Start transaction */ 325 1.1.10.2 skrll bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE, 326 1.1.10.2 skrll BUS_SPACE_BARRIER_WRITE); 327 1.1.10.2 skrll bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_START, 0xff); 328 1.1.10.2 skrll bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE, 329 1.1.10.2 skrll BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 330 1.1.10.2 skrll 331 1.1.10.2 skrll /* Poll for completion */ 332 1.1.10.2 skrll DELAY(ALIPM_DELAY); 333 1.1.10.2 skrll for (retries = 1000; retries > 0; retries--) { 334 1.1.10.2 skrll st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS); 335 1.1.10.2 skrll bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1, 336 1.1.10.2 skrll BUS_SPACE_BARRIER_READ); 337 1.1.10.2 skrll if (st & (ALIPM_SMB_HS_IDLE | ALIPM_SMB_HS_FAILED | 338 1.1.10.2 skrll ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) 339 1.1.10.2 skrll break; 340 1.1.10.2 skrll DELAY(ALIPM_DELAY); 341 1.1.10.2 skrll } 342 1.1.10.2 skrll if (retries == 0) { 343 1.1.10.2 skrll aprint_error_dev(&sc->sc_dev, "timeout st 0x%x, resetting\n",st); 344 1.1.10.2 skrll bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC, 345 1.1.10.2 skrll ALIPM_SMB_HC_RESET); 346 1.1.10.2 skrll bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE, 347 1.1.10.2 skrll BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 348 1.1.10.2 skrll st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS); 349 1.1.10.2 skrll bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1, 350 1.1.10.2 skrll BUS_SPACE_BARRIER_READ); 351 1.1.10.2 skrll error = ETIMEDOUT; 352 1.1.10.2 skrll goto done; 353 1.1.10.2 skrll } 354 1.1.10.2 skrll 355 1.1.10.2 skrll if ((st & ALIPM_SMB_HS_DONE) == 0) { 356 1.1.10.2 skrll bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC, 357 1.1.10.2 skrll ALIPM_SMB_HC_KILL); 358 1.1.10.2 skrll bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE, 359 1.1.10.2 skrll BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 360 1.1.10.2 skrll st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS); 361 1.1.10.2 skrll bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1, 362 1.1.10.2 skrll BUS_SPACE_BARRIER_READ); 363 1.1.10.2 skrll if ((st & ALIPM_SMB_HS_FAILED) == 0) 364 1.1.10.2 skrll aprint_error_dev(&sc->sc_dev, "error st 0x%x\n", st); 365 1.1.10.2 skrll } 366 1.1.10.2 skrll 367 1.1.10.2 skrll /* Check for errors */ 368 1.1.10.2 skrll if (st & (ALIPM_SMB_HS_FAILED | 369 1.1.10.2 skrll ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) { 370 1.1.10.2 skrll error = EIO; 371 1.1.10.2 skrll goto done; 372 1.1.10.2 skrll } 373 1.1.10.2 skrll 374 1.1.10.2 skrll if (I2C_OP_READ_P(op)) { 375 1.1.10.2 skrll /* Read data */ 376 1.1.10.2 skrll b = buf; 377 1.1.10.2 skrll if (len > 0) { 378 1.1.10.2 skrll b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 379 1.1.10.2 skrll ALIPM_SMB_HD0); 380 1.1.10.2 skrll bus_space_barrier(sc->sc_iot, sc->sc_ioh, 381 1.1.10.2 skrll ALIPM_SMB_HD0, 1, BUS_SPACE_BARRIER_READ); 382 1.1.10.2 skrll } 383 1.1.10.2 skrll if (len > 1) { 384 1.1.10.2 skrll b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 385 1.1.10.2 skrll ALIPM_SMB_HD1); 386 1.1.10.2 skrll bus_space_barrier(sc->sc_iot, sc->sc_ioh, 387 1.1.10.2 skrll ALIPM_SMB_HD1, 1, BUS_SPACE_BARRIER_READ); 388 1.1.10.2 skrll } 389 1.1.10.2 skrll } 390 1.1.10.2 skrll 391 1.1.10.2 skrll done: 392 1.1.10.2 skrll /* Clear status bits */ 393 1.1.10.2 skrll bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, st); 394 1.1.10.2 skrll 395 1.1.10.2 skrll return (error); 396 1.1.10.2 skrll } 397
Indexes created Sat Oct 25 16:10:12 GMT 2025