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alipm.c revision 1.1.10.3 
      1 /*	$NetBSD: alipm.c,v 1.1.10.3 2009/03/03 18:31:07 skrll Exp $ */
      2 /*	$OpenBSD: alipm.c,v 1.13 2007/05/03 12:19:01 dlg Exp $	*/
      3 
      4 /*
      5  * Copyright (c) 2005 Mark Kettenis
      6  *
      7  * Permission to use, copy, modify, and distribute this software for any
      8  * purpose with or without fee is hereby granted, provided that the above
      9  * copyright notice and this permission notice appear in all copies.
     10  *
     11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     18  */
     19 
     20 #include <sys/cdefs.h>
     21 <<<<<<< alipm.c
     22 __KERNEL_RCSID(0, "$NetBSD: alipm.c,v 1.1.10.3 2009/03/03 18:31:07 skrll Exp $");
     23 =======
     24 __KERNEL_RCSID(0, "$NetBSD: alipm.c,v 1.1.10.3 2009/03/03 18:31:07 skrll Exp $");
     25 >>>>>>> 1.2
     26 
     27 #include <sys/param.h>
     28 #include <sys/device.h>
     29 #include <sys/kernel.h>
     30 #include <sys/rwlock.h>
     31 #include <sys/proc.h>
     32 #include <sys/systm.h>
     33 
     34 #include <dev/i2c/i2cvar.h>
     35 
     36 #include <dev/pci/pcidevs.h>
     37 #include <dev/pci/pcireg.h>
     38 #include <dev/pci/pcivar.h>
     39 
     40 /*
     41  * Acer Labs M7101 Power register definitions.
     42  */
     43 
     44 /* PCI configuration registers. */
     45 #define ALIPM_CONF	0xd0		/* general configuration */
     46 #define ALIPM_CONF_SMBEN	0x0400		/* enable SMBus */
     47 #define ALIPM_BASE	0xe0		/* ACPI and SMBus base address */
     48 #define ALIPM_SMB_HOSTC	0xf0		/* host configuration */
     49 #define ALIPM_SMB_HOSTC_HSTEN	0x00000001	/* enable host controller */
     50 #define ALIPM_SMB_HOSTC_CLOCK	0x00e00000	/* clock speed */
     51 #define ALIPM_SMB_HOSTC_149K	0x00000000	/* 149 KHz clock */
     52 #define ALIPM_SMB_HOSTC_74K	0x00200000	/*  74 KHz clock */
     53 #define ALIPM_SMB_HOSTC_37K	0x00400000	/*  37 KHz clock */
     54 #define ALIPM_SMB_HOSTC_223K	0x00800000	/* 223 KHz clock */
     55 #define ALIPM_SMB_HOSTC_111K	0x00a00000	/* 111 KHz clock */
     56 #define ALIPM_SMB_HOSTC_55K	0x00c00000	/*  55 KHz clock */
     57 
     58 #define ALIPM_SMB_SIZE		32	/* SMBus I/O space size */
     59 
     60 /* SMBus I/O registers */
     61 #define ALIPM_SMB_HS	0x00		/* host status */
     62 #define ALIPM_SMB_HS_IDLE	0x04
     63 #define ALIPM_SMB_HS_BUSY	0x08	/* running a command */
     64 #define ALIPM_SMB_HS_DONE	0x10	/* command completed */
     65 #define ALIPM_SMB_HS_DEVERR	0x20	/* command error */
     66 #define ALIPM_SMB_HS_BUSERR	0x40	/* transaction collision */
     67 #define ALIPM_SMB_HS_FAILED	0x80	/* failed bus transaction */
     68 #define ALIPM_SMB_HS_BITS \
     69   "\020\003IDLE\004BUSY\005DONE\006DEVERR\007BUSERR\010FAILED"
     70 #define ALIPM_SMB_HC	0x01		/* host control */
     71 #define ALIPM_SMB_HC_KILL	0x04		/* kill command */
     72 #define ALIPM_SMB_HC_RESET	0x08		/* reset bus */
     73 #define ALIPM_SMB_HC_CMD_QUICK	0x00		/* QUICK command */
     74 #define ALIPM_SMB_HC_CMD_BYTE	0x10		/* BYTE command */
     75 #define ALIPM_SMB_HC_CMD_BDATA	0x20		/* BYTE DATA command */
     76 #define ALIPM_SMB_HC_CMD_WDATA	0x30		/* WORD DATA command */
     77 #define ALIPM_SMB_HC_CMD_BLOCK 0x40		/* BLOCK command */
     78 #define ALIPM_SMB_START		0x02	/* start command */
     79 #define ALIPM_SMB_TXSLVA	0x03	/* transmit slave address */
     80 #define ALIPM_SMB_TXSLVA_READ	(1 << 0)	/* read direction */
     81 #define ALIPM_SMB_TXSLVA_ADDR(x) (((x) & 0x7f) << 1) /* 7-bit address */
     82 #define ALIPM_SMB_HD0		0x04	/* host data 0 */
     83 #define ALIPM_SMB_HD1		0x05	/* host data 1 */
     84 #define ALIPM_SMB_HBDB		0x06	/* host block data byte */
     85 #define ALIPM_SMB_HCMD		0x07	/* host command */
     86 
     87 /*
     88  * Newer chips have a more standard, but different PCI configuration
     89  * register layout.
     90  */
     91 
     92 #define ALIPM_SMB_BASE	0x14		/* SMBus base address */
     93 #define ALIPM_SMB_HOSTX	0xe0		/* host configuration */
     94 
     95 #ifdef ALIPM_DEBUG
     96 #define DPRINTF(x) printf x
     97 #else
     98 #define DPRINTF(x)
     99 #endif
    100 
    101 #define ALIPM_DELAY	100
    102 #define ALIPM_TIMEOUT	1
    103 
    104 struct alipm_softc {
    105 	struct device sc_dev;
    106 
    107 	bus_space_tag_t sc_iot;
    108 	bus_space_handle_t sc_ioh;
    109 
    110 	struct i2c_controller sc_smb_tag;
    111 	krwlock_t sc_smb_lock;
    112 };
    113 
    114 static int	alipm_match(struct device *, cfdata_t, void *);
    115 static void	alipm_attach(struct device *, struct device *, void *);
    116 
    117 int	alipm_smb_acquire_bus(void *, int);
    118 void	alipm_smb_release_bus(void *, int);
    119 int	alipm_smb_exec(void *, i2c_op_t, i2c_addr_t, const void *,
    120 	    size_t, void *, size_t, int);
    121 
    122 CFATTACH_DECL(alipm, sizeof(struct alipm_softc),
    123 	alipm_match, alipm_attach, NULL, NULL);
    124 
    125 static int
    126 alipm_match(struct device *parent, cfdata_t match, void *aux)
    127 {
    128 	struct pci_attach_args *pa = aux;
    129 
    130 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI &&
    131 	    (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M7101))
    132 		return (1);
    133 	return (0);
    134 }
    135 
    136 static void
    137 alipm_attach(struct device *parent, struct device *self, void *aux)
    138 {
    139 	struct alipm_softc *sc = (struct alipm_softc *) self;
    140 	struct pci_attach_args *pa = aux;
    141 	struct i2cbus_attach_args iba;
    142 	pcireg_t iobase, reg;
    143 	bus_size_t iosize = ALIPM_SMB_SIZE;
    144 
    145 	/* Old chips don't have the PCI 2.2 Capabilities List. */
    146 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    147 	if ((reg & PCI_STATUS_CAPLIST_SUPPORT) == 0) {
    148 		/* Map I/O space */
    149 		iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_BASE);
    150 		sc->sc_iot = pa->pa_iot;
    151 		if (iobase == 0 ||
    152 		    bus_space_map(sc->sc_iot, iobase >> 16,
    153 		    iosize, 0, &sc->sc_ioh)) {
    154 			aprint_error_dev(&sc->sc_dev, "can't map I/O space\n");
    155 			return;
    156 		}
    157 
    158 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_CONF);
    159 		if ((reg & ALIPM_CONF_SMBEN) == 0) {
    160 			aprint_error_dev(&sc->sc_dev, "SMBus disabled\n");
    161 			goto fail;
    162 		}
    163 
    164 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_SMB_HOSTC);
    165 		if ((reg & ALIPM_SMB_HOSTC_HSTEN) == 0) {
    166 			aprint_error_dev(&sc->sc_dev, "SMBus host disabled\n");
    167 			goto fail;
    168 		}
    169 	} else {
    170 		/* Map I/O space */
    171 		if (pci_mapreg_map(pa, ALIPM_SMB_BASE, PCI_MAPREG_TYPE_IO, 0,
    172 		    &sc->sc_iot, &sc->sc_ioh, NULL, &iosize)) {
    173 			aprint_error_dev(&sc->sc_dev, "can't map I/O space\n");
    174 			return;
    175 		}
    176 
    177 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_SMB_HOSTX);
    178 		if ((reg & ALIPM_SMB_HOSTC_HSTEN) == 0) {
    179 			aprint_error_dev(&sc->sc_dev, "SMBus host disabled\n");
    180 			goto fail;
    181 		}
    182 	}
    183 
    184 	switch (reg & ALIPM_SMB_HOSTC_CLOCK) {
    185 	case ALIPM_SMB_HOSTC_149K:
    186 		aprint_normal(": 149KHz clock\n");
    187 		break;
    188 	case ALIPM_SMB_HOSTC_74K:
    189 		aprint_normal(": 74KHz clock\n");
    190 		break;
    191 	case ALIPM_SMB_HOSTC_37K:
    192 		aprint_normal(": 37KHz clock\n");
    193 		break;
    194 	case ALIPM_SMB_HOSTC_223K:
    195 		aprint_normal(": 223KHz clock\n");
    196 		break;
    197 	case ALIPM_SMB_HOSTC_111K:
    198 		aprint_normal(": 111KHz clock\n");
    199 		break;
    200 	case ALIPM_SMB_HOSTC_55K:
    201 		aprint_normal(": 55KHz clock\n");
    202 		break;
    203 	default:
    204 		aprint_normal(" unknown clock speed\n");
    205 		break;
    206 	}
    207 
    208 	/* Attach I2C bus */
    209 	rw_init(&sc->sc_smb_lock);
    210 	sc->sc_smb_tag.ic_cookie = sc;
    211 	sc->sc_smb_tag.ic_acquire_bus = alipm_smb_acquire_bus;
    212 	sc->sc_smb_tag.ic_release_bus = alipm_smb_release_bus;
    213 	sc->sc_smb_tag.ic_exec = alipm_smb_exec;
    214 
    215 	bzero(&iba, sizeof iba);
    216 	iba.iba_tag = &sc->sc_smb_tag;
    217 	(void)config_found_ia(&sc->sc_dev, "i2cbus", &iba, iicbus_print);
    218 
    219 	return;
    220 
    221 fail:
    222 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
    223 }
    224 
    225 int
    226 alipm_smb_acquire_bus(void *cookie, int flags)
    227 {
    228 	struct alipm_softc *sc = cookie;
    229 
    230 	if (flags & I2C_F_POLL)
    231 		return (0);
    232 
    233 	rw_enter(&sc->sc_smb_lock, RW_WRITER);
    234 	return 0;
    235 }
    236 
    237 void
    238 alipm_smb_release_bus(void *cookie, int flags)
    239 {
    240 	struct alipm_softc *sc = cookie;
    241 
    242 	if (flags & I2C_F_POLL)
    243 		return;
    244 
    245 	rw_exit(&sc->sc_smb_lock);
    246 }
    247 
    248 int
    249 alipm_smb_exec(void *cookie, i2c_op_t op, i2c_addr_t addr,
    250     const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags)
    251 {
    252 	struct alipm_softc *sc = cookie;
    253 	u_int8_t *b;
    254 	u_int8_t ctl, st;
    255 	int retries, error = 0;
    256 
    257 	DPRINTF(("%s: exec op %d, addr 0x%x, cmdlen %d, len %d, "
    258 	    "flags 0x%x\n", sc->sc_dev.dv_xname, op, addr, cmdlen,
    259 	    len, flags));
    260 
    261 	if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2)
    262 		return (EOPNOTSUPP);
    263 
    264 	/* Clear status bits */
    265 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS,
    266 	    ALIPM_SMB_HS_DONE | ALIPM_SMB_HS_FAILED |
    267 	    ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR);
    268 	bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
    269 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
    270 
    271 	/* Wait until bus is idle */
    272 	for (retries = 1000; retries > 0; retries--) {
    273 		st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
    274 		bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
    275 		    BUS_SPACE_BARRIER_READ);
    276 		if (st & (ALIPM_SMB_HS_IDLE | ALIPM_SMB_HS_FAILED |
    277 		    ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR))
    278 			break;
    279 		DELAY(ALIPM_DELAY);
    280 	}
    281 	if (retries == 0) {
    282 		aprint_error_dev(&sc->sc_dev, "timeout st 0x%x\n", st);
    283 		return (ETIMEDOUT);
    284 	}
    285 	if (st & (ALIPM_SMB_HS_FAILED |
    286 	    ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) {
    287 		aprint_error_dev(&sc->sc_dev, "error st 0x%x\n", st);
    288 		return (EIO);
    289 	}
    290 
    291 	/* Set slave address and transfer direction. */
    292 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_TXSLVA,
    293 	    ALIPM_SMB_TXSLVA_ADDR(addr) |
    294 	    (I2C_OP_READ_P(op) ? ALIPM_SMB_TXSLVA_READ : 0));
    295 
    296 	if (cmdlen > 0)
    297 		/* Set command byte */
    298 		bus_space_write_1(sc->sc_iot, sc->sc_ioh,
    299 		     ALIPM_SMB_HCMD, ((const u_int8_t *)cmdbuf)[0]);
    300 
    301 	if (I2C_OP_WRITE_P(op)) {
    302 		/* Write data. */
    303 		b = buf;
    304 		if (len > 0)
    305 			bus_space_write_1(sc->sc_iot, sc->sc_ioh,
    306 			    ALIPM_SMB_HD0, b[0]);
    307 		if (len > 1)
    308 			bus_space_write_1(sc->sc_iot, sc->sc_ioh,
    309 			    ALIPM_SMB_HD1, b[1]);
    310 	}
    311 
    312 	/* Set SMBus command */
    313 	if (len == 0) {
    314 		if (cmdlen == 0)
    315 			ctl = ALIPM_SMB_HC_CMD_QUICK;
    316 		else
    317 			ctl = ALIPM_SMB_HC_CMD_BYTE;
    318 	} else if (len == 1)
    319 		ctl = ALIPM_SMB_HC_CMD_BDATA;
    320 	else
    321 		ctl = ALIPM_SMB_HC_CMD_WDATA;
    322 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC, ctl);
    323 
    324 	/* Start transaction */
    325 	bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
    326 	    BUS_SPACE_BARRIER_WRITE);
    327 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_START, 0xff);
    328 	bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
    329 	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
    330 
    331 	/* Poll for completion */
    332 	DELAY(ALIPM_DELAY);
    333 	for (retries = 1000; retries > 0; retries--) {
    334 		st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
    335 		bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
    336 		    BUS_SPACE_BARRIER_READ);
    337 		if (st & (ALIPM_SMB_HS_IDLE | ALIPM_SMB_HS_FAILED |
    338 		    ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR))
    339 			break;
    340 		DELAY(ALIPM_DELAY);
    341 	}
    342 	if (retries == 0) {
    343 		aprint_error_dev(&sc->sc_dev, "timeout st 0x%x, resetting\n",st);
    344 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC,
    345 		    ALIPM_SMB_HC_RESET);
    346 		bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
    347 		     BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
    348 		st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
    349 		bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
    350 		    BUS_SPACE_BARRIER_READ);
    351 		error = ETIMEDOUT;
    352 		goto done;
    353 	}
    354 
    355 	if ((st & ALIPM_SMB_HS_DONE) == 0) {
    356 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC,
    357 		     ALIPM_SMB_HC_KILL);
    358 		bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
    359 		     BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
    360 		st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
    361 		bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
    362 		    BUS_SPACE_BARRIER_READ);
    363 		if ((st & ALIPM_SMB_HS_FAILED) == 0)
    364 			aprint_error_dev(&sc->sc_dev, "error st 0x%x\n", st);
    365 	}
    366 
    367 	/* Check for errors */
    368 	if (st & (ALIPM_SMB_HS_FAILED |
    369 	    ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) {
    370 		error = EIO;
    371 		goto done;
    372 	}
    373 
    374 	if (I2C_OP_READ_P(op)) {
    375 		/* Read data */
    376 		b = buf;
    377 		if (len > 0) {
    378 			b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
    379 			    ALIPM_SMB_HD0);
    380 			bus_space_barrier(sc->sc_iot, sc->sc_ioh,
    381 			    ALIPM_SMB_HD0, 1, BUS_SPACE_BARRIER_READ);
    382 		}
    383 		if (len > 1) {
    384 			b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
    385 			    ALIPM_SMB_HD1);
    386 			bus_space_barrier(sc->sc_iot, sc->sc_ioh,
    387 			    ALIPM_SMB_HD1, 1, BUS_SPACE_BARRIER_READ);
    388 		}
    389 	}
    390 
    391 done:
    392 	/* Clear status bits */
    393 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, st);
    394 
    395 	return (error);
    396 }
    397