alipm.c revision 1.12.2.1
1 /* $NetBSD: alipm.c,v 1.12.2.1 2021/05/14 22:46:36 thorpej Exp $ */ 2 /* $OpenBSD: alipm.c,v 1.13 2007/05/03 12:19:01 dlg Exp $ */ 3 4 /* 5 * Copyright (c) 2005 Mark Kettenis 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __KERNEL_RCSID(0, "$NetBSD: alipm.c,v 1.12.2.1 2021/05/14 22:46:36 thorpej Exp $"); 22 23 #include <sys/param.h> 24 #include <sys/device.h> 25 #include <sys/kernel.h> 26 #include <sys/mutex.h> 27 #include <sys/proc.h> 28 #include <sys/systm.h> 29 30 #include <dev/i2c/i2cvar.h> 31 32 #include <dev/pci/pcidevs.h> 33 #include <dev/pci/pcireg.h> 34 #include <dev/pci/pcivar.h> 35 36 /* 37 * Acer Labs M7101 Power register definitions. 38 */ 39 40 /* PCI configuration registers. */ 41 #define ALIPM_CONF 0xd0 /* general configuration */ 42 #define ALIPM_CONF_SMBEN 0x0400 /* enable SMBus */ 43 #define ALIPM_BASE 0xe0 /* ACPI and SMBus base address */ 44 #define ALIPM_SMB_HOSTC 0xf0 /* host configuration */ 45 #define ALIPM_SMB_HOSTC_HSTEN 0x00000001 /* enable host controller */ 46 #define ALIPM_SMB_HOSTC_CLOCK 0x00e00000 /* clock speed */ 47 #define ALIPM_SMB_HOSTC_149K 0x00000000 /* 149 KHz clock */ 48 #define ALIPM_SMB_HOSTC_74K 0x00200000 /* 74 KHz clock */ 49 #define ALIPM_SMB_HOSTC_37K 0x00400000 /* 37 KHz clock */ 50 #define ALIPM_SMB_HOSTC_223K 0x00800000 /* 223 KHz clock */ 51 #define ALIPM_SMB_HOSTC_111K 0x00a00000 /* 111 KHz clock */ 52 #define ALIPM_SMB_HOSTC_55K 0x00c00000 /* 55 KHz clock */ 53 54 #define ALIPM_SMB_SIZE 32 /* SMBus I/O space size */ 55 56 /* SMBus I/O registers */ 57 #define ALIPM_SMB_HS 0x00 /* host status */ 58 #define ALIPM_SMB_HS_IDLE 0x04 59 #define ALIPM_SMB_HS_BUSY 0x08 /* running a command */ 60 #define ALIPM_SMB_HS_DONE 0x10 /* command completed */ 61 #define ALIPM_SMB_HS_DEVERR 0x20 /* command error */ 62 #define ALIPM_SMB_HS_BUSERR 0x40 /* transaction collision */ 63 #define ALIPM_SMB_HS_FAILED 0x80 /* failed bus transaction */ 64 #define ALIPM_SMB_HS_BITS \ 65 "\020\003IDLE\004BUSY\005DONE\006DEVERR\007BUSERR\010FAILED" 66 #define ALIPM_SMB_HC 0x01 /* host control */ 67 #define ALIPM_SMB_HC_KILL 0x04 /* kill command */ 68 #define ALIPM_SMB_HC_RESET 0x08 /* reset bus */ 69 #define ALIPM_SMB_HC_CMD_QUICK 0x00 /* QUICK command */ 70 #define ALIPM_SMB_HC_CMD_BYTE 0x10 /* BYTE command */ 71 #define ALIPM_SMB_HC_CMD_BDATA 0x20 /* BYTE DATA command */ 72 #define ALIPM_SMB_HC_CMD_WDATA 0x30 /* WORD DATA command */ 73 #define ALIPM_SMB_HC_CMD_BLOCK 0x40 /* BLOCK command */ 74 #define ALIPM_SMB_START 0x02 /* start command */ 75 #define ALIPM_SMB_TXSLVA 0x03 /* transmit slave address */ 76 #define ALIPM_SMB_TXSLVA_READ (1 << 0) /* read direction */ 77 #define ALIPM_SMB_TXSLVA_ADDR(x) (((x) & 0x7f) << 1) /* 7-bit address */ 78 #define ALIPM_SMB_HD0 0x04 /* host data 0 */ 79 #define ALIPM_SMB_HD1 0x05 /* host data 1 */ 80 #define ALIPM_SMB_HBDB 0x06 /* host block data byte */ 81 #define ALIPM_SMB_HCMD 0x07 /* host command */ 82 83 /* 84 * Newer chips have a more standard, but different PCI configuration 85 * register layout. 86 */ 87 88 #define ALIPM_SMB_BASE 0x14 /* SMBus base address */ 89 #define ALIPM_SMB_HOSTX 0xe0 /* host configuration */ 90 91 #ifdef ALIPM_DEBUG 92 #define DPRINTF(x) printf x 93 #else 94 #define DPRINTF(x) 95 #endif 96 97 #define ALIPM_DELAY 100 98 #define ALIPM_TIMEOUT 1 99 100 struct alipm_softc { 101 device_t sc_dev; 102 103 bus_space_tag_t sc_iot; 104 bus_space_handle_t sc_ioh; 105 106 struct i2c_controller sc_smb_tag; 107 }; 108 109 static int alipm_match(device_t, cfdata_t, void *); 110 static void alipm_attach(device_t, device_t, void *); 111 112 int alipm_smb_acquire_bus(void *, int); 113 void alipm_smb_release_bus(void *, int); 114 int alipm_smb_exec(void *, i2c_op_t, i2c_addr_t, const void *, 115 size_t, void *, size_t, int); 116 117 CFATTACH_DECL_NEW(alipm, sizeof(struct alipm_softc), 118 alipm_match, alipm_attach, NULL, NULL); 119 120 static int 121 alipm_match(device_t parent, cfdata_t match, void *aux) 122 { 123 struct pci_attach_args *pa = aux; 124 125 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI && 126 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M7101)) 127 return (1); 128 return (0); 129 } 130 131 static void 132 alipm_attach(device_t parent, device_t self, void *aux) 133 { 134 struct alipm_softc *sc = device_private(self); 135 struct pci_attach_args *pa = aux; 136 struct i2cbus_attach_args iba; 137 pcireg_t iobase, reg; 138 bus_size_t iosize = ALIPM_SMB_SIZE; 139 140 sc->sc_dev = self; 141 142 /* Old chips don't have the PCI 2.2 Capabilities List. */ 143 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 144 if ((reg & PCI_STATUS_CAPLIST_SUPPORT) == 0) { 145 /* Map I/O space */ 146 iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_BASE); 147 sc->sc_iot = pa->pa_iot; 148 if (iobase == 0 || 149 bus_space_map(sc->sc_iot, iobase >> 16, 150 iosize, 0, &sc->sc_ioh)) { 151 aprint_error_dev(sc->sc_dev, "can't map I/O space\n"); 152 return; 153 } 154 155 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_CONF); 156 if ((reg & ALIPM_CONF_SMBEN) == 0) { 157 aprint_error_dev(sc->sc_dev, "SMBus disabled\n"); 158 goto fail; 159 } 160 161 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_SMB_HOSTC); 162 if ((reg & ALIPM_SMB_HOSTC_HSTEN) == 0) { 163 aprint_error_dev(sc->sc_dev, "SMBus host disabled\n"); 164 goto fail; 165 } 166 } else { 167 /* Map I/O space */ 168 if (pci_mapreg_map(pa, ALIPM_SMB_BASE, PCI_MAPREG_TYPE_IO, 0, 169 &sc->sc_iot, &sc->sc_ioh, NULL, &iosize)) { 170 aprint_error_dev(sc->sc_dev, "can't map I/O space\n"); 171 return; 172 } 173 174 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_SMB_HOSTX); 175 if ((reg & ALIPM_SMB_HOSTC_HSTEN) == 0) { 176 aprint_error_dev(sc->sc_dev, "SMBus host disabled\n"); 177 goto fail; 178 } 179 } 180 181 switch (reg & ALIPM_SMB_HOSTC_CLOCK) { 182 case ALIPM_SMB_HOSTC_149K: 183 aprint_normal(": 149KHz clock\n"); 184 break; 185 case ALIPM_SMB_HOSTC_74K: 186 aprint_normal(": 74KHz clock\n"); 187 break; 188 case ALIPM_SMB_HOSTC_37K: 189 aprint_normal(": 37KHz clock\n"); 190 break; 191 case ALIPM_SMB_HOSTC_223K: 192 aprint_normal(": 223KHz clock\n"); 193 break; 194 case ALIPM_SMB_HOSTC_111K: 195 aprint_normal(": 111KHz clock\n"); 196 break; 197 case ALIPM_SMB_HOSTC_55K: 198 aprint_normal(": 55KHz clock\n"); 199 break; 200 default: 201 aprint_normal(" unknown clock speed\n"); 202 break; 203 } 204 aprint_naive("\n"); 205 206 /* Attach I2C bus */ 207 iic_tag_init(&sc->sc_smb_tag); 208 sc->sc_smb_tag.ic_cookie = sc; 209 sc->sc_smb_tag.ic_exec = alipm_smb_exec; 210 211 memset(&iba, 0, sizeof iba); 212 iba.iba_tag = &sc->sc_smb_tag; 213 config_found(sc->sc_dev, &iba, iicbus_print, 214 CFARG_DEVHANDLE, device_handle(self), 215 CFARG_EOL); 216 217 return; 218 219 fail: 220 bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize); 221 } 222 223 int 224 alipm_smb_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, 225 const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags) 226 { 227 struct alipm_softc *sc = cookie; 228 u_int8_t *b; 229 u_int8_t ctl, st; 230 int retries, error = 0; 231 232 DPRINTF(("%s: exec op %d, addr 0x%x, cmdlen %d, len %d, " 233 "flags 0x%x\n", device_xname(sc->sc_dev), op, addr, cmdlen, 234 len, flags)); 235 236 if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2 || 237 (cmdlen == 0 && len > 1)) 238 return (EOPNOTSUPP); 239 240 /* Clear status bits */ 241 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 242 ALIPM_SMB_HS_DONE | ALIPM_SMB_HS_FAILED | 243 ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR); 244 bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1, 245 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 246 247 /* Wait until bus is idle */ 248 for (retries = 1000; retries > 0; retries--) { 249 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS); 250 bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1, 251 BUS_SPACE_BARRIER_READ); 252 if (st & (ALIPM_SMB_HS_IDLE | ALIPM_SMB_HS_FAILED | 253 ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) 254 break; 255 DELAY(ALIPM_DELAY); 256 } 257 if (retries == 0) { 258 aprint_error_dev(sc->sc_dev, "timeout st 0x%x\n", st); 259 return (ETIMEDOUT); 260 } 261 if (st & (ALIPM_SMB_HS_FAILED | 262 ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) { 263 aprint_error_dev(sc->sc_dev, "error st 0x%x\n", st); 264 return (EIO); 265 } 266 267 /* Set slave address and transfer direction. */ 268 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_TXSLVA, 269 ALIPM_SMB_TXSLVA_ADDR(addr) | 270 (I2C_OP_READ_P(op) ? ALIPM_SMB_TXSLVA_READ : 0)); 271 272 if (cmdlen > 0) 273 /* Set command byte */ 274 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 275 ALIPM_SMB_HCMD, ((const u_int8_t *)cmdbuf)[0]); 276 277 if (I2C_OP_WRITE_P(op)) { 278 /* Write data. */ 279 b = buf; 280 if (cmdlen == 0 && len == 1) 281 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 282 ALIPM_SMB_HCMD, b[0]); 283 else if (len > 0) 284 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 285 ALIPM_SMB_HD0, b[0]); 286 if (len > 1) 287 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 288 ALIPM_SMB_HD1, b[1]); 289 } 290 291 /* Set SMBus command */ 292 if (cmdlen == 0) { 293 if (len == 0) 294 ctl = ALIPM_SMB_HC_CMD_QUICK; 295 else 296 ctl = ALIPM_SMB_HC_CMD_BYTE; 297 } else if (len == 1) 298 ctl = ALIPM_SMB_HC_CMD_BDATA; 299 else 300 ctl = ALIPM_SMB_HC_CMD_WDATA; 301 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC, ctl); 302 303 /* Start transaction */ 304 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE, 305 BUS_SPACE_BARRIER_WRITE); 306 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_START, 0xff); 307 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE, 308 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 309 310 /* Poll for completion */ 311 DELAY(ALIPM_DELAY); 312 for (retries = 1000; retries > 0; retries--) { 313 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS); 314 bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1, 315 BUS_SPACE_BARRIER_READ); 316 if (st & (ALIPM_SMB_HS_IDLE | ALIPM_SMB_HS_FAILED | 317 ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) 318 break; 319 DELAY(ALIPM_DELAY); 320 } 321 if (retries == 0) { 322 aprint_error_dev(sc->sc_dev, "timeout st 0x%x, resetting\n",st); 323 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC, 324 ALIPM_SMB_HC_RESET); 325 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE, 326 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 327 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS); 328 bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1, 329 BUS_SPACE_BARRIER_READ); 330 error = ETIMEDOUT; 331 goto done; 332 } 333 334 if ((st & ALIPM_SMB_HS_DONE) == 0) { 335 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC, 336 ALIPM_SMB_HC_KILL); 337 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE, 338 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 339 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS); 340 bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1, 341 BUS_SPACE_BARRIER_READ); 342 if ((st & ALIPM_SMB_HS_FAILED) == 0) 343 aprint_error_dev(sc->sc_dev, "error st 0x%x\n", st); 344 } 345 346 /* Check for errors */ 347 if (st & (ALIPM_SMB_HS_FAILED | 348 ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) { 349 error = EIO; 350 goto done; 351 } 352 353 if (I2C_OP_READ_P(op)) { 354 /* Read data */ 355 b = buf; 356 if (len > 0) { 357 b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 358 ALIPM_SMB_HD0); 359 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 360 ALIPM_SMB_HD0, 1, BUS_SPACE_BARRIER_READ); 361 } 362 if (len > 1) { 363 b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 364 ALIPM_SMB_HD1); 365 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 366 ALIPM_SMB_HD1, 1, BUS_SPACE_BARRIER_READ); 367 } 368 } 369 370 done: 371 /* Clear status bits */ 372 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, st); 373 374 return (error); 375 } 376
Indexes created Fri Oct 17 17:09:57 GMT 2025