amdpm.c revision 1.36 1 1.36 chs /* $NetBSD: amdpm.c,v 1.36 2012/10/27 17:18:28 chs Exp $ */
2 1.1 enami
3 1.1 enami /*-
4 1.1 enami * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 1.1 enami * All rights reserved.
6 1.1 enami *
7 1.1 enami * This code is derived from software contributed to The NetBSD Foundation
8 1.1 enami * by Enami Tsugutomo.
9 1.1 enami *
10 1.1 enami * Redistribution and use in source and binary forms, with or without
11 1.1 enami * modification, are permitted provided that the following conditions
12 1.1 enami * are met:
13 1.1 enami * 1. Redistributions of source code must retain the above copyright
14 1.1 enami * notice, this list of conditions and the following disclaimer.
15 1.1 enami * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 enami * notice, this list of conditions and the following disclaimer in the
17 1.1 enami * documentation and/or other materials provided with the distribution.
18 1.1 enami *
19 1.1 enami * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 enami * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 enami * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 enami * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 enami * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 enami * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 enami * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 enami * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 enami * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 enami * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 enami * POSSIBILITY OF SUCH DAMAGE.
30 1.1 enami */
31 1.1 enami
32 1.1 enami #include <sys/cdefs.h>
33 1.36 chs __KERNEL_RCSID(0, "$NetBSD: amdpm.c,v 1.36 2012/10/27 17:18:28 chs Exp $");
34 1.1 enami
35 1.1 enami #include "opt_amdpm.h"
36 1.1 enami
37 1.1 enami #include <sys/param.h>
38 1.1 enami #include <sys/systm.h>
39 1.1 enami #include <sys/kernel.h>
40 1.1 enami #include <sys/device.h>
41 1.1 enami #include <sys/callout.h>
42 1.1 enami #include <sys/rnd.h>
43 1.1 enami
44 1.28 ad #include <sys/bus.h>
45 1.17 drochner #include <dev/ic/acpipmtimer.h>
46 1.12 xtraeme
47 1.11 tls #include <dev/i2c/i2cvar.h>
48 1.11 tls
49 1.1 enami #include <dev/pci/pcivar.h>
50 1.1 enami #include <dev/pci/pcireg.h>
51 1.1 enami #include <dev/pci/pcidevs.h>
52 1.1 enami
53 1.1 enami #include <dev/pci/amdpmreg.h>
54 1.11 tls #include <dev/pci/amdpmvar.h>
55 1.11 tls #include <dev/pci/amdpm_smbusreg.h>
56 1.1 enami
57 1.8 thorpej static void amdpm_rnd_callout(void *);
58 1.1 enami
59 1.1 enami #ifdef AMDPM_RND_COUNTERS
60 1.1 enami #define AMDPM_RNDCNT_INCR(ev) (ev)->ev_count++
61 1.1 enami #endif
62 1.1 enami
63 1.8 thorpej static int
64 1.32 cegger amdpm_match(device_t parent, cfdata_t match, void *aux)
65 1.1 enami {
66 1.1 enami struct pci_attach_args *pa = aux;
67 1.1 enami
68 1.22 jmcneill if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD) {
69 1.22 jmcneill switch (PCI_PRODUCT(pa->pa_id)) {
70 1.22 jmcneill case PCI_PRODUCT_AMD_PBC768_PMC:
71 1.22 jmcneill case PCI_PRODUCT_AMD_PBC8111_ACPI:
72 1.22 jmcneill return (1);
73 1.22 jmcneill }
74 1.22 jmcneill }
75 1.22 jmcneill if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NVIDIA) {
76 1.22 jmcneill switch (PCI_PRODUCT(pa->pa_id)) {
77 1.22 jmcneill case PCI_PRODUCT_NVIDIA_XBOX_SMBUS:
78 1.22 jmcneill return (1);
79 1.22 jmcneill }
80 1.10 kleink }
81 1.10 kleink
82 1.1 enami return (0);
83 1.1 enami }
84 1.1 enami
85 1.8 thorpej static void
86 1.32 cegger amdpm_attach(device_t parent, device_t self, void *aux)
87 1.1 enami {
88 1.33 cegger struct amdpm_softc *sc = device_private(self);
89 1.1 enami struct pci_attach_args *pa = aux;
90 1.15 christos pcireg_t confreg, pmptrreg;
91 1.1 enami u_int32_t pmreg;
92 1.1 enami int i;
93 1.1 enami
94 1.35 drochner pci_aprint_devinfo(pa, NULL);
95 1.1 enami
96 1.36 chs sc->sc_dev = self;
97 1.36 chs
98 1.22 jmcneill if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_XBOX_SMBUS)
99 1.22 jmcneill sc->sc_nforce = 1;
100 1.22 jmcneill else
101 1.22 jmcneill sc->sc_nforce = 0;
102 1.22 jmcneill
103 1.1 enami sc->sc_pc = pa->pa_pc;
104 1.1 enami sc->sc_tag = pa->pa_tag;
105 1.1 enami sc->sc_iot = pa->pa_iot;
106 1.25 jmcneill sc->sc_pa = pa;
107 1.1 enami
108 1.1 enami #if 0
109 1.36 chs aprint_normal_dev(self, "");
110 1.1 enami pci_conf_print(pa->pa_pc, pa->pa_tag, NULL);
111 1.1 enami #endif
112 1.1 enami
113 1.15 christos confreg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG);
114 1.22 jmcneill /* enable pm i/o space for AMD-8111 and nForce */
115 1.22 jmcneill if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_PBC8111_ACPI ||
116 1.22 jmcneill sc->sc_nforce)
117 1.15 christos confreg |= AMDPM_PMIOEN;
118 1.15 christos
119 1.15 christos /* Enable random number generation for everyone */
120 1.15 christos pci_conf_write(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG,
121 1.15 christos confreg | AMDPM_RNGEN);
122 1.15 christos confreg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG);
123 1.11 tls
124 1.15 christos if ((confreg & AMDPM_PMIOEN) == 0) {
125 1.36 chs aprint_error_dev(self, "PMxx space isn't enabled\n");
126 1.1 enami return;
127 1.1 enami }
128 1.15 christos
129 1.22 jmcneill if (sc->sc_nforce) {
130 1.22 jmcneill pmptrreg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFORCE_PMPTR);
131 1.36 chs aprint_normal_dev(self, "power management at 0x%04x\n",
132 1.29 cegger NFORCE_PMBASE(pmptrreg));
133 1.22 jmcneill if (bus_space_map(sc->sc_iot, NFORCE_PMBASE(pmptrreg),
134 1.22 jmcneill AMDPM_PMSIZE, 0, &sc->sc_ioh)) {
135 1.36 chs aprint_error_dev(self, "failed to map PMxx space\n");
136 1.22 jmcneill return;
137 1.22 jmcneill }
138 1.22 jmcneill } else {
139 1.22 jmcneill pmptrreg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_PMPTR);
140 1.22 jmcneill if (bus_space_map(sc->sc_iot, AMDPM_PMBASE(pmptrreg),
141 1.22 jmcneill AMDPM_PMSIZE, 0, &sc->sc_ioh)) {
142 1.36 chs aprint_error_dev(self, "failed to map PMxx space\n");
143 1.22 jmcneill return;
144 1.22 jmcneill }
145 1.1 enami }
146 1.1 enami
147 1.24 jmcneill /* don't attach a timecounter on nforce boards */
148 1.24 jmcneill if ((confreg & AMDPM_TMRRST) == 0 && (confreg & AMDPM_STOPTMR) == 0 &&
149 1.24 jmcneill !sc->sc_nforce) {
150 1.36 chs acpipmtimer_attach(self, sc->sc_iot, sc->sc_ioh,
151 1.18 drochner AMDPM_TMR, ((confreg & AMDPM_TMR32) ? ACPIPMT_32BIT : 0));
152 1.12 xtraeme }
153 1.12 xtraeme
154 1.11 tls /* try to attach devices on the smbus */
155 1.22 jmcneill if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_PBC8111_ACPI ||
156 1.34 pgoyette PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_PBC768_PMC ||
157 1.25 jmcneill sc->sc_nforce) {
158 1.11 tls amdpm_smbus_attach(sc);
159 1.25 jmcneill }
160 1.11 tls
161 1.15 christos if (confreg & AMDPM_RNGEN) {
162 1.1 enami /* Check to see if we can read data from the RNG. */
163 1.1 enami (void) bus_space_read_4(sc->sc_iot, sc->sc_ioh,
164 1.1 enami AMDPM_RNGDATA);
165 1.1 enami for (i = 0; i < 1000; i++) {
166 1.1 enami pmreg = bus_space_read_4(sc->sc_iot,
167 1.1 enami sc->sc_ioh, AMDPM_RNGSTAT);
168 1.1 enami if (pmreg & AMDPM_RNGDONE)
169 1.1 enami break;
170 1.1 enami delay(1);
171 1.1 enami }
172 1.1 enami if ((pmreg & AMDPM_RNGDONE) != 0) {
173 1.36 chs aprint_normal_dev(self, ""
174 1.1 enami "random number generator enabled (apprx. %dms)\n",
175 1.29 cegger i);
176 1.26 ad callout_init(&sc->sc_rnd_ch, 0);
177 1.1 enami rnd_attach_source(&sc->sc_rnd_source,
178 1.36 chs device_xname(self), RND_TYPE_RNG,
179 1.7 tls /*
180 1.7 tls * XXX Careful! The use of RND_FLAG_NO_ESTIMATE
181 1.7 tls * XXX here is unobvious: we later feed raw bits
182 1.7 tls * XXX into the "entropy pool" with rnd_add_data,
183 1.7 tls * XXX explicitly supplying an entropy estimate.
184 1.7 tls * XXX In this context, NO_ESTIMATE serves only
185 1.7 tls * XXX to prevent rnd_add_data from trying to
186 1.7 tls * XXX use the *time at which we added the data*
187 1.7 tls * XXX as entropy, which is not a good idea since
188 1.7 tls * XXX we add data periodically from a callout.
189 1.7 tls */
190 1.7 tls RND_FLAG_NO_ESTIMATE);
191 1.1 enami #ifdef AMDPM_RND_COUNTERS
192 1.1 enami evcnt_attach_dynamic(&sc->sc_rnd_hits, EVCNT_TYPE_MISC,
193 1.36 chs NULL, device_xname(self), "rnd hits");
194 1.1 enami evcnt_attach_dynamic(&sc->sc_rnd_miss, EVCNT_TYPE_MISC,
195 1.36 chs NULL, device_xname(self), "rnd miss");
196 1.1 enami for (i = 0; i < 256; i++) {
197 1.1 enami evcnt_attach_dynamic(&sc->sc_rnd_data[i],
198 1.36 chs EVCNT_TYPE_MISC, NULL, device_xname(self),
199 1.1 enami "rnd data");
200 1.1 enami }
201 1.1 enami #endif
202 1.1 enami amdpm_rnd_callout(sc);
203 1.1 enami }
204 1.1 enami }
205 1.1 enami }
206 1.1 enami
207 1.36 chs CFATTACH_DECL_NEW(amdpm, sizeof(struct amdpm_softc),
208 1.8 thorpej amdpm_match, amdpm_attach, NULL, NULL);
209 1.8 thorpej
210 1.8 thorpej static void
211 1.1 enami amdpm_rnd_callout(void *v)
212 1.1 enami {
213 1.1 enami struct amdpm_softc *sc = v;
214 1.15 christos u_int32_t rngreg;
215 1.1 enami #ifdef AMDPM_RND_COUNTERS
216 1.1 enami int i;
217 1.1 enami #endif
218 1.1 enami
219 1.1 enami if ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_RNGSTAT) &
220 1.1 enami AMDPM_RNGDONE) != 0) {
221 1.15 christos rngreg = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
222 1.15 christos AMDPM_RNGDATA);
223 1.15 christos rnd_add_data(&sc->sc_rnd_source, &rngreg,
224 1.15 christos sizeof(rngreg), sizeof(rngreg) * NBBY);
225 1.1 enami #ifdef AMDPM_RND_COUNTERS
226 1.1 enami AMDPM_RNDCNT_INCR(&sc->sc_rnd_hits);
227 1.15 christos for (i = 0; i < sizeof(rngreg); i++, rngreg >>= NBBY)
228 1.15 christos AMDPM_RNDCNT_INCR(&sc->sc_rnd_data[rngreg & 0xff]);
229 1.1 enami #endif
230 1.19 christos }
231 1.19 christos #ifdef AMDPM_RND_COUNTERS
232 1.19 christos else
233 1.1 enami AMDPM_RNDCNT_INCR(&sc->sc_rnd_miss);
234 1.19 christos #endif
235 1.1 enami callout_reset(&sc->sc_rnd_ch, 1, amdpm_rnd_callout, sc);
236 1.1 enami }
237