amdpm.c revision 1.37 1 1.37 tls /* $NetBSD: amdpm.c,v 1.37 2013/06/13 00:55:01 tls Exp $ */
2 1.1 enami
3 1.1 enami /*-
4 1.1 enami * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 1.1 enami * All rights reserved.
6 1.1 enami *
7 1.1 enami * This code is derived from software contributed to The NetBSD Foundation
8 1.1 enami * by Enami Tsugutomo.
9 1.1 enami *
10 1.1 enami * Redistribution and use in source and binary forms, with or without
11 1.1 enami * modification, are permitted provided that the following conditions
12 1.1 enami * are met:
13 1.1 enami * 1. Redistributions of source code must retain the above copyright
14 1.1 enami * notice, this list of conditions and the following disclaimer.
15 1.1 enami * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 enami * notice, this list of conditions and the following disclaimer in the
17 1.1 enami * documentation and/or other materials provided with the distribution.
18 1.1 enami *
19 1.1 enami * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 enami * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 enami * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 enami * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 enami * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 enami * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 enami * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 enami * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 enami * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 enami * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 enami * POSSIBILITY OF SUCH DAMAGE.
30 1.1 enami */
31 1.1 enami
32 1.1 enami #include <sys/cdefs.h>
33 1.37 tls __KERNEL_RCSID(0, "$NetBSD: amdpm.c,v 1.37 2013/06/13 00:55:01 tls Exp $");
34 1.1 enami
35 1.1 enami #include "opt_amdpm.h"
36 1.1 enami
37 1.1 enami #include <sys/param.h>
38 1.1 enami #include <sys/systm.h>
39 1.1 enami #include <sys/kernel.h>
40 1.1 enami #include <sys/device.h>
41 1.1 enami #include <sys/callout.h>
42 1.1 enami #include <sys/rnd.h>
43 1.37 tls #include <sys/mutex.h>
44 1.1 enami
45 1.28 ad #include <sys/bus.h>
46 1.17 drochner #include <dev/ic/acpipmtimer.h>
47 1.12 xtraeme
48 1.11 tls #include <dev/i2c/i2cvar.h>
49 1.11 tls
50 1.1 enami #include <dev/pci/pcivar.h>
51 1.1 enami #include <dev/pci/pcireg.h>
52 1.1 enami #include <dev/pci/pcidevs.h>
53 1.1 enami
54 1.1 enami #include <dev/pci/amdpmreg.h>
55 1.11 tls #include <dev/pci/amdpmvar.h>
56 1.11 tls #include <dev/pci/amdpm_smbusreg.h>
57 1.1 enami
58 1.8 thorpej static void amdpm_rnd_callout(void *);
59 1.37 tls static void amdpm_rnd_callout_locked(void *);
60 1.1 enami
61 1.1 enami #ifdef AMDPM_RND_COUNTERS
62 1.1 enami #define AMDPM_RNDCNT_INCR(ev) (ev)->ev_count++
63 1.1 enami #endif
64 1.1 enami
65 1.8 thorpej static int
66 1.32 cegger amdpm_match(device_t parent, cfdata_t match, void *aux)
67 1.1 enami {
68 1.1 enami struct pci_attach_args *pa = aux;
69 1.1 enami
70 1.22 jmcneill if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD) {
71 1.22 jmcneill switch (PCI_PRODUCT(pa->pa_id)) {
72 1.22 jmcneill case PCI_PRODUCT_AMD_PBC768_PMC:
73 1.22 jmcneill case PCI_PRODUCT_AMD_PBC8111_ACPI:
74 1.22 jmcneill return (1);
75 1.22 jmcneill }
76 1.22 jmcneill }
77 1.22 jmcneill if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NVIDIA) {
78 1.22 jmcneill switch (PCI_PRODUCT(pa->pa_id)) {
79 1.22 jmcneill case PCI_PRODUCT_NVIDIA_XBOX_SMBUS:
80 1.22 jmcneill return (1);
81 1.22 jmcneill }
82 1.10 kleink }
83 1.10 kleink
84 1.1 enami return (0);
85 1.1 enami }
86 1.1 enami
87 1.8 thorpej static void
88 1.37 tls amdpm_rnd_get(size_t bytes, void *priv)
89 1.37 tls {
90 1.37 tls struct amdpm_softc *sc = priv;
91 1.37 tls
92 1.37 tls mutex_enter(&sc->sc_mutex);
93 1.37 tls sc->sc_rnd_need = bytes;
94 1.37 tls amdpm_rnd_callout_locked(sc);
95 1.37 tls mutex_exit(&sc->sc_mutex);
96 1.37 tls }
97 1.37 tls
98 1.37 tls static void
99 1.32 cegger amdpm_attach(device_t parent, device_t self, void *aux)
100 1.1 enami {
101 1.33 cegger struct amdpm_softc *sc = device_private(self);
102 1.1 enami struct pci_attach_args *pa = aux;
103 1.15 christos pcireg_t confreg, pmptrreg;
104 1.1 enami u_int32_t pmreg;
105 1.1 enami int i;
106 1.1 enami
107 1.35 drochner pci_aprint_devinfo(pa, NULL);
108 1.1 enami
109 1.36 chs sc->sc_dev = self;
110 1.36 chs
111 1.22 jmcneill if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_XBOX_SMBUS)
112 1.22 jmcneill sc->sc_nforce = 1;
113 1.22 jmcneill else
114 1.22 jmcneill sc->sc_nforce = 0;
115 1.22 jmcneill
116 1.1 enami sc->sc_pc = pa->pa_pc;
117 1.1 enami sc->sc_tag = pa->pa_tag;
118 1.1 enami sc->sc_iot = pa->pa_iot;
119 1.25 jmcneill sc->sc_pa = pa;
120 1.1 enami
121 1.1 enami #if 0
122 1.36 chs aprint_normal_dev(self, "");
123 1.1 enami pci_conf_print(pa->pa_pc, pa->pa_tag, NULL);
124 1.1 enami #endif
125 1.1 enami
126 1.15 christos confreg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG);
127 1.22 jmcneill /* enable pm i/o space for AMD-8111 and nForce */
128 1.22 jmcneill if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_PBC8111_ACPI ||
129 1.22 jmcneill sc->sc_nforce)
130 1.15 christos confreg |= AMDPM_PMIOEN;
131 1.15 christos
132 1.15 christos /* Enable random number generation for everyone */
133 1.15 christos pci_conf_write(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG,
134 1.15 christos confreg | AMDPM_RNGEN);
135 1.15 christos confreg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG);
136 1.11 tls
137 1.15 christos if ((confreg & AMDPM_PMIOEN) == 0) {
138 1.36 chs aprint_error_dev(self, "PMxx space isn't enabled\n");
139 1.1 enami return;
140 1.1 enami }
141 1.15 christos
142 1.22 jmcneill if (sc->sc_nforce) {
143 1.22 jmcneill pmptrreg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFORCE_PMPTR);
144 1.36 chs aprint_normal_dev(self, "power management at 0x%04x\n",
145 1.29 cegger NFORCE_PMBASE(pmptrreg));
146 1.22 jmcneill if (bus_space_map(sc->sc_iot, NFORCE_PMBASE(pmptrreg),
147 1.22 jmcneill AMDPM_PMSIZE, 0, &sc->sc_ioh)) {
148 1.36 chs aprint_error_dev(self, "failed to map PMxx space\n");
149 1.22 jmcneill return;
150 1.22 jmcneill }
151 1.22 jmcneill } else {
152 1.22 jmcneill pmptrreg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_PMPTR);
153 1.22 jmcneill if (bus_space_map(sc->sc_iot, AMDPM_PMBASE(pmptrreg),
154 1.22 jmcneill AMDPM_PMSIZE, 0, &sc->sc_ioh)) {
155 1.36 chs aprint_error_dev(self, "failed to map PMxx space\n");
156 1.22 jmcneill return;
157 1.22 jmcneill }
158 1.1 enami }
159 1.1 enami
160 1.24 jmcneill /* don't attach a timecounter on nforce boards */
161 1.24 jmcneill if ((confreg & AMDPM_TMRRST) == 0 && (confreg & AMDPM_STOPTMR) == 0 &&
162 1.24 jmcneill !sc->sc_nforce) {
163 1.36 chs acpipmtimer_attach(self, sc->sc_iot, sc->sc_ioh,
164 1.18 drochner AMDPM_TMR, ((confreg & AMDPM_TMR32) ? ACPIPMT_32BIT : 0));
165 1.12 xtraeme }
166 1.12 xtraeme
167 1.37 tls /* XXX this mutex is IPL_VM because it can be taken by rnd_getmore() */
168 1.37 tls mutex_init(&sc->sc_mutex, MUTEX_DEFAULT, IPL_VM);
169 1.37 tls
170 1.11 tls /* try to attach devices on the smbus */
171 1.22 jmcneill if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_PBC8111_ACPI ||
172 1.34 pgoyette PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_PBC768_PMC ||
173 1.25 jmcneill sc->sc_nforce) {
174 1.11 tls amdpm_smbus_attach(sc);
175 1.25 jmcneill }
176 1.11 tls
177 1.15 christos if (confreg & AMDPM_RNGEN) {
178 1.1 enami /* Check to see if we can read data from the RNG. */
179 1.1 enami (void) bus_space_read_4(sc->sc_iot, sc->sc_ioh,
180 1.1 enami AMDPM_RNGDATA);
181 1.1 enami for (i = 0; i < 1000; i++) {
182 1.1 enami pmreg = bus_space_read_4(sc->sc_iot,
183 1.1 enami sc->sc_ioh, AMDPM_RNGSTAT);
184 1.1 enami if (pmreg & AMDPM_RNGDONE)
185 1.1 enami break;
186 1.1 enami delay(1);
187 1.1 enami }
188 1.1 enami if ((pmreg & AMDPM_RNGDONE) != 0) {
189 1.36 chs aprint_normal_dev(self, ""
190 1.1 enami "random number generator enabled (apprx. %dms)\n",
191 1.29 cegger i);
192 1.37 tls callout_init(&sc->sc_rnd_ch, CALLOUT_MPSAFE);
193 1.37 tls rndsource_setcb(&sc->sc_rnd_source,
194 1.37 tls amdpm_rnd_get, sc);
195 1.1 enami rnd_attach_source(&sc->sc_rnd_source,
196 1.36 chs device_xname(self), RND_TYPE_RNG,
197 1.7 tls /*
198 1.7 tls * XXX Careful! The use of RND_FLAG_NO_ESTIMATE
199 1.7 tls * XXX here is unobvious: we later feed raw bits
200 1.7 tls * XXX into the "entropy pool" with rnd_add_data,
201 1.7 tls * XXX explicitly supplying an entropy estimate.
202 1.7 tls * XXX In this context, NO_ESTIMATE serves only
203 1.7 tls * XXX to prevent rnd_add_data from trying to
204 1.7 tls * XXX use the *time at which we added the data*
205 1.7 tls * XXX as entropy, which is not a good idea since
206 1.7 tls * XXX we add data periodically from a callout.
207 1.7 tls */
208 1.37 tls RND_FLAG_NO_ESTIMATE|RND_FLAG_HASCB);
209 1.1 enami #ifdef AMDPM_RND_COUNTERS
210 1.1 enami evcnt_attach_dynamic(&sc->sc_rnd_hits, EVCNT_TYPE_MISC,
211 1.36 chs NULL, device_xname(self), "rnd hits");
212 1.1 enami evcnt_attach_dynamic(&sc->sc_rnd_miss, EVCNT_TYPE_MISC,
213 1.36 chs NULL, device_xname(self), "rnd miss");
214 1.1 enami for (i = 0; i < 256; i++) {
215 1.1 enami evcnt_attach_dynamic(&sc->sc_rnd_data[i],
216 1.36 chs EVCNT_TYPE_MISC, NULL, device_xname(self),
217 1.1 enami "rnd data");
218 1.1 enami }
219 1.1 enami #endif
220 1.37 tls sc->sc_rnd_need = RND_POOLBITS / NBBY;
221 1.1 enami amdpm_rnd_callout(sc);
222 1.1 enami }
223 1.1 enami }
224 1.1 enami }
225 1.1 enami
226 1.36 chs CFATTACH_DECL_NEW(amdpm, sizeof(struct amdpm_softc),
227 1.8 thorpej amdpm_match, amdpm_attach, NULL, NULL);
228 1.8 thorpej
229 1.8 thorpej static void
230 1.37 tls amdpm_rnd_callout_locked(void *v)
231 1.1 enami {
232 1.1 enami struct amdpm_softc *sc = v;
233 1.15 christos u_int32_t rngreg;
234 1.1 enami #ifdef AMDPM_RND_COUNTERS
235 1.1 enami int i;
236 1.1 enami #endif
237 1.1 enami
238 1.37 tls if (sc->sc_rnd_need < 1) {
239 1.37 tls callout_stop(&sc->sc_rnd_ch);
240 1.37 tls return;
241 1.37 tls }
242 1.37 tls
243 1.1 enami if ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_RNGSTAT) &
244 1.1 enami AMDPM_RNGDONE) != 0) {
245 1.15 christos rngreg = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
246 1.15 christos AMDPM_RNGDATA);
247 1.15 christos rnd_add_data(&sc->sc_rnd_source, &rngreg,
248 1.15 christos sizeof(rngreg), sizeof(rngreg) * NBBY);
249 1.37 tls sc->sc_rnd_need -= sizeof(rngreg);
250 1.1 enami #ifdef AMDPM_RND_COUNTERS
251 1.1 enami AMDPM_RNDCNT_INCR(&sc->sc_rnd_hits);
252 1.15 christos for (i = 0; i < sizeof(rngreg); i++, rngreg >>= NBBY)
253 1.15 christos AMDPM_RNDCNT_INCR(&sc->sc_rnd_data[rngreg & 0xff]);
254 1.1 enami #endif
255 1.19 christos }
256 1.19 christos #ifdef AMDPM_RND_COUNTERS
257 1.19 christos else
258 1.1 enami AMDPM_RNDCNT_INCR(&sc->sc_rnd_miss);
259 1.19 christos #endif
260 1.37 tls if (sc->sc_rnd_need > 0) {
261 1.37 tls callout_reset(&sc->sc_rnd_ch, 1, amdpm_rnd_callout, sc);
262 1.37 tls }
263 1.37 tls }
264 1.37 tls
265 1.37 tls static void
266 1.37 tls amdpm_rnd_callout(void *v)
267 1.37 tls {
268 1.37 tls struct amdpm_softc *sc = v;
269 1.37 tls
270 1.37 tls mutex_enter(&sc->sc_mutex);
271 1.37 tls amdpm_rnd_callout_locked(v);
272 1.37 tls mutex_exit(&sc->sc_mutex);
273 1.1 enami }
274