amr.c revision 1.57 1 1.57 christos /* $NetBSD: amr.c,v 1.57 2014/03/29 19:28:24 christos Exp $ */
2 1.1 ad
3 1.1 ad /*-
4 1.9 ad * Copyright (c) 2002, 2003 The NetBSD Foundation, Inc.
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.1 ad * by Andrew Doran.
9 1.1 ad *
10 1.1 ad * Redistribution and use in source and binary forms, with or without
11 1.1 ad * modification, are permitted provided that the following conditions
12 1.1 ad * are met:
13 1.1 ad * 1. Redistributions of source code must retain the above copyright
14 1.1 ad * notice, this list of conditions and the following disclaimer.
15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ad * notice, this list of conditions and the following disclaimer in the
17 1.1 ad * documentation and/or other materials provided with the distribution.
18 1.1 ad *
19 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
30 1.1 ad */
31 1.1 ad
32 1.1 ad /*-
33 1.1 ad * Copyright (c) 1999,2000 Michael Smith
34 1.1 ad * Copyright (c) 2000 BSDi
35 1.1 ad * All rights reserved.
36 1.1 ad *
37 1.1 ad * Redistribution and use in source and binary forms, with or without
38 1.1 ad * modification, are permitted provided that the following conditions
39 1.1 ad * are met:
40 1.1 ad * 1. Redistributions of source code must retain the above copyright
41 1.1 ad * notice, this list of conditions and the following disclaimer.
42 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
43 1.1 ad * notice, this list of conditions and the following disclaimer in the
44 1.1 ad * documentation and/or other materials provided with the distribution.
45 1.1 ad *
46 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
47 1.1 ad * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 1.1 ad * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 1.1 ad * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
50 1.1 ad * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 1.1 ad * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 1.1 ad * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 1.1 ad * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54 1.1 ad * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55 1.1 ad * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 1.1 ad * SUCH DAMAGE.
57 1.1 ad *
58 1.1 ad * from FreeBSD: amr_pci.c,v 1.5 2000/08/30 07:52:40 msmith Exp
59 1.25 perry * from FreeBSD: amr.c,v 1.16 2000/08/30 07:52:40 msmith Exp
60 1.1 ad */
61 1.1 ad
62 1.1 ad /*
63 1.1 ad * Driver for AMI RAID controllers.
64 1.1 ad */
65 1.1 ad
66 1.1 ad #include <sys/cdefs.h>
67 1.57 christos __KERNEL_RCSID(0, "$NetBSD: amr.c,v 1.57 2014/03/29 19:28:24 christos Exp $");
68 1.1 ad
69 1.1 ad #include <sys/param.h>
70 1.1 ad #include <sys/systm.h>
71 1.1 ad #include <sys/kernel.h>
72 1.1 ad #include <sys/device.h>
73 1.1 ad #include <sys/queue.h>
74 1.1 ad #include <sys/proc.h>
75 1.1 ad #include <sys/buf.h>
76 1.1 ad #include <sys/malloc.h>
77 1.36 bouyer #include <sys/conf.h>
78 1.9 ad #include <sys/kthread.h>
79 1.40 elad #include <sys/kauth.h>
80 1.1 ad
81 1.1 ad #include <machine/endian.h>
82 1.46 ad #include <sys/bus.h>
83 1.1 ad
84 1.1 ad #include <dev/pci/pcidevs.h>
85 1.1 ad #include <dev/pci/pcivar.h>
86 1.1 ad #include <dev/pci/amrreg.h>
87 1.1 ad #include <dev/pci/amrvar.h>
88 1.36 bouyer #include <dev/pci/amrio.h>
89 1.1 ad
90 1.22 drochner #include "locators.h"
91 1.22 drochner
92 1.51 cegger static void amr_attach(device_t, device_t, void *);
93 1.27 thorpej static void amr_ccb_dump(struct amr_softc *, struct amr_ccb *);
94 1.27 thorpej static void *amr_enquire(struct amr_softc *, u_int8_t, u_int8_t, u_int8_t,
95 1.27 thorpej void *);
96 1.27 thorpej static int amr_init(struct amr_softc *, const char *,
97 1.1 ad struct pci_attach_args *pa);
98 1.27 thorpej static int amr_intr(void *);
99 1.51 cegger static int amr_match(device_t, cfdata_t, void *);
100 1.27 thorpej static int amr_print(void *, const char *);
101 1.27 thorpej static void amr_shutdown(void *);
102 1.27 thorpej static void amr_teardown(struct amr_softc *);
103 1.27 thorpej static void amr_thread(void *);
104 1.27 thorpej
105 1.27 thorpej static int amr_quartz_get_work(struct amr_softc *,
106 1.27 thorpej struct amr_mailbox_resp *);
107 1.27 thorpej static int amr_quartz_submit(struct amr_softc *, struct amr_ccb *);
108 1.27 thorpej static int amr_std_get_work(struct amr_softc *, struct amr_mailbox_resp *);
109 1.27 thorpej static int amr_std_submit(struct amr_softc *, struct amr_ccb *);
110 1.1 ad
111 1.36 bouyer static dev_type_open(amropen);
112 1.36 bouyer static dev_type_close(amrclose);
113 1.36 bouyer static dev_type_ioctl(amrioctl);
114 1.36 bouyer
115 1.55 jakllsch CFATTACH_DECL_NEW(amr, sizeof(struct amr_softc),
116 1.6 thorpej amr_match, amr_attach, NULL, NULL);
117 1.1 ad
118 1.36 bouyer const struct cdevsw amr_cdevsw = {
119 1.56 dholland .d_open = amropen,
120 1.56 dholland .d_close = amrclose,
121 1.56 dholland .d_read = noread,
122 1.56 dholland .d_write = nowrite,
123 1.56 dholland .d_ioctl = amrioctl,
124 1.56 dholland .d_stop = nostop,
125 1.56 dholland .d_tty = notty,
126 1.56 dholland .d_poll = nopoll,
127 1.56 dholland .d_mmap = nommap,
128 1.56 dholland .d_kqfilter = nokqfilter,
129 1.56 dholland .d_flag = D_OTHER
130 1.36 bouyer };
131 1.36 bouyer
132 1.36 bouyer extern struct cfdriver amr_cd;
133 1.36 bouyer
134 1.1 ad #define AT_QUARTZ 0x01 /* `Quartz' chipset */
135 1.1 ad #define AT_SIG 0x02 /* Check for signature */
136 1.1 ad
137 1.38 christos static struct amr_pci_type {
138 1.1 ad u_short apt_vendor;
139 1.1 ad u_short apt_product;
140 1.1 ad u_short apt_flags;
141 1.38 christos } const amr_pci_type[] = {
142 1.1 ad { PCI_VENDOR_AMI, PCI_PRODUCT_AMI_MEGARAID, 0 },
143 1.1 ad { PCI_VENDOR_AMI, PCI_PRODUCT_AMI_MEGARAID2, 0 },
144 1.1 ad { PCI_VENDOR_AMI, PCI_PRODUCT_AMI_MEGARAID3, AT_QUARTZ },
145 1.21 he { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_AMI_MEGARAID3, AT_QUARTZ },
146 1.12 matt { PCI_VENDOR_INTEL, PCI_PRODUCT_AMI_MEGARAID3, AT_QUARTZ | AT_SIG },
147 1.31 jonathan { PCI_VENDOR_INTEL, PCI_PRODUCT_SYMBIOS_MEGARAID_320X, AT_QUARTZ },
148 1.31 jonathan { PCI_VENDOR_INTEL, PCI_PRODUCT_SYMBIOS_MEGARAID_320E, AT_QUARTZ },
149 1.31 jonathan { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_300X, AT_QUARTZ },
150 1.12 matt { PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_4DI, AT_QUARTZ },
151 1.14 martti { PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_4DI_2, AT_QUARTZ },
152 1.23 martti { PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_4ESI, AT_QUARTZ },
153 1.24 martti { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_PERC_4SC, AT_QUARTZ },
154 1.31 jonathan { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_320X, AT_QUARTZ },
155 1.31 jonathan { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_320E, AT_QUARTZ },
156 1.31 jonathan { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_300X, AT_QUARTZ },
157 1.1 ad };
158 1.1 ad
159 1.38 christos static struct amr_typestr {
160 1.1 ad const char *at_str;
161 1.1 ad int at_sig;
162 1.38 christos } const amr_typestr[] = {
163 1.1 ad { "Series 431", AMR_SIG_431 },
164 1.1 ad { "Series 438", AMR_SIG_438 },
165 1.1 ad { "Series 466", AMR_SIG_466 },
166 1.1 ad { "Series 467", AMR_SIG_467 },
167 1.1 ad { "Series 490", AMR_SIG_490 },
168 1.1 ad { "Series 762", AMR_SIG_762 },
169 1.1 ad { "HP NetRAID (T5)", AMR_SIG_T5 },
170 1.1 ad { "HP NetRAID (T7)", AMR_SIG_T7 },
171 1.1 ad };
172 1.1 ad
173 1.38 christos static struct {
174 1.9 ad const char *ds_descr;
175 1.9 ad int ds_happy;
176 1.38 christos } const amr_dstate[] = {
177 1.9 ad { "offline", 0 },
178 1.9 ad { "degraded", 1 },
179 1.9 ad { "optimal", 1 },
180 1.9 ad { "online", 1 },
181 1.9 ad { "failed", 0 },
182 1.9 ad { "rebuilding", 1 },
183 1.9 ad { "hotspare", 0 },
184 1.9 ad };
185 1.9 ad
186 1.27 thorpej static void *amr_sdh;
187 1.27 thorpej
188 1.27 thorpej static int amr_max_segs;
189 1.27 thorpej int amr_max_xfer;
190 1.1 ad
191 1.1 ad static inline u_int8_t
192 1.1 ad amr_inb(struct amr_softc *amr, int off)
193 1.1 ad {
194 1.1 ad
195 1.1 ad bus_space_barrier(amr->amr_iot, amr->amr_ioh, off, 1,
196 1.1 ad BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
197 1.1 ad return (bus_space_read_1(amr->amr_iot, amr->amr_ioh, off));
198 1.1 ad }
199 1.1 ad
200 1.1 ad static inline u_int32_t
201 1.1 ad amr_inl(struct amr_softc *amr, int off)
202 1.1 ad {
203 1.1 ad
204 1.1 ad bus_space_barrier(amr->amr_iot, amr->amr_ioh, off, 4,
205 1.1 ad BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
206 1.1 ad return (bus_space_read_4(amr->amr_iot, amr->amr_ioh, off));
207 1.1 ad }
208 1.1 ad
209 1.1 ad static inline void
210 1.1 ad amr_outb(struct amr_softc *amr, int off, u_int8_t val)
211 1.1 ad {
212 1.1 ad
213 1.1 ad bus_space_write_1(amr->amr_iot, amr->amr_ioh, off, val);
214 1.1 ad bus_space_barrier(amr->amr_iot, amr->amr_ioh, off, 1,
215 1.1 ad BUS_SPACE_BARRIER_WRITE);
216 1.1 ad }
217 1.1 ad
218 1.1 ad static inline void
219 1.1 ad amr_outl(struct amr_softc *amr, int off, u_int32_t val)
220 1.1 ad {
221 1.1 ad
222 1.1 ad bus_space_write_4(amr->amr_iot, amr->amr_ioh, off, val);
223 1.1 ad bus_space_barrier(amr->amr_iot, amr->amr_ioh, off, 4,
224 1.1 ad BUS_SPACE_BARRIER_WRITE);
225 1.1 ad }
226 1.1 ad
227 1.1 ad /*
228 1.1 ad * Match a supported device.
229 1.1 ad */
230 1.27 thorpej static int
231 1.51 cegger amr_match(device_t parent, cfdata_t match, void *aux)
232 1.1 ad {
233 1.1 ad struct pci_attach_args *pa;
234 1.1 ad pcireg_t s;
235 1.1 ad int i;
236 1.1 ad
237 1.1 ad pa = (struct pci_attach_args *)aux;
238 1.1 ad
239 1.1 ad /*
240 1.1 ad * Don't match the device if it's operating in I2O mode. In this
241 1.1 ad * case it should be handled by the `iop' driver.
242 1.1 ad */
243 1.1 ad if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O)
244 1.1 ad return (0);
245 1.1 ad
246 1.1 ad for (i = 0; i < sizeof(amr_pci_type) / sizeof(amr_pci_type[0]); i++)
247 1.25 perry if (PCI_VENDOR(pa->pa_id) == amr_pci_type[i].apt_vendor &&
248 1.1 ad PCI_PRODUCT(pa->pa_id) == amr_pci_type[i].apt_product)
249 1.1 ad break;
250 1.1 ad
251 1.1 ad if (i == sizeof(amr_pci_type) / sizeof(amr_pci_type[0]))
252 1.1 ad return (0);
253 1.1 ad
254 1.1 ad if ((amr_pci_type[i].apt_flags & AT_SIG) == 0)
255 1.1 ad return (1);
256 1.1 ad
257 1.1 ad s = pci_conf_read(pa->pa_pc, pa->pa_tag, AMR_QUARTZ_SIG_REG) & 0xffff;
258 1.1 ad return (s == AMR_QUARTZ_SIG0 || s == AMR_QUARTZ_SIG1);
259 1.1 ad }
260 1.1 ad
261 1.1 ad /*
262 1.9 ad * Attach a supported device.
263 1.1 ad */
264 1.27 thorpej static void
265 1.51 cegger amr_attach(device_t parent, device_t self, void *aux)
266 1.1 ad {
267 1.1 ad struct pci_attach_args *pa;
268 1.1 ad struct amr_attach_args amra;
269 1.1 ad const struct amr_pci_type *apt;
270 1.1 ad struct amr_softc *amr;
271 1.1 ad pci_chipset_tag_t pc;
272 1.1 ad pci_intr_handle_t ih;
273 1.1 ad const char *intrstr;
274 1.1 ad pcireg_t reg;
275 1.9 ad int rseg, i, j, size, rv, memreg, ioreg;
276 1.36 bouyer struct amr_ccb *ac;
277 1.28 drochner int locs[AMRCF_NLOCS];
278 1.57 christos char intrbuf[PCI_INTRSTR_LEN];
279 1.1 ad
280 1.8 thorpej aprint_naive(": RAID controller\n");
281 1.8 thorpej
282 1.52 cegger amr = device_private(self);
283 1.55 jakllsch amr->amr_dv = self;
284 1.1 ad pa = (struct pci_attach_args *)aux;
285 1.1 ad pc = pa->pa_pc;
286 1.1 ad
287 1.1 ad for (i = 0; i < sizeof(amr_pci_type) / sizeof(amr_pci_type[0]); i++)
288 1.1 ad if (PCI_VENDOR(pa->pa_id) == amr_pci_type[i].apt_vendor &&
289 1.1 ad PCI_PRODUCT(pa->pa_id) == amr_pci_type[i].apt_product)
290 1.1 ad break;
291 1.1 ad apt = amr_pci_type + i;
292 1.1 ad
293 1.1 ad memreg = ioreg = 0;
294 1.1 ad for (i = 0x10; i <= 0x14; i += 4) {
295 1.1 ad reg = pci_conf_read(pc, pa->pa_tag, i);
296 1.1 ad switch (PCI_MAPREG_TYPE(reg)) {
297 1.1 ad case PCI_MAPREG_TYPE_MEM:
298 1.19 fvdl if (PCI_MAPREG_MEM_SIZE(reg) != 0)
299 1.19 fvdl memreg = i;
300 1.1 ad break;
301 1.1 ad case PCI_MAPREG_TYPE_IO:
302 1.19 fvdl if (PCI_MAPREG_IO_SIZE(reg) != 0)
303 1.19 fvdl ioreg = i;
304 1.1 ad break;
305 1.16 christos
306 1.1 ad }
307 1.1 ad }
308 1.1 ad
309 1.18 mycroft if (memreg && pci_mapreg_map(pa, memreg, PCI_MAPREG_TYPE_MEM, 0,
310 1.18 mycroft &amr->amr_iot, &amr->amr_ioh, NULL, &amr->amr_ios) == 0)
311 1.18 mycroft ;
312 1.18 mycroft else if (ioreg && pci_mapreg_map(pa, ioreg, PCI_MAPREG_TYPE_IO, 0,
313 1.18 mycroft &amr->amr_iot, &amr->amr_ioh, NULL, &amr->amr_ios) == 0)
314 1.18 mycroft ;
315 1.18 mycroft else {
316 1.8 thorpej aprint_error("can't map control registers\n");
317 1.9 ad amr_teardown(amr);
318 1.1 ad return;
319 1.1 ad }
320 1.1 ad
321 1.9 ad amr->amr_flags |= AMRF_PCI_REGS;
322 1.1 ad amr->amr_dmat = pa->pa_dmat;
323 1.9 ad amr->amr_pc = pa->pa_pc;
324 1.1 ad
325 1.1 ad /* Enable the device. */
326 1.1 ad reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
327 1.1 ad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
328 1.1 ad reg | PCI_COMMAND_MASTER_ENABLE);
329 1.1 ad
330 1.1 ad /* Map and establish the interrupt. */
331 1.1 ad if (pci_intr_map(pa, &ih)) {
332 1.8 thorpej aprint_error("can't map interrupt\n");
333 1.9 ad amr_teardown(amr);
334 1.1 ad return;
335 1.1 ad }
336 1.57 christos intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
337 1.1 ad amr->amr_ih = pci_intr_establish(pc, ih, IPL_BIO, amr_intr, amr);
338 1.1 ad if (amr->amr_ih == NULL) {
339 1.8 thorpej aprint_error("can't establish interrupt");
340 1.1 ad if (intrstr != NULL)
341 1.53 njoly aprint_error(" at %s", intrstr);
342 1.53 njoly aprint_error("\n");
343 1.9 ad amr_teardown(amr);
344 1.1 ad return;
345 1.1 ad }
346 1.9 ad amr->amr_flags |= AMRF_PCI_INTR;
347 1.1 ad
348 1.1 ad /*
349 1.1 ad * Allocate space for the mailbox and S/G lists. Some controllers
350 1.1 ad * don't like S/G lists to be located below 0x2000, so we allocate
351 1.1 ad * enough slop to enable us to compensate.
352 1.1 ad *
353 1.1 ad * The standard mailbox structure needs to be aligned on a 16-byte
354 1.1 ad * boundary. The 64-bit mailbox has one extra field, 4 bytes in
355 1.42 christos * size, which precedes the standard mailbox.
356 1.1 ad */
357 1.1 ad size = AMR_SGL_SIZE * AMR_MAX_CMDS + 0x2000;
358 1.9 ad amr->amr_dmasize = size;
359 1.1 ad
360 1.15 fvdl if ((rv = bus_dmamem_alloc(amr->amr_dmat, size, PAGE_SIZE, 0,
361 1.9 ad &amr->amr_dmaseg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
362 1.55 jakllsch aprint_error_dev(amr->amr_dv, "unable to allocate buffer, rv = %d\n",
363 1.47 cegger rv);
364 1.9 ad amr_teardown(amr);
365 1.1 ad return;
366 1.1 ad }
367 1.9 ad amr->amr_flags |= AMRF_DMA_ALLOC;
368 1.1 ad
369 1.25 perry if ((rv = bus_dmamem_map(amr->amr_dmat, &amr->amr_dmaseg, rseg, size,
370 1.44 christos (void **)&amr->amr_mbox,
371 1.1 ad BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
372 1.55 jakllsch aprint_error_dev(amr->amr_dv, "unable to map buffer, rv = %d\n",
373 1.47 cegger rv);
374 1.9 ad amr_teardown(amr);
375 1.1 ad return;
376 1.1 ad }
377 1.9 ad amr->amr_flags |= AMRF_DMA_MAP;
378 1.1 ad
379 1.25 perry if ((rv = bus_dmamap_create(amr->amr_dmat, size, 1, size, 0,
380 1.1 ad BUS_DMA_NOWAIT, &amr->amr_dmamap)) != 0) {
381 1.55 jakllsch aprint_error_dev(amr->amr_dv, "unable to create buffer DMA map, rv = %d\n",
382 1.47 cegger rv);
383 1.9 ad amr_teardown(amr);
384 1.1 ad return;
385 1.1 ad }
386 1.9 ad amr->amr_flags |= AMRF_DMA_CREATE;
387 1.1 ad
388 1.1 ad if ((rv = bus_dmamap_load(amr->amr_dmat, amr->amr_dmamap,
389 1.1 ad amr->amr_mbox, size, NULL, BUS_DMA_NOWAIT)) != 0) {
390 1.55 jakllsch aprint_error_dev(amr->amr_dv, "unable to load buffer DMA map, rv = %d\n",
391 1.47 cegger rv);
392 1.9 ad amr_teardown(amr);
393 1.1 ad return;
394 1.1 ad }
395 1.9 ad amr->amr_flags |= AMRF_DMA_LOAD;
396 1.1 ad
397 1.1 ad memset(amr->amr_mbox, 0, size);
398 1.1 ad
399 1.9 ad amr->amr_mbox_paddr = amr->amr_dmamap->dm_segs[0].ds_addr;
400 1.1 ad amr->amr_sgls_paddr = (amr->amr_mbox_paddr + 0x1fff) & ~0x1fff;
401 1.44 christos amr->amr_sgls = (struct amr_sgentry *)((char *)amr->amr_mbox +
402 1.1 ad amr->amr_sgls_paddr - amr->amr_dmamap->dm_segs[0].ds_addr);
403 1.1 ad
404 1.1 ad /*
405 1.1 ad * Allocate and initalise the command control blocks.
406 1.1 ad */
407 1.1 ad ac = malloc(sizeof(*ac) * AMR_MAX_CMDS, M_DEVBUF, M_NOWAIT | M_ZERO);
408 1.1 ad amr->amr_ccbs = ac;
409 1.1 ad SLIST_INIT(&amr->amr_ccb_freelist);
410 1.10 ad TAILQ_INIT(&amr->amr_ccb_active);
411 1.9 ad amr->amr_flags |= AMRF_CCBS;
412 1.9 ad
413 1.9 ad if (amr_max_xfer == 0) {
414 1.9 ad amr_max_xfer = min(((AMR_MAX_SEGS - 1) * PAGE_SIZE), MAXPHYS);
415 1.9 ad amr_max_segs = (amr_max_xfer + (PAGE_SIZE * 2) - 1) / PAGE_SIZE;
416 1.9 ad }
417 1.1 ad
418 1.1 ad for (i = 0; i < AMR_MAX_CMDS; i++, ac++) {
419 1.9 ad rv = bus_dmamap_create(amr->amr_dmat, amr_max_xfer,
420 1.9 ad amr_max_segs, amr_max_xfer, 0,
421 1.9 ad BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ac->ac_xfer_map);
422 1.1 ad if (rv != 0)
423 1.1 ad break;
424 1.1 ad
425 1.1 ad ac->ac_ident = i;
426 1.9 ad amr_ccb_free(amr, ac);
427 1.9 ad }
428 1.9 ad if (i != AMR_MAX_CMDS) {
429 1.55 jakllsch aprint_error_dev(amr->amr_dv, "memory exhausted\n");
430 1.9 ad amr_teardown(amr);
431 1.9 ad return;
432 1.1 ad }
433 1.1 ad
434 1.1 ad /*
435 1.1 ad * Take care of model-specific tasks.
436 1.1 ad */
437 1.1 ad if ((apt->apt_flags & AT_QUARTZ) != 0) {
438 1.1 ad amr->amr_submit = amr_quartz_submit;
439 1.1 ad amr->amr_get_work = amr_quartz_get_work;
440 1.1 ad } else {
441 1.1 ad amr->amr_submit = amr_std_submit;
442 1.1 ad amr->amr_get_work = amr_std_get_work;
443 1.1 ad
444 1.1 ad /* Notify the controller of the mailbox location. */
445 1.9 ad amr_outl(amr, AMR_SREG_MBOX, (u_int32_t)amr->amr_mbox_paddr + 16);
446 1.1 ad amr_outb(amr, AMR_SREG_MBOX_ENABLE, AMR_SMBOX_ENABLE_ADDR);
447 1.1 ad
448 1.1 ad /* Clear outstanding interrupts and enable interrupts. */
449 1.1 ad amr_outb(amr, AMR_SREG_CMD, AMR_SCMD_ACKINTR);
450 1.1 ad amr_outb(amr, AMR_SREG_TOGL,
451 1.1 ad amr_inb(amr, AMR_SREG_TOGL) | AMR_STOGL_ENABLE);
452 1.1 ad }
453 1.1 ad
454 1.1 ad /*
455 1.1 ad * Retrieve parameters, and tell the world about us.
456 1.1 ad */
457 1.9 ad amr->amr_enqbuf = malloc(AMR_ENQUIRY_BUFSIZE, M_DEVBUF, M_NOWAIT);
458 1.9 ad amr->amr_flags |= AMRF_ENQBUF;
459 1.1 ad amr->amr_maxqueuecnt = i;
460 1.8 thorpej aprint_normal(": AMI RAID ");
461 1.9 ad if (amr_init(amr, intrstr, pa) != 0) {
462 1.9 ad amr_teardown(amr);
463 1.1 ad return;
464 1.9 ad }
465 1.1 ad
466 1.25 perry /*
467 1.1 ad * Cap the maximum number of outstanding commands. AMI's Linux
468 1.1 ad * driver doesn't trust the controller's reported value, and lockups
469 1.1 ad * have been seen when we do.
470 1.1 ad */
471 1.1 ad amr->amr_maxqueuecnt = min(amr->amr_maxqueuecnt, AMR_MAX_CMDS);
472 1.1 ad if (amr->amr_maxqueuecnt > i)
473 1.1 ad amr->amr_maxqueuecnt = i;
474 1.1 ad
475 1.1 ad /* Set our `shutdownhook' before we start any device activity. */
476 1.1 ad if (amr_sdh == NULL)
477 1.1 ad amr_sdh = shutdownhook_establish(amr_shutdown, NULL);
478 1.1 ad
479 1.1 ad /* Attach sub-devices. */
480 1.9 ad for (j = 0; j < amr->amr_numdrives; j++) {
481 1.9 ad if (amr->amr_drive[j].al_size == 0)
482 1.1 ad continue;
483 1.9 ad amra.amra_unit = j;
484 1.22 drochner
485 1.28 drochner locs[AMRCF_UNIT] = j;
486 1.22 drochner
487 1.55 jakllsch amr->amr_drive[j].al_dv = config_found_sm_loc(amr->amr_dv,
488 1.29 drochner "amr", locs, &amra, amr_print, config_stdsubmatch);
489 1.1 ad }
490 1.1 ad
491 1.1 ad SIMPLEQ_INIT(&amr->amr_ccb_queue);
492 1.13 ad
493 1.13 ad /* XXX This doesn't work for newer boards yet. */
494 1.45 ad if ((apt->apt_flags & AT_QUARTZ) == 0) {
495 1.45 ad rv = kthread_create(PRI_NONE, 0, NULL, amr_thread, amr,
496 1.55 jakllsch &amr->amr_thread, "%s", device_xname(amr->amr_dv));
497 1.45 ad if (rv != 0)
498 1.55 jakllsch aprint_error_dev(amr->amr_dv, "unable to create thread (%d)",
499 1.47 cegger rv);
500 1.45 ad else
501 1.45 ad amr->amr_flags |= AMRF_THREAD;
502 1.45 ad }
503 1.9 ad }
504 1.9 ad
505 1.9 ad /*
506 1.9 ad * Free up resources.
507 1.9 ad */
508 1.27 thorpej static void
509 1.9 ad amr_teardown(struct amr_softc *amr)
510 1.9 ad {
511 1.9 ad struct amr_ccb *ac;
512 1.9 ad int fl;
513 1.9 ad
514 1.9 ad fl = amr->amr_flags;
515 1.9 ad
516 1.9 ad if ((fl & AMRF_THREAD) != 0) {
517 1.9 ad amr->amr_flags |= AMRF_THREAD_EXIT;
518 1.9 ad wakeup(amr_thread);
519 1.9 ad while ((amr->amr_flags & AMRF_THREAD_EXIT) != 0)
520 1.9 ad tsleep(&amr->amr_flags, PWAIT, "amrexit", 0);
521 1.9 ad }
522 1.9 ad if ((fl & AMRF_CCBS) != 0) {
523 1.9 ad SLIST_FOREACH(ac, &amr->amr_ccb_freelist, ac_chain.slist) {
524 1.9 ad bus_dmamap_destroy(amr->amr_dmat, ac->ac_xfer_map);
525 1.9 ad }
526 1.9 ad free(amr->amr_ccbs, M_DEVBUF);
527 1.9 ad }
528 1.9 ad if ((fl & AMRF_ENQBUF) != 0)
529 1.9 ad free(amr->amr_enqbuf, M_DEVBUF);
530 1.9 ad if ((fl & AMRF_DMA_LOAD) != 0)
531 1.9 ad bus_dmamap_unload(amr->amr_dmat, amr->amr_dmamap);
532 1.9 ad if ((fl & AMRF_DMA_MAP) != 0)
533 1.44 christos bus_dmamem_unmap(amr->amr_dmat, (void *)amr->amr_mbox,
534 1.9 ad amr->amr_dmasize);
535 1.9 ad if ((fl & AMRF_DMA_ALLOC) != 0)
536 1.9 ad bus_dmamem_free(amr->amr_dmat, &amr->amr_dmaseg, 1);
537 1.9 ad if ((fl & AMRF_DMA_CREATE) != 0)
538 1.9 ad bus_dmamap_destroy(amr->amr_dmat, amr->amr_dmamap);
539 1.9 ad if ((fl & AMRF_PCI_INTR) != 0)
540 1.9 ad pci_intr_disestablish(amr->amr_pc, amr->amr_ih);
541 1.9 ad if ((fl & AMRF_PCI_REGS) != 0)
542 1.11 fvdl bus_space_unmap(amr->amr_iot, amr->amr_ioh, amr->amr_ios);
543 1.1 ad }
544 1.1 ad
545 1.1 ad /*
546 1.1 ad * Print autoconfiguration message for a sub-device.
547 1.1 ad */
548 1.27 thorpej static int
549 1.1 ad amr_print(void *aux, const char *pnp)
550 1.1 ad {
551 1.1 ad struct amr_attach_args *amra;
552 1.1 ad
553 1.1 ad amra = (struct amr_attach_args *)aux;
554 1.1 ad
555 1.1 ad if (pnp != NULL)
556 1.7 thorpej aprint_normal("block device at %s", pnp);
557 1.7 thorpej aprint_normal(" unit %d", amra->amra_unit);
558 1.1 ad return (UNCONF);
559 1.1 ad }
560 1.1 ad
561 1.1 ad /*
562 1.1 ad * Retrieve operational parameters and describe the controller.
563 1.1 ad */
564 1.27 thorpej static int
565 1.1 ad amr_init(struct amr_softc *amr, const char *intrstr,
566 1.1 ad struct pci_attach_args *pa)
567 1.1 ad {
568 1.9 ad struct amr_adapter_info *aa;
569 1.1 ad struct amr_prodinfo *ap;
570 1.1 ad struct amr_enquiry *ae;
571 1.1 ad struct amr_enquiry3 *aex;
572 1.1 ad const char *prodstr;
573 1.9 ad u_int i, sig, ishp;
574 1.26 christos char sbuf[64];
575 1.1 ad
576 1.1 ad /*
577 1.1 ad * Try to get 40LD product info, which tells us what the card is
578 1.1 ad * labelled as.
579 1.1 ad */
580 1.9 ad ap = amr_enquire(amr, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0,
581 1.9 ad amr->amr_enqbuf);
582 1.1 ad if (ap != NULL) {
583 1.8 thorpej aprint_normal("<%.80s>\n", ap->ap_product);
584 1.1 ad if (intrstr != NULL)
585 1.55 jakllsch aprint_normal_dev(amr->amr_dv, "interrupting at %s\n",
586 1.47 cegger intrstr);
587 1.55 jakllsch aprint_normal_dev(amr->amr_dv, "firmware %.16s, BIOS %.16s, %dMB RAM\n",
588 1.47 cegger ap->ap_firmware, ap->ap_bios,
589 1.1 ad le16toh(ap->ap_memsize));
590 1.1 ad
591 1.1 ad amr->amr_maxqueuecnt = ap->ap_maxio;
592 1.1 ad
593 1.1 ad /*
594 1.1 ad * Fetch and record state of logical drives.
595 1.1 ad */
596 1.1 ad aex = amr_enquire(amr, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3,
597 1.9 ad AMR_CONFIG_ENQ3_SOLICITED_FULL, amr->amr_enqbuf);
598 1.1 ad if (aex == NULL) {
599 1.55 jakllsch aprint_error_dev(amr->amr_dv, "ENQUIRY3 failed\n");
600 1.1 ad return (-1);
601 1.1 ad }
602 1.1 ad
603 1.32 christos if (aex->ae_numldrives > __arraycount(aex->ae_drivestate)) {
604 1.55 jakllsch aprint_error_dev(amr->amr_dv, "Inquiry returned more drives (%d)"
605 1.34 elad " than the array can handle (%zu)\n",
606 1.47 cegger aex->ae_numldrives,
607 1.32 christos __arraycount(aex->ae_drivestate));
608 1.32 christos aex->ae_numldrives = __arraycount(aex->ae_drivestate);
609 1.32 christos }
610 1.1 ad if (aex->ae_numldrives > AMR_MAX_UNITS) {
611 1.55 jakllsch aprint_error_dev(amr->amr_dv,
612 1.47 cegger "adjust AMR_MAX_UNITS to %d (currently %d)"
613 1.47 cegger "\n", AMR_MAX_UNITS,
614 1.17 christos amr->amr_numdrives);
615 1.1 ad amr->amr_numdrives = AMR_MAX_UNITS;
616 1.1 ad } else
617 1.1 ad amr->amr_numdrives = aex->ae_numldrives;
618 1.1 ad
619 1.1 ad for (i = 0; i < amr->amr_numdrives; i++) {
620 1.1 ad amr->amr_drive[i].al_size =
621 1.1 ad le32toh(aex->ae_drivesize[i]);
622 1.1 ad amr->amr_drive[i].al_state = aex->ae_drivestate[i];
623 1.1 ad amr->amr_drive[i].al_properties = aex->ae_driveprop[i];
624 1.1 ad }
625 1.1 ad
626 1.1 ad return (0);
627 1.1 ad }
628 1.1 ad
629 1.1 ad /*
630 1.1 ad * Try 8LD extended ENQUIRY to get the controller signature. Once
631 1.1 ad * found, search for a product description.
632 1.1 ad */
633 1.9 ad ae = amr_enquire(amr, AMR_CMD_EXT_ENQUIRY2, 0, 0, amr->amr_enqbuf);
634 1.9 ad if (ae != NULL) {
635 1.1 ad i = 0;
636 1.1 ad sig = le32toh(ae->ae_signature);
637 1.1 ad
638 1.1 ad while (i < sizeof(amr_typestr) / sizeof(amr_typestr[0])) {
639 1.1 ad if (amr_typestr[i].at_sig == sig)
640 1.1 ad break;
641 1.1 ad i++;
642 1.1 ad }
643 1.1 ad if (i == sizeof(amr_typestr) / sizeof(amr_typestr[0])) {
644 1.26 christos snprintf(sbuf, sizeof(sbuf),
645 1.20 itojun "unknown ENQUIRY2 sig (0x%08x)", sig);
646 1.26 christos prodstr = sbuf;
647 1.1 ad } else
648 1.1 ad prodstr = amr_typestr[i].at_str;
649 1.1 ad } else {
650 1.9 ad ae = amr_enquire(amr, AMR_CMD_ENQUIRY, 0, 0, amr->amr_enqbuf);
651 1.9 ad if (ae == NULL) {
652 1.55 jakllsch aprint_error_dev(amr->amr_dv, "unsupported controller\n");
653 1.1 ad return (-1);
654 1.1 ad }
655 1.1 ad
656 1.1 ad switch (PCI_PRODUCT(pa->pa_id)) {
657 1.1 ad case PCI_PRODUCT_AMI_MEGARAID:
658 1.1 ad prodstr = "Series 428";
659 1.1 ad break;
660 1.1 ad case PCI_PRODUCT_AMI_MEGARAID2:
661 1.1 ad prodstr = "Series 434";
662 1.1 ad break;
663 1.1 ad default:
664 1.26 christos snprintf(sbuf, sizeof(sbuf), "unknown PCI dev (0x%04x)",
665 1.1 ad PCI_PRODUCT(pa->pa_id));
666 1.26 christos prodstr = sbuf;
667 1.1 ad break;
668 1.1 ad }
669 1.1 ad }
670 1.1 ad
671 1.9 ad /*
672 1.9 ad * HP NetRaid controllers have a special encoding of the firmware
673 1.9 ad * and BIOS versions. The AMI version seems to have it as strings
674 1.9 ad * whereas the HP version does it with a leading uppercase character
675 1.9 ad * and two binary numbers.
676 1.9 ad */
677 1.9 ad aa = &ae->ae_adapter;
678 1.9 ad
679 1.9 ad if (aa->aa_firmware[2] >= 'A' && aa->aa_firmware[2] <= 'Z' &&
680 1.9 ad aa->aa_firmware[1] < ' ' && aa->aa_firmware[0] < ' ' &&
681 1.9 ad aa->aa_bios[2] >= 'A' && aa->aa_bios[2] <= 'Z' &&
682 1.9 ad aa->aa_bios[1] < ' ' && aa->aa_bios[0] < ' ') {
683 1.9 ad if (le32toh(ae->ae_signature) == AMR_SIG_438) {
684 1.9 ad /* The AMI 438 is a NetRaid 3si in HP-land. */
685 1.9 ad prodstr = "HP NetRaid 3si";
686 1.9 ad }
687 1.9 ad ishp = 1;
688 1.9 ad } else
689 1.9 ad ishp = 0;
690 1.9 ad
691 1.8 thorpej aprint_normal("<%s>\n", prodstr);
692 1.1 ad if (intrstr != NULL)
693 1.55 jakllsch aprint_normal_dev(amr->amr_dv, "interrupting at %s\n",
694 1.1 ad intrstr);
695 1.1 ad
696 1.9 ad if (ishp)
697 1.55 jakllsch aprint_normal_dev(amr->amr_dv, "firmware <%c.%02d.%02d>, BIOS <%c.%02d.%02d>"
698 1.47 cegger ", %dMB RAM\n", aa->aa_firmware[2],
699 1.9 ad aa->aa_firmware[1], aa->aa_firmware[0], aa->aa_bios[2],
700 1.9 ad aa->aa_bios[1], aa->aa_bios[0], aa->aa_memorysize);
701 1.9 ad else
702 1.55 jakllsch aprint_normal_dev(amr->amr_dv, "firmware <%.4s>, BIOS <%.4s>, %dMB RAM\n",
703 1.47 cegger aa->aa_firmware, aa->aa_bios,
704 1.9 ad aa->aa_memorysize);
705 1.9 ad
706 1.9 ad amr->amr_maxqueuecnt = aa->aa_maxio;
707 1.1 ad
708 1.1 ad /*
709 1.1 ad * Record state of logical drives.
710 1.1 ad */
711 1.32 christos if (ae->ae_ldrv.al_numdrives > __arraycount(ae->ae_ldrv.al_size)) {
712 1.55 jakllsch aprint_error_dev(amr->amr_dv, "Inquiry returned more drives (%d)"
713 1.34 elad " than the array can handle (%zu)\n",
714 1.47 cegger ae->ae_ldrv.al_numdrives,
715 1.32 christos __arraycount(ae->ae_ldrv.al_size));
716 1.32 christos ae->ae_ldrv.al_numdrives = __arraycount(ae->ae_ldrv.al_size);
717 1.32 christos }
718 1.1 ad if (ae->ae_ldrv.al_numdrives > AMR_MAX_UNITS) {
719 1.55 jakllsch aprint_error_dev(amr->amr_dv, "adjust AMR_MAX_UNITS to %d (currently %d)\n",
720 1.47 cegger ae->ae_ldrv.al_numdrives,
721 1.1 ad AMR_MAX_UNITS);
722 1.1 ad amr->amr_numdrives = AMR_MAX_UNITS;
723 1.1 ad } else
724 1.1 ad amr->amr_numdrives = ae->ae_ldrv.al_numdrives;
725 1.1 ad
726 1.32 christos for (i = 0; i < amr->amr_numdrives; i++) {
727 1.1 ad amr->amr_drive[i].al_size = le32toh(ae->ae_ldrv.al_size[i]);
728 1.1 ad amr->amr_drive[i].al_state = ae->ae_ldrv.al_state[i];
729 1.1 ad amr->amr_drive[i].al_properties = ae->ae_ldrv.al_properties[i];
730 1.1 ad }
731 1.1 ad
732 1.1 ad return (0);
733 1.1 ad }
734 1.1 ad
735 1.1 ad /*
736 1.1 ad * Flush the internal cache on each configured controller. Called at
737 1.1 ad * shutdown time.
738 1.1 ad */
739 1.27 thorpej static void
740 1.41 christos amr_shutdown(void *cookie)
741 1.1 ad {
742 1.36 bouyer extern struct cfdriver amr_cd;
743 1.1 ad struct amr_softc *amr;
744 1.1 ad struct amr_ccb *ac;
745 1.9 ad int i, rv, s;
746 1.1 ad
747 1.1 ad for (i = 0; i < amr_cd.cd_ndevs; i++) {
748 1.49 tsutsui if ((amr = device_lookup_private(&amr_cd, i)) == NULL)
749 1.1 ad continue;
750 1.1 ad
751 1.1 ad if ((rv = amr_ccb_alloc(amr, &ac)) == 0) {
752 1.9 ad ac->ac_cmd.mb_command = AMR_CMD_FLUSH;
753 1.9 ad s = splbio();
754 1.1 ad rv = amr_ccb_poll(amr, ac, 30000);
755 1.9 ad splx(s);
756 1.1 ad amr_ccb_free(amr, ac);
757 1.1 ad }
758 1.1 ad if (rv != 0)
759 1.55 jakllsch aprint_error_dev(amr->amr_dv, "unable to flush cache (%d)\n", rv);
760 1.1 ad }
761 1.1 ad }
762 1.1 ad
763 1.1 ad /*
764 1.1 ad * Interrupt service routine.
765 1.1 ad */
766 1.27 thorpej static int
767 1.1 ad amr_intr(void *cookie)
768 1.1 ad {
769 1.1 ad struct amr_softc *amr;
770 1.1 ad struct amr_ccb *ac;
771 1.9 ad struct amr_mailbox_resp mbox;
772 1.1 ad u_int i, forus, idx;
773 1.1 ad
774 1.1 ad amr = cookie;
775 1.1 ad forus = 0;
776 1.1 ad
777 1.1 ad while ((*amr->amr_get_work)(amr, &mbox) == 0) {
778 1.1 ad /* Iterate over completed commands in this result. */
779 1.1 ad for (i = 0; i < mbox.mb_nstatus; i++) {
780 1.1 ad idx = mbox.mb_completed[i] - 1;
781 1.1 ad ac = amr->amr_ccbs + idx;
782 1.1 ad
783 1.1 ad if (idx >= amr->amr_maxqueuecnt) {
784 1.1 ad printf("%s: bad status (bogus ID: %u=%u)\n",
785 1.55 jakllsch device_xname(amr->amr_dv), i, idx);
786 1.1 ad continue;
787 1.1 ad }
788 1.1 ad
789 1.1 ad if ((ac->ac_flags & AC_ACTIVE) == 0) {
790 1.1 ad printf("%s: bad status (not active; 0x04%x)\n",
791 1.55 jakllsch device_xname(amr->amr_dv), ac->ac_flags);
792 1.1 ad continue;
793 1.1 ad }
794 1.1 ad
795 1.1 ad ac->ac_status = mbox.mb_status;
796 1.1 ad ac->ac_flags = (ac->ac_flags & ~AC_ACTIVE) |
797 1.1 ad AC_COMPLETE;
798 1.10 ad TAILQ_REMOVE(&amr->amr_ccb_active, ac, ac_chain.tailq);
799 1.10 ad
800 1.10 ad if ((ac->ac_flags & AC_MOAN) != 0)
801 1.10 ad printf("%s: ccb %d completed\n",
802 1.55 jakllsch device_xname(amr->amr_dv), ac->ac_ident);
803 1.1 ad
804 1.1 ad /* Pass notification to upper layers. */
805 1.1 ad if (ac->ac_handler != NULL)
806 1.1 ad (*ac->ac_handler)(ac);
807 1.9 ad else
808 1.9 ad wakeup(ac);
809 1.1 ad }
810 1.1 ad forus = 1;
811 1.1 ad }
812 1.1 ad
813 1.1 ad if (forus)
814 1.1 ad amr_ccb_enqueue(amr, NULL);
815 1.9 ad
816 1.1 ad return (forus);
817 1.1 ad }
818 1.1 ad
819 1.1 ad /*
820 1.9 ad * Watchdog thread.
821 1.9 ad */
822 1.27 thorpej static void
823 1.9 ad amr_thread(void *cookie)
824 1.9 ad {
825 1.9 ad struct amr_softc *amr;
826 1.9 ad struct amr_ccb *ac;
827 1.9 ad struct amr_logdrive *al;
828 1.9 ad struct amr_enquiry *ae;
829 1.9 ad int rv, i, s;
830 1.9 ad
831 1.9 ad amr = cookie;
832 1.9 ad ae = amr->amr_enqbuf;
833 1.9 ad
834 1.9 ad for (;;) {
835 1.9 ad tsleep(amr_thread, PWAIT, "amrwdog", AMR_WDOG_TICKS);
836 1.9 ad
837 1.9 ad if ((amr->amr_flags & AMRF_THREAD_EXIT) != 0) {
838 1.9 ad amr->amr_flags ^= AMRF_THREAD_EXIT;
839 1.9 ad wakeup(&amr->amr_flags);
840 1.9 ad kthread_exit(0);
841 1.9 ad }
842 1.9 ad
843 1.9 ad s = splbio();
844 1.9 ad amr_intr(cookie);
845 1.13 ad ac = TAILQ_FIRST(&amr->amr_ccb_active);
846 1.13 ad while (ac != NULL) {
847 1.35 kardel if (ac->ac_start_time + AMR_TIMEOUT > time_uptime)
848 1.10 ad break;
849 1.10 ad if ((ac->ac_flags & AC_MOAN) == 0) {
850 1.10 ad printf("%s: ccb %d timed out; mailbox:\n",
851 1.55 jakllsch device_xname(amr->amr_dv), ac->ac_ident);
852 1.10 ad amr_ccb_dump(amr, ac);
853 1.10 ad ac->ac_flags |= AC_MOAN;
854 1.10 ad }
855 1.13 ad ac = TAILQ_NEXT(ac, ac_chain.tailq);
856 1.10 ad }
857 1.9 ad splx(s);
858 1.9 ad
859 1.9 ad if ((rv = amr_ccb_alloc(amr, &ac)) != 0) {
860 1.9 ad printf("%s: ccb_alloc failed (%d)\n",
861 1.55 jakllsch device_xname(amr->amr_dv), rv);
862 1.9 ad continue;
863 1.9 ad }
864 1.9 ad
865 1.9 ad ac->ac_cmd.mb_command = AMR_CMD_ENQUIRY;
866 1.9 ad
867 1.9 ad rv = amr_ccb_map(amr, ac, amr->amr_enqbuf,
868 1.36 bouyer AMR_ENQUIRY_BUFSIZE, AC_XFER_IN);
869 1.9 ad if (rv != 0) {
870 1.55 jakllsch aprint_error_dev(amr->amr_dv, "ccb_map failed (%d)\n",
871 1.47 cegger rv);
872 1.9 ad amr_ccb_free(amr, ac);
873 1.9 ad continue;
874 1.9 ad }
875 1.9 ad
876 1.9 ad rv = amr_ccb_wait(amr, ac);
877 1.9 ad amr_ccb_unmap(amr, ac);
878 1.9 ad if (rv != 0) {
879 1.55 jakllsch aprint_error_dev(amr->amr_dv, "enquiry failed (st=%d)\n",
880 1.47 cegger ac->ac_status);
881 1.9 ad continue;
882 1.9 ad }
883 1.9 ad amr_ccb_free(amr, ac);
884 1.9 ad
885 1.9 ad al = amr->amr_drive;
886 1.32 christos for (i = 0; i < __arraycount(ae->ae_ldrv.al_state); i++, al++) {
887 1.9 ad if (al->al_dv == NULL)
888 1.9 ad continue;
889 1.9 ad if (al->al_state == ae->ae_ldrv.al_state[i])
890 1.9 ad continue;
891 1.9 ad
892 1.9 ad printf("%s: state changed: %s -> %s\n",
893 1.47 cegger device_xname(al->al_dv),
894 1.9 ad amr_drive_state(al->al_state, NULL),
895 1.9 ad amr_drive_state(ae->ae_ldrv.al_state[i], NULL));
896 1.9 ad
897 1.9 ad al->al_state = ae->ae_ldrv.al_state[i];
898 1.9 ad }
899 1.9 ad }
900 1.9 ad }
901 1.9 ad
902 1.9 ad /*
903 1.9 ad * Return a text description of a logical drive's current state.
904 1.9 ad */
905 1.9 ad const char *
906 1.9 ad amr_drive_state(int state, int *happy)
907 1.9 ad {
908 1.9 ad const char *str;
909 1.9 ad
910 1.9 ad state = AMR_DRV_CURSTATE(state);
911 1.9 ad if (state >= sizeof(amr_dstate) / sizeof(amr_dstate[0])) {
912 1.9 ad if (happy)
913 1.9 ad *happy = 1;
914 1.9 ad str = "status unknown";
915 1.9 ad } else {
916 1.9 ad if (happy)
917 1.9 ad *happy = amr_dstate[state].ds_happy;
918 1.9 ad str = amr_dstate[state].ds_descr;
919 1.9 ad }
920 1.9 ad
921 1.9 ad return (str);
922 1.9 ad }
923 1.9 ad
924 1.9 ad /*
925 1.1 ad * Run a generic enquiry-style command.
926 1.1 ad */
927 1.27 thorpej static void *
928 1.1 ad amr_enquire(struct amr_softc *amr, u_int8_t cmd, u_int8_t cmdsub,
929 1.26 christos u_int8_t cmdqual, void *sbuf)
930 1.1 ad {
931 1.1 ad struct amr_ccb *ac;
932 1.1 ad u_int8_t *mb;
933 1.1 ad int rv;
934 1.1 ad
935 1.1 ad if (amr_ccb_alloc(amr, &ac) != 0)
936 1.1 ad return (NULL);
937 1.1 ad
938 1.1 ad /* Build the command proper. */
939 1.9 ad mb = (u_int8_t *)&ac->ac_cmd;
940 1.1 ad mb[0] = cmd;
941 1.1 ad mb[2] = cmdsub;
942 1.1 ad mb[3] = cmdqual;
943 1.1 ad
944 1.36 bouyer rv = amr_ccb_map(amr, ac, sbuf, AMR_ENQUIRY_BUFSIZE, AC_XFER_IN);
945 1.9 ad if (rv == 0) {
946 1.1 ad rv = amr_ccb_poll(amr, ac, 2000);
947 1.1 ad amr_ccb_unmap(amr, ac);
948 1.1 ad }
949 1.1 ad amr_ccb_free(amr, ac);
950 1.1 ad
951 1.26 christos return (rv ? NULL : sbuf);
952 1.1 ad }
953 1.1 ad
954 1.1 ad /*
955 1.1 ad * Allocate and initialise a CCB.
956 1.1 ad */
957 1.1 ad int
958 1.1 ad amr_ccb_alloc(struct amr_softc *amr, struct amr_ccb **acp)
959 1.1 ad {
960 1.1 ad int s;
961 1.1 ad
962 1.1 ad s = splbio();
963 1.9 ad if ((*acp = SLIST_FIRST(&amr->amr_ccb_freelist)) == NULL) {
964 1.1 ad splx(s);
965 1.1 ad return (EAGAIN);
966 1.1 ad }
967 1.1 ad SLIST_REMOVE_HEAD(&amr->amr_ccb_freelist, ac_chain.slist);
968 1.1 ad splx(s);
969 1.1 ad
970 1.1 ad return (0);
971 1.1 ad }
972 1.1 ad
973 1.1 ad /*
974 1.1 ad * Free a CCB.
975 1.1 ad */
976 1.1 ad void
977 1.1 ad amr_ccb_free(struct amr_softc *amr, struct amr_ccb *ac)
978 1.1 ad {
979 1.1 ad int s;
980 1.1 ad
981 1.9 ad memset(&ac->ac_cmd, 0, sizeof(ac->ac_cmd));
982 1.9 ad ac->ac_cmd.mb_ident = ac->ac_ident + 1;
983 1.9 ad ac->ac_cmd.mb_busy = 1;
984 1.9 ad ac->ac_handler = NULL;
985 1.1 ad ac->ac_flags = 0;
986 1.1 ad
987 1.1 ad s = splbio();
988 1.1 ad SLIST_INSERT_HEAD(&amr->amr_ccb_freelist, ac, ac_chain.slist);
989 1.1 ad splx(s);
990 1.1 ad }
991 1.1 ad
992 1.1 ad /*
993 1.1 ad * If a CCB is specified, enqueue it. Pull CCBs off the software queue in
994 1.1 ad * the order that they were enqueued and try to submit their command blocks
995 1.1 ad * to the controller for execution.
996 1.1 ad */
997 1.1 ad void
998 1.1 ad amr_ccb_enqueue(struct amr_softc *amr, struct amr_ccb *ac)
999 1.1 ad {
1000 1.1 ad int s;
1001 1.1 ad
1002 1.1 ad s = splbio();
1003 1.1 ad
1004 1.1 ad if (ac != NULL)
1005 1.1 ad SIMPLEQ_INSERT_TAIL(&amr->amr_ccb_queue, ac, ac_chain.simpleq);
1006 1.1 ad
1007 1.1 ad while ((ac = SIMPLEQ_FIRST(&amr->amr_ccb_queue)) != NULL) {
1008 1.1 ad if ((*amr->amr_submit)(amr, ac) != 0)
1009 1.1 ad break;
1010 1.2 lukem SIMPLEQ_REMOVE_HEAD(&amr->amr_ccb_queue, ac_chain.simpleq);
1011 1.10 ad TAILQ_INSERT_TAIL(&amr->amr_ccb_active, ac, ac_chain.tailq);
1012 1.1 ad }
1013 1.1 ad
1014 1.1 ad splx(s);
1015 1.1 ad }
1016 1.1 ad
1017 1.1 ad /*
1018 1.1 ad * Map the specified CCB's data buffer onto the bus, and fill the
1019 1.1 ad * scatter-gather list.
1020 1.1 ad */
1021 1.1 ad int
1022 1.1 ad amr_ccb_map(struct amr_softc *amr, struct amr_ccb *ac, void *data, int size,
1023 1.36 bouyer int tflag)
1024 1.1 ad {
1025 1.1 ad struct amr_sgentry *sge;
1026 1.9 ad struct amr_mailbox_cmd *mb;
1027 1.1 ad int nsegs, i, rv, sgloff;
1028 1.1 ad bus_dmamap_t xfer;
1029 1.36 bouyer int dmaflag = 0;
1030 1.1 ad
1031 1.1 ad xfer = ac->ac_xfer_map;
1032 1.1 ad
1033 1.1 ad rv = bus_dmamap_load(amr->amr_dmat, xfer, data, size, NULL,
1034 1.1 ad BUS_DMA_NOWAIT);
1035 1.1 ad if (rv != 0)
1036 1.1 ad return (rv);
1037 1.1 ad
1038 1.9 ad mb = &ac->ac_cmd;
1039 1.1 ad ac->ac_xfer_size = size;
1040 1.36 bouyer ac->ac_flags |= (tflag & (AC_XFER_OUT | AC_XFER_IN));
1041 1.1 ad sgloff = AMR_SGL_SIZE * ac->ac_ident;
1042 1.1 ad
1043 1.36 bouyer if (tflag & AC_XFER_OUT)
1044 1.36 bouyer dmaflag |= BUS_DMASYNC_PREWRITE;
1045 1.36 bouyer if (tflag & AC_XFER_IN)
1046 1.36 bouyer dmaflag |= BUS_DMASYNC_PREREAD;
1047 1.36 bouyer
1048 1.1 ad /* We don't need to use a scatter/gather list for just 1 segment. */
1049 1.1 ad nsegs = xfer->dm_nsegs;
1050 1.1 ad if (nsegs == 1) {
1051 1.1 ad mb->mb_nsgelem = 0;
1052 1.1 ad mb->mb_physaddr = htole32(xfer->dm_segs[0].ds_addr);
1053 1.1 ad ac->ac_flags |= AC_NOSGL;
1054 1.1 ad } else {
1055 1.1 ad mb->mb_nsgelem = nsegs;
1056 1.1 ad mb->mb_physaddr = htole32(amr->amr_sgls_paddr + sgloff);
1057 1.1 ad
1058 1.44 christos sge = (struct amr_sgentry *)((char *)amr->amr_sgls + sgloff);
1059 1.1 ad for (i = 0; i < nsegs; i++, sge++) {
1060 1.1 ad sge->sge_addr = htole32(xfer->dm_segs[i].ds_addr);
1061 1.1 ad sge->sge_count = htole32(xfer->dm_segs[i].ds_len);
1062 1.1 ad }
1063 1.1 ad }
1064 1.1 ad
1065 1.36 bouyer bus_dmamap_sync(amr->amr_dmat, xfer, 0, ac->ac_xfer_size, dmaflag);
1066 1.1 ad
1067 1.1 ad if ((ac->ac_flags & AC_NOSGL) == 0)
1068 1.1 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, sgloff,
1069 1.1 ad AMR_SGL_SIZE, BUS_DMASYNC_PREWRITE);
1070 1.1 ad
1071 1.1 ad return (0);
1072 1.1 ad }
1073 1.1 ad
1074 1.1 ad /*
1075 1.1 ad * Unmap the specified CCB's data buffer.
1076 1.1 ad */
1077 1.1 ad void
1078 1.1 ad amr_ccb_unmap(struct amr_softc *amr, struct amr_ccb *ac)
1079 1.1 ad {
1080 1.36 bouyer int dmaflag = 0;
1081 1.36 bouyer
1082 1.36 bouyer if (ac->ac_flags & AC_XFER_IN)
1083 1.36 bouyer dmaflag |= BUS_DMASYNC_POSTREAD;
1084 1.36 bouyer if (ac->ac_flags & AC_XFER_OUT)
1085 1.36 bouyer dmaflag |= BUS_DMASYNC_POSTWRITE;
1086 1.1 ad
1087 1.1 ad if ((ac->ac_flags & AC_NOSGL) == 0)
1088 1.1 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap,
1089 1.1 ad AMR_SGL_SIZE * ac->ac_ident, AMR_SGL_SIZE,
1090 1.1 ad BUS_DMASYNC_POSTWRITE);
1091 1.1 ad bus_dmamap_sync(amr->amr_dmat, ac->ac_xfer_map, 0, ac->ac_xfer_size,
1092 1.36 bouyer dmaflag);
1093 1.1 ad bus_dmamap_unload(amr->amr_dmat, ac->ac_xfer_map);
1094 1.1 ad }
1095 1.1 ad
1096 1.1 ad /*
1097 1.1 ad * Submit a command to the controller and poll on completion. Return
1098 1.1 ad * non-zero on timeout or error. Must be called with interrupts blocked.
1099 1.1 ad */
1100 1.1 ad int
1101 1.1 ad amr_ccb_poll(struct amr_softc *amr, struct amr_ccb *ac, int timo)
1102 1.1 ad {
1103 1.1 ad int rv;
1104 1.1 ad
1105 1.1 ad if ((rv = (*amr->amr_submit)(amr, ac)) != 0)
1106 1.1 ad return (rv);
1107 1.10 ad TAILQ_INSERT_TAIL(&amr->amr_ccb_active, ac, ac_chain.tailq);
1108 1.1 ad
1109 1.1 ad for (timo *= 10; timo != 0; timo--) {
1110 1.1 ad amr_intr(amr);
1111 1.1 ad if ((ac->ac_flags & AC_COMPLETE) != 0)
1112 1.1 ad break;
1113 1.1 ad DELAY(100);
1114 1.1 ad }
1115 1.1 ad
1116 1.1 ad return (timo == 0 || ac->ac_status != 0 ? EIO : 0);
1117 1.1 ad }
1118 1.1 ad
1119 1.1 ad /*
1120 1.9 ad * Submit a command to the controller and sleep on completion. Return
1121 1.9 ad * non-zero on error.
1122 1.9 ad */
1123 1.9 ad int
1124 1.9 ad amr_ccb_wait(struct amr_softc *amr, struct amr_ccb *ac)
1125 1.9 ad {
1126 1.9 ad int s;
1127 1.9 ad
1128 1.9 ad s = splbio();
1129 1.9 ad amr_ccb_enqueue(amr, ac);
1130 1.25 perry tsleep(ac, PRIBIO, "amrcmd", 0);
1131 1.9 ad splx(s);
1132 1.9 ad
1133 1.9 ad return (ac->ac_status != 0 ? EIO : 0);
1134 1.9 ad }
1135 1.9 ad
1136 1.27 thorpej #if 0
1137 1.9 ad /*
1138 1.1 ad * Wait for the mailbox to become available.
1139 1.1 ad */
1140 1.27 thorpej static int
1141 1.1 ad amr_mbox_wait(struct amr_softc *amr)
1142 1.1 ad {
1143 1.1 ad int timo;
1144 1.1 ad
1145 1.1 ad for (timo = 10000; timo != 0; timo--) {
1146 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1147 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_POSTREAD);
1148 1.9 ad if (amr->amr_mbox->mb_cmd.mb_busy == 0)
1149 1.1 ad break;
1150 1.1 ad DELAY(100);
1151 1.1 ad }
1152 1.1 ad
1153 1.9 ad if (timo == 0)
1154 1.55 jakllsch printf("%s: controller wedged\n", device_xname(amr->amr_dv));
1155 1.1 ad
1156 1.9 ad return (timo != 0 ? 0 : EAGAIN);
1157 1.1 ad }
1158 1.27 thorpej #endif
1159 1.1 ad
1160 1.1 ad /*
1161 1.1 ad * Tell the controller that the mailbox contains a valid command. Must be
1162 1.1 ad * called with interrupts blocked.
1163 1.1 ad */
1164 1.27 thorpej static int
1165 1.1 ad amr_quartz_submit(struct amr_softc *amr, struct amr_ccb *ac)
1166 1.1 ad {
1167 1.1 ad u_int32_t v;
1168 1.1 ad
1169 1.9 ad amr->amr_mbox->mb_poll = 0;
1170 1.9 ad amr->amr_mbox->mb_ack = 0;
1171 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1172 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_PREWRITE);
1173 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1174 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_POSTREAD);
1175 1.9 ad if (amr->amr_mbox->mb_cmd.mb_busy != 0)
1176 1.9 ad return (EAGAIN);
1177 1.9 ad
1178 1.1 ad v = amr_inl(amr, AMR_QREG_IDB);
1179 1.13 ad if ((v & AMR_QIDB_SUBMIT) != 0) {
1180 1.9 ad amr->amr_mbox->mb_cmd.mb_busy = 0;
1181 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1182 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_PREWRITE);
1183 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1184 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_PREREAD);
1185 1.9 ad return (EAGAIN);
1186 1.9 ad }
1187 1.1 ad
1188 1.10 ad amr->amr_mbox->mb_segment = 0;
1189 1.10 ad memcpy(&amr->amr_mbox->mb_cmd, &ac->ac_cmd, sizeof(ac->ac_cmd));
1190 1.10 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1191 1.10 ad sizeof(struct amr_mailbox), BUS_DMASYNC_PREWRITE);
1192 1.10 ad
1193 1.35 kardel ac->ac_start_time = time_uptime;
1194 1.1 ad ac->ac_flags |= AC_ACTIVE;
1195 1.13 ad amr_outl(amr, AMR_QREG_IDB,
1196 1.13 ad (amr->amr_mbox_paddr + 16) | AMR_QIDB_SUBMIT);
1197 1.1 ad return (0);
1198 1.1 ad }
1199 1.1 ad
1200 1.27 thorpej static int
1201 1.1 ad amr_std_submit(struct amr_softc *amr, struct amr_ccb *ac)
1202 1.1 ad {
1203 1.1 ad
1204 1.9 ad amr->amr_mbox->mb_poll = 0;
1205 1.9 ad amr->amr_mbox->mb_ack = 0;
1206 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1207 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_PREWRITE);
1208 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1209 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_POSTREAD);
1210 1.9 ad if (amr->amr_mbox->mb_cmd.mb_busy != 0)
1211 1.9 ad return (EAGAIN);
1212 1.9 ad
1213 1.9 ad if ((amr_inb(amr, AMR_SREG_MBOX_BUSY) & AMR_SMBOX_BUSY_FLAG) != 0) {
1214 1.9 ad amr->amr_mbox->mb_cmd.mb_busy = 0;
1215 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1216 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_PREWRITE);
1217 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1218 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_PREREAD);
1219 1.9 ad return (EAGAIN);
1220 1.9 ad }
1221 1.1 ad
1222 1.10 ad amr->amr_mbox->mb_segment = 0;
1223 1.10 ad memcpy(&amr->amr_mbox->mb_cmd, &ac->ac_cmd, sizeof(ac->ac_cmd));
1224 1.10 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1225 1.10 ad sizeof(struct amr_mailbox), BUS_DMASYNC_PREWRITE);
1226 1.10 ad
1227 1.35 kardel ac->ac_start_time = time_uptime;
1228 1.1 ad ac->ac_flags |= AC_ACTIVE;
1229 1.1 ad amr_outb(amr, AMR_SREG_CMD, AMR_SCMD_POST);
1230 1.1 ad return (0);
1231 1.1 ad }
1232 1.1 ad
1233 1.1 ad /*
1234 1.1 ad * Claim any work that the controller has completed; acknowledge completion,
1235 1.1 ad * save details of the completion in (mbsave). Must be called with
1236 1.1 ad * interrupts blocked.
1237 1.1 ad */
1238 1.27 thorpej static int
1239 1.9 ad amr_quartz_get_work(struct amr_softc *amr, struct amr_mailbox_resp *mbsave)
1240 1.1 ad {
1241 1.1 ad
1242 1.1 ad /* Work waiting for us? */
1243 1.1 ad if (amr_inl(amr, AMR_QREG_ODB) != AMR_QODB_READY)
1244 1.1 ad return (-1);
1245 1.1 ad
1246 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1247 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_POSTREAD);
1248 1.9 ad
1249 1.1 ad /* Save the mailbox, which contains a list of completed commands. */
1250 1.9 ad memcpy(mbsave, &amr->amr_mbox->mb_resp, sizeof(*mbsave));
1251 1.9 ad
1252 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1253 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_PREREAD);
1254 1.1 ad
1255 1.1 ad /* Ack the interrupt and mailbox transfer. */
1256 1.1 ad amr_outl(amr, AMR_QREG_ODB, AMR_QODB_READY);
1257 1.9 ad amr_outl(amr, AMR_QREG_IDB, (amr->amr_mbox_paddr+16) | AMR_QIDB_ACK);
1258 1.1 ad
1259 1.1 ad /*
1260 1.1 ad * This waits for the controller to notice that we've taken the
1261 1.1 ad * command from it. It's very inefficient, and we shouldn't do it,
1262 1.1 ad * but if we remove this code, we stop completing commands under
1263 1.1 ad * load.
1264 1.1 ad *
1265 1.1 ad * Peter J says we shouldn't do this. The documentation says we
1266 1.1 ad * should. Who is right?
1267 1.1 ad */
1268 1.1 ad while ((amr_inl(amr, AMR_QREG_IDB) & AMR_QIDB_ACK) != 0)
1269 1.13 ad DELAY(10);
1270 1.1 ad
1271 1.1 ad return (0);
1272 1.1 ad }
1273 1.1 ad
1274 1.27 thorpej static int
1275 1.9 ad amr_std_get_work(struct amr_softc *amr, struct amr_mailbox_resp *mbsave)
1276 1.1 ad {
1277 1.1 ad u_int8_t istat;
1278 1.1 ad
1279 1.1 ad /* Check for valid interrupt status. */
1280 1.1 ad if (((istat = amr_inb(amr, AMR_SREG_INTR)) & AMR_SINTR_VALID) == 0)
1281 1.1 ad return (-1);
1282 1.1 ad
1283 1.1 ad /* Ack the interrupt. */
1284 1.1 ad amr_outb(amr, AMR_SREG_INTR, istat);
1285 1.1 ad
1286 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1287 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_POSTREAD);
1288 1.9 ad
1289 1.1 ad /* Save mailbox, which contains a list of completed commands. */
1290 1.9 ad memcpy(mbsave, &amr->amr_mbox->mb_resp, sizeof(*mbsave));
1291 1.9 ad
1292 1.9 ad bus_dmamap_sync(amr->amr_dmat, amr->amr_dmamap, 0,
1293 1.9 ad sizeof(struct amr_mailbox), BUS_DMASYNC_PREREAD);
1294 1.1 ad
1295 1.1 ad /* Ack mailbox transfer. */
1296 1.1 ad amr_outb(amr, AMR_SREG_CMD, AMR_SCMD_ACKINTR);
1297 1.1 ad
1298 1.1 ad return (0);
1299 1.10 ad }
1300 1.10 ad
1301 1.27 thorpej static void
1302 1.10 ad amr_ccb_dump(struct amr_softc *amr, struct amr_ccb *ac)
1303 1.10 ad {
1304 1.10 ad int i;
1305 1.10 ad
1306 1.55 jakllsch printf("%s: ", device_xname(amr->amr_dv));
1307 1.10 ad for (i = 0; i < 4; i++)
1308 1.10 ad printf("%08x ", ((u_int32_t *)&ac->ac_cmd)[i]);
1309 1.10 ad printf("\n");
1310 1.1 ad }
1311 1.36 bouyer
1312 1.36 bouyer static int
1313 1.41 christos amropen(dev_t dev, int flag, int mode, struct lwp *l)
1314 1.36 bouyer {
1315 1.36 bouyer struct amr_softc *amr;
1316 1.36 bouyer
1317 1.49 tsutsui if ((amr = device_lookup_private(&amr_cd, minor(dev))) == NULL)
1318 1.36 bouyer return (ENXIO);
1319 1.36 bouyer if ((amr->amr_flags & AMRF_OPEN) != 0)
1320 1.36 bouyer return (EBUSY);
1321 1.36 bouyer
1322 1.36 bouyer amr->amr_flags |= AMRF_OPEN;
1323 1.36 bouyer return (0);
1324 1.36 bouyer }
1325 1.36 bouyer
1326 1.36 bouyer static int
1327 1.41 christos amrclose(dev_t dev, int flag, int mode, struct lwp *l)
1328 1.36 bouyer {
1329 1.36 bouyer struct amr_softc *amr;
1330 1.36 bouyer
1331 1.49 tsutsui amr = device_lookup_private(&amr_cd, minor(dev));
1332 1.36 bouyer amr->amr_flags &= ~AMRF_OPEN;
1333 1.36 bouyer return (0);
1334 1.36 bouyer }
1335 1.36 bouyer
1336 1.36 bouyer static int
1337 1.44 christos amrioctl(dev_t dev, u_long cmd, void *data, int flag,
1338 1.40 elad struct lwp *l)
1339 1.36 bouyer {
1340 1.36 bouyer struct amr_softc *amr;
1341 1.36 bouyer struct amr_user_ioctl *au;
1342 1.36 bouyer struct amr_ccb *ac;
1343 1.36 bouyer struct amr_mailbox_ioctl *mbi;
1344 1.36 bouyer unsigned long au_length;
1345 1.36 bouyer uint8_t *au_cmd;
1346 1.36 bouyer int error;
1347 1.36 bouyer void *dp = NULL, *au_buffer;
1348 1.36 bouyer
1349 1.49 tsutsui amr = device_lookup_private(&amr_cd, minor(dev));
1350 1.36 bouyer
1351 1.36 bouyer /* This should be compatible with the FreeBSD interface */
1352 1.36 bouyer
1353 1.36 bouyer switch (cmd) {
1354 1.36 bouyer case AMR_IO_VERSION:
1355 1.36 bouyer *(int *)data = AMR_IO_VERSION_NUMBER;
1356 1.36 bouyer return 0;
1357 1.36 bouyer case AMR_IO_COMMAND:
1358 1.43 elad error = kauth_authorize_device_passthru(l->l_cred, dev,
1359 1.43 elad KAUTH_REQ_DEVICE_RAWIO_PASSTHRU_ALL, data);
1360 1.40 elad if (error)
1361 1.40 elad return (error);
1362 1.37 christos
1363 1.36 bouyer au = (struct amr_user_ioctl *)data;
1364 1.36 bouyer au_cmd = au->au_cmd;
1365 1.36 bouyer au_buffer = au->au_buffer;
1366 1.36 bouyer au_length = au->au_length;
1367 1.36 bouyer break;
1368 1.36 bouyer default:
1369 1.36 bouyer return ENOTTY;
1370 1.36 bouyer }
1371 1.36 bouyer
1372 1.36 bouyer if (au_cmd[0] == AMR_CMD_PASS) {
1373 1.36 bouyer /* not yet */
1374 1.36 bouyer return EOPNOTSUPP;
1375 1.36 bouyer }
1376 1.36 bouyer
1377 1.36 bouyer if (au_length <= 0 || au_length > MAXPHYS || au_cmd[0] == 0x06)
1378 1.36 bouyer return (EINVAL);
1379 1.36 bouyer
1380 1.36 bouyer /*
1381 1.36 bouyer * allocate kernel memory for data, doing I/O directly to user
1382 1.36 bouyer * buffer isn't that easy.
1383 1.36 bouyer */
1384 1.36 bouyer dp = malloc(au_length, M_DEVBUF, M_WAITOK|M_ZERO);
1385 1.36 bouyer if (dp == NULL)
1386 1.36 bouyer return ENOMEM;
1387 1.36 bouyer if ((error = copyin(au_buffer, dp, au_length)) != 0)
1388 1.36 bouyer goto out;
1389 1.36 bouyer
1390 1.36 bouyer /* direct command to controller */
1391 1.36 bouyer while (amr_ccb_alloc(amr, &ac) != 0) {
1392 1.36 bouyer error = tsleep(NULL, PRIBIO | PCATCH, "armmbx", hz);
1393 1.36 bouyer if (error == EINTR)
1394 1.36 bouyer goto out;
1395 1.36 bouyer }
1396 1.36 bouyer
1397 1.36 bouyer mbi = (struct amr_mailbox_ioctl *)&ac->ac_cmd;
1398 1.36 bouyer mbi->mb_command = au_cmd[0];
1399 1.36 bouyer mbi->mb_channel = au_cmd[1];
1400 1.36 bouyer mbi->mb_param = au_cmd[2];
1401 1.36 bouyer mbi->mb_pad[0] = au_cmd[3];
1402 1.36 bouyer mbi->mb_drive = au_cmd[4];
1403 1.36 bouyer error = amr_ccb_map(amr, ac, dp, (int)au_length,
1404 1.36 bouyer AC_XFER_IN | AC_XFER_OUT);
1405 1.36 bouyer if (error == 0) {
1406 1.36 bouyer error = amr_ccb_wait(amr, ac);
1407 1.36 bouyer amr_ccb_unmap(amr, ac);
1408 1.36 bouyer if (error == 0)
1409 1.36 bouyer error = copyout(dp, au_buffer, au_length);
1410 1.36 bouyer
1411 1.36 bouyer }
1412 1.36 bouyer amr_ccb_free(amr, ac);
1413 1.36 bouyer out:
1414 1.36 bouyer free(dp, M_DEVBUF);
1415 1.36 bouyer return (error);
1416 1.36 bouyer }
1417