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      1  1.39     isaki /*	$NetBSD: auacer.c,v 1.39 2020/02/29 06:34:30 isaki Exp $	*/
      2   1.1  augustss 
      3   1.1  augustss /*-
      4  1.29  jmcneill  * Copyright (c) 2004, 2008 The NetBSD Foundation, Inc.
      5   1.1  augustss  * All rights reserved.
      6   1.1  augustss  *
      7   1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1  augustss  * by Lennart Augustsson.
      9   1.1  augustss  *
     10   1.1  augustss  * Redistribution and use in source and binary forms, with or without
     11   1.1  augustss  * modification, are permitted provided that the following conditions
     12   1.1  augustss  * are met:
     13   1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     14   1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     15   1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     17   1.1  augustss  *    documentation and/or other materials provided with the distribution.
     18   1.1  augustss  *
     19   1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1  augustss  */
     31   1.1  augustss 
     32   1.1  augustss /*
     33   1.1  augustss  * Acer Labs M5455 audio driver
     34   1.1  augustss  *
     35   1.5  augustss  * Acer provides data sheets after signing an NDA, so this is guess work.
     36   1.1  augustss  * The chip behaves somewhat like the Intel i8x0, so this driver
     37   1.1  augustss  * is loosely based on the auich driver.  Additional information taken from
     38   1.1  augustss  * the ALSA intel8x0.c driver (which handles M5455 as well).
     39   1.1  augustss  *
     40   1.1  augustss  * As an historical note one can observe that the auich driver borrows
     41   1.1  augustss  * lot from the first NetBSD PCI audio driver, the eap driver.  But this
     42   1.1  augustss  * is not attributed anywhere.
     43   1.1  augustss  */
     44   1.1  augustss 
     45   1.1  augustss 
     46   1.1  augustss #include <sys/cdefs.h>
     47  1.39     isaki __KERNEL_RCSID(0, "$NetBSD: auacer.c,v 1.39 2020/02/29 06:34:30 isaki Exp $");
     48   1.1  augustss 
     49   1.1  augustss #include <sys/param.h>
     50   1.1  augustss #include <sys/systm.h>
     51   1.1  augustss #include <sys/kernel.h>
     52  1.29  jmcneill #include <sys/kmem.h>
     53   1.1  augustss #include <sys/device.h>
     54   1.1  augustss #include <sys/fcntl.h>
     55   1.1  augustss #include <sys/proc.h>
     56   1.1  augustss 
     57   1.1  augustss #include <dev/pci/pcidevs.h>
     58   1.1  augustss #include <dev/pci/pcivar.h>
     59   1.1  augustss #include <dev/pci/auacerreg.h>
     60   1.1  augustss 
     61   1.1  augustss #include <sys/audioio.h>
     62  1.37     isaki #include <dev/audio/audio_if.h>
     63   1.1  augustss 
     64  1.17        ad #include <sys/bus.h>
     65   1.1  augustss 
     66   1.1  augustss #include <dev/ic/ac97reg.h>
     67   1.1  augustss #include <dev/ic/ac97var.h>
     68   1.1  augustss 
     69   1.1  augustss struct auacer_dma {
     70   1.1  augustss 	bus_dmamap_t map;
     71  1.16  christos 	void *addr;
     72   1.1  augustss 	bus_dma_segment_t segs[1];
     73   1.1  augustss 	int nsegs;
     74   1.1  augustss 	size_t size;
     75   1.1  augustss 	struct auacer_dma *next;
     76   1.1  augustss };
     77   1.1  augustss 
     78   1.1  augustss #define	DMAADDR(p)	((p)->map->dm_segs[0].ds_addr)
     79   1.1  augustss #define	KERNADDR(p)	((void *)((p)->addr))
     80   1.1  augustss 
     81   1.1  augustss struct auacer_cdata {
     82   1.1  augustss 	struct auacer_dmalist ic_dmalist_pcmo[ALI_DMALIST_MAX];
     83   1.1  augustss };
     84   1.1  augustss 
     85   1.1  augustss struct auacer_chan {
     86   1.1  augustss 	uint32_t ptr;
     87   1.1  augustss 	uint32_t start, p, end;
     88   1.1  augustss 	uint32_t blksize, fifoe;
     89   1.1  augustss 	uint32_t ack;
     90   1.1  augustss 	uint32_t port;
     91   1.1  augustss 	struct auacer_dmalist *dmalist;
     92   1.1  augustss 	void (*intr)(void *);
     93   1.1  augustss 	void *arg;
     94   1.1  augustss };
     95   1.1  augustss 
     96   1.1  augustss struct auacer_softc {
     97  1.31       chs 	device_t sc_dev;
     98   1.1  augustss 	void *sc_ih;
     99  1.29  jmcneill 	kmutex_t sc_lock;
    100  1.29  jmcneill 	kmutex_t sc_intr_lock;
    101   1.1  augustss 
    102   1.1  augustss 	audio_device_t sc_audev;
    103   1.1  augustss 
    104   1.1  augustss 	bus_space_tag_t iot;
    105   1.1  augustss 	bus_space_handle_t mix_ioh;
    106   1.1  augustss 	bus_space_handle_t aud_ioh;
    107   1.1  augustss 	bus_dma_tag_t dmat;
    108   1.1  augustss 
    109   1.1  augustss 	struct ac97_codec_if *codec_if;
    110   1.1  augustss 	struct ac97_host_if host_if;
    111   1.1  augustss 
    112   1.1  augustss 	/* DMA scatter-gather lists. */
    113   1.1  augustss 	bus_dmamap_t sc_cddmamap;
    114   1.1  augustss #define	sc_cddma	sc_cddmamap->dm_segs[0].ds_addr
    115   1.1  augustss 
    116   1.1  augustss 	struct auacer_cdata *sc_cdata;
    117   1.1  augustss 
    118   1.1  augustss 	struct auacer_chan sc_pcmo;
    119   1.1  augustss 
    120   1.1  augustss 	struct auacer_dma *sc_dmas;
    121   1.1  augustss 
    122   1.1  augustss 	pci_chipset_tag_t sc_pc;
    123   1.1  augustss 	pcitag_t sc_pt;
    124   1.1  augustss 
    125   1.1  augustss 	int  sc_dmamap_flags;
    126   1.1  augustss 
    127   1.4      kent #define AUACER_NFORMATS	3
    128   1.4      kent 	struct audio_format sc_formats[AUACER_NFORMATS];
    129   1.1  augustss };
    130   1.1  augustss 
    131   1.1  augustss #define READ1(sc, a) bus_space_read_1(sc->iot, sc->aud_ioh, a)
    132   1.1  augustss #define READ2(sc, a) bus_space_read_2(sc->iot, sc->aud_ioh, a)
    133   1.1  augustss #define READ4(sc, a) bus_space_read_4(sc->iot, sc->aud_ioh, a)
    134   1.1  augustss #define WRITE1(sc, a, v) bus_space_write_1(sc->iot, sc->aud_ioh, a, v)
    135   1.1  augustss #define WRITE2(sc, a, v) bus_space_write_2(sc->iot, sc->aud_ioh, a, v)
    136   1.1  augustss #define WRITE4(sc, a, v) bus_space_write_4(sc->iot, sc->aud_ioh, a, v)
    137   1.1  augustss 
    138   1.1  augustss /* Debug */
    139   1.1  augustss #ifdef AUACER_DEBUG
    140   1.1  augustss #define	DPRINTF(l,x)	do { if (auacer_debug & (l)) printf x; } while(0)
    141   1.1  augustss int auacer_debug = 0;
    142   1.1  augustss #define	ALI_DEBUG_CODECIO	0x0001
    143   1.1  augustss #define	ALI_DEBUG_DMA		0x0002
    144   1.1  augustss #define	ALI_DEBUG_INTR		0x0004
    145   1.1  augustss #define ALI_DEBUG_API		0x0008
    146   1.1  augustss #define ALI_DEBUG_MIXERAPI	0x0010
    147   1.1  augustss #else
    148   1.1  augustss #define	DPRINTF(x,y)	/* nothing */
    149   1.1  augustss #endif
    150   1.1  augustss 
    151  1.10   thorpej static int	auacer_intr(void *);
    152   1.1  augustss 
    153  1.37     isaki static int	auacer_query_format(void *, audio_format_query_t *);
    154  1.37     isaki static int	auacer_set_format(void *, int,
    155  1.37     isaki 				 const audio_params_t *, const audio_params_t *,
    156  1.37     isaki 				 audio_filter_reg_t *, audio_filter_reg_t *);
    157  1.10   thorpej static int	auacer_halt_output(void *);
    158  1.10   thorpej static int	auacer_halt_input(void *);
    159  1.10   thorpej static int	auacer_getdev(void *, struct audio_device *);
    160  1.10   thorpej static int	auacer_set_port(void *, mixer_ctrl_t *);
    161  1.10   thorpej static int	auacer_get_port(void *, mixer_ctrl_t *);
    162  1.10   thorpej static int	auacer_query_devinfo(void *, mixer_devinfo_t *);
    163  1.29  jmcneill static void	*auacer_allocm(void *, int, size_t);
    164  1.29  jmcneill static void	auacer_freem(void *, void *, size_t);
    165  1.10   thorpej static size_t	auacer_round_buffersize(void *, int, size_t);
    166  1.10   thorpej static int	auacer_get_props(void *);
    167  1.10   thorpej static int	auacer_trigger_output(void *, void *, void *, int,
    168  1.10   thorpej 				      void (*)(void *), void *,
    169  1.10   thorpej 				      const audio_params_t *);
    170  1.10   thorpej static int	auacer_trigger_input(void *, void *, void *, int,
    171  1.10   thorpej 				     void (*)(void *), void *,
    172  1.10   thorpej 				     const audio_params_t *);
    173  1.10   thorpej 
    174  1.10   thorpej static int	auacer_alloc_cdata(struct auacer_softc *);
    175  1.10   thorpej 
    176  1.10   thorpej static int	auacer_allocmem(struct auacer_softc *, size_t, size_t,
    177  1.10   thorpej 				struct auacer_dma *);
    178  1.10   thorpej static int	auacer_freemem(struct auacer_softc *, struct auacer_dma *);
    179  1.29  jmcneill static void	auacer_get_locks(void *, kmutex_t **, kmutex_t **);
    180   1.1  augustss 
    181  1.27    dyoung static bool	auacer_resume(device_t, const pmf_qual_t *);
    182  1.10   thorpej static int	auacer_set_rate(struct auacer_softc *, int, u_int);
    183   1.1  augustss 
    184   1.1  augustss static void auacer_reset(struct auacer_softc *sc);
    185   1.1  augustss 
    186  1.34      maxv static const struct audio_hw_if auacer_hw_if = {
    187  1.37     isaki 	.query_format		= auacer_query_format,
    188  1.37     isaki 	.set_format		= auacer_set_format,
    189  1.36     isaki 	.halt_output		= auacer_halt_output,
    190  1.36     isaki 	.halt_input		= auacer_halt_input,
    191  1.36     isaki 	.getdev			= auacer_getdev,
    192  1.36     isaki 	.set_port		= auacer_set_port,
    193  1.36     isaki 	.get_port		= auacer_get_port,
    194  1.36     isaki 	.query_devinfo		= auacer_query_devinfo,
    195  1.36     isaki 	.allocm			= auacer_allocm,
    196  1.36     isaki 	.freem			= auacer_freem,
    197  1.36     isaki 	.round_buffersize	= auacer_round_buffersize,
    198  1.36     isaki 	.get_props		= auacer_get_props,
    199  1.36     isaki 	.trigger_output		= auacer_trigger_output,
    200  1.36     isaki 	.trigger_input		= auacer_trigger_input,
    201  1.36     isaki 	.get_locks		= auacer_get_locks,
    202   1.1  augustss };
    203   1.1  augustss 
    204   1.4      kent #define AUACER_FORMATS_4CH	1
    205   1.4      kent #define AUACER_FORMATS_6CH	2
    206  1.37     isaki #define AUACER_FORMAT(aumode, ch, chmask) \
    207  1.37     isaki 	{ \
    208  1.37     isaki 		.mode		= (aumode), \
    209  1.37     isaki 		.encoding	= AUDIO_ENCODING_SLINEAR_LE, \
    210  1.37     isaki 		.validbits	= 16, \
    211  1.37     isaki 		.precision	= 16, \
    212  1.37     isaki 		.channels	= (ch), \
    213  1.37     isaki 		.channel_mask	= (chmask), \
    214  1.37     isaki 		.frequency_type	= 9, \
    215  1.37     isaki 		.frequency	= {  8000, 11025, 12000, 16000, 22050, \
    216  1.37     isaki 		                    24000, 32000, 44100, 48000, }, \
    217  1.37     isaki 	}
    218   1.4      kent static const struct audio_format auacer_formats[AUACER_NFORMATS] = {
    219  1.37     isaki 	AUACER_FORMAT(AUMODE_PLAY | AUMODE_RECORD, 2, AUFMT_STEREO),
    220  1.37     isaki 	AUACER_FORMAT(AUMODE_PLAY                , 4, AUFMT_SURROUND4),
    221  1.37     isaki 	AUACER_FORMAT(AUMODE_PLAY                , 6, AUFMT_DOLBY_5_1),
    222   1.4      kent };
    223   1.4      kent 
    224  1.10   thorpej static int	auacer_attach_codec(void *, struct ac97_codec_if *);
    225  1.10   thorpej static int	auacer_read_codec(void *, uint8_t, uint16_t *);
    226  1.10   thorpej static int	auacer_write_codec(void *, uint8_t, uint16_t);
    227  1.10   thorpej static int	auacer_reset_codec(void *);
    228   1.1  augustss 
    229  1.10   thorpej static int
    230  1.23    cegger auacer_match(device_t parent, cfdata_t match, void *aux)
    231   1.1  augustss {
    232   1.7      kent 	struct pci_attach_args *pa;
    233   1.1  augustss 
    234   1.7      kent 	pa = (struct pci_attach_args *)aux;
    235   1.1  augustss 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI &&
    236   1.1  augustss 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M5455)
    237   1.1  augustss 		return 1;
    238   1.1  augustss 	return 0;
    239   1.1  augustss }
    240   1.1  augustss 
    241  1.10   thorpej static void
    242  1.23    cegger auacer_attach(device_t parent, device_t self, void *aux)
    243   1.1  augustss {
    244   1.7      kent 	struct auacer_softc *sc;
    245   1.7      kent 	struct pci_attach_args *pa;
    246   1.1  augustss 	pci_intr_handle_t ih;
    247   1.1  augustss 	bus_size_t aud_size;
    248   1.1  augustss 	pcireg_t v;
    249   1.1  augustss 	const char *intrstr;
    250   1.4      kent 	int i;
    251  1.32  christos 	char intrbuf[PCI_INTRSTR_LEN];
    252   1.1  augustss 
    253  1.24    cegger 	sc = device_private(self);
    254  1.31       chs 	sc->sc_dev = self;
    255   1.7      kent 	pa = aux;
    256   1.1  augustss 	aprint_normal(": Acer Labs M5455 Audio controller\n");
    257   1.1  augustss 
    258   1.1  augustss 	if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->iot,
    259   1.1  augustss 		&sc->aud_ioh, NULL, &aud_size)) {
    260   1.1  augustss 		aprint_error(": can't map i/o space\n");
    261   1.1  augustss 		return;
    262   1.1  augustss 	}
    263   1.1  augustss 
    264   1.1  augustss 	sc->sc_pc = pa->pa_pc;
    265   1.1  augustss 	sc->sc_pt = pa->pa_tag;
    266   1.1  augustss 	sc->dmat = pa->pa_dmat;
    267   1.1  augustss 
    268   1.1  augustss 	sc->sc_dmamap_flags = BUS_DMA_COHERENT;	/* XXX remove */
    269   1.1  augustss 
    270  1.29  jmcneill 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
    271  1.30       mrg 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
    272  1.29  jmcneill 
    273   1.1  augustss 	/* enable bus mastering */
    274   1.1  augustss 	v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    275   1.1  augustss 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
    276   1.1  augustss 	    v | PCI_COMMAND_MASTER_ENABLE);
    277   1.1  augustss 
    278   1.1  augustss 	/* Map and establish the interrupt. */
    279   1.1  augustss 	if (pci_intr_map(pa, &ih)) {
    280  1.31       chs 		aprint_error_dev(sc->sc_dev, "can't map interrupt\n");
    281  1.29  jmcneill 		mutex_destroy(&sc->sc_lock);
    282  1.29  jmcneill 		mutex_destroy(&sc->sc_intr_lock);
    283   1.1  augustss 		return;
    284   1.1  augustss 	}
    285  1.32  christos 	intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf));
    286  1.35  jdolecek 	sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_AUDIO,
    287  1.35  jdolecek 	    auacer_intr, sc, device_xname(self));
    288   1.1  augustss 	if (sc->sc_ih == NULL) {
    289  1.31       chs 		aprint_error_dev(sc->sc_dev, "can't establish interrupt");
    290   1.1  augustss 		if (intrstr != NULL)
    291  1.25     njoly 			aprint_error(" at %s", intrstr);
    292  1.25     njoly 		aprint_error("\n");
    293  1.29  jmcneill 		mutex_destroy(&sc->sc_lock);
    294  1.29  jmcneill 		mutex_destroy(&sc->sc_intr_lock);
    295   1.1  augustss 		return;
    296   1.1  augustss 	}
    297  1.31       chs 	aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
    298   1.1  augustss 
    299   1.1  augustss 	strlcpy(sc->sc_audev.name, "M5455 AC97", MAX_AUDIO_DEV_LEN);
    300   1.1  augustss 	snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN,
    301   1.1  augustss 		 "0x%02x", PCI_REVISION(pa->pa_class));
    302  1.31       chs 	strlcpy(sc->sc_audev.config, device_xname(sc->sc_dev), MAX_AUDIO_DEV_LEN);
    303   1.1  augustss 
    304   1.1  augustss 	/* Set up DMA lists. */
    305   1.1  augustss 	auacer_alloc_cdata(sc);
    306   1.1  augustss 	sc->sc_pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo;
    307   1.1  augustss 	sc->sc_pcmo.ptr = 0;
    308   1.1  augustss 	sc->sc_pcmo.port = ALI_BASE_PO;
    309   1.1  augustss 
    310   1.1  augustss 	DPRINTF(ALI_DEBUG_DMA, ("auacer_attach: lists %p\n",
    311   1.1  augustss 	    sc->sc_pcmo.dmalist));
    312   1.1  augustss 
    313   1.1  augustss 	sc->host_if.arg = sc;
    314   1.1  augustss 	sc->host_if.attach = auacer_attach_codec;
    315   1.1  augustss 	sc->host_if.read = auacer_read_codec;
    316   1.1  augustss 	sc->host_if.write = auacer_write_codec;
    317   1.1  augustss 	sc->host_if.reset = auacer_reset_codec;
    318   1.1  augustss 
    319  1.29  jmcneill 	if (ac97_attach(&sc->host_if, self, &sc->sc_lock) != 0) {
    320  1.29  jmcneill 		mutex_destroy(&sc->sc_lock);
    321  1.29  jmcneill 		mutex_destroy(&sc->sc_intr_lock);
    322   1.1  augustss 		return;
    323  1.29  jmcneill 	}
    324   1.1  augustss 
    325   1.4      kent 	/* setup audio_format */
    326   1.4      kent 	memcpy(sc->sc_formats, auacer_formats, sizeof(auacer_formats));
    327  1.29  jmcneill 	mutex_enter(&sc->sc_lock);
    328   1.4      kent 	if (!AC97_IS_4CH(sc->codec_if))
    329   1.4      kent 		AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_4CH]);
    330   1.4      kent 	if (!AC97_IS_6CH(sc->codec_if))
    331   1.4      kent 		AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_6CH]);
    332   1.4      kent 	if (AC97_IS_FIXED_RATE(sc->codec_if)) {
    333   1.4      kent 		for (i = 0; i < AUACER_NFORMATS; i++) {
    334   1.4      kent 			sc->sc_formats[i].frequency_type = 1;
    335   1.4      kent 			sc->sc_formats[i].frequency[0] = 48000;
    336   1.4      kent 		}
    337   1.4      kent 	}
    338   1.4      kent 
    339  1.29  jmcneill 	mutex_spin_enter(&sc->sc_intr_lock);
    340  1.29  jmcneill 	auacer_reset(sc);
    341  1.29  jmcneill 	mutex_spin_exit(&sc->sc_intr_lock);
    342  1.29  jmcneill 	mutex_exit(&sc->sc_lock);
    343  1.29  jmcneill 
    344  1.31       chs 	audio_attach_mi(&auacer_hw_if, sc, sc->sc_dev);
    345   1.1  augustss 
    346  1.18  jmcneill 	if (!pmf_device_register(self, NULL, auacer_resume))
    347  1.18  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    348   1.1  augustss }
    349   1.1  augustss 
    350  1.31       chs CFATTACH_DECL_NEW(auacer, sizeof(struct auacer_softc),
    351  1.10   thorpej     auacer_match, auacer_attach, NULL, NULL);
    352  1.10   thorpej 
    353   1.1  augustss static int
    354   1.1  augustss auacer_ready_codec(struct auacer_softc *sc, int mask)
    355   1.1  augustss {
    356   1.7      kent 	int count;
    357   1.1  augustss 
    358   1.1  augustss 	for (count = 0; count < 0x7f; count++) {
    359   1.1  augustss 		int val = READ1(sc, ALI_CSPSR);
    360   1.1  augustss 		if (val & mask)
    361   1.1  augustss 			return 0;
    362   1.1  augustss 	}
    363   1.1  augustss 
    364   1.1  augustss 	aprint_normal("auacer_ready_codec: AC97 codec ready timeout.\n");
    365   1.1  augustss 	return EBUSY;
    366   1.1  augustss }
    367   1.1  augustss 
    368   1.1  augustss static int
    369   1.1  augustss auacer_sema_codec(struct auacer_softc *sc)
    370   1.1  augustss {
    371   1.9  christos 	int ttime;
    372   1.1  augustss 
    373   1.9  christos 	ttime = 100;
    374   1.9  christos 	while (ttime-- && (READ4(sc, ALI_CAS) & ALI_CAS_SEM_BUSY))
    375   1.1  augustss 		delay(1);
    376   1.9  christos 	if (!ttime)
    377   1.1  augustss 		aprint_normal("auacer_sema_codec: timeout\n");
    378   1.1  augustss 	return auacer_ready_codec(sc, ALI_CSPSR_CODEC_READY);
    379   1.1  augustss }
    380   1.1  augustss 
    381  1.10   thorpej static int
    382   1.7      kent auacer_read_codec(void *v, uint8_t reg, uint16_t *val)
    383   1.1  augustss {
    384   1.7      kent 	struct auacer_softc *sc;
    385   1.1  augustss 
    386   1.7      kent 	sc = v;
    387   1.1  augustss 	if (auacer_sema_codec(sc))
    388   1.1  augustss 		return EIO;
    389   1.1  augustss 
    390   1.1  augustss 	reg |= ALI_CPR_ADDR_READ;
    391   1.1  augustss #if 0
    392   1.1  augustss 	if (ac97->num)
    393   1.1  augustss 		reg |= ALI_CPR_ADDR_SECONDARY;
    394   1.1  augustss #endif
    395   1.1  augustss 	WRITE2(sc, ALI_CPR_ADDR, reg);
    396   1.1  augustss 	if (auacer_ready_codec(sc, ALI_CSPSR_READ_OK))
    397   1.1  augustss 		return EIO;
    398   1.1  augustss 	*val = READ2(sc, ALI_SPR);
    399   1.1  augustss 
    400   1.1  augustss 	DPRINTF(ALI_DEBUG_CODECIO, ("auacer_read_codec: reg=0x%x val=0x%x\n",
    401   1.1  augustss 				    reg, *val));
    402   1.1  augustss 
    403   1.1  augustss 	return 0;
    404   1.1  augustss }
    405   1.1  augustss 
    406   1.1  augustss int
    407   1.7      kent auacer_write_codec(void *v, uint8_t reg, uint16_t val)
    408   1.1  augustss {
    409   1.7      kent 	struct auacer_softc *sc;
    410   1.1  augustss 
    411   1.1  augustss 	DPRINTF(ALI_DEBUG_CODECIO, ("auacer_write_codec: reg=0x%x val=0x%x\n",
    412   1.1  augustss 				    reg, val));
    413   1.7      kent 	sc = v;
    414   1.1  augustss 	if (auacer_sema_codec(sc))
    415   1.1  augustss 		return EIO;
    416   1.1  augustss 	WRITE2(sc, ALI_CPR, val);
    417   1.1  augustss #if 0
    418   1.1  augustss 	if (ac97->num)
    419   1.1  augustss 		reg |= ALI_CPR_ADDR_SECONDARY;
    420   1.1  augustss #endif
    421   1.1  augustss 	WRITE2(sc, ALI_CPR_ADDR, reg);
    422   1.1  augustss 	auacer_ready_codec(sc, ALI_CSPSR_WRITE_OK);
    423   1.1  augustss 	return 0;
    424   1.1  augustss }
    425   1.1  augustss 
    426  1.10   thorpej static int
    427   1.1  augustss auacer_attach_codec(void *v, struct ac97_codec_if *cif)
    428   1.1  augustss {
    429   1.7      kent 	struct auacer_softc *sc;
    430   1.1  augustss 
    431   1.7      kent 	sc = v;
    432   1.1  augustss 	sc->codec_if = cif;
    433   1.1  augustss 	return 0;
    434   1.1  augustss }
    435   1.1  augustss 
    436  1.10   thorpej static int
    437   1.1  augustss auacer_reset_codec(void *v)
    438   1.1  augustss {
    439   1.7      kent 	struct auacer_softc *sc;
    440   1.7      kent 	uint32_t reg;
    441   1.7      kent 	int i;
    442   1.1  augustss 
    443   1.7      kent 	sc = v;
    444   1.7      kent 	i = 0;
    445   1.1  augustss 	reg = READ4(sc, ALI_SCR);
    446   1.1  augustss 	if ((reg & 2) == 0)	/* Cold required */
    447   1.1  augustss 		reg |= 2;
    448   1.1  augustss 	else
    449   1.1  augustss 		reg |= 1;	/* Warm */
    450   1.1  augustss 	reg &= ~0x80000000;	/* ACLink on */
    451   1.1  augustss 	WRITE4(sc, ALI_SCR, reg);
    452   1.1  augustss 
    453   1.1  augustss 	while (i < 10) {
    454   1.1  augustss 		if ((READ4(sc, ALI_INTERRUPTSR) & ALI_INT_GPIO) == 0)
    455   1.1  augustss 			break;
    456   1.1  augustss 		delay(50000);	/* XXX */
    457   1.1  augustss 		i++;
    458   1.1  augustss 	}
    459   1.1  augustss 	if (i == 10) {
    460   1.1  augustss 		return EIO;
    461   1.1  augustss 	}
    462   1.1  augustss 
    463   1.1  augustss 	for (i = 0; i < 10; i++) {
    464   1.1  augustss 		reg = READ4(sc, ALI_RTSR);
    465   1.1  augustss 		if (reg & 0x80) /* primary codec */
    466   1.1  augustss 			break;
    467   1.1  augustss 		WRITE4(sc, ALI_RTSR, reg | 0x80);
    468   1.1  augustss 		delay(50000);	/* XXX */
    469   1.1  augustss 	}
    470   1.1  augustss 
    471   1.1  augustss 	return 0;
    472   1.1  augustss }
    473   1.1  augustss 
    474   1.1  augustss static void
    475   1.1  augustss auacer_reset(struct auacer_softc *sc)
    476   1.1  augustss {
    477   1.1  augustss 	WRITE4(sc, ALI_SCR, ALI_SCR_RESET);
    478   1.1  augustss 	WRITE4(sc, ALI_FIFOCR1, 0x83838383);
    479   1.1  augustss 	WRITE4(sc, ALI_FIFOCR2, 0x83838383);
    480   1.1  augustss 	WRITE4(sc, ALI_FIFOCR3, 0x83838383);
    481   1.1  augustss 	WRITE4(sc, ALI_INTERFACECR, ALI_IF_PO); /* XXX pcm out only */
    482   1.1  augustss 	WRITE4(sc, ALI_INTERRUPTCR, 0x00000000);
    483   1.1  augustss 	WRITE4(sc, ALI_INTERRUPTSR, 0x00000000);
    484   1.1  augustss }
    485   1.1  augustss 
    486  1.10   thorpej static int
    487  1.37     isaki auacer_query_format(void *v, audio_format_query_t *afp)
    488   1.1  augustss {
    489   1.4      kent 	struct auacer_softc *sc;
    490   1.4      kent 
    491  1.37     isaki 	DPRINTF(ALI_DEBUG_API, ("%s\n", __func__));
    492   1.4      kent 	sc = v;
    493  1.37     isaki 	return audio_query_format(sc->sc_formats, AUACER_NFORMATS, afp);
    494   1.1  augustss }
    495   1.1  augustss 
    496  1.10   thorpej static int
    497   1.6      kent auacer_set_rate(struct auacer_softc *sc, int mode, u_int srate)
    498   1.1  augustss {
    499   1.1  augustss 	int ret;
    500   1.6      kent 	u_int ratetmp;
    501   1.1  augustss 
    502   1.8  augustss 	DPRINTF(ALI_DEBUG_API, ("auacer_set_rate: srate=%u\n", srate));
    503   1.1  augustss 
    504   1.1  augustss 	ratetmp = srate;
    505   1.1  augustss 	if (mode == AUMODE_RECORD)
    506   1.1  augustss 		return sc->codec_if->vtbl->set_rate(sc->codec_if,
    507   1.1  augustss 		    AC97_REG_PCM_LR_ADC_RATE, &ratetmp);
    508   1.1  augustss 	ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
    509   1.1  augustss 	    AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp);
    510   1.1  augustss 	if (ret)
    511   1.1  augustss 		return ret;
    512   1.1  augustss 	ratetmp = srate;
    513   1.1  augustss 	ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
    514   1.1  augustss 	    AC97_REG_PCM_SURR_DAC_RATE, &ratetmp);
    515   1.1  augustss 	if (ret)
    516   1.1  augustss 		return ret;
    517   1.1  augustss 	ratetmp = srate;
    518   1.1  augustss 	ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
    519   1.1  augustss 	    AC97_REG_PCM_LFE_DAC_RATE, &ratetmp);
    520   1.1  augustss 	return ret;
    521   1.1  augustss }
    522   1.1  augustss 
    523  1.10   thorpej static int
    524  1.37     isaki auacer_set_format(void *v, int setmode,
    525  1.37     isaki     const audio_params_t *play, const audio_params_t *rec,
    526  1.37     isaki     audio_filter_reg_t *pfil, audio_filter_reg_t *rfil)
    527   1.1  augustss {
    528   1.7      kent 	struct auacer_softc *sc;
    529  1.37     isaki 	const audio_params_t *p;
    530   1.1  augustss 	uint32_t control;
    531   1.4      kent 	int mode, index;
    532   1.1  augustss 
    533  1.37     isaki 	DPRINTF(ALI_DEBUG_API, ("%s\n", __func__));
    534   1.7      kent 	sc = v;
    535   1.1  augustss 	for (mode = AUMODE_RECORD; mode != -1;
    536   1.1  augustss 	     mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
    537   1.1  augustss 		if ((setmode & mode) == 0)
    538   1.1  augustss 			continue;
    539   1.1  augustss 
    540   1.1  augustss 		p = mode == AUMODE_PLAY ? play : rec;
    541   1.1  augustss 
    542  1.37     isaki 		index = audio_indexof_format(sc->sc_formats, AUACER_NFORMATS,
    543  1.37     isaki 		    mode, p);
    544   1.6      kent 		/* p points HW encoding */
    545   1.4      kent 		if (sc->sc_formats[index].frequency_type != 1
    546   1.6      kent 		    && auacer_set_rate(sc, mode, p->sample_rate))
    547   1.4      kent 			return EINVAL;
    548   1.1  augustss 		if (mode == AUMODE_PLAY) {
    549   1.1  augustss 			control = READ4(sc, ALI_SCR);
    550   1.1  augustss 			control &= ~ALI_SCR_PCM_246_MASK;
    551   1.1  augustss 			if (p->channels == 4)
    552   1.1  augustss 				control |= ALI_SCR_PCM_4;
    553   1.1  augustss 			else if (p->channels == 6)
    554   1.1  augustss 				control |= ALI_SCR_PCM_6;
    555   1.1  augustss 			WRITE4(sc, ALI_SCR, control);
    556   1.1  augustss 		}
    557   1.1  augustss 	}
    558   1.1  augustss 
    559  1.37     isaki 	return 0;
    560   1.1  augustss }
    561   1.1  augustss 
    562   1.1  augustss static void
    563   1.1  augustss auacer_halt(struct auacer_softc *sc, struct auacer_chan *chan)
    564   1.1  augustss {
    565   1.1  augustss 	uint32_t val;
    566   1.7      kent 	uint8_t port;
    567   1.1  augustss 	uint32_t slot;
    568   1.1  augustss 
    569   1.7      kent 	port = chan->port;
    570   1.1  augustss 	DPRINTF(ALI_DEBUG_API, ("auacer_halt: port=0x%x\n", port));
    571   1.1  augustss 	chan->intr = 0;
    572   1.1  augustss 
    573   1.1  augustss 	slot = ALI_PORT2SLOT(port);
    574   1.1  augustss 
    575   1.1  augustss 	val = READ4(sc, ALI_DMACR);
    576   1.1  augustss 	val |= 1 << (slot+16); /* pause */
    577   1.1  augustss 	val &= ~(1 << slot); /* no start */
    578   1.1  augustss 	WRITE4(sc, ALI_DMACR, val);
    579   1.1  augustss 	WRITE1(sc, port + ALI_OFF_CR, 0);
    580   1.1  augustss 	while (READ1(sc, port + ALI_OFF_CR))
    581   1.1  augustss 		;
    582   1.1  augustss 	/* reset whole DMA things */
    583   1.1  augustss 	WRITE1(sc, port + ALI_OFF_CR, ALI_CR_RR);
    584   1.1  augustss 	/* clear interrupts */
    585   1.1  augustss 	WRITE1(sc, port + ALI_OFF_SR, READ1(sc, port+ALI_OFF_SR) | ALI_SR_W1TC);
    586   1.1  augustss 	WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(port));
    587   1.1  augustss }
    588   1.1  augustss 
    589  1.10   thorpej static int
    590   1.1  augustss auacer_halt_output(void *v)
    591   1.1  augustss {
    592   1.7      kent 	struct auacer_softc *sc;
    593   1.1  augustss 
    594   1.1  augustss 	DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_output\n"));
    595   1.7      kent 	sc = v;
    596   1.1  augustss 	auacer_halt(sc, &sc->sc_pcmo);
    597   1.1  augustss 
    598   1.7      kent 	return 0;
    599   1.1  augustss }
    600   1.1  augustss 
    601  1.10   thorpej static int
    602  1.15  christos auacer_halt_input(void *v)
    603   1.1  augustss {
    604   1.1  augustss 	DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_input\n"));
    605   1.1  augustss 
    606   1.7      kent 	return 0;
    607   1.1  augustss }
    608   1.1  augustss 
    609  1.10   thorpej static int
    610   1.1  augustss auacer_getdev(void *v, struct audio_device *adp)
    611   1.1  augustss {
    612   1.7      kent 	struct auacer_softc *sc;
    613   1.1  augustss 
    614   1.1  augustss 	DPRINTF(ALI_DEBUG_API, ("auacer_getdev\n"));
    615   1.7      kent 	sc = v;
    616   1.1  augustss 	*adp = sc->sc_audev;
    617   1.7      kent 	return 0;
    618   1.1  augustss }
    619   1.1  augustss 
    620  1.10   thorpej static int
    621   1.1  augustss auacer_set_port(void *v, mixer_ctrl_t *cp)
    622   1.1  augustss {
    623   1.7      kent 	struct auacer_softc *sc;
    624   1.1  augustss 
    625   1.1  augustss 	DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_set_port\n"));
    626   1.7      kent 	sc = v;
    627   1.7      kent 	return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp);
    628   1.1  augustss }
    629   1.1  augustss 
    630  1.10   thorpej static int
    631   1.1  augustss auacer_get_port(void *v, mixer_ctrl_t *cp)
    632   1.1  augustss {
    633   1.7      kent 	struct auacer_softc *sc;
    634   1.1  augustss 
    635   1.1  augustss 	DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_get_port\n"));
    636   1.7      kent 	sc = v;
    637   1.7      kent 	return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp);
    638   1.1  augustss }
    639   1.1  augustss 
    640  1.10   thorpej static int
    641   1.1  augustss auacer_query_devinfo(void *v, mixer_devinfo_t *dp)
    642   1.1  augustss {
    643   1.7      kent 	struct auacer_softc *sc;
    644   1.1  augustss 
    645   1.1  augustss 	DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_query_devinfo\n"));
    646   1.7      kent 	sc = v;
    647   1.7      kent 	return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp);
    648   1.1  augustss }
    649   1.1  augustss 
    650  1.10   thorpej static void *
    651  1.29  jmcneill auacer_allocm(void *v, int direction, size_t size)
    652   1.1  augustss {
    653   1.7      kent 	struct auacer_softc *sc;
    654   1.1  augustss 	struct auacer_dma *p;
    655   1.1  augustss 	int error;
    656   1.1  augustss 
    657   1.1  augustss 	if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX))
    658   1.7      kent 		return NULL;
    659   1.1  augustss 
    660  1.29  jmcneill 	p = kmem_zalloc(sizeof(*p), KM_SLEEP);
    661   1.7      kent 	sc = v;
    662   1.1  augustss 	error = auacer_allocmem(sc, size, 0, p);
    663   1.1  augustss 	if (error) {
    664  1.29  jmcneill 		kmem_free(p, sizeof(*p));
    665   1.7      kent 		return NULL;
    666   1.1  augustss 	}
    667   1.1  augustss 
    668   1.1  augustss 	p->next = sc->sc_dmas;
    669   1.1  augustss 	sc->sc_dmas = p;
    670   1.1  augustss 
    671   1.7      kent 	return KERNADDR(p);
    672   1.1  augustss }
    673   1.1  augustss 
    674  1.10   thorpej static void
    675  1.29  jmcneill auacer_freem(void *v, void *ptr, size_t size)
    676   1.1  augustss {
    677   1.7      kent 	struct auacer_softc *sc;
    678   1.1  augustss 	struct auacer_dma *p, **pp;
    679   1.1  augustss 
    680   1.7      kent 	sc = v;
    681   1.1  augustss 	for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
    682   1.1  augustss 		if (KERNADDR(p) == ptr) {
    683   1.1  augustss 			auacer_freemem(sc, p);
    684   1.1  augustss 			*pp = p->next;
    685  1.29  jmcneill 			kmem_free(p, sizeof(*p));
    686   1.1  augustss 			return;
    687   1.1  augustss 		}
    688   1.1  augustss 	}
    689   1.1  augustss }
    690   1.1  augustss 
    691  1.10   thorpej static size_t
    692  1.15  christos auacer_round_buffersize(void *v, int direction, size_t size)
    693   1.1  augustss {
    694   1.1  augustss 
    695   1.1  augustss 	if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX))
    696   1.1  augustss 		size = ALI_DMALIST_MAX * ALI_DMASEG_MAX;
    697   1.1  augustss 
    698   1.1  augustss 	return size;
    699   1.1  augustss }
    700   1.1  augustss 
    701  1.10   thorpej static int
    702   1.1  augustss auacer_get_props(void *v)
    703   1.1  augustss {
    704   1.1  augustss 
    705  1.38     isaki 	return AUDIO_PROP_PLAYBACK | AUDIO_PROP_CAPTURE |
    706  1.38     isaki 	    AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
    707   1.1  augustss }
    708   1.1  augustss 
    709   1.1  augustss static void
    710  1.29  jmcneill auacer_get_locks(void *v, kmutex_t **intr, kmutex_t **proc)
    711  1.29  jmcneill {
    712  1.29  jmcneill 	struct auacer_softc *sc;
    713  1.29  jmcneill 
    714  1.29  jmcneill 	sc = v;
    715  1.29  jmcneill 	*intr = &sc->sc_intr_lock;
    716  1.29  jmcneill 	*proc = &sc->sc_lock;
    717  1.29  jmcneill }
    718  1.29  jmcneill 
    719  1.29  jmcneill static void
    720   1.1  augustss auacer_add_entry(struct auacer_chan *chan)
    721   1.1  augustss {
    722   1.1  augustss 	struct auacer_dmalist *q;
    723   1.1  augustss 
    724   1.1  augustss 	q = &chan->dmalist[chan->ptr];
    725   1.1  augustss 
    726   1.1  augustss 	DPRINTF(ALI_DEBUG_INTR,
    727   1.1  augustss 		("auacer_add_entry: %p = %x @ 0x%x\n",
    728   1.1  augustss 		 q, chan->blksize / 2, chan->p));
    729   1.1  augustss 
    730   1.1  augustss 	q->base = htole32(chan->p);
    731   1.1  augustss 	q->len = htole32((chan->blksize / ALI_SAMPLE_SIZE) | ALI_DMAF_IOC);
    732   1.1  augustss 	chan->p += chan->blksize;
    733   1.1  augustss 	if (chan->p >= chan->end)
    734   1.1  augustss 		chan->p = chan->start;
    735   1.7      kent 
    736   1.1  augustss 	if (++chan->ptr >= ALI_DMALIST_MAX)
    737   1.1  augustss 		chan->ptr = 0;
    738   1.1  augustss }
    739   1.1  augustss 
    740   1.1  augustss static void
    741   1.1  augustss auacer_upd_chan(struct auacer_softc *sc, struct auacer_chan *chan)
    742   1.1  augustss {
    743   1.1  augustss 	uint32_t sts;
    744   1.1  augustss 	uint32_t civ;
    745   1.1  augustss 
    746   1.1  augustss 	sts = READ2(sc, chan->port + ALI_OFF_SR);
    747   1.1  augustss 	/* intr ack */
    748   1.1  augustss 	WRITE2(sc, chan->port + ALI_OFF_SR, sts & ALI_SR_W1TC);
    749   1.1  augustss 	WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(chan->port));
    750   1.1  augustss 
    751   1.1  augustss 	DPRINTF(ALI_DEBUG_INTR, ("auacer_upd_chan: sts=0x%x\n", sts));
    752   1.1  augustss 
    753   1.1  augustss 	if (sts & ALI_SR_DMA_INT_FIFO) {
    754   1.1  augustss 		printf("%s: fifo underrun # %u\n",
    755  1.31       chs 		       device_xname(sc->sc_dev), ++chan->fifoe);
    756   1.1  augustss 	}
    757   1.1  augustss 
    758   1.1  augustss 	civ = READ1(sc, chan->port + ALI_OFF_CIV);
    759   1.7      kent 
    760   1.1  augustss 	DPRINTF(ALI_DEBUG_INTR,("auacer_intr: civ=%u ptr=%u\n",civ,chan->ptr));
    761   1.7      kent 
    762   1.1  augustss 	/* XXX */
    763   1.1  augustss 	while (chan->ptr != civ) {
    764   1.1  augustss 		auacer_add_entry(chan);
    765   1.1  augustss 	}
    766   1.1  augustss 
    767   1.1  augustss 	WRITE1(sc, chan->port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK);
    768   1.1  augustss 
    769   1.1  augustss 	while (chan->ack != civ) {
    770   1.1  augustss 		if (chan->intr) {
    771   1.1  augustss 			DPRINTF(ALI_DEBUG_INTR,("auacer_upd_chan: callback\n"));
    772   1.1  augustss 			chan->intr(chan->arg);
    773   1.1  augustss 		}
    774   1.1  augustss 		chan->ack++;
    775   1.1  augustss 		if (chan->ack >= ALI_DMALIST_MAX)
    776   1.1  augustss 			chan->ack = 0;
    777   1.1  augustss 	}
    778   1.1  augustss }
    779   1.1  augustss 
    780  1.10   thorpej static int
    781   1.1  augustss auacer_intr(void *v)
    782   1.1  augustss {
    783   1.7      kent 	struct auacer_softc *sc;
    784   1.1  augustss 	int ret, intrs;
    785   1.1  augustss 
    786   1.7      kent 	sc = v;
    787  1.29  jmcneill 
    788  1.29  jmcneill 	DPRINTF(ALI_DEBUG_INTR, ("auacer_intr: intrs=0x%x\n",
    789  1.29  jmcneill 	    READ4(sc, ALI_INTERRUPTSR)));
    790  1.29  jmcneill 
    791  1.29  jmcneill 	mutex_spin_enter(&sc->sc_intr_lock);
    792   1.1  augustss 	intrs = READ4(sc, ALI_INTERRUPTSR);
    793   1.1  augustss 	ret = 0;
    794   1.1  augustss 	if (intrs & ALI_INT_PCMOUT) {
    795   1.1  augustss 		auacer_upd_chan(sc, &sc->sc_pcmo);
    796   1.1  augustss 		ret++;
    797   1.1  augustss 	}
    798  1.29  jmcneill 	mutex_spin_exit(&sc->sc_intr_lock);
    799   1.1  augustss 
    800   1.1  augustss 	return ret != 0;
    801   1.1  augustss }
    802   1.1  augustss 
    803   1.1  augustss static void
    804   1.1  augustss auacer_setup_chan(struct auacer_softc *sc, struct auacer_chan *chan,
    805   1.1  augustss 		  uint32_t start, uint32_t size, uint32_t blksize,
    806   1.1  augustss 		  void (*intr)(void *), void *arg)
    807   1.1  augustss {
    808   1.1  augustss 	uint32_t port, slot;
    809   1.1  augustss 	uint32_t offs, val;
    810   1.1  augustss 
    811   1.1  augustss 	chan->start = start;
    812   1.1  augustss 	chan->ptr = 0;
    813   1.1  augustss 	chan->p = chan->start;
    814   1.1  augustss 	chan->end = chan->start + size;
    815   1.1  augustss 	chan->blksize = blksize;
    816   1.1  augustss 	chan->ack = 0;
    817   1.1  augustss 	chan->intr = intr;
    818   1.1  augustss 	chan->arg = arg;
    819   1.1  augustss 
    820   1.1  augustss 	auacer_add_entry(chan);
    821   1.1  augustss 	auacer_add_entry(chan);
    822   1.1  augustss 
    823   1.1  augustss 	port = chan->port;
    824   1.1  augustss 	slot = ALI_PORT2SLOT(port);
    825   1.1  augustss 
    826   1.1  augustss 	WRITE1(sc, port + ALI_OFF_CIV, 0);
    827   1.1  augustss 	WRITE1(sc, port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK);
    828   1.1  augustss 	offs = (char *)chan->dmalist - (char *)sc->sc_cdata;
    829   1.1  augustss 	WRITE4(sc, port + ALI_OFF_BDBAR, sc->sc_cddma + offs);
    830   1.1  augustss 	WRITE1(sc, port + ALI_OFF_CR,
    831   1.1  augustss 	       ALI_CR_IOCE | ALI_CR_FEIE | ALI_CR_LVBIE | ALI_CR_RPBM);
    832   1.1  augustss 	val = READ4(sc, ALI_DMACR);
    833   1.1  augustss 	val &= ~(1 << (slot+16)); /* no pause */
    834   1.1  augustss 	val |= 1 << slot;	/* start */
    835   1.1  augustss 	WRITE4(sc, ALI_DMACR, val);
    836   1.1  augustss }
    837   1.1  augustss 
    838  1.10   thorpej static int
    839   1.1  augustss auacer_trigger_output(void *v, void *start, void *end, int blksize,
    840  1.15  christos     void (*intr)(void *), void *arg, const audio_params_t *param)
    841   1.1  augustss {
    842   1.7      kent 	struct auacer_softc *sc;
    843   1.1  augustss 	struct auacer_dma *p;
    844   1.1  augustss 	uint32_t size;
    845   1.1  augustss 
    846   1.1  augustss 	DPRINTF(ALI_DEBUG_DMA,
    847   1.1  augustss 		("auacer_trigger_output(%p, %p, %d, %p, %p, %p)\n",
    848   1.1  augustss 		 start, end, blksize, intr, arg, param));
    849   1.7      kent 	sc = v;
    850   1.1  augustss 	for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
    851   1.7      kent 		continue;
    852   1.1  augustss 	if (!p) {
    853   1.1  augustss 		printf("auacer_trigger_output: bad addr %p\n", start);
    854   1.1  augustss 		return (EINVAL);
    855   1.1  augustss 	}
    856   1.1  augustss 
    857   1.1  augustss 	size = (char *)end - (char *)start;
    858   1.1  augustss 	auacer_setup_chan(sc, &sc->sc_pcmo, DMAADDR(p), size, blksize,
    859   1.1  augustss 			  intr, arg);
    860   1.1  augustss 
    861   1.1  augustss 	return 0;
    862   1.1  augustss }
    863   1.1  augustss 
    864  1.10   thorpej static int
    865  1.15  christos auacer_trigger_input(void *v, void *start, void *end,
    866  1.15  christos     int blksize, void (*intr)(void *), void *arg,
    867  1.15  christos     const audio_params_t *param)
    868   1.1  augustss {
    869   1.7      kent 	return EINVAL;
    870   1.1  augustss }
    871   1.1  augustss 
    872  1.10   thorpej static int
    873   1.1  augustss auacer_allocmem(struct auacer_softc *sc, size_t size, size_t align,
    874   1.1  augustss     struct auacer_dma *p)
    875   1.1  augustss {
    876   1.1  augustss 	int error;
    877   1.1  augustss 
    878   1.1  augustss 	p->size = size;
    879   1.1  augustss 	error = bus_dmamem_alloc(sc->dmat, p->size, align, 0,
    880   1.1  augustss 				 p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
    881  1.29  jmcneill 				 &p->nsegs, BUS_DMA_WAITOK);
    882   1.1  augustss 	if (error)
    883   1.7      kent 		return error;
    884   1.1  augustss 
    885   1.1  augustss 	error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size,
    886  1.29  jmcneill 			       &p->addr, BUS_DMA_WAITOK|sc->sc_dmamap_flags);
    887   1.1  augustss 	if (error)
    888   1.1  augustss 		goto free;
    889   1.1  augustss 
    890   1.1  augustss 	error = bus_dmamap_create(sc->dmat, p->size, 1, p->size,
    891  1.29  jmcneill 				  0, BUS_DMA_WAITOK, &p->map);
    892   1.1  augustss 	if (error)
    893   1.1  augustss 		goto unmap;
    894   1.1  augustss 
    895   1.1  augustss 	error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL,
    896  1.29  jmcneill 				BUS_DMA_WAITOK);
    897   1.1  augustss 	if (error)
    898   1.1  augustss 		goto destroy;
    899   1.1  augustss 	return (0);
    900   1.1  augustss 
    901   1.1  augustss  destroy:
    902   1.1  augustss 	bus_dmamap_destroy(sc->dmat, p->map);
    903   1.1  augustss  unmap:
    904   1.1  augustss 	bus_dmamem_unmap(sc->dmat, p->addr, p->size);
    905   1.1  augustss  free:
    906   1.1  augustss 	bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
    907   1.7      kent 	return error;
    908   1.1  augustss }
    909   1.1  augustss 
    910  1.10   thorpej static int
    911   1.1  augustss auacer_freemem(struct auacer_softc *sc, struct auacer_dma *p)
    912   1.1  augustss {
    913   1.1  augustss 
    914   1.1  augustss 	bus_dmamap_unload(sc->dmat, p->map);
    915   1.1  augustss 	bus_dmamap_destroy(sc->dmat, p->map);
    916   1.1  augustss 	bus_dmamem_unmap(sc->dmat, p->addr, p->size);
    917   1.1  augustss 	bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
    918   1.7      kent 	return 0;
    919   1.1  augustss }
    920   1.1  augustss 
    921  1.10   thorpej static int
    922   1.1  augustss auacer_alloc_cdata(struct auacer_softc *sc)
    923   1.1  augustss {
    924   1.1  augustss 	bus_dma_segment_t seg;
    925   1.1  augustss 	int error, rseg;
    926   1.1  augustss 
    927   1.1  augustss 	/*
    928   1.1  augustss 	 * Allocate the control data structure, and create and load the
    929   1.1  augustss 	 * DMA map for it.
    930   1.1  augustss 	 */
    931   1.1  augustss 	if ((error = bus_dmamem_alloc(sc->dmat,
    932   1.1  augustss 				      sizeof(struct auacer_cdata),
    933   1.1  augustss 				      PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) {
    934  1.31       chs 		aprint_error_dev(sc->sc_dev, "unable to allocate control data, error = %d\n",
    935  1.20    cegger 		    error);
    936   1.1  augustss 		goto fail_0;
    937   1.1  augustss 	}
    938   1.1  augustss 
    939   1.1  augustss 	if ((error = bus_dmamem_map(sc->dmat, &seg, rseg,
    940   1.1  augustss 				    sizeof(struct auacer_cdata),
    941  1.16  christos 				    (void **) &sc->sc_cdata,
    942   1.1  augustss 				    sc->sc_dmamap_flags)) != 0) {
    943  1.31       chs 		aprint_error_dev(sc->sc_dev, "unable to map control data, error = %d\n",
    944  1.20    cegger 		    error);
    945   1.1  augustss 		goto fail_1;
    946   1.1  augustss 	}
    947   1.1  augustss 
    948   1.1  augustss 	if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auacer_cdata), 1,
    949   1.1  augustss 				       sizeof(struct auacer_cdata), 0, 0,
    950   1.1  augustss 				       &sc->sc_cddmamap)) != 0) {
    951  1.31       chs 		aprint_error_dev(sc->sc_dev, "unable to create control data DMA map, "
    952  1.20    cegger 		    "error = %d\n", error);
    953   1.1  augustss 		goto fail_2;
    954   1.1  augustss 	}
    955   1.1  augustss 
    956   1.1  augustss 	if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap,
    957   1.1  augustss 				     sc->sc_cdata, sizeof(struct auacer_cdata),
    958   1.1  augustss 				     NULL, 0)) != 0) {
    959  1.31       chs 		aprint_error_dev(sc->sc_dev, "unable to load control data DMA map, "
    960  1.20    cegger 		    "error = %d\n", error);
    961   1.1  augustss 		goto fail_3;
    962   1.1  augustss 	}
    963   1.1  augustss 
    964   1.7      kent 	return 0;
    965   1.1  augustss 
    966   1.1  augustss  fail_3:
    967   1.1  augustss 	bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap);
    968   1.1  augustss  fail_2:
    969  1.16  christos 	bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata,
    970   1.1  augustss 	    sizeof(struct auacer_cdata));
    971   1.1  augustss  fail_1:
    972   1.1  augustss 	bus_dmamem_free(sc->dmat, &seg, rseg);
    973   1.1  augustss  fail_0:
    974   1.7      kent 	return error;
    975   1.1  augustss }
    976   1.1  augustss 
    977  1.18  jmcneill static bool
    978  1.27    dyoung auacer_resume(device_t dv, const pmf_qual_t *qual)
    979   1.1  augustss {
    980  1.18  jmcneill 	struct auacer_softc *sc = device_private(dv);
    981  1.18  jmcneill 
    982  1.29  jmcneill 	mutex_enter(&sc->sc_lock);
    983  1.29  jmcneill 	mutex_spin_enter(&sc->sc_intr_lock);
    984  1.18  jmcneill 	auacer_reset_codec(sc);
    985  1.29  jmcneill 	mutex_spin_exit(&sc->sc_intr_lock);
    986  1.18  jmcneill 	delay(1000);
    987  1.18  jmcneill 	sc->codec_if->vtbl->restore_ports(sc->codec_if);
    988  1.29  jmcneill 	mutex_exit(&sc->sc_lock);
    989   1.1  augustss 
    990  1.18  jmcneill 	return true;
    991   1.1  augustss }
    992