auacer.c revision 1.1.2.2
1 1.1.2.2 skrll /* $NetBSD: auacer.c,v 1.1.2.2 2004/10/19 15:56:57 skrll Exp $ */ 2 1.1.2.2 skrll 3 1.1.2.2 skrll /*- 4 1.1.2.2 skrll * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 1.1.2.2 skrll * All rights reserved. 6 1.1.2.2 skrll * 7 1.1.2.2 skrll * This code is derived from software contributed to The NetBSD Foundation 8 1.1.2.2 skrll * by Lennart Augustsson. 9 1.1.2.2 skrll * 10 1.1.2.2 skrll * Redistribution and use in source and binary forms, with or without 11 1.1.2.2 skrll * modification, are permitted provided that the following conditions 12 1.1.2.2 skrll * are met: 13 1.1.2.2 skrll * 1. Redistributions of source code must retain the above copyright 14 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer. 15 1.1.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 16 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer in the 17 1.1.2.2 skrll * documentation and/or other materials provided with the distribution. 18 1.1.2.2 skrll * 3. All advertising materials mentioning features or use of this software 19 1.1.2.2 skrll * must display the following acknowledgement: 20 1.1.2.2 skrll * This product includes software developed by the NetBSD 21 1.1.2.2 skrll * Foundation, Inc. and its contributors. 22 1.1.2.2 skrll * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.1.2.2 skrll * contributors may be used to endorse or promote products derived 24 1.1.2.2 skrll * from this software without specific prior written permission. 25 1.1.2.2 skrll * 26 1.1.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.1.2.2 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.1.2.2 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.1.2.2 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.1.2.2 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.1.2.2 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.1.2.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.1.2.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.1.2.2 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.1.2.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.1.2.2 skrll * POSSIBILITY OF SUCH DAMAGE. 37 1.1.2.2 skrll */ 38 1.1.2.2 skrll 39 1.1.2.2 skrll /* 40 1.1.2.2 skrll * Acer Labs M5455 audio driver 41 1.1.2.2 skrll * 42 1.1.2.2 skrll * Acer provides data sheets after signing an NDA. 43 1.1.2.2 skrll * The chip behaves somewhat like the Intel i8x0, so this driver 44 1.1.2.2 skrll * is loosely based on the auich driver. Additional information taken from 45 1.1.2.2 skrll * the ALSA intel8x0.c driver (which handles M5455 as well). 46 1.1.2.2 skrll * 47 1.1.2.2 skrll * As an historical note one can observe that the auich driver borrows 48 1.1.2.2 skrll * lot from the first NetBSD PCI audio driver, the eap driver. But this 49 1.1.2.2 skrll * is not attributed anywhere. 50 1.1.2.2 skrll */ 51 1.1.2.2 skrll 52 1.1.2.2 skrll 53 1.1.2.2 skrll #include <sys/cdefs.h> 54 1.1.2.2 skrll __KERNEL_RCSID(0, "$NetBSD: auacer.c,v 1.1.2.2 2004/10/19 15:56:57 skrll Exp $"); 55 1.1.2.2 skrll 56 1.1.2.2 skrll #include <sys/param.h> 57 1.1.2.2 skrll #include <sys/systm.h> 58 1.1.2.2 skrll #include <sys/kernel.h> 59 1.1.2.2 skrll #include <sys/malloc.h> 60 1.1.2.2 skrll #include <sys/device.h> 61 1.1.2.2 skrll #include <sys/fcntl.h> 62 1.1.2.2 skrll #include <sys/proc.h> 63 1.1.2.2 skrll 64 1.1.2.2 skrll #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 65 1.1.2.2 skrll 66 1.1.2.2 skrll #include <dev/pci/pcidevs.h> 67 1.1.2.2 skrll #include <dev/pci/pcivar.h> 68 1.1.2.2 skrll #include <dev/pci/auacerreg.h> 69 1.1.2.2 skrll 70 1.1.2.2 skrll #include <sys/audioio.h> 71 1.1.2.2 skrll #include <dev/audio_if.h> 72 1.1.2.2 skrll #include <dev/mulaw.h> 73 1.1.2.2 skrll #include <dev/auconv.h> 74 1.1.2.2 skrll 75 1.1.2.2 skrll #include <machine/bus.h> 76 1.1.2.2 skrll 77 1.1.2.2 skrll #include <dev/ic/ac97reg.h> 78 1.1.2.2 skrll #include <dev/ic/ac97var.h> 79 1.1.2.2 skrll 80 1.1.2.2 skrll struct auacer_dma { 81 1.1.2.2 skrll bus_dmamap_t map; 82 1.1.2.2 skrll caddr_t addr; 83 1.1.2.2 skrll bus_dma_segment_t segs[1]; 84 1.1.2.2 skrll int nsegs; 85 1.1.2.2 skrll size_t size; 86 1.1.2.2 skrll struct auacer_dma *next; 87 1.1.2.2 skrll }; 88 1.1.2.2 skrll 89 1.1.2.2 skrll #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 90 1.1.2.2 skrll #define KERNADDR(p) ((void *)((p)->addr)) 91 1.1.2.2 skrll 92 1.1.2.2 skrll struct auacer_cdata { 93 1.1.2.2 skrll struct auacer_dmalist ic_dmalist_pcmo[ALI_DMALIST_MAX]; 94 1.1.2.2 skrll }; 95 1.1.2.2 skrll 96 1.1.2.2 skrll struct auacer_chan { 97 1.1.2.2 skrll uint32_t ptr; 98 1.1.2.2 skrll uint32_t start, p, end; 99 1.1.2.2 skrll uint32_t blksize, fifoe; 100 1.1.2.2 skrll uint32_t ack; 101 1.1.2.2 skrll uint32_t port; 102 1.1.2.2 skrll struct auacer_dmalist *dmalist; 103 1.1.2.2 skrll void (*intr)(void *); 104 1.1.2.2 skrll void *arg; 105 1.1.2.2 skrll }; 106 1.1.2.2 skrll 107 1.1.2.2 skrll struct auacer_softc { 108 1.1.2.2 skrll struct device sc_dev; 109 1.1.2.2 skrll void *sc_ih; 110 1.1.2.2 skrll 111 1.1.2.2 skrll audio_device_t sc_audev; 112 1.1.2.2 skrll 113 1.1.2.2 skrll bus_space_tag_t iot; 114 1.1.2.2 skrll bus_space_handle_t mix_ioh; 115 1.1.2.2 skrll bus_space_handle_t aud_ioh; 116 1.1.2.2 skrll bus_dma_tag_t dmat; 117 1.1.2.2 skrll 118 1.1.2.2 skrll struct ac97_codec_if *codec_if; 119 1.1.2.2 skrll struct ac97_host_if host_if; 120 1.1.2.2 skrll 121 1.1.2.2 skrll /* DMA scatter-gather lists. */ 122 1.1.2.2 skrll bus_dmamap_t sc_cddmamap; 123 1.1.2.2 skrll #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 124 1.1.2.2 skrll 125 1.1.2.2 skrll struct auacer_cdata *sc_cdata; 126 1.1.2.2 skrll 127 1.1.2.2 skrll struct auacer_chan sc_pcmo; 128 1.1.2.2 skrll 129 1.1.2.2 skrll struct auacer_dma *sc_dmas; 130 1.1.2.2 skrll 131 1.1.2.2 skrll pci_chipset_tag_t sc_pc; 132 1.1.2.2 skrll pcitag_t sc_pt; 133 1.1.2.2 skrll 134 1.1.2.2 skrll int sc_dmamap_flags; 135 1.1.2.2 skrll 136 1.1.2.2 skrll /* Power Management */ 137 1.1.2.2 skrll void *sc_powerhook; 138 1.1.2.2 skrll int sc_suspend; 139 1.1.2.2 skrll u_int16_t ext_status; 140 1.1.2.2 skrll }; 141 1.1.2.2 skrll 142 1.1.2.2 skrll #define READ1(sc, a) bus_space_read_1(sc->iot, sc->aud_ioh, a) 143 1.1.2.2 skrll #define READ2(sc, a) bus_space_read_2(sc->iot, sc->aud_ioh, a) 144 1.1.2.2 skrll #define READ4(sc, a) bus_space_read_4(sc->iot, sc->aud_ioh, a) 145 1.1.2.2 skrll #define WRITE1(sc, a, v) bus_space_write_1(sc->iot, sc->aud_ioh, a, v) 146 1.1.2.2 skrll #define WRITE2(sc, a, v) bus_space_write_2(sc->iot, sc->aud_ioh, a, v) 147 1.1.2.2 skrll #define WRITE4(sc, a, v) bus_space_write_4(sc->iot, sc->aud_ioh, a, v) 148 1.1.2.2 skrll 149 1.1.2.2 skrll #define IS_FIXED_RATE(codec) !((codec)->vtbl->get_extcaps(codec) \ 150 1.1.2.2 skrll & AC97_EXT_AUDIO_VRA) 151 1.1.2.2 skrll #define SUPPORTS_4CH(codec) ((codec)->vtbl->get_extcaps(codec) \ 152 1.1.2.2 skrll & AC97_EXT_AUDIO_SDAC) 153 1.1.2.2 skrll #define AC97_6CH_DACS (AC97_EXT_AUDIO_SDAC | AC97_EXT_AUDIO_CDAC \ 154 1.1.2.2 skrll | AC97_EXT_AUDIO_LDAC) 155 1.1.2.2 skrll #define SUPPORTS_6CH(codec) (((codec)->vtbl->get_extcaps(codec) \ 156 1.1.2.2 skrll & AC97_6CH_DACS) == AC97_6CH_DACS) 157 1.1.2.2 skrll 158 1.1.2.2 skrll /* Debug */ 159 1.1.2.2 skrll #ifdef AUACER_DEBUG 160 1.1.2.2 skrll #define DPRINTF(l,x) do { if (auacer_debug & (l)) printf x; } while(0) 161 1.1.2.2 skrll int auacer_debug = 0; 162 1.1.2.2 skrll #define ALI_DEBUG_CODECIO 0x0001 163 1.1.2.2 skrll #define ALI_DEBUG_DMA 0x0002 164 1.1.2.2 skrll #define ALI_DEBUG_INTR 0x0004 165 1.1.2.2 skrll #define ALI_DEBUG_API 0x0008 166 1.1.2.2 skrll #define ALI_DEBUG_MIXERAPI 0x0010 167 1.1.2.2 skrll #else 168 1.1.2.2 skrll #define DPRINTF(x,y) /* nothing */ 169 1.1.2.2 skrll #endif 170 1.1.2.2 skrll 171 1.1.2.2 skrll int auacer_match(struct device *, struct cfdata *, void *); 172 1.1.2.2 skrll void auacer_attach(struct device *, struct device *, void *); 173 1.1.2.2 skrll int auacer_intr(void *); 174 1.1.2.2 skrll 175 1.1.2.2 skrll CFATTACH_DECL(auacer, sizeof(struct auacer_softc), 176 1.1.2.2 skrll auacer_match, auacer_attach, NULL, NULL); 177 1.1.2.2 skrll 178 1.1.2.2 skrll int auacer_open(void *, int); 179 1.1.2.2 skrll void auacer_close(void *); 180 1.1.2.2 skrll int auacer_query_encoding(void *, struct audio_encoding *); 181 1.1.2.2 skrll int auacer_set_params(void *, int, int, struct audio_params *, 182 1.1.2.2 skrll struct audio_params *); 183 1.1.2.2 skrll int auacer_round_blocksize(void *, int); 184 1.1.2.2 skrll int auacer_halt_output(void *); 185 1.1.2.2 skrll int auacer_halt_input(void *); 186 1.1.2.2 skrll int auacer_getdev(void *, struct audio_device *); 187 1.1.2.2 skrll int auacer_set_port(void *, mixer_ctrl_t *); 188 1.1.2.2 skrll int auacer_get_port(void *, mixer_ctrl_t *); 189 1.1.2.2 skrll int auacer_query_devinfo(void *, mixer_devinfo_t *); 190 1.1.2.2 skrll void *auacer_allocm(void *, int, size_t, struct malloc_type *, int); 191 1.1.2.2 skrll void auacer_freem(void *, void *, struct malloc_type *); 192 1.1.2.2 skrll size_t auacer_round_buffersize(void *, int, size_t); 193 1.1.2.2 skrll paddr_t auacer_mappage(void *, void *, off_t, int); 194 1.1.2.2 skrll int auacer_get_props(void *); 195 1.1.2.2 skrll int auacer_trigger_output(void *, void *, void *, int, void (*)(void *), 196 1.1.2.2 skrll void *, struct audio_params *); 197 1.1.2.2 skrll int auacer_trigger_input(void *, void *, void *, int, void (*)(void *), 198 1.1.2.2 skrll void *, struct audio_params *); 199 1.1.2.2 skrll 200 1.1.2.2 skrll int auacer_alloc_cdata(struct auacer_softc *); 201 1.1.2.2 skrll 202 1.1.2.2 skrll int auacer_allocmem(struct auacer_softc *, size_t, size_t, 203 1.1.2.2 skrll struct auacer_dma *); 204 1.1.2.2 skrll int auacer_freemem(struct auacer_softc *, struct auacer_dma *); 205 1.1.2.2 skrll 206 1.1.2.2 skrll void auacer_powerhook(int, void *); 207 1.1.2.2 skrll int auacer_set_rate(struct auacer_softc *, int, u_long); 208 1.1.2.2 skrll void auacer_finish_attach(struct device *); 209 1.1.2.2 skrll 210 1.1.2.2 skrll static void auacer_reset(struct auacer_softc *sc); 211 1.1.2.2 skrll 212 1.1.2.2 skrll struct audio_hw_if auacer_hw_if = { 213 1.1.2.2 skrll auacer_open, 214 1.1.2.2 skrll auacer_close, 215 1.1.2.2 skrll NULL, /* drain */ 216 1.1.2.2 skrll auacer_query_encoding, 217 1.1.2.2 skrll auacer_set_params, 218 1.1.2.2 skrll auacer_round_blocksize, 219 1.1.2.2 skrll NULL, /* commit_setting */ 220 1.1.2.2 skrll NULL, /* init_output */ 221 1.1.2.2 skrll NULL, /* init_input */ 222 1.1.2.2 skrll NULL, /* start_output */ 223 1.1.2.2 skrll NULL, /* start_input */ 224 1.1.2.2 skrll auacer_halt_output, 225 1.1.2.2 skrll auacer_halt_input, 226 1.1.2.2 skrll NULL, /* speaker_ctl */ 227 1.1.2.2 skrll auacer_getdev, 228 1.1.2.2 skrll NULL, /* getfd */ 229 1.1.2.2 skrll auacer_set_port, 230 1.1.2.2 skrll auacer_get_port, 231 1.1.2.2 skrll auacer_query_devinfo, 232 1.1.2.2 skrll auacer_allocm, 233 1.1.2.2 skrll auacer_freem, 234 1.1.2.2 skrll auacer_round_buffersize, 235 1.1.2.2 skrll auacer_mappage, 236 1.1.2.2 skrll auacer_get_props, 237 1.1.2.2 skrll auacer_trigger_output, 238 1.1.2.2 skrll auacer_trigger_input, 239 1.1.2.2 skrll NULL, /* dev_ioctl */ 240 1.1.2.2 skrll }; 241 1.1.2.2 skrll 242 1.1.2.2 skrll int auacer_attach_codec(void *, struct ac97_codec_if *); 243 1.1.2.2 skrll int auacer_read_codec(void *, u_int8_t, u_int16_t *); 244 1.1.2.2 skrll int auacer_write_codec(void *, u_int8_t, u_int16_t); 245 1.1.2.2 skrll int auacer_reset_codec(void *); 246 1.1.2.2 skrll 247 1.1.2.2 skrll int 248 1.1.2.2 skrll auacer_match(struct device *parent, struct cfdata *match, void *aux) 249 1.1.2.2 skrll { 250 1.1.2.2 skrll struct pci_attach_args *pa = (struct pci_attach_args *)aux; 251 1.1.2.2 skrll 252 1.1.2.2 skrll if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI && 253 1.1.2.2 skrll PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M5455) 254 1.1.2.2 skrll return 1; 255 1.1.2.2 skrll return 0; 256 1.1.2.2 skrll } 257 1.1.2.2 skrll 258 1.1.2.2 skrll void 259 1.1.2.2 skrll auacer_attach(struct device *parent, struct device *self, void *aux) 260 1.1.2.2 skrll { 261 1.1.2.2 skrll struct auacer_softc *sc = (struct auacer_softc *)self; 262 1.1.2.2 skrll struct pci_attach_args *pa = aux; 263 1.1.2.2 skrll pci_intr_handle_t ih; 264 1.1.2.2 skrll bus_size_t aud_size; 265 1.1.2.2 skrll pcireg_t v; 266 1.1.2.2 skrll const char *intrstr; 267 1.1.2.2 skrll 268 1.1.2.2 skrll aprint_normal(": Acer Labs M5455 Audio controller\n"); 269 1.1.2.2 skrll 270 1.1.2.2 skrll if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->iot, 271 1.1.2.2 skrll &sc->aud_ioh, NULL, &aud_size)) { 272 1.1.2.2 skrll aprint_error(": can't map i/o space\n"); 273 1.1.2.2 skrll return; 274 1.1.2.2 skrll } 275 1.1.2.2 skrll 276 1.1.2.2 skrll sc->sc_pc = pa->pa_pc; 277 1.1.2.2 skrll sc->sc_pt = pa->pa_tag; 278 1.1.2.2 skrll sc->dmat = pa->pa_dmat; 279 1.1.2.2 skrll 280 1.1.2.2 skrll sc->sc_dmamap_flags = BUS_DMA_COHERENT; /* XXX remove */ 281 1.1.2.2 skrll 282 1.1.2.2 skrll /* enable bus mastering */ 283 1.1.2.2 skrll v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 284 1.1.2.2 skrll pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 285 1.1.2.2 skrll v | PCI_COMMAND_MASTER_ENABLE); 286 1.1.2.2 skrll 287 1.1.2.2 skrll /* Map and establish the interrupt. */ 288 1.1.2.2 skrll if (pci_intr_map(pa, &ih)) { 289 1.1.2.2 skrll aprint_error("%s: can't map interrupt\n", sc->sc_dev.dv_xname); 290 1.1.2.2 skrll return; 291 1.1.2.2 skrll } 292 1.1.2.2 skrll intrstr = pci_intr_string(pa->pa_pc, ih); 293 1.1.2.2 skrll sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, 294 1.1.2.2 skrll auacer_intr, sc); 295 1.1.2.2 skrll if (sc->sc_ih == NULL) { 296 1.1.2.2 skrll aprint_error("%s: can't establish interrupt", 297 1.1.2.2 skrll sc->sc_dev.dv_xname); 298 1.1.2.2 skrll if (intrstr != NULL) 299 1.1.2.2 skrll aprint_normal(" at %s", intrstr); 300 1.1.2.2 skrll aprint_normal("\n"); 301 1.1.2.2 skrll return; 302 1.1.2.2 skrll } 303 1.1.2.2 skrll aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 304 1.1.2.2 skrll 305 1.1.2.2 skrll strlcpy(sc->sc_audev.name, "M5455 AC97", MAX_AUDIO_DEV_LEN); 306 1.1.2.2 skrll snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 307 1.1.2.2 skrll "0x%02x", PCI_REVISION(pa->pa_class)); 308 1.1.2.2 skrll strlcpy(sc->sc_audev.config, sc->sc_dev.dv_xname, MAX_AUDIO_DEV_LEN); 309 1.1.2.2 skrll 310 1.1.2.2 skrll /* Set up DMA lists. */ 311 1.1.2.2 skrll auacer_alloc_cdata(sc); 312 1.1.2.2 skrll sc->sc_pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 313 1.1.2.2 skrll sc->sc_pcmo.ptr = 0; 314 1.1.2.2 skrll sc->sc_pcmo.port = ALI_BASE_PO; 315 1.1.2.2 skrll 316 1.1.2.2 skrll DPRINTF(ALI_DEBUG_DMA, ("auacer_attach: lists %p\n", 317 1.1.2.2 skrll sc->sc_pcmo.dmalist)); 318 1.1.2.2 skrll 319 1.1.2.2 skrll sc->host_if.arg = sc; 320 1.1.2.2 skrll sc->host_if.attach = auacer_attach_codec; 321 1.1.2.2 skrll sc->host_if.read = auacer_read_codec; 322 1.1.2.2 skrll sc->host_if.write = auacer_write_codec; 323 1.1.2.2 skrll sc->host_if.reset = auacer_reset_codec; 324 1.1.2.2 skrll 325 1.1.2.2 skrll if (ac97_attach(&sc->host_if) != 0) 326 1.1.2.2 skrll return; 327 1.1.2.2 skrll 328 1.1.2.2 skrll /* Watch for power change */ 329 1.1.2.2 skrll sc->sc_suspend = PWR_RESUME; 330 1.1.2.2 skrll sc->sc_powerhook = powerhook_establish(auacer_powerhook, sc); 331 1.1.2.2 skrll 332 1.1.2.2 skrll sc->codec_if->vtbl->set_clock(sc->codec_if, 48000); /* XXX ? */ 333 1.1.2.2 skrll audio_attach_mi(&auacer_hw_if, sc, &sc->sc_dev); 334 1.1.2.2 skrll 335 1.1.2.2 skrll auacer_reset(sc); 336 1.1.2.2 skrll } 337 1.1.2.2 skrll 338 1.1.2.2 skrll static int 339 1.1.2.2 skrll auacer_ready_codec(struct auacer_softc *sc, int mask) 340 1.1.2.2 skrll { 341 1.1.2.2 skrll int count = 0; 342 1.1.2.2 skrll 343 1.1.2.2 skrll for (count = 0; count < 0x7f; count++) { 344 1.1.2.2 skrll int val = READ1(sc, ALI_CSPSR); 345 1.1.2.2 skrll if (val & mask) 346 1.1.2.2 skrll return 0; 347 1.1.2.2 skrll } 348 1.1.2.2 skrll 349 1.1.2.2 skrll aprint_normal("auacer_ready_codec: AC97 codec ready timeout.\n"); 350 1.1.2.2 skrll return EBUSY; 351 1.1.2.2 skrll } 352 1.1.2.2 skrll 353 1.1.2.2 skrll static int 354 1.1.2.2 skrll auacer_sema_codec(struct auacer_softc *sc) 355 1.1.2.2 skrll { 356 1.1.2.2 skrll int time = 100; 357 1.1.2.2 skrll 358 1.1.2.2 skrll while (time-- && (READ4(sc, ALI_CAS) & ALI_CAS_SEM_BUSY)) 359 1.1.2.2 skrll delay(1); 360 1.1.2.2 skrll if (!time) 361 1.1.2.2 skrll aprint_normal("auacer_sema_codec: timeout\n"); 362 1.1.2.2 skrll return auacer_ready_codec(sc, ALI_CSPSR_CODEC_READY); 363 1.1.2.2 skrll } 364 1.1.2.2 skrll 365 1.1.2.2 skrll int 366 1.1.2.2 skrll auacer_read_codec(void *v, u_int8_t reg, u_int16_t *val) 367 1.1.2.2 skrll { 368 1.1.2.2 skrll struct auacer_softc *sc = v; 369 1.1.2.2 skrll 370 1.1.2.2 skrll if (auacer_sema_codec(sc)) 371 1.1.2.2 skrll return EIO; 372 1.1.2.2 skrll 373 1.1.2.2 skrll reg |= ALI_CPR_ADDR_READ; 374 1.1.2.2 skrll #if 0 375 1.1.2.2 skrll if (ac97->num) 376 1.1.2.2 skrll reg |= ALI_CPR_ADDR_SECONDARY; 377 1.1.2.2 skrll #endif 378 1.1.2.2 skrll WRITE2(sc, ALI_CPR_ADDR, reg); 379 1.1.2.2 skrll if (auacer_ready_codec(sc, ALI_CSPSR_READ_OK)) 380 1.1.2.2 skrll return EIO; 381 1.1.2.2 skrll *val = READ2(sc, ALI_SPR); 382 1.1.2.2 skrll 383 1.1.2.2 skrll DPRINTF(ALI_DEBUG_CODECIO, ("auacer_read_codec: reg=0x%x val=0x%x\n", 384 1.1.2.2 skrll reg, *val)); 385 1.1.2.2 skrll 386 1.1.2.2 skrll return 0; 387 1.1.2.2 skrll } 388 1.1.2.2 skrll 389 1.1.2.2 skrll int 390 1.1.2.2 skrll auacer_write_codec(void *v, u_int8_t reg, u_int16_t val) 391 1.1.2.2 skrll { 392 1.1.2.2 skrll struct auacer_softc *sc = v; 393 1.1.2.2 skrll 394 1.1.2.2 skrll DPRINTF(ALI_DEBUG_CODECIO, ("auacer_write_codec: reg=0x%x val=0x%x\n", 395 1.1.2.2 skrll reg, val)); 396 1.1.2.2 skrll 397 1.1.2.2 skrll if (auacer_sema_codec(sc)) 398 1.1.2.2 skrll return EIO; 399 1.1.2.2 skrll WRITE2(sc, ALI_CPR, val); 400 1.1.2.2 skrll #if 0 401 1.1.2.2 skrll if (ac97->num) 402 1.1.2.2 skrll reg |= ALI_CPR_ADDR_SECONDARY; 403 1.1.2.2 skrll #endif 404 1.1.2.2 skrll WRITE2(sc, ALI_CPR_ADDR, reg); 405 1.1.2.2 skrll auacer_ready_codec(sc, ALI_CSPSR_WRITE_OK); 406 1.1.2.2 skrll return 0; 407 1.1.2.2 skrll } 408 1.1.2.2 skrll 409 1.1.2.2 skrll int 410 1.1.2.2 skrll auacer_attach_codec(void *v, struct ac97_codec_if *cif) 411 1.1.2.2 skrll { 412 1.1.2.2 skrll struct auacer_softc *sc = v; 413 1.1.2.2 skrll 414 1.1.2.2 skrll sc->codec_if = cif; 415 1.1.2.2 skrll return 0; 416 1.1.2.2 skrll } 417 1.1.2.2 skrll 418 1.1.2.2 skrll int 419 1.1.2.2 skrll auacer_reset_codec(void *v) 420 1.1.2.2 skrll { 421 1.1.2.2 skrll struct auacer_softc *sc = v; 422 1.1.2.2 skrll u_int32_t reg; 423 1.1.2.2 skrll int i = 0; 424 1.1.2.2 skrll 425 1.1.2.2 skrll reg = READ4(sc, ALI_SCR); 426 1.1.2.2 skrll if ((reg & 2) == 0) /* Cold required */ 427 1.1.2.2 skrll reg |= 2; 428 1.1.2.2 skrll else 429 1.1.2.2 skrll reg |= 1; /* Warm */ 430 1.1.2.2 skrll reg &= ~0x80000000; /* ACLink on */ 431 1.1.2.2 skrll WRITE4(sc, ALI_SCR, reg); 432 1.1.2.2 skrll 433 1.1.2.2 skrll while (i < 10) { 434 1.1.2.2 skrll if ((READ4(sc, ALI_INTERRUPTSR) & ALI_INT_GPIO) == 0) 435 1.1.2.2 skrll break; 436 1.1.2.2 skrll delay(50000); /* XXX */ 437 1.1.2.2 skrll i++; 438 1.1.2.2 skrll } 439 1.1.2.2 skrll if (i == 10) { 440 1.1.2.2 skrll return EIO; 441 1.1.2.2 skrll } 442 1.1.2.2 skrll 443 1.1.2.2 skrll for (i = 0; i < 10; i++) { 444 1.1.2.2 skrll reg = READ4(sc, ALI_RTSR); 445 1.1.2.2 skrll if (reg & 0x80) /* primary codec */ 446 1.1.2.2 skrll break; 447 1.1.2.2 skrll WRITE4(sc, ALI_RTSR, reg | 0x80); 448 1.1.2.2 skrll delay(50000); /* XXX */ 449 1.1.2.2 skrll } 450 1.1.2.2 skrll 451 1.1.2.2 skrll return 0; 452 1.1.2.2 skrll } 453 1.1.2.2 skrll 454 1.1.2.2 skrll static void 455 1.1.2.2 skrll auacer_reset(struct auacer_softc *sc) 456 1.1.2.2 skrll { 457 1.1.2.2 skrll WRITE4(sc, ALI_SCR, ALI_SCR_RESET); 458 1.1.2.2 skrll WRITE4(sc, ALI_FIFOCR1, 0x83838383); 459 1.1.2.2 skrll WRITE4(sc, ALI_FIFOCR2, 0x83838383); 460 1.1.2.2 skrll WRITE4(sc, ALI_FIFOCR3, 0x83838383); 461 1.1.2.2 skrll WRITE4(sc, ALI_INTERFACECR, ALI_IF_PO); /* XXX pcm out only */ 462 1.1.2.2 skrll WRITE4(sc, ALI_INTERRUPTCR, 0x00000000); 463 1.1.2.2 skrll WRITE4(sc, ALI_INTERRUPTSR, 0x00000000); 464 1.1.2.2 skrll } 465 1.1.2.2 skrll 466 1.1.2.2 skrll int 467 1.1.2.2 skrll auacer_open(void *v, int flags) 468 1.1.2.2 skrll { 469 1.1.2.2 skrll DPRINTF(ALI_DEBUG_API, ("auacer_open: flags=%d\n", flags)); 470 1.1.2.2 skrll return 0; 471 1.1.2.2 skrll } 472 1.1.2.2 skrll 473 1.1.2.2 skrll void 474 1.1.2.2 skrll auacer_close(void *v) 475 1.1.2.2 skrll { 476 1.1.2.2 skrll DPRINTF(ALI_DEBUG_API, ("auacer_close\n")); 477 1.1.2.2 skrll } 478 1.1.2.2 skrll 479 1.1.2.2 skrll int 480 1.1.2.2 skrll auacer_query_encoding(void *v, struct audio_encoding *aep) 481 1.1.2.2 skrll { 482 1.1.2.2 skrll DPRINTF(ALI_DEBUG_API, ("auacer_query_encoding\n")); 483 1.1.2.2 skrll 484 1.1.2.2 skrll switch (aep->index) { 485 1.1.2.2 skrll case 0: 486 1.1.2.2 skrll strcpy(aep->name, AudioEulinear); 487 1.1.2.2 skrll aep->encoding = AUDIO_ENCODING_ULINEAR; 488 1.1.2.2 skrll aep->precision = 8; 489 1.1.2.2 skrll aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 490 1.1.2.2 skrll return (0); 491 1.1.2.2 skrll case 1: 492 1.1.2.2 skrll strcpy(aep->name, AudioEmulaw); 493 1.1.2.2 skrll aep->encoding = AUDIO_ENCODING_ULAW; 494 1.1.2.2 skrll aep->precision = 8; 495 1.1.2.2 skrll aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 496 1.1.2.2 skrll return (0); 497 1.1.2.2 skrll case 2: 498 1.1.2.2 skrll strcpy(aep->name, AudioEalaw); 499 1.1.2.2 skrll aep->encoding = AUDIO_ENCODING_ALAW; 500 1.1.2.2 skrll aep->precision = 8; 501 1.1.2.2 skrll aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 502 1.1.2.2 skrll return (0); 503 1.1.2.2 skrll case 3: 504 1.1.2.2 skrll strcpy(aep->name, AudioEslinear); 505 1.1.2.2 skrll aep->encoding = AUDIO_ENCODING_SLINEAR; 506 1.1.2.2 skrll aep->precision = 8; 507 1.1.2.2 skrll aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 508 1.1.2.2 skrll return (0); 509 1.1.2.2 skrll case 4: 510 1.1.2.2 skrll strcpy(aep->name, AudioEslinear_le); 511 1.1.2.2 skrll aep->encoding = AUDIO_ENCODING_SLINEAR_LE; 512 1.1.2.2 skrll aep->precision = 16; 513 1.1.2.2 skrll aep->flags = 0; 514 1.1.2.2 skrll return (0); 515 1.1.2.2 skrll case 5: 516 1.1.2.2 skrll strcpy(aep->name, AudioEulinear_le); 517 1.1.2.2 skrll aep->encoding = AUDIO_ENCODING_ULINEAR_LE; 518 1.1.2.2 skrll aep->precision = 16; 519 1.1.2.2 skrll aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 520 1.1.2.2 skrll return (0); 521 1.1.2.2 skrll case 6: 522 1.1.2.2 skrll strcpy(aep->name, AudioEslinear_be); 523 1.1.2.2 skrll aep->encoding = AUDIO_ENCODING_SLINEAR_BE; 524 1.1.2.2 skrll aep->precision = 16; 525 1.1.2.2 skrll aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 526 1.1.2.2 skrll return (0); 527 1.1.2.2 skrll case 7: 528 1.1.2.2 skrll strcpy(aep->name, AudioEulinear_be); 529 1.1.2.2 skrll aep->encoding = AUDIO_ENCODING_ULINEAR_BE; 530 1.1.2.2 skrll aep->precision = 16; 531 1.1.2.2 skrll aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 532 1.1.2.2 skrll return (0); 533 1.1.2.2 skrll default: 534 1.1.2.2 skrll return (EINVAL); 535 1.1.2.2 skrll } 536 1.1.2.2 skrll } 537 1.1.2.2 skrll 538 1.1.2.2 skrll int 539 1.1.2.2 skrll auacer_set_rate(struct auacer_softc *sc, int mode, u_long srate) 540 1.1.2.2 skrll { 541 1.1.2.2 skrll int ret; 542 1.1.2.2 skrll u_long ratetmp; 543 1.1.2.2 skrll 544 1.1.2.2 skrll DPRINTF(ALI_DEBUG_API, ("auacer_set_rate: srate=%lu\n", srate)); 545 1.1.2.2 skrll 546 1.1.2.2 skrll ratetmp = srate; 547 1.1.2.2 skrll if (mode == AUMODE_RECORD) 548 1.1.2.2 skrll return sc->codec_if->vtbl->set_rate(sc->codec_if, 549 1.1.2.2 skrll AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 550 1.1.2.2 skrll ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 551 1.1.2.2 skrll AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 552 1.1.2.2 skrll if (ret) 553 1.1.2.2 skrll return ret; 554 1.1.2.2 skrll ratetmp = srate; 555 1.1.2.2 skrll ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 556 1.1.2.2 skrll AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 557 1.1.2.2 skrll if (ret) 558 1.1.2.2 skrll return ret; 559 1.1.2.2 skrll ratetmp = srate; 560 1.1.2.2 skrll ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 561 1.1.2.2 skrll AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 562 1.1.2.2 skrll return ret; 563 1.1.2.2 skrll } 564 1.1.2.2 skrll 565 1.1.2.2 skrll int 566 1.1.2.2 skrll auacer_set_params(void *v, int setmode, int usemode, struct audio_params *play, 567 1.1.2.2 skrll struct audio_params *rec) 568 1.1.2.2 skrll { 569 1.1.2.2 skrll struct auacer_softc *sc = v; 570 1.1.2.2 skrll struct audio_params *p; 571 1.1.2.2 skrll uint32_t control; 572 1.1.2.2 skrll int mode; 573 1.1.2.2 skrll 574 1.1.2.2 skrll DPRINTF(ALI_DEBUG_API, ("auacer_set_params\n")); 575 1.1.2.2 skrll 576 1.1.2.2 skrll for (mode = AUMODE_RECORD; mode != -1; 577 1.1.2.2 skrll mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 578 1.1.2.2 skrll if ((setmode & mode) == 0) 579 1.1.2.2 skrll continue; 580 1.1.2.2 skrll 581 1.1.2.2 skrll p = mode == AUMODE_PLAY ? play : rec; 582 1.1.2.2 skrll if (p == NULL) 583 1.1.2.2 skrll continue; 584 1.1.2.2 skrll 585 1.1.2.2 skrll if ((p->sample_rate != 8000) && 586 1.1.2.2 skrll (p->sample_rate != 11025) && 587 1.1.2.2 skrll (p->sample_rate != 12000) && 588 1.1.2.2 skrll (p->sample_rate != 16000) && 589 1.1.2.2 skrll (p->sample_rate != 22050) && 590 1.1.2.2 skrll (p->sample_rate != 24000) && 591 1.1.2.2 skrll (p->sample_rate != 32000) && 592 1.1.2.2 skrll (p->sample_rate != 44100) && 593 1.1.2.2 skrll (p->sample_rate != 48000)) 594 1.1.2.2 skrll return (EINVAL); 595 1.1.2.2 skrll 596 1.1.2.2 skrll p->factor = 1; 597 1.1.2.2 skrll if (p->precision == 8) 598 1.1.2.2 skrll p->factor *= 2; 599 1.1.2.2 skrll 600 1.1.2.2 skrll p->sw_code = NULL; 601 1.1.2.2 skrll /* setup hardware formats */ 602 1.1.2.2 skrll p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE; 603 1.1.2.2 skrll p->hw_precision = 16; 604 1.1.2.2 skrll 605 1.1.2.2 skrll if (mode == AUMODE_RECORD) { 606 1.1.2.2 skrll if (p->channels < 1 || p->channels > 2) 607 1.1.2.2 skrll return EINVAL; 608 1.1.2.2 skrll } else { 609 1.1.2.2 skrll switch (p->channels) { 610 1.1.2.2 skrll case 1: 611 1.1.2.2 skrll break; 612 1.1.2.2 skrll case 2: 613 1.1.2.2 skrll break; 614 1.1.2.2 skrll case 4: 615 1.1.2.2 skrll if (!SUPPORTS_4CH(sc->codec_if)) 616 1.1.2.2 skrll return EINVAL; 617 1.1.2.2 skrll break; 618 1.1.2.2 skrll case 6: 619 1.1.2.2 skrll if (!SUPPORTS_6CH(sc->codec_if)) 620 1.1.2.2 skrll return EINVAL; 621 1.1.2.2 skrll break; 622 1.1.2.2 skrll default: 623 1.1.2.2 skrll return EINVAL; 624 1.1.2.2 skrll } 625 1.1.2.2 skrll } 626 1.1.2.2 skrll /* If monaural is requested, aurateconv expands a monaural 627 1.1.2.2 skrll * stream to stereo. */ 628 1.1.2.2 skrll if (p->channels == 1) 629 1.1.2.2 skrll p->hw_channels = 2; 630 1.1.2.2 skrll 631 1.1.2.2 skrll switch (p->encoding) { 632 1.1.2.2 skrll case AUDIO_ENCODING_SLINEAR_BE: 633 1.1.2.2 skrll if (p->precision == 16) { 634 1.1.2.2 skrll p->sw_code = swap_bytes; 635 1.1.2.2 skrll } else { 636 1.1.2.2 skrll if (mode == AUMODE_PLAY) 637 1.1.2.2 skrll p->sw_code = linear8_to_linear16_le; 638 1.1.2.2 skrll else 639 1.1.2.2 skrll p->sw_code = linear16_to_linear8_le; 640 1.1.2.2 skrll } 641 1.1.2.2 skrll break; 642 1.1.2.2 skrll 643 1.1.2.2 skrll case AUDIO_ENCODING_SLINEAR_LE: 644 1.1.2.2 skrll if (p->precision != 16) { 645 1.1.2.2 skrll if (mode == AUMODE_PLAY) 646 1.1.2.2 skrll p->sw_code = linear8_to_linear16_le; 647 1.1.2.2 skrll else 648 1.1.2.2 skrll p->sw_code = linear16_to_linear8_le; 649 1.1.2.2 skrll } 650 1.1.2.2 skrll break; 651 1.1.2.2 skrll 652 1.1.2.2 skrll case AUDIO_ENCODING_ULINEAR_BE: 653 1.1.2.2 skrll if (p->precision == 16) { 654 1.1.2.2 skrll if (mode == AUMODE_PLAY) 655 1.1.2.2 skrll p->sw_code = 656 1.1.2.2 skrll swap_bytes_change_sign16_le; 657 1.1.2.2 skrll else 658 1.1.2.2 skrll p->sw_code = 659 1.1.2.2 skrll change_sign16_swap_bytes_le; 660 1.1.2.2 skrll } else { 661 1.1.2.2 skrll if (mode == AUMODE_PLAY) 662 1.1.2.2 skrll p->sw_code = 663 1.1.2.2 skrll ulinear8_to_slinear16_le; 664 1.1.2.2 skrll else 665 1.1.2.2 skrll p->sw_code = 666 1.1.2.2 skrll slinear16_to_ulinear8_le; 667 1.1.2.2 skrll } 668 1.1.2.2 skrll break; 669 1.1.2.2 skrll 670 1.1.2.2 skrll case AUDIO_ENCODING_ULINEAR_LE: 671 1.1.2.2 skrll if (p->precision == 16) { 672 1.1.2.2 skrll p->sw_code = change_sign16_le; 673 1.1.2.2 skrll } else { 674 1.1.2.2 skrll if (mode == AUMODE_PLAY) 675 1.1.2.2 skrll p->sw_code = 676 1.1.2.2 skrll ulinear8_to_slinear16_le; 677 1.1.2.2 skrll else 678 1.1.2.2 skrll p->sw_code = 679 1.1.2.2 skrll slinear16_to_ulinear8_le; 680 1.1.2.2 skrll } 681 1.1.2.2 skrll break; 682 1.1.2.2 skrll 683 1.1.2.2 skrll case AUDIO_ENCODING_ULAW: 684 1.1.2.2 skrll if (mode == AUMODE_PLAY) { 685 1.1.2.2 skrll p->sw_code = mulaw_to_slinear16_le; 686 1.1.2.2 skrll } else { 687 1.1.2.2 skrll p->sw_code = slinear16_to_mulaw_le; 688 1.1.2.2 skrll } 689 1.1.2.2 skrll break; 690 1.1.2.2 skrll 691 1.1.2.2 skrll case AUDIO_ENCODING_ALAW: 692 1.1.2.2 skrll if (mode == AUMODE_PLAY) { 693 1.1.2.2 skrll p->sw_code = alaw_to_slinear16_le; 694 1.1.2.2 skrll } else { 695 1.1.2.2 skrll p->sw_code = slinear16_to_alaw_le; 696 1.1.2.2 skrll } 697 1.1.2.2 skrll break; 698 1.1.2.2 skrll 699 1.1.2.2 skrll default: 700 1.1.2.2 skrll return (EINVAL); 701 1.1.2.2 skrll } 702 1.1.2.2 skrll 703 1.1.2.2 skrll if (IS_FIXED_RATE(sc->codec_if)) { 704 1.1.2.2 skrll p->hw_sample_rate = AC97_SINGLE_RATE; 705 1.1.2.2 skrll /* If hw_sample_rate is changed, aurateconv works. */ 706 1.1.2.2 skrll } else { 707 1.1.2.2 skrll if (auacer_set_rate(sc, mode, p->sample_rate)) 708 1.1.2.2 skrll return EINVAL; 709 1.1.2.2 skrll } 710 1.1.2.2 skrll 711 1.1.2.2 skrll if (mode == AUMODE_PLAY) { 712 1.1.2.2 skrll control = READ4(sc, ALI_SCR); 713 1.1.2.2 skrll control &= ~ALI_SCR_PCM_246_MASK; 714 1.1.2.2 skrll if (p->channels == 4) 715 1.1.2.2 skrll control |= ALI_SCR_PCM_4; 716 1.1.2.2 skrll else if (p->channels == 6) 717 1.1.2.2 skrll control |= ALI_SCR_PCM_6; 718 1.1.2.2 skrll WRITE4(sc, ALI_SCR, control); 719 1.1.2.2 skrll } 720 1.1.2.2 skrll } 721 1.1.2.2 skrll 722 1.1.2.2 skrll return (0); 723 1.1.2.2 skrll } 724 1.1.2.2 skrll 725 1.1.2.2 skrll int 726 1.1.2.2 skrll auacer_round_blocksize(void *v, int blk) 727 1.1.2.2 skrll { 728 1.1.2.2 skrll 729 1.1.2.2 skrll return (blk & ~0x3f); /* keep good alignment */ 730 1.1.2.2 skrll } 731 1.1.2.2 skrll 732 1.1.2.2 skrll static void 733 1.1.2.2 skrll auacer_halt(struct auacer_softc *sc, struct auacer_chan *chan) 734 1.1.2.2 skrll { 735 1.1.2.2 skrll uint32_t val; 736 1.1.2.2 skrll uint8_t port = chan->port; 737 1.1.2.2 skrll uint32_t slot; 738 1.1.2.2 skrll 739 1.1.2.2 skrll DPRINTF(ALI_DEBUG_API, ("auacer_halt: port=0x%x\n", port)); 740 1.1.2.2 skrll 741 1.1.2.2 skrll chan->intr = 0; 742 1.1.2.2 skrll 743 1.1.2.2 skrll slot = ALI_PORT2SLOT(port); 744 1.1.2.2 skrll 745 1.1.2.2 skrll val = READ4(sc, ALI_DMACR); 746 1.1.2.2 skrll val |= 1 << (slot+16); /* pause */ 747 1.1.2.2 skrll val &= ~(1 << slot); /* no start */ 748 1.1.2.2 skrll WRITE4(sc, ALI_DMACR, val); 749 1.1.2.2 skrll WRITE1(sc, port + ALI_OFF_CR, 0); 750 1.1.2.2 skrll while (READ1(sc, port + ALI_OFF_CR)) 751 1.1.2.2 skrll ; 752 1.1.2.2 skrll /* reset whole DMA things */ 753 1.1.2.2 skrll WRITE1(sc, port + ALI_OFF_CR, ALI_CR_RR); 754 1.1.2.2 skrll /* clear interrupts */ 755 1.1.2.2 skrll WRITE1(sc, port + ALI_OFF_SR, READ1(sc, port+ALI_OFF_SR) | ALI_SR_W1TC); 756 1.1.2.2 skrll WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(port)); 757 1.1.2.2 skrll } 758 1.1.2.2 skrll 759 1.1.2.2 skrll int 760 1.1.2.2 skrll auacer_halt_output(void *v) 761 1.1.2.2 skrll { 762 1.1.2.2 skrll struct auacer_softc *sc = v; 763 1.1.2.2 skrll 764 1.1.2.2 skrll DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_output\n")); 765 1.1.2.2 skrll 766 1.1.2.2 skrll auacer_halt(sc, &sc->sc_pcmo); 767 1.1.2.2 skrll 768 1.1.2.2 skrll return (0); 769 1.1.2.2 skrll } 770 1.1.2.2 skrll 771 1.1.2.2 skrll int 772 1.1.2.2 skrll auacer_halt_input(void *v) 773 1.1.2.2 skrll { 774 1.1.2.2 skrll /*struct auacer_softc *sc = v;*/ 775 1.1.2.2 skrll 776 1.1.2.2 skrll DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_input\n")); 777 1.1.2.2 skrll 778 1.1.2.2 skrll return (0); 779 1.1.2.2 skrll } 780 1.1.2.2 skrll 781 1.1.2.2 skrll int 782 1.1.2.2 skrll auacer_getdev(void *v, struct audio_device *adp) 783 1.1.2.2 skrll { 784 1.1.2.2 skrll struct auacer_softc *sc = v; 785 1.1.2.2 skrll 786 1.1.2.2 skrll DPRINTF(ALI_DEBUG_API, ("auacer_getdev\n")); 787 1.1.2.2 skrll 788 1.1.2.2 skrll *adp = sc->sc_audev; 789 1.1.2.2 skrll return (0); 790 1.1.2.2 skrll } 791 1.1.2.2 skrll 792 1.1.2.2 skrll int 793 1.1.2.2 skrll auacer_set_port(void *v, mixer_ctrl_t *cp) 794 1.1.2.2 skrll { 795 1.1.2.2 skrll struct auacer_softc *sc = v; 796 1.1.2.2 skrll 797 1.1.2.2 skrll DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_set_port\n")); 798 1.1.2.2 skrll 799 1.1.2.2 skrll return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp)); 800 1.1.2.2 skrll } 801 1.1.2.2 skrll 802 1.1.2.2 skrll int 803 1.1.2.2 skrll auacer_get_port(void *v, mixer_ctrl_t *cp) 804 1.1.2.2 skrll { 805 1.1.2.2 skrll struct auacer_softc *sc = v; 806 1.1.2.2 skrll 807 1.1.2.2 skrll DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_get_port\n")); 808 1.1.2.2 skrll 809 1.1.2.2 skrll return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp)); 810 1.1.2.2 skrll } 811 1.1.2.2 skrll 812 1.1.2.2 skrll int 813 1.1.2.2 skrll auacer_query_devinfo(void *v, mixer_devinfo_t *dp) 814 1.1.2.2 skrll { 815 1.1.2.2 skrll struct auacer_softc *sc = v; 816 1.1.2.2 skrll 817 1.1.2.2 skrll DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_query_devinfo\n")); 818 1.1.2.2 skrll 819 1.1.2.2 skrll return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp)); 820 1.1.2.2 skrll } 821 1.1.2.2 skrll 822 1.1.2.2 skrll void * 823 1.1.2.2 skrll auacer_allocm(void *v, int direction, size_t size, struct malloc_type *pool, 824 1.1.2.2 skrll int flags) 825 1.1.2.2 skrll { 826 1.1.2.2 skrll struct auacer_softc *sc = v; 827 1.1.2.2 skrll struct auacer_dma *p; 828 1.1.2.2 skrll int error; 829 1.1.2.2 skrll 830 1.1.2.2 skrll if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX)) 831 1.1.2.2 skrll return (NULL); 832 1.1.2.2 skrll 833 1.1.2.2 skrll p = malloc(sizeof(*p), pool, flags | M_ZERO); 834 1.1.2.2 skrll if (p == NULL) 835 1.1.2.2 skrll return (NULL); 836 1.1.2.2 skrll 837 1.1.2.2 skrll error = auacer_allocmem(sc, size, 0, p); 838 1.1.2.2 skrll if (error) { 839 1.1.2.2 skrll free(p, pool); 840 1.1.2.2 skrll return (NULL); 841 1.1.2.2 skrll } 842 1.1.2.2 skrll 843 1.1.2.2 skrll p->next = sc->sc_dmas; 844 1.1.2.2 skrll sc->sc_dmas = p; 845 1.1.2.2 skrll 846 1.1.2.2 skrll return (KERNADDR(p)); 847 1.1.2.2 skrll } 848 1.1.2.2 skrll 849 1.1.2.2 skrll void 850 1.1.2.2 skrll auacer_freem(void *v, void *ptr, struct malloc_type *pool) 851 1.1.2.2 skrll { 852 1.1.2.2 skrll struct auacer_softc *sc = v; 853 1.1.2.2 skrll struct auacer_dma *p, **pp; 854 1.1.2.2 skrll 855 1.1.2.2 skrll for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 856 1.1.2.2 skrll if (KERNADDR(p) == ptr) { 857 1.1.2.2 skrll auacer_freemem(sc, p); 858 1.1.2.2 skrll *pp = p->next; 859 1.1.2.2 skrll free(p, pool); 860 1.1.2.2 skrll return; 861 1.1.2.2 skrll } 862 1.1.2.2 skrll } 863 1.1.2.2 skrll } 864 1.1.2.2 skrll 865 1.1.2.2 skrll size_t 866 1.1.2.2 skrll auacer_round_buffersize(void *v, int direction, size_t size) 867 1.1.2.2 skrll { 868 1.1.2.2 skrll 869 1.1.2.2 skrll if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX)) 870 1.1.2.2 skrll size = ALI_DMALIST_MAX * ALI_DMASEG_MAX; 871 1.1.2.2 skrll 872 1.1.2.2 skrll return size; 873 1.1.2.2 skrll } 874 1.1.2.2 skrll 875 1.1.2.2 skrll paddr_t 876 1.1.2.2 skrll auacer_mappage(void *v, void *mem, off_t off, int prot) 877 1.1.2.2 skrll { 878 1.1.2.2 skrll struct auacer_softc *sc = v; 879 1.1.2.2 skrll struct auacer_dma *p; 880 1.1.2.2 skrll 881 1.1.2.2 skrll if (off < 0) 882 1.1.2.2 skrll return (-1); 883 1.1.2.2 skrll 884 1.1.2.2 skrll for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 885 1.1.2.2 skrll ; 886 1.1.2.2 skrll if (!p) 887 1.1.2.2 skrll return (-1); 888 1.1.2.2 skrll return (bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 889 1.1.2.2 skrll off, prot, BUS_DMA_WAITOK)); 890 1.1.2.2 skrll } 891 1.1.2.2 skrll 892 1.1.2.2 skrll int 893 1.1.2.2 skrll auacer_get_props(void *v) 894 1.1.2.2 skrll { 895 1.1.2.2 skrll struct auacer_softc *sc = v; 896 1.1.2.2 skrll int props; 897 1.1.2.2 skrll 898 1.1.2.2 skrll props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 899 1.1.2.2 skrll /* 900 1.1.2.2 skrll * Even if the codec is fixed-rate, set_param() succeeds for any sample 901 1.1.2.2 skrll * rate because of aurateconv. Applications can't know what rate the 902 1.1.2.2 skrll * device can process in the case of mmap(). 903 1.1.2.2 skrll */ 904 1.1.2.2 skrll if (!IS_FIXED_RATE(sc->codec_if)) 905 1.1.2.2 skrll props |= AUDIO_PROP_MMAP; 906 1.1.2.2 skrll return props; 907 1.1.2.2 skrll } 908 1.1.2.2 skrll 909 1.1.2.2 skrll static void 910 1.1.2.2 skrll auacer_add_entry(struct auacer_chan *chan) 911 1.1.2.2 skrll { 912 1.1.2.2 skrll struct auacer_dmalist *q; 913 1.1.2.2 skrll 914 1.1.2.2 skrll q = &chan->dmalist[chan->ptr]; 915 1.1.2.2 skrll 916 1.1.2.2 skrll DPRINTF(ALI_DEBUG_INTR, 917 1.1.2.2 skrll ("auacer_add_entry: %p = %x @ 0x%x\n", 918 1.1.2.2 skrll q, chan->blksize / 2, chan->p)); 919 1.1.2.2 skrll 920 1.1.2.2 skrll q->base = htole32(chan->p); 921 1.1.2.2 skrll q->len = htole32((chan->blksize / ALI_SAMPLE_SIZE) | ALI_DMAF_IOC); 922 1.1.2.2 skrll chan->p += chan->blksize; 923 1.1.2.2 skrll if (chan->p >= chan->end) 924 1.1.2.2 skrll chan->p = chan->start; 925 1.1.2.2 skrll 926 1.1.2.2 skrll if (++chan->ptr >= ALI_DMALIST_MAX) 927 1.1.2.2 skrll chan->ptr = 0; 928 1.1.2.2 skrll } 929 1.1.2.2 skrll 930 1.1.2.2 skrll static void 931 1.1.2.2 skrll auacer_upd_chan(struct auacer_softc *sc, struct auacer_chan *chan) 932 1.1.2.2 skrll { 933 1.1.2.2 skrll uint32_t sts; 934 1.1.2.2 skrll uint32_t civ; 935 1.1.2.2 skrll 936 1.1.2.2 skrll sts = READ2(sc, chan->port + ALI_OFF_SR); 937 1.1.2.2 skrll /* intr ack */ 938 1.1.2.2 skrll WRITE2(sc, chan->port + ALI_OFF_SR, sts & ALI_SR_W1TC); 939 1.1.2.2 skrll WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(chan->port)); 940 1.1.2.2 skrll 941 1.1.2.2 skrll DPRINTF(ALI_DEBUG_INTR, ("auacer_upd_chan: sts=0x%x\n", sts)); 942 1.1.2.2 skrll 943 1.1.2.2 skrll if (sts & ALI_SR_DMA_INT_FIFO) { 944 1.1.2.2 skrll printf("%s: fifo underrun # %u\n", 945 1.1.2.2 skrll sc->sc_dev.dv_xname, ++chan->fifoe); 946 1.1.2.2 skrll } 947 1.1.2.2 skrll 948 1.1.2.2 skrll civ = READ1(sc, chan->port + ALI_OFF_CIV); 949 1.1.2.2 skrll 950 1.1.2.2 skrll DPRINTF(ALI_DEBUG_INTR,("auacer_intr: civ=%u ptr=%u\n",civ,chan->ptr)); 951 1.1.2.2 skrll 952 1.1.2.2 skrll /* XXX */ 953 1.1.2.2 skrll while (chan->ptr != civ) { 954 1.1.2.2 skrll auacer_add_entry(chan); 955 1.1.2.2 skrll } 956 1.1.2.2 skrll 957 1.1.2.2 skrll WRITE1(sc, chan->port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK); 958 1.1.2.2 skrll 959 1.1.2.2 skrll while (chan->ack != civ) { 960 1.1.2.2 skrll if (chan->intr) { 961 1.1.2.2 skrll DPRINTF(ALI_DEBUG_INTR,("auacer_upd_chan: callback\n")); 962 1.1.2.2 skrll chan->intr(chan->arg); 963 1.1.2.2 skrll } 964 1.1.2.2 skrll chan->ack++; 965 1.1.2.2 skrll if (chan->ack >= ALI_DMALIST_MAX) 966 1.1.2.2 skrll chan->ack = 0; 967 1.1.2.2 skrll } 968 1.1.2.2 skrll } 969 1.1.2.2 skrll 970 1.1.2.2 skrll int 971 1.1.2.2 skrll auacer_intr(void *v) 972 1.1.2.2 skrll { 973 1.1.2.2 skrll struct auacer_softc *sc = v; 974 1.1.2.2 skrll int ret, intrs; 975 1.1.2.2 skrll 976 1.1.2.2 skrll intrs = READ4(sc, ALI_INTERRUPTSR); 977 1.1.2.2 skrll DPRINTF(ALI_DEBUG_INTR, ("auacer_intr: intrs=0x%x\n", intrs)); 978 1.1.2.2 skrll 979 1.1.2.2 skrll ret = 0; 980 1.1.2.2 skrll if (intrs & ALI_INT_PCMOUT) { 981 1.1.2.2 skrll auacer_upd_chan(sc, &sc->sc_pcmo); 982 1.1.2.2 skrll ret++; 983 1.1.2.2 skrll } 984 1.1.2.2 skrll 985 1.1.2.2 skrll return ret != 0; 986 1.1.2.2 skrll } 987 1.1.2.2 skrll 988 1.1.2.2 skrll static void 989 1.1.2.2 skrll auacer_setup_chan(struct auacer_softc *sc, struct auacer_chan *chan, 990 1.1.2.2 skrll uint32_t start, uint32_t size, uint32_t blksize, 991 1.1.2.2 skrll void (*intr)(void *), void *arg) 992 1.1.2.2 skrll { 993 1.1.2.2 skrll uint32_t port, slot; 994 1.1.2.2 skrll uint32_t offs, val; 995 1.1.2.2 skrll 996 1.1.2.2 skrll chan->start = start; 997 1.1.2.2 skrll chan->ptr = 0; 998 1.1.2.2 skrll chan->p = chan->start; 999 1.1.2.2 skrll chan->end = chan->start + size; 1000 1.1.2.2 skrll chan->blksize = blksize; 1001 1.1.2.2 skrll chan->ack = 0; 1002 1.1.2.2 skrll chan->intr = intr; 1003 1.1.2.2 skrll chan->arg = arg; 1004 1.1.2.2 skrll 1005 1.1.2.2 skrll auacer_add_entry(chan); 1006 1.1.2.2 skrll auacer_add_entry(chan); 1007 1.1.2.2 skrll 1008 1.1.2.2 skrll port = chan->port; 1009 1.1.2.2 skrll slot = ALI_PORT2SLOT(port); 1010 1.1.2.2 skrll 1011 1.1.2.2 skrll WRITE1(sc, port + ALI_OFF_CIV, 0); 1012 1.1.2.2 skrll WRITE1(sc, port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK); 1013 1.1.2.2 skrll offs = (char *)chan->dmalist - (char *)sc->sc_cdata; 1014 1.1.2.2 skrll WRITE4(sc, port + ALI_OFF_BDBAR, sc->sc_cddma + offs); 1015 1.1.2.2 skrll WRITE1(sc, port + ALI_OFF_CR, 1016 1.1.2.2 skrll ALI_CR_IOCE | ALI_CR_FEIE | ALI_CR_LVBIE | ALI_CR_RPBM); 1017 1.1.2.2 skrll val = READ4(sc, ALI_DMACR); 1018 1.1.2.2 skrll val &= ~(1 << (slot+16)); /* no pause */ 1019 1.1.2.2 skrll val |= 1 << slot; /* start */ 1020 1.1.2.2 skrll WRITE4(sc, ALI_DMACR, val); 1021 1.1.2.2 skrll } 1022 1.1.2.2 skrll 1023 1.1.2.2 skrll int 1024 1.1.2.2 skrll auacer_trigger_output(void *v, void *start, void *end, int blksize, 1025 1.1.2.2 skrll void (*intr)(void *), void *arg, struct audio_params *param) 1026 1.1.2.2 skrll { 1027 1.1.2.2 skrll struct auacer_softc *sc = v; 1028 1.1.2.2 skrll struct auacer_dma *p; 1029 1.1.2.2 skrll uint32_t size; 1030 1.1.2.2 skrll 1031 1.1.2.2 skrll DPRINTF(ALI_DEBUG_DMA, 1032 1.1.2.2 skrll ("auacer_trigger_output(%p, %p, %d, %p, %p, %p)\n", 1033 1.1.2.2 skrll start, end, blksize, intr, arg, param)); 1034 1.1.2.2 skrll 1035 1.1.2.2 skrll for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1036 1.1.2.2 skrll ; 1037 1.1.2.2 skrll if (!p) { 1038 1.1.2.2 skrll printf("auacer_trigger_output: bad addr %p\n", start); 1039 1.1.2.2 skrll return (EINVAL); 1040 1.1.2.2 skrll } 1041 1.1.2.2 skrll 1042 1.1.2.2 skrll size = (char *)end - (char *)start; 1043 1.1.2.2 skrll auacer_setup_chan(sc, &sc->sc_pcmo, DMAADDR(p), size, blksize, 1044 1.1.2.2 skrll intr, arg); 1045 1.1.2.2 skrll 1046 1.1.2.2 skrll return 0; 1047 1.1.2.2 skrll } 1048 1.1.2.2 skrll 1049 1.1.2.2 skrll int 1050 1.1.2.2 skrll auacer_trigger_input(void *v, void *start, void *end, int blksize, 1051 1.1.2.2 skrll void (*intr)(void *), void *arg, 1052 1.1.2.2 skrll struct audio_params *param) 1053 1.1.2.2 skrll { 1054 1.1.2.2 skrll return (EINVAL); 1055 1.1.2.2 skrll } 1056 1.1.2.2 skrll 1057 1.1.2.2 skrll int 1058 1.1.2.2 skrll auacer_allocmem(struct auacer_softc *sc, size_t size, size_t align, 1059 1.1.2.2 skrll struct auacer_dma *p) 1060 1.1.2.2 skrll { 1061 1.1.2.2 skrll int error; 1062 1.1.2.2 skrll 1063 1.1.2.2 skrll p->size = size; 1064 1.1.2.2 skrll error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1065 1.1.2.2 skrll p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1066 1.1.2.2 skrll &p->nsegs, BUS_DMA_NOWAIT); 1067 1.1.2.2 skrll if (error) 1068 1.1.2.2 skrll return (error); 1069 1.1.2.2 skrll 1070 1.1.2.2 skrll error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1071 1.1.2.2 skrll &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags); 1072 1.1.2.2 skrll if (error) 1073 1.1.2.2 skrll goto free; 1074 1.1.2.2 skrll 1075 1.1.2.2 skrll error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1076 1.1.2.2 skrll 0, BUS_DMA_NOWAIT, &p->map); 1077 1.1.2.2 skrll if (error) 1078 1.1.2.2 skrll goto unmap; 1079 1.1.2.2 skrll 1080 1.1.2.2 skrll error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1081 1.1.2.2 skrll BUS_DMA_NOWAIT); 1082 1.1.2.2 skrll if (error) 1083 1.1.2.2 skrll goto destroy; 1084 1.1.2.2 skrll return (0); 1085 1.1.2.2 skrll 1086 1.1.2.2 skrll destroy: 1087 1.1.2.2 skrll bus_dmamap_destroy(sc->dmat, p->map); 1088 1.1.2.2 skrll unmap: 1089 1.1.2.2 skrll bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1090 1.1.2.2 skrll free: 1091 1.1.2.2 skrll bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1092 1.1.2.2 skrll return (error); 1093 1.1.2.2 skrll } 1094 1.1.2.2 skrll 1095 1.1.2.2 skrll int 1096 1.1.2.2 skrll auacer_freemem(struct auacer_softc *sc, struct auacer_dma *p) 1097 1.1.2.2 skrll { 1098 1.1.2.2 skrll 1099 1.1.2.2 skrll bus_dmamap_unload(sc->dmat, p->map); 1100 1.1.2.2 skrll bus_dmamap_destroy(sc->dmat, p->map); 1101 1.1.2.2 skrll bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1102 1.1.2.2 skrll bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1103 1.1.2.2 skrll return (0); 1104 1.1.2.2 skrll } 1105 1.1.2.2 skrll 1106 1.1.2.2 skrll int 1107 1.1.2.2 skrll auacer_alloc_cdata(struct auacer_softc *sc) 1108 1.1.2.2 skrll { 1109 1.1.2.2 skrll bus_dma_segment_t seg; 1110 1.1.2.2 skrll int error, rseg; 1111 1.1.2.2 skrll 1112 1.1.2.2 skrll /* 1113 1.1.2.2 skrll * Allocate the control data structure, and create and load the 1114 1.1.2.2 skrll * DMA map for it. 1115 1.1.2.2 skrll */ 1116 1.1.2.2 skrll if ((error = bus_dmamem_alloc(sc->dmat, 1117 1.1.2.2 skrll sizeof(struct auacer_cdata), 1118 1.1.2.2 skrll PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1119 1.1.2.2 skrll printf("%s: unable to allocate control data, error = %d\n", 1120 1.1.2.2 skrll sc->sc_dev.dv_xname, error); 1121 1.1.2.2 skrll goto fail_0; 1122 1.1.2.2 skrll } 1123 1.1.2.2 skrll 1124 1.1.2.2 skrll if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1125 1.1.2.2 skrll sizeof(struct auacer_cdata), 1126 1.1.2.2 skrll (caddr_t *) &sc->sc_cdata, 1127 1.1.2.2 skrll sc->sc_dmamap_flags)) != 0) { 1128 1.1.2.2 skrll printf("%s: unable to map control data, error = %d\n", 1129 1.1.2.2 skrll sc->sc_dev.dv_xname, error); 1130 1.1.2.2 skrll goto fail_1; 1131 1.1.2.2 skrll } 1132 1.1.2.2 skrll 1133 1.1.2.2 skrll if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auacer_cdata), 1, 1134 1.1.2.2 skrll sizeof(struct auacer_cdata), 0, 0, 1135 1.1.2.2 skrll &sc->sc_cddmamap)) != 0) { 1136 1.1.2.2 skrll printf("%s: unable to create control data DMA map, " 1137 1.1.2.2 skrll "error = %d\n", sc->sc_dev.dv_xname, error); 1138 1.1.2.2 skrll goto fail_2; 1139 1.1.2.2 skrll } 1140 1.1.2.2 skrll 1141 1.1.2.2 skrll if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1142 1.1.2.2 skrll sc->sc_cdata, sizeof(struct auacer_cdata), 1143 1.1.2.2 skrll NULL, 0)) != 0) { 1144 1.1.2.2 skrll printf("%s: unable tp load control data DMA map, " 1145 1.1.2.2 skrll "error = %d\n", sc->sc_dev.dv_xname, error); 1146 1.1.2.2 skrll goto fail_3; 1147 1.1.2.2 skrll } 1148 1.1.2.2 skrll 1149 1.1.2.2 skrll return (0); 1150 1.1.2.2 skrll 1151 1.1.2.2 skrll fail_3: 1152 1.1.2.2 skrll bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1153 1.1.2.2 skrll fail_2: 1154 1.1.2.2 skrll bus_dmamem_unmap(sc->dmat, (caddr_t) sc->sc_cdata, 1155 1.1.2.2 skrll sizeof(struct auacer_cdata)); 1156 1.1.2.2 skrll fail_1: 1157 1.1.2.2 skrll bus_dmamem_free(sc->dmat, &seg, rseg); 1158 1.1.2.2 skrll fail_0: 1159 1.1.2.2 skrll return (error); 1160 1.1.2.2 skrll } 1161 1.1.2.2 skrll 1162 1.1.2.2 skrll void 1163 1.1.2.2 skrll auacer_powerhook(int why, void *addr) 1164 1.1.2.2 skrll { 1165 1.1.2.2 skrll struct auacer_softc *sc = (struct auacer_softc *)addr; 1166 1.1.2.2 skrll 1167 1.1.2.2 skrll switch (why) { 1168 1.1.2.2 skrll case PWR_SUSPEND: 1169 1.1.2.2 skrll case PWR_STANDBY: 1170 1.1.2.2 skrll /* Power down */ 1171 1.1.2.2 skrll DPRINTF(1, ("%s: power down\n", sc->sc_dev.dv_xname)); 1172 1.1.2.2 skrll sc->sc_suspend = why; 1173 1.1.2.2 skrll auacer_read_codec(sc, AC97_REG_EXT_AUDIO_CTRL, &sc->ext_status); 1174 1.1.2.2 skrll break; 1175 1.1.2.2 skrll 1176 1.1.2.2 skrll case PWR_RESUME: 1177 1.1.2.2 skrll /* Wake up */ 1178 1.1.2.2 skrll DPRINTF(1, ("%s: power resume\n", sc->sc_dev.dv_xname)); 1179 1.1.2.2 skrll if (sc->sc_suspend == PWR_RESUME) { 1180 1.1.2.2 skrll printf("%s: resume without suspend.\n", 1181 1.1.2.2 skrll sc->sc_dev.dv_xname); 1182 1.1.2.2 skrll sc->sc_suspend = why; 1183 1.1.2.2 skrll return; 1184 1.1.2.2 skrll } 1185 1.1.2.2 skrll sc->sc_suspend = why; 1186 1.1.2.2 skrll auacer_reset_codec(sc); 1187 1.1.2.2 skrll delay(1000); 1188 1.1.2.2 skrll sc->codec_if->vtbl->restore_ports(sc->codec_if); 1189 1.1.2.2 skrll auacer_write_codec(sc, AC97_REG_EXT_AUDIO_CTRL, sc->ext_status); 1190 1.1.2.2 skrll break; 1191 1.1.2.2 skrll 1192 1.1.2.2 skrll case PWR_SOFTSUSPEND: 1193 1.1.2.2 skrll case PWR_SOFTSTANDBY: 1194 1.1.2.2 skrll case PWR_SOFTRESUME: 1195 1.1.2.2 skrll break; 1196 1.1.2.2 skrll } 1197 1.1.2.2 skrll } 1198
Indexes created Sat Nov 01 05:10:12 GMT 2025