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auacer.c revision 1.21.12.3
      1  1.21.12.3        ad /*	$NetBSD: auacer.c,v 1.21.12.3 2008/12/13 13:38:00 ad Exp $	*/
      2        1.1  augustss 
      3        1.1  augustss /*-
      4  1.21.12.1        ad  * Copyright (c) 2004, 2008 The NetBSD Foundation, Inc.
      5        1.1  augustss  * All rights reserved.
      6        1.1  augustss  *
      7        1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8        1.1  augustss  * by Lennart Augustsson.
      9        1.1  augustss  *
     10        1.1  augustss  * Redistribution and use in source and binary forms, with or without
     11        1.1  augustss  * modification, are permitted provided that the following conditions
     12        1.1  augustss  * are met:
     13        1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     14        1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     15        1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     16        1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     17        1.1  augustss  *    documentation and/or other materials provided with the distribution.
     18        1.1  augustss  *
     19        1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20        1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21        1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22        1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23        1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24        1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25        1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26        1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27        1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28        1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29        1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     30        1.1  augustss  */
     31        1.1  augustss 
     32        1.1  augustss /*
     33        1.1  augustss  * Acer Labs M5455 audio driver
     34        1.1  augustss  *
     35        1.5  augustss  * Acer provides data sheets after signing an NDA, so this is guess work.
     36        1.1  augustss  * The chip behaves somewhat like the Intel i8x0, so this driver
     37        1.1  augustss  * is loosely based on the auich driver.  Additional information taken from
     38        1.1  augustss  * the ALSA intel8x0.c driver (which handles M5455 as well).
     39        1.1  augustss  *
     40        1.1  augustss  * As an historical note one can observe that the auich driver borrows
     41        1.1  augustss  * lot from the first NetBSD PCI audio driver, the eap driver.  But this
     42        1.1  augustss  * is not attributed anywhere.
     43        1.1  augustss  */
     44        1.1  augustss 
     45        1.1  augustss 
     46        1.1  augustss #include <sys/cdefs.h>
     47  1.21.12.3        ad __KERNEL_RCSID(0, "$NetBSD: auacer.c,v 1.21.12.3 2008/12/13 13:38:00 ad Exp $");
     48        1.1  augustss 
     49        1.1  augustss #include <sys/param.h>
     50        1.1  augustss #include <sys/systm.h>
     51        1.1  augustss #include <sys/kernel.h>
     52  1.21.12.2        ad #include <sys/kmem.h>
     53        1.1  augustss #include <sys/device.h>
     54        1.1  augustss #include <sys/fcntl.h>
     55        1.1  augustss #include <sys/proc.h>
     56        1.1  augustss 
     57        1.1  augustss #include <uvm/uvm_extern.h>	/* for PAGE_SIZE */
     58        1.1  augustss 
     59        1.1  augustss #include <dev/pci/pcidevs.h>
     60        1.1  augustss #include <dev/pci/pcivar.h>
     61        1.1  augustss #include <dev/pci/auacerreg.h>
     62        1.1  augustss 
     63        1.1  augustss #include <sys/audioio.h>
     64        1.1  augustss #include <dev/audio_if.h>
     65        1.1  augustss #include <dev/mulaw.h>
     66        1.1  augustss #include <dev/auconv.h>
     67        1.1  augustss 
     68       1.17        ad #include <sys/bus.h>
     69        1.1  augustss 
     70        1.1  augustss #include <dev/ic/ac97reg.h>
     71        1.1  augustss #include <dev/ic/ac97var.h>
     72        1.1  augustss 
     73        1.1  augustss struct auacer_dma {
     74        1.1  augustss 	bus_dmamap_t map;
     75       1.16  christos 	void *addr;
     76        1.1  augustss 	bus_dma_segment_t segs[1];
     77        1.1  augustss 	int nsegs;
     78        1.1  augustss 	size_t size;
     79        1.1  augustss 	struct auacer_dma *next;
     80        1.1  augustss };
     81        1.1  augustss 
     82        1.1  augustss #define	DMAADDR(p)	((p)->map->dm_segs[0].ds_addr)
     83        1.1  augustss #define	KERNADDR(p)	((void *)((p)->addr))
     84        1.1  augustss 
     85        1.1  augustss struct auacer_cdata {
     86        1.1  augustss 	struct auacer_dmalist ic_dmalist_pcmo[ALI_DMALIST_MAX];
     87        1.1  augustss };
     88        1.1  augustss 
     89        1.1  augustss struct auacer_chan {
     90        1.1  augustss 	uint32_t ptr;
     91        1.1  augustss 	uint32_t start, p, end;
     92        1.1  augustss 	uint32_t blksize, fifoe;
     93        1.1  augustss 	uint32_t ack;
     94        1.1  augustss 	uint32_t port;
     95        1.1  augustss 	struct auacer_dmalist *dmalist;
     96        1.1  augustss 	void (*intr)(void *);
     97        1.1  augustss 	void *arg;
     98        1.1  augustss };
     99        1.1  augustss 
    100        1.1  augustss struct auacer_softc {
    101        1.1  augustss 	struct device sc_dev;
    102        1.1  augustss 	void *sc_ih;
    103  1.21.12.1        ad 	kmutex_t sc_lock;
    104  1.21.12.1        ad 	kmutex_t sc_intr_lock;
    105        1.1  augustss 
    106        1.1  augustss 	audio_device_t sc_audev;
    107        1.1  augustss 
    108        1.1  augustss 	bus_space_tag_t iot;
    109        1.1  augustss 	bus_space_handle_t mix_ioh;
    110        1.1  augustss 	bus_space_handle_t aud_ioh;
    111        1.1  augustss 	bus_dma_tag_t dmat;
    112        1.1  augustss 
    113        1.1  augustss 	struct ac97_codec_if *codec_if;
    114        1.1  augustss 	struct ac97_host_if host_if;
    115        1.1  augustss 
    116        1.1  augustss 	/* DMA scatter-gather lists. */
    117        1.1  augustss 	bus_dmamap_t sc_cddmamap;
    118        1.1  augustss #define	sc_cddma	sc_cddmamap->dm_segs[0].ds_addr
    119        1.1  augustss 
    120        1.1  augustss 	struct auacer_cdata *sc_cdata;
    121        1.1  augustss 
    122        1.1  augustss 	struct auacer_chan sc_pcmo;
    123        1.1  augustss 
    124        1.1  augustss 	struct auacer_dma *sc_dmas;
    125        1.1  augustss 
    126        1.1  augustss 	pci_chipset_tag_t sc_pc;
    127        1.1  augustss 	pcitag_t sc_pt;
    128        1.1  augustss 
    129        1.1  augustss 	int  sc_dmamap_flags;
    130        1.1  augustss 
    131        1.4      kent #define AUACER_NFORMATS	3
    132        1.4      kent 	struct audio_format sc_formats[AUACER_NFORMATS];
    133        1.4      kent 	struct audio_encoding_set *sc_encodings;
    134        1.1  augustss };
    135        1.1  augustss 
    136        1.1  augustss #define READ1(sc, a) bus_space_read_1(sc->iot, sc->aud_ioh, a)
    137        1.1  augustss #define READ2(sc, a) bus_space_read_2(sc->iot, sc->aud_ioh, a)
    138        1.1  augustss #define READ4(sc, a) bus_space_read_4(sc->iot, sc->aud_ioh, a)
    139        1.1  augustss #define WRITE1(sc, a, v) bus_space_write_1(sc->iot, sc->aud_ioh, a, v)
    140        1.1  augustss #define WRITE2(sc, a, v) bus_space_write_2(sc->iot, sc->aud_ioh, a, v)
    141        1.1  augustss #define WRITE4(sc, a, v) bus_space_write_4(sc->iot, sc->aud_ioh, a, v)
    142        1.1  augustss 
    143        1.1  augustss /* Debug */
    144        1.1  augustss #ifdef AUACER_DEBUG
    145        1.1  augustss #define	DPRINTF(l,x)	do { if (auacer_debug & (l)) printf x; } while(0)
    146        1.1  augustss int auacer_debug = 0;
    147        1.1  augustss #define	ALI_DEBUG_CODECIO	0x0001
    148        1.1  augustss #define	ALI_DEBUG_DMA		0x0002
    149        1.1  augustss #define	ALI_DEBUG_INTR		0x0004
    150        1.1  augustss #define ALI_DEBUG_API		0x0008
    151        1.1  augustss #define ALI_DEBUG_MIXERAPI	0x0010
    152        1.1  augustss #else
    153        1.1  augustss #define	DPRINTF(x,y)	/* nothing */
    154        1.1  augustss #endif
    155        1.1  augustss 
    156       1.10   thorpej static int	auacer_intr(void *);
    157        1.1  augustss 
    158       1.10   thorpej static int	auacer_query_encoding(void *, struct audio_encoding *);
    159       1.10   thorpej static int	auacer_set_params(void *, int, int, audio_params_t *,
    160       1.10   thorpej 				  audio_params_t *, stream_filter_list_t *,
    161       1.10   thorpej 				  stream_filter_list_t *);
    162       1.10   thorpej static int	auacer_round_blocksize(void *, int, int,
    163       1.10   thorpej 				       const audio_params_t *);
    164       1.10   thorpej static int	auacer_halt_output(void *);
    165       1.10   thorpej static int	auacer_halt_input(void *);
    166       1.10   thorpej static int	auacer_getdev(void *, struct audio_device *);
    167       1.10   thorpej static int	auacer_set_port(void *, mixer_ctrl_t *);
    168       1.10   thorpej static int	auacer_get_port(void *, mixer_ctrl_t *);
    169       1.10   thorpej static int	auacer_query_devinfo(void *, mixer_devinfo_t *);
    170  1.21.12.2        ad static void	*auacer_allocm(void *, int, size_t);
    171  1.21.12.2        ad static void	auacer_freem(void *, void *, size_t);
    172       1.10   thorpej static size_t	auacer_round_buffersize(void *, int, size_t);
    173       1.10   thorpej static paddr_t	auacer_mappage(void *, void *, off_t, int);
    174       1.10   thorpej static int	auacer_get_props(void *);
    175       1.10   thorpej static int	auacer_trigger_output(void *, void *, void *, int,
    176       1.10   thorpej 				      void (*)(void *), void *,
    177       1.10   thorpej 				      const audio_params_t *);
    178       1.10   thorpej static int	auacer_trigger_input(void *, void *, void *, int,
    179       1.10   thorpej 				     void (*)(void *), void *,
    180       1.10   thorpej 				     const audio_params_t *);
    181       1.10   thorpej 
    182       1.10   thorpej static int	auacer_alloc_cdata(struct auacer_softc *);
    183       1.10   thorpej 
    184       1.10   thorpej static int	auacer_allocmem(struct auacer_softc *, size_t, size_t,
    185       1.10   thorpej 				struct auacer_dma *);
    186       1.10   thorpej static int	auacer_freemem(struct auacer_softc *, struct auacer_dma *);
    187  1.21.12.1        ad static void	auacer_get_locks(void *, kmutex_t **, kmutex_t **);
    188        1.1  augustss 
    189       1.19    dyoung static bool	auacer_resume(device_t PMF_FN_PROTO);
    190       1.10   thorpej static int	auacer_set_rate(struct auacer_softc *, int, u_int);
    191        1.1  augustss 
    192        1.1  augustss static void auacer_reset(struct auacer_softc *sc);
    193        1.1  augustss 
    194       1.10   thorpej static struct audio_hw_if auacer_hw_if = {
    195        1.6      kent 	NULL,			/* open */
    196        1.6      kent 	NULL,			/* close */
    197        1.1  augustss 	NULL,			/* drain */
    198        1.1  augustss 	auacer_query_encoding,
    199        1.1  augustss 	auacer_set_params,
    200        1.1  augustss 	auacer_round_blocksize,
    201        1.1  augustss 	NULL,			/* commit_setting */
    202        1.1  augustss 	NULL,			/* init_output */
    203        1.1  augustss 	NULL,			/* init_input */
    204        1.1  augustss 	NULL,			/* start_output */
    205        1.1  augustss 	NULL,			/* start_input */
    206        1.1  augustss 	auacer_halt_output,
    207        1.1  augustss 	auacer_halt_input,
    208        1.1  augustss 	NULL,			/* speaker_ctl */
    209        1.1  augustss 	auacer_getdev,
    210        1.1  augustss 	NULL,			/* getfd */
    211        1.1  augustss 	auacer_set_port,
    212        1.1  augustss 	auacer_get_port,
    213        1.1  augustss 	auacer_query_devinfo,
    214        1.1  augustss 	auacer_allocm,
    215        1.1  augustss 	auacer_freem,
    216        1.1  augustss 	auacer_round_buffersize,
    217        1.1  augustss 	auacer_mappage,
    218        1.1  augustss 	auacer_get_props,
    219        1.1  augustss 	auacer_trigger_output,
    220        1.1  augustss 	auacer_trigger_input,
    221        1.1  augustss 	NULL,			/* dev_ioctl */
    222       1.12  christos 	NULL,			/* powerstate */
    223  1.21.12.1        ad 	auacer_get_locks,
    224        1.1  augustss };
    225        1.1  augustss 
    226        1.4      kent #define AUACER_FORMATS_4CH	1
    227        1.4      kent #define AUACER_FORMATS_6CH	2
    228        1.4      kent static const struct audio_format auacer_formats[AUACER_NFORMATS] = {
    229        1.5  augustss 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    230        1.4      kent 	 2, AUFMT_STEREO, 0, {8000, 48000}},
    231        1.4      kent 	{NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    232        1.4      kent 	 4, AUFMT_SURROUND4, 0, {8000, 48000}},
    233        1.4      kent 	{NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    234        1.4      kent 	 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}},
    235        1.4      kent };
    236        1.4      kent 
    237       1.10   thorpej static int	auacer_attach_codec(void *, struct ac97_codec_if *);
    238       1.10   thorpej static int	auacer_read_codec(void *, uint8_t, uint16_t *);
    239       1.10   thorpej static int	auacer_write_codec(void *, uint8_t, uint16_t);
    240       1.10   thorpej static int	auacer_reset_codec(void *);
    241        1.1  augustss 
    242       1.10   thorpej static int
    243       1.15  christos auacer_match(struct device *parent, struct cfdata *match,
    244       1.14  christos     void *aux)
    245        1.1  augustss {
    246        1.7      kent 	struct pci_attach_args *pa;
    247        1.1  augustss 
    248        1.7      kent 	pa = (struct pci_attach_args *)aux;
    249        1.1  augustss 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI &&
    250        1.1  augustss 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M5455)
    251        1.1  augustss 		return 1;
    252        1.1  augustss 	return 0;
    253        1.1  augustss }
    254        1.1  augustss 
    255       1.10   thorpej static void
    256       1.15  christos auacer_attach(struct device *parent, struct device *self, void *aux)
    257        1.1  augustss {
    258        1.7      kent 	struct auacer_softc *sc;
    259        1.7      kent 	struct pci_attach_args *pa;
    260        1.1  augustss 	pci_intr_handle_t ih;
    261        1.1  augustss 	bus_size_t aud_size;
    262        1.1  augustss 	pcireg_t v;
    263        1.1  augustss 	const char *intrstr;
    264        1.4      kent 	int i;
    265        1.1  augustss 
    266        1.7      kent 	sc = (struct auacer_softc *)self;
    267        1.7      kent 	pa = aux;
    268        1.1  augustss 	aprint_normal(": Acer Labs M5455 Audio controller\n");
    269        1.1  augustss 
    270        1.1  augustss 	if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->iot,
    271        1.1  augustss 		&sc->aud_ioh, NULL, &aud_size)) {
    272        1.1  augustss 		aprint_error(": can't map i/o space\n");
    273        1.1  augustss 		return;
    274        1.1  augustss 	}
    275        1.1  augustss 
    276        1.1  augustss 	sc->sc_pc = pa->pa_pc;
    277        1.1  augustss 	sc->sc_pt = pa->pa_tag;
    278        1.1  augustss 	sc->dmat = pa->pa_dmat;
    279        1.1  augustss 
    280        1.1  augustss 	sc->sc_dmamap_flags = BUS_DMA_COHERENT;	/* XXX remove */
    281        1.1  augustss 
    282  1.21.12.1        ad 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
    283  1.21.12.1        ad 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SCHED);
    284  1.21.12.1        ad 
    285        1.1  augustss 	/* enable bus mastering */
    286        1.1  augustss 	v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    287        1.1  augustss 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
    288        1.1  augustss 	    v | PCI_COMMAND_MASTER_ENABLE);
    289        1.1  augustss 
    290        1.1  augustss 	/* Map and establish the interrupt. */
    291        1.1  augustss 	if (pci_intr_map(pa, &ih)) {
    292       1.20    cegger 		aprint_error_dev(&sc->sc_dev, "can't map interrupt\n");
    293  1.21.12.1        ad 		mutex_destroy(&sc->sc_lock);
    294  1.21.12.1        ad 		mutex_destroy(&sc->sc_intr_lock);
    295        1.1  augustss 		return;
    296        1.1  augustss 	}
    297        1.1  augustss 	intrstr = pci_intr_string(pa->pa_pc, ih);
    298  1.21.12.1        ad 	sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_SCHED,
    299        1.1  augustss 	    auacer_intr, sc);
    300        1.1  augustss 	if (sc->sc_ih == NULL) {
    301       1.20    cegger 		aprint_error_dev(&sc->sc_dev, "can't establish interrupt");
    302        1.1  augustss 		if (intrstr != NULL)
    303        1.1  augustss 			aprint_normal(" at %s", intrstr);
    304        1.1  augustss 		aprint_normal("\n");
    305  1.21.12.1        ad 		mutex_destroy(&sc->sc_lock);
    306  1.21.12.1        ad 		mutex_destroy(&sc->sc_intr_lock);
    307        1.1  augustss 		return;
    308        1.1  augustss 	}
    309       1.20    cegger 	aprint_normal_dev(&sc->sc_dev, "interrupting at %s\n", intrstr);
    310        1.1  augustss 
    311        1.1  augustss 	strlcpy(sc->sc_audev.name, "M5455 AC97", MAX_AUDIO_DEV_LEN);
    312        1.1  augustss 	snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN,
    313        1.1  augustss 		 "0x%02x", PCI_REVISION(pa->pa_class));
    314       1.20    cegger 	strlcpy(sc->sc_audev.config, device_xname(&sc->sc_dev), MAX_AUDIO_DEV_LEN);
    315        1.1  augustss 
    316        1.1  augustss 	/* Set up DMA lists. */
    317        1.1  augustss 	auacer_alloc_cdata(sc);
    318        1.1  augustss 	sc->sc_pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo;
    319        1.1  augustss 	sc->sc_pcmo.ptr = 0;
    320        1.1  augustss 	sc->sc_pcmo.port = ALI_BASE_PO;
    321        1.1  augustss 
    322        1.1  augustss 	DPRINTF(ALI_DEBUG_DMA, ("auacer_attach: lists %p\n",
    323        1.1  augustss 	    sc->sc_pcmo.dmalist));
    324        1.1  augustss 
    325        1.1  augustss 	sc->host_if.arg = sc;
    326        1.1  augustss 	sc->host_if.attach = auacer_attach_codec;
    327        1.1  augustss 	sc->host_if.read = auacer_read_codec;
    328        1.1  augustss 	sc->host_if.write = auacer_write_codec;
    329        1.1  augustss 	sc->host_if.reset = auacer_reset_codec;
    330        1.1  augustss 
    331  1.21.12.1        ad 	if (ac97_attach(&sc->host_if, self, &sc->sc_lock) != 0) {
    332  1.21.12.1        ad 		mutex_destroy(&sc->sc_lock);
    333  1.21.12.1        ad 		mutex_destroy(&sc->sc_intr_lock);
    334        1.1  augustss 		return;
    335  1.21.12.1        ad 	}
    336        1.1  augustss 
    337        1.4      kent 	/* setup audio_format */
    338        1.4      kent 	memcpy(sc->sc_formats, auacer_formats, sizeof(auacer_formats));
    339  1.21.12.3        ad 	mutex_enter(&sc->sc_lock);
    340        1.4      kent 	if (!AC97_IS_4CH(sc->codec_if))
    341        1.4      kent 		AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_4CH]);
    342        1.4      kent 	if (!AC97_IS_6CH(sc->codec_if))
    343        1.4      kent 		AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_6CH]);
    344        1.4      kent 	if (AC97_IS_FIXED_RATE(sc->codec_if)) {
    345        1.4      kent 		for (i = 0; i < AUACER_NFORMATS; i++) {
    346        1.4      kent 			sc->sc_formats[i].frequency_type = 1;
    347        1.4      kent 			sc->sc_formats[i].frequency[0] = 48000;
    348        1.4      kent 		}
    349        1.4      kent 	}
    350  1.21.12.3        ad 	mutex_exit(&sc->sc_lock);
    351        1.4      kent 
    352        1.4      kent 	if (0 != auconv_create_encodings(sc->sc_formats, AUACER_NFORMATS,
    353        1.4      kent 					 &sc->sc_encodings)) {
    354  1.21.12.1        ad 		mutex_destroy(&sc->sc_lock);
    355  1.21.12.1        ad 		mutex_destroy(&sc->sc_intr_lock);
    356        1.4      kent 		return;
    357        1.4      kent 	}
    358        1.4      kent 
    359  1.21.12.1        ad 	mutex_enter(&sc->sc_lock);
    360  1.21.12.1        ad 	mutex_spin_enter(&sc->sc_intr_lock);
    361        1.1  augustss 	auacer_reset(sc);
    362  1.21.12.1        ad 	mutex_spin_exit(&sc->sc_intr_lock);
    363  1.21.12.1        ad 	mutex_exit(&sc->sc_lock);
    364  1.21.12.1        ad 
    365  1.21.12.1        ad 	audio_attach_mi(&auacer_hw_if, sc, &sc->sc_dev);
    366       1.18  jmcneill 
    367       1.18  jmcneill 	if (!pmf_device_register(self, NULL, auacer_resume))
    368       1.18  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    369        1.1  augustss }
    370        1.1  augustss 
    371       1.10   thorpej CFATTACH_DECL(auacer, sizeof(struct auacer_softc),
    372       1.10   thorpej     auacer_match, auacer_attach, NULL, NULL);
    373       1.10   thorpej 
    374        1.1  augustss static int
    375        1.1  augustss auacer_ready_codec(struct auacer_softc *sc, int mask)
    376        1.1  augustss {
    377        1.7      kent 	int count;
    378        1.1  augustss 
    379        1.1  augustss 	for (count = 0; count < 0x7f; count++) {
    380        1.1  augustss 		int val = READ1(sc, ALI_CSPSR);
    381        1.1  augustss 		if (val & mask)
    382        1.1  augustss 			return 0;
    383        1.1  augustss 	}
    384        1.1  augustss 
    385        1.1  augustss 	aprint_normal("auacer_ready_codec: AC97 codec ready timeout.\n");
    386        1.1  augustss 	return EBUSY;
    387        1.1  augustss }
    388        1.1  augustss 
    389        1.1  augustss static int
    390        1.1  augustss auacer_sema_codec(struct auacer_softc *sc)
    391        1.1  augustss {
    392        1.9  christos 	int ttime;
    393        1.1  augustss 
    394        1.9  christos 	ttime = 100;
    395        1.9  christos 	while (ttime-- && (READ4(sc, ALI_CAS) & ALI_CAS_SEM_BUSY))
    396        1.1  augustss 		delay(1);
    397        1.9  christos 	if (!ttime)
    398        1.1  augustss 		aprint_normal("auacer_sema_codec: timeout\n");
    399        1.1  augustss 	return auacer_ready_codec(sc, ALI_CSPSR_CODEC_READY);
    400        1.1  augustss }
    401        1.1  augustss 
    402       1.10   thorpej static int
    403        1.7      kent auacer_read_codec(void *v, uint8_t reg, uint16_t *val)
    404        1.1  augustss {
    405        1.7      kent 	struct auacer_softc *sc;
    406        1.1  augustss 
    407        1.7      kent 	sc = v;
    408        1.1  augustss 	if (auacer_sema_codec(sc))
    409        1.1  augustss 		return EIO;
    410        1.1  augustss 
    411        1.1  augustss 	reg |= ALI_CPR_ADDR_READ;
    412        1.1  augustss #if 0
    413        1.1  augustss 	if (ac97->num)
    414        1.1  augustss 		reg |= ALI_CPR_ADDR_SECONDARY;
    415        1.1  augustss #endif
    416        1.1  augustss 	WRITE2(sc, ALI_CPR_ADDR, reg);
    417        1.1  augustss 	if (auacer_ready_codec(sc, ALI_CSPSR_READ_OK))
    418        1.1  augustss 		return EIO;
    419        1.1  augustss 	*val = READ2(sc, ALI_SPR);
    420        1.1  augustss 
    421        1.1  augustss 	DPRINTF(ALI_DEBUG_CODECIO, ("auacer_read_codec: reg=0x%x val=0x%x\n",
    422        1.1  augustss 				    reg, *val));
    423        1.1  augustss 
    424        1.1  augustss 	return 0;
    425        1.1  augustss }
    426        1.1  augustss 
    427        1.1  augustss int
    428        1.7      kent auacer_write_codec(void *v, uint8_t reg, uint16_t val)
    429        1.1  augustss {
    430        1.7      kent 	struct auacer_softc *sc;
    431        1.1  augustss 
    432        1.1  augustss 	DPRINTF(ALI_DEBUG_CODECIO, ("auacer_write_codec: reg=0x%x val=0x%x\n",
    433        1.1  augustss 				    reg, val));
    434        1.7      kent 	sc = v;
    435        1.1  augustss 	if (auacer_sema_codec(sc))
    436        1.1  augustss 		return EIO;
    437        1.1  augustss 	WRITE2(sc, ALI_CPR, val);
    438        1.1  augustss #if 0
    439        1.1  augustss 	if (ac97->num)
    440        1.1  augustss 		reg |= ALI_CPR_ADDR_SECONDARY;
    441        1.1  augustss #endif
    442        1.1  augustss 	WRITE2(sc, ALI_CPR_ADDR, reg);
    443        1.1  augustss 	auacer_ready_codec(sc, ALI_CSPSR_WRITE_OK);
    444        1.1  augustss 	return 0;
    445        1.1  augustss }
    446        1.1  augustss 
    447       1.10   thorpej static int
    448        1.1  augustss auacer_attach_codec(void *v, struct ac97_codec_if *cif)
    449        1.1  augustss {
    450        1.7      kent 	struct auacer_softc *sc;
    451        1.1  augustss 
    452        1.7      kent 	sc = v;
    453        1.1  augustss 	sc->codec_if = cif;
    454        1.1  augustss 	return 0;
    455        1.1  augustss }
    456        1.1  augustss 
    457       1.10   thorpej static int
    458        1.1  augustss auacer_reset_codec(void *v)
    459        1.1  augustss {
    460        1.7      kent 	struct auacer_softc *sc;
    461        1.7      kent 	uint32_t reg;
    462        1.7      kent 	int i;
    463        1.1  augustss 
    464        1.7      kent 	sc = v;
    465        1.7      kent 	i = 0;
    466        1.1  augustss 	reg = READ4(sc, ALI_SCR);
    467        1.1  augustss 	if ((reg & 2) == 0)	/* Cold required */
    468        1.1  augustss 		reg |= 2;
    469        1.1  augustss 	else
    470        1.1  augustss 		reg |= 1;	/* Warm */
    471        1.1  augustss 	reg &= ~0x80000000;	/* ACLink on */
    472        1.1  augustss 	WRITE4(sc, ALI_SCR, reg);
    473        1.1  augustss 
    474        1.1  augustss 	while (i < 10) {
    475        1.1  augustss 		if ((READ4(sc, ALI_INTERRUPTSR) & ALI_INT_GPIO) == 0)
    476        1.1  augustss 			break;
    477        1.1  augustss 		delay(50000);	/* XXX */
    478        1.1  augustss 		i++;
    479        1.1  augustss 	}
    480        1.1  augustss 	if (i == 10) {
    481        1.1  augustss 		return EIO;
    482        1.1  augustss 	}
    483        1.1  augustss 
    484        1.1  augustss 	for (i = 0; i < 10; i++) {
    485        1.1  augustss 		reg = READ4(sc, ALI_RTSR);
    486        1.1  augustss 		if (reg & 0x80) /* primary codec */
    487        1.1  augustss 			break;
    488        1.1  augustss 		WRITE4(sc, ALI_RTSR, reg | 0x80);
    489        1.1  augustss 		delay(50000);	/* XXX */
    490        1.1  augustss 	}
    491        1.1  augustss 
    492        1.1  augustss 	return 0;
    493        1.1  augustss }
    494        1.1  augustss 
    495        1.1  augustss static void
    496        1.1  augustss auacer_reset(struct auacer_softc *sc)
    497        1.1  augustss {
    498        1.1  augustss 	WRITE4(sc, ALI_SCR, ALI_SCR_RESET);
    499        1.1  augustss 	WRITE4(sc, ALI_FIFOCR1, 0x83838383);
    500        1.1  augustss 	WRITE4(sc, ALI_FIFOCR2, 0x83838383);
    501        1.1  augustss 	WRITE4(sc, ALI_FIFOCR3, 0x83838383);
    502        1.1  augustss 	WRITE4(sc, ALI_INTERFACECR, ALI_IF_PO); /* XXX pcm out only */
    503        1.1  augustss 	WRITE4(sc, ALI_INTERRUPTCR, 0x00000000);
    504        1.1  augustss 	WRITE4(sc, ALI_INTERRUPTSR, 0x00000000);
    505        1.1  augustss }
    506        1.1  augustss 
    507       1.10   thorpej static int
    508        1.1  augustss auacer_query_encoding(void *v, struct audio_encoding *aep)
    509        1.1  augustss {
    510        1.4      kent 	struct auacer_softc *sc;
    511        1.4      kent 
    512        1.1  augustss 	DPRINTF(ALI_DEBUG_API, ("auacer_query_encoding\n"));
    513        1.4      kent 	sc = v;
    514        1.4      kent 	return auconv_query_encoding(sc->sc_encodings, aep);
    515        1.1  augustss }
    516        1.1  augustss 
    517       1.10   thorpej static int
    518        1.6      kent auacer_set_rate(struct auacer_softc *sc, int mode, u_int srate)
    519        1.1  augustss {
    520        1.1  augustss 	int ret;
    521        1.6      kent 	u_int ratetmp;
    522        1.1  augustss 
    523        1.8  augustss 	DPRINTF(ALI_DEBUG_API, ("auacer_set_rate: srate=%u\n", srate));
    524        1.1  augustss 
    525        1.1  augustss 	ratetmp = srate;
    526        1.1  augustss 	if (mode == AUMODE_RECORD)
    527        1.1  augustss 		return sc->codec_if->vtbl->set_rate(sc->codec_if,
    528        1.1  augustss 		    AC97_REG_PCM_LR_ADC_RATE, &ratetmp);
    529        1.1  augustss 	ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
    530        1.1  augustss 	    AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp);
    531        1.1  augustss 	if (ret)
    532        1.1  augustss 		return ret;
    533        1.1  augustss 	ratetmp = srate;
    534        1.1  augustss 	ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
    535        1.1  augustss 	    AC97_REG_PCM_SURR_DAC_RATE, &ratetmp);
    536        1.1  augustss 	if (ret)
    537        1.1  augustss 		return ret;
    538        1.1  augustss 	ratetmp = srate;
    539        1.1  augustss 	ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
    540        1.1  augustss 	    AC97_REG_PCM_LFE_DAC_RATE, &ratetmp);
    541        1.1  augustss 	return ret;
    542        1.1  augustss }
    543        1.1  augustss 
    544       1.10   thorpej static int
    545       1.15  christos auacer_set_params(void *v, int setmode, int usemode,
    546       1.14  christos     audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil,
    547       1.14  christos     stream_filter_list_t *rfil)
    548        1.1  augustss {
    549        1.7      kent 	struct auacer_softc *sc;
    550        1.1  augustss 	struct audio_params *p;
    551        1.6      kent 	stream_filter_list_t *fil;
    552        1.1  augustss 	uint32_t control;
    553        1.4      kent 	int mode, index;
    554        1.1  augustss 
    555        1.1  augustss 	DPRINTF(ALI_DEBUG_API, ("auacer_set_params\n"));
    556        1.7      kent 	sc = v;
    557        1.1  augustss 	for (mode = AUMODE_RECORD; mode != -1;
    558        1.1  augustss 	     mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
    559        1.1  augustss 		if ((setmode & mode) == 0)
    560        1.1  augustss 			continue;
    561        1.1  augustss 
    562        1.1  augustss 		p = mode == AUMODE_PLAY ? play : rec;
    563        1.1  augustss 		if (p == NULL)
    564        1.1  augustss 			continue;
    565        1.1  augustss 
    566        1.1  augustss 		if ((p->sample_rate !=  8000) &&
    567        1.1  augustss 		    (p->sample_rate != 11025) &&
    568        1.1  augustss 		    (p->sample_rate != 12000) &&
    569        1.1  augustss 		    (p->sample_rate != 16000) &&
    570        1.1  augustss 		    (p->sample_rate != 22050) &&
    571        1.1  augustss 		    (p->sample_rate != 24000) &&
    572        1.1  augustss 		    (p->sample_rate != 32000) &&
    573        1.1  augustss 		    (p->sample_rate != 44100) &&
    574        1.1  augustss 		    (p->sample_rate != 48000))
    575        1.1  augustss 			return (EINVAL);
    576        1.1  augustss 
    577        1.6      kent 		fil = mode == AUMODE_PLAY ? pfil : rfil;
    578        1.4      kent 		index = auconv_set_converter(sc->sc_formats, AUACER_NFORMATS,
    579        1.6      kent 					     mode, p, TRUE, fil);
    580        1.4      kent 		if (index < 0)
    581        1.4      kent 			return EINVAL;
    582        1.6      kent 		if (fil->req_size > 0)
    583        1.6      kent 			p = &fil->filters[0].param;
    584        1.6      kent 		/* p points HW encoding */
    585        1.4      kent 		if (sc->sc_formats[index].frequency_type != 1
    586        1.6      kent 		    && auacer_set_rate(sc, mode, p->sample_rate))
    587        1.4      kent 			return EINVAL;
    588        1.1  augustss 		if (mode == AUMODE_PLAY) {
    589        1.1  augustss 			control = READ4(sc, ALI_SCR);
    590        1.1  augustss 			control &= ~ALI_SCR_PCM_246_MASK;
    591        1.1  augustss 			if (p->channels == 4)
    592        1.1  augustss 				control |= ALI_SCR_PCM_4;
    593        1.1  augustss 			else if (p->channels == 6)
    594        1.1  augustss 				control |= ALI_SCR_PCM_6;
    595        1.1  augustss 			WRITE4(sc, ALI_SCR, control);
    596        1.1  augustss 		}
    597        1.1  augustss 	}
    598        1.1  augustss 
    599        1.1  augustss 	return (0);
    600        1.1  augustss }
    601        1.1  augustss 
    602       1.10   thorpej static int
    603       1.15  christos auacer_round_blocksize(void *v, int blk, int mode,
    604       1.15  christos     const audio_params_t *param)
    605        1.1  augustss {
    606        1.1  augustss 
    607        1.7      kent 	return blk & ~0x3f;		/* keep good alignment */
    608        1.1  augustss }
    609        1.1  augustss 
    610        1.1  augustss static void
    611        1.1  augustss auacer_halt(struct auacer_softc *sc, struct auacer_chan *chan)
    612        1.1  augustss {
    613        1.1  augustss 	uint32_t val;
    614        1.7      kent 	uint8_t port;
    615        1.1  augustss 	uint32_t slot;
    616        1.1  augustss 
    617        1.7      kent 	port = chan->port;
    618        1.1  augustss 	DPRINTF(ALI_DEBUG_API, ("auacer_halt: port=0x%x\n", port));
    619        1.1  augustss 	chan->intr = 0;
    620        1.1  augustss 
    621        1.1  augustss 	slot = ALI_PORT2SLOT(port);
    622        1.1  augustss 
    623        1.1  augustss 	val = READ4(sc, ALI_DMACR);
    624        1.1  augustss 	val |= 1 << (slot+16); /* pause */
    625        1.1  augustss 	val &= ~(1 << slot); /* no start */
    626        1.1  augustss 	WRITE4(sc, ALI_DMACR, val);
    627        1.1  augustss 	WRITE1(sc, port + ALI_OFF_CR, 0);
    628        1.1  augustss 	while (READ1(sc, port + ALI_OFF_CR))
    629        1.1  augustss 		;
    630        1.1  augustss 	/* reset whole DMA things */
    631        1.1  augustss 	WRITE1(sc, port + ALI_OFF_CR, ALI_CR_RR);
    632        1.1  augustss 	/* clear interrupts */
    633        1.1  augustss 	WRITE1(sc, port + ALI_OFF_SR, READ1(sc, port+ALI_OFF_SR) | ALI_SR_W1TC);
    634        1.1  augustss 	WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(port));
    635        1.1  augustss }
    636        1.1  augustss 
    637       1.10   thorpej static int
    638        1.1  augustss auacer_halt_output(void *v)
    639        1.1  augustss {
    640        1.7      kent 	struct auacer_softc *sc;
    641        1.1  augustss 
    642        1.1  augustss 	DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_output\n"));
    643        1.7      kent 	sc = v;
    644        1.1  augustss 	auacer_halt(sc, &sc->sc_pcmo);
    645        1.1  augustss 
    646        1.7      kent 	return 0;
    647        1.1  augustss }
    648        1.1  augustss 
    649       1.10   thorpej static int
    650       1.15  christos auacer_halt_input(void *v)
    651        1.1  augustss {
    652        1.1  augustss 	DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_input\n"));
    653        1.1  augustss 
    654        1.7      kent 	return 0;
    655        1.1  augustss }
    656        1.1  augustss 
    657       1.10   thorpej static int
    658        1.1  augustss auacer_getdev(void *v, struct audio_device *adp)
    659        1.1  augustss {
    660        1.7      kent 	struct auacer_softc *sc;
    661        1.1  augustss 
    662        1.1  augustss 	DPRINTF(ALI_DEBUG_API, ("auacer_getdev\n"));
    663        1.7      kent 	sc = v;
    664        1.1  augustss 	*adp = sc->sc_audev;
    665        1.7      kent 	return 0;
    666        1.1  augustss }
    667        1.1  augustss 
    668       1.10   thorpej static int
    669        1.1  augustss auacer_set_port(void *v, mixer_ctrl_t *cp)
    670        1.1  augustss {
    671        1.7      kent 	struct auacer_softc *sc;
    672        1.1  augustss 
    673        1.1  augustss 	DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_set_port\n"));
    674        1.7      kent 	sc = v;
    675        1.7      kent 	return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp);
    676        1.1  augustss }
    677        1.1  augustss 
    678       1.10   thorpej static int
    679        1.1  augustss auacer_get_port(void *v, mixer_ctrl_t *cp)
    680        1.1  augustss {
    681        1.7      kent 	struct auacer_softc *sc;
    682        1.1  augustss 
    683        1.1  augustss 	DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_get_port\n"));
    684        1.7      kent 	sc = v;
    685        1.7      kent 	return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp);
    686        1.1  augustss }
    687        1.1  augustss 
    688       1.10   thorpej static int
    689        1.1  augustss auacer_query_devinfo(void *v, mixer_devinfo_t *dp)
    690        1.1  augustss {
    691        1.7      kent 	struct auacer_softc *sc;
    692        1.1  augustss 
    693        1.1  augustss 	DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_query_devinfo\n"));
    694        1.7      kent 	sc = v;
    695        1.7      kent 	return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp);
    696        1.1  augustss }
    697        1.1  augustss 
    698       1.10   thorpej static void *
    699  1.21.12.2        ad auacer_allocm(void *v, int direction, size_t size)
    700        1.1  augustss {
    701        1.7      kent 	struct auacer_softc *sc;
    702        1.1  augustss 	struct auacer_dma *p;
    703        1.1  augustss 	int error;
    704        1.1  augustss 
    705        1.1  augustss 	if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX))
    706        1.7      kent 		return NULL;
    707        1.1  augustss 
    708  1.21.12.2        ad 	p = kmem_zalloc(sizeof(*p), KM_SLEEP);
    709        1.1  augustss 	if (p == NULL)
    710        1.7      kent 		return NULL;
    711        1.7      kent 	sc = v;
    712        1.1  augustss 	error = auacer_allocmem(sc, size, 0, p);
    713        1.1  augustss 	if (error) {
    714  1.21.12.2        ad 		kmem_free(p, sizeof(*p));
    715        1.7      kent 		return NULL;
    716        1.1  augustss 	}
    717        1.1  augustss 
    718        1.1  augustss 	p->next = sc->sc_dmas;
    719        1.1  augustss 	sc->sc_dmas = p;
    720        1.1  augustss 
    721        1.7      kent 	return KERNADDR(p);
    722        1.1  augustss }
    723        1.1  augustss 
    724       1.10   thorpej static void
    725  1.21.12.2        ad auacer_freem(void *v, void *ptr, size_t size)
    726        1.1  augustss {
    727        1.7      kent 	struct auacer_softc *sc;
    728        1.1  augustss 	struct auacer_dma *p, **pp;
    729        1.1  augustss 
    730        1.7      kent 	sc = v;
    731        1.1  augustss 	for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
    732        1.1  augustss 		if (KERNADDR(p) == ptr) {
    733        1.1  augustss 			auacer_freemem(sc, p);
    734        1.1  augustss 			*pp = p->next;
    735  1.21.12.2        ad 			kmem_free(p, sizeof(*p));
    736        1.1  augustss 			return;
    737        1.1  augustss 		}
    738        1.1  augustss 	}
    739        1.1  augustss }
    740        1.1  augustss 
    741       1.10   thorpej static size_t
    742       1.15  christos auacer_round_buffersize(void *v, int direction, size_t size)
    743        1.1  augustss {
    744        1.1  augustss 
    745        1.1  augustss 	if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX))
    746        1.1  augustss 		size = ALI_DMALIST_MAX * ALI_DMASEG_MAX;
    747        1.1  augustss 
    748        1.1  augustss 	return size;
    749        1.1  augustss }
    750        1.1  augustss 
    751       1.10   thorpej static paddr_t
    752        1.1  augustss auacer_mappage(void *v, void *mem, off_t off, int prot)
    753        1.1  augustss {
    754        1.7      kent 	struct auacer_softc *sc;
    755        1.1  augustss 	struct auacer_dma *p;
    756        1.1  augustss 
    757        1.1  augustss 	if (off < 0)
    758        1.7      kent 		return -1;
    759        1.7      kent 	sc = v;
    760        1.1  augustss 	for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next)
    761        1.7      kent 		continue;
    762        1.7      kent 	if (p == NULL)
    763        1.7      kent 		return -1;
    764        1.7      kent 	return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs,
    765        1.7      kent 	    off, prot, BUS_DMA_WAITOK);
    766        1.1  augustss }
    767        1.1  augustss 
    768       1.10   thorpej static int
    769        1.1  augustss auacer_get_props(void *v)
    770        1.1  augustss {
    771        1.7      kent 	struct auacer_softc *sc;
    772        1.1  augustss 	int props;
    773        1.1  augustss 
    774        1.7      kent 	sc = v;
    775        1.1  augustss 	props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
    776        1.1  augustss 	/*
    777        1.1  augustss 	 * Even if the codec is fixed-rate, set_param() succeeds for any sample
    778        1.1  augustss 	 * rate because of aurateconv.  Applications can't know what rate the
    779        1.1  augustss 	 * device can process in the case of mmap().
    780        1.1  augustss 	 */
    781        1.3      kent 	if (!AC97_IS_FIXED_RATE(sc->codec_if))
    782        1.1  augustss 		props |= AUDIO_PROP_MMAP;
    783        1.1  augustss 	return props;
    784        1.1  augustss }
    785        1.1  augustss 
    786        1.1  augustss static void
    787  1.21.12.1        ad auacer_get_locks(void *v, kmutex_t **intr, kmutex_t **proc)
    788  1.21.12.1        ad {
    789  1.21.12.1        ad 	struct auacer_softc *sc;
    790  1.21.12.1        ad 
    791  1.21.12.1        ad 	sc = v;
    792  1.21.12.1        ad 	*intr = &sc->sc_intr_lock;
    793  1.21.12.1        ad 	*proc = &sc->sc_lock;
    794  1.21.12.1        ad }
    795  1.21.12.1        ad 
    796  1.21.12.1        ad static void
    797        1.1  augustss auacer_add_entry(struct auacer_chan *chan)
    798        1.1  augustss {
    799        1.1  augustss 	struct auacer_dmalist *q;
    800        1.1  augustss 
    801        1.1  augustss 	q = &chan->dmalist[chan->ptr];
    802        1.1  augustss 
    803        1.1  augustss 	DPRINTF(ALI_DEBUG_INTR,
    804        1.1  augustss 		("auacer_add_entry: %p = %x @ 0x%x\n",
    805        1.1  augustss 		 q, chan->blksize / 2, chan->p));
    806        1.1  augustss 
    807        1.1  augustss 	q->base = htole32(chan->p);
    808        1.1  augustss 	q->len = htole32((chan->blksize / ALI_SAMPLE_SIZE) | ALI_DMAF_IOC);
    809        1.1  augustss 	chan->p += chan->blksize;
    810        1.1  augustss 	if (chan->p >= chan->end)
    811        1.1  augustss 		chan->p = chan->start;
    812        1.7      kent 
    813        1.1  augustss 	if (++chan->ptr >= ALI_DMALIST_MAX)
    814        1.1  augustss 		chan->ptr = 0;
    815        1.1  augustss }
    816        1.1  augustss 
    817        1.1  augustss static void
    818        1.1  augustss auacer_upd_chan(struct auacer_softc *sc, struct auacer_chan *chan)
    819        1.1  augustss {
    820        1.1  augustss 	uint32_t sts;
    821        1.1  augustss 	uint32_t civ;
    822        1.1  augustss 
    823        1.1  augustss 	sts = READ2(sc, chan->port + ALI_OFF_SR);
    824        1.1  augustss 	/* intr ack */
    825        1.1  augustss 	WRITE2(sc, chan->port + ALI_OFF_SR, sts & ALI_SR_W1TC);
    826        1.1  augustss 	WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(chan->port));
    827        1.1  augustss 
    828        1.1  augustss 	DPRINTF(ALI_DEBUG_INTR, ("auacer_upd_chan: sts=0x%x\n", sts));
    829        1.1  augustss 
    830        1.1  augustss 	if (sts & ALI_SR_DMA_INT_FIFO) {
    831        1.1  augustss 		printf("%s: fifo underrun # %u\n",
    832       1.20    cegger 		       device_xname(&sc->sc_dev), ++chan->fifoe);
    833        1.1  augustss 	}
    834        1.1  augustss 
    835        1.1  augustss 	civ = READ1(sc, chan->port + ALI_OFF_CIV);
    836        1.7      kent 
    837        1.1  augustss 	DPRINTF(ALI_DEBUG_INTR,("auacer_intr: civ=%u ptr=%u\n",civ,chan->ptr));
    838        1.7      kent 
    839        1.1  augustss 	/* XXX */
    840        1.1  augustss 	while (chan->ptr != civ) {
    841        1.1  augustss 		auacer_add_entry(chan);
    842        1.1  augustss 	}
    843        1.1  augustss 
    844        1.1  augustss 	WRITE1(sc, chan->port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK);
    845        1.1  augustss 
    846        1.1  augustss 	while (chan->ack != civ) {
    847        1.1  augustss 		if (chan->intr) {
    848        1.1  augustss 			DPRINTF(ALI_DEBUG_INTR,("auacer_upd_chan: callback\n"));
    849        1.1  augustss 			chan->intr(chan->arg);
    850        1.1  augustss 		}
    851        1.1  augustss 		chan->ack++;
    852        1.1  augustss 		if (chan->ack >= ALI_DMALIST_MAX)
    853        1.1  augustss 			chan->ack = 0;
    854        1.1  augustss 	}
    855        1.1  augustss }
    856        1.1  augustss 
    857       1.10   thorpej static int
    858        1.1  augustss auacer_intr(void *v)
    859        1.1  augustss {
    860        1.7      kent 	struct auacer_softc *sc;
    861        1.1  augustss 	int ret, intrs;
    862        1.1  augustss 
    863        1.7      kent 	sc = v;
    864        1.1  augustss 
    865  1.21.12.1        ad 	DPRINTF(ALI_DEBUG_INTR, ("auacer_intr: intrs=0x%x\n",
    866  1.21.12.1        ad 	    READ4(sc, ALI_INTERRUPTSR)));
    867  1.21.12.1        ad 
    868  1.21.12.1        ad 	mutex_spin_enter(&sc->sc_intr_lock);
    869  1.21.12.1        ad 	intrs = READ4(sc, ALI_INTERRUPTSR);
    870        1.1  augustss 	ret = 0;
    871        1.1  augustss 	if (intrs & ALI_INT_PCMOUT) {
    872        1.1  augustss 		auacer_upd_chan(sc, &sc->sc_pcmo);
    873        1.1  augustss 		ret++;
    874        1.1  augustss 	}
    875  1.21.12.1        ad 	mutex_spin_exit(&sc->sc_intr_lock);
    876        1.1  augustss 
    877        1.1  augustss 	return ret != 0;
    878        1.1  augustss }
    879        1.1  augustss 
    880        1.1  augustss static void
    881        1.1  augustss auacer_setup_chan(struct auacer_softc *sc, struct auacer_chan *chan,
    882        1.1  augustss 		  uint32_t start, uint32_t size, uint32_t blksize,
    883        1.1  augustss 		  void (*intr)(void *), void *arg)
    884        1.1  augustss {
    885        1.1  augustss 	uint32_t port, slot;
    886        1.1  augustss 	uint32_t offs, val;
    887        1.1  augustss 
    888        1.1  augustss 	chan->start = start;
    889        1.1  augustss 	chan->ptr = 0;
    890        1.1  augustss 	chan->p = chan->start;
    891        1.1  augustss 	chan->end = chan->start + size;
    892        1.1  augustss 	chan->blksize = blksize;
    893        1.1  augustss 	chan->ack = 0;
    894        1.1  augustss 	chan->intr = intr;
    895        1.1  augustss 	chan->arg = arg;
    896        1.1  augustss 
    897        1.1  augustss 	auacer_add_entry(chan);
    898        1.1  augustss 	auacer_add_entry(chan);
    899        1.1  augustss 
    900        1.1  augustss 	port = chan->port;
    901        1.1  augustss 	slot = ALI_PORT2SLOT(port);
    902        1.1  augustss 
    903        1.1  augustss 	WRITE1(sc, port + ALI_OFF_CIV, 0);
    904        1.1  augustss 	WRITE1(sc, port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK);
    905        1.1  augustss 	offs = (char *)chan->dmalist - (char *)sc->sc_cdata;
    906        1.1  augustss 	WRITE4(sc, port + ALI_OFF_BDBAR, sc->sc_cddma + offs);
    907        1.1  augustss 	WRITE1(sc, port + ALI_OFF_CR,
    908        1.1  augustss 	       ALI_CR_IOCE | ALI_CR_FEIE | ALI_CR_LVBIE | ALI_CR_RPBM);
    909        1.1  augustss 	val = READ4(sc, ALI_DMACR);
    910        1.1  augustss 	val &= ~(1 << (slot+16)); /* no pause */
    911        1.1  augustss 	val |= 1 << slot;	/* start */
    912        1.1  augustss 	WRITE4(sc, ALI_DMACR, val);
    913        1.1  augustss }
    914        1.1  augustss 
    915       1.10   thorpej static int
    916        1.1  augustss auacer_trigger_output(void *v, void *start, void *end, int blksize,
    917       1.15  christos     void (*intr)(void *), void *arg, const audio_params_t *param)
    918        1.1  augustss {
    919        1.7      kent 	struct auacer_softc *sc;
    920        1.1  augustss 	struct auacer_dma *p;
    921        1.1  augustss 	uint32_t size;
    922        1.1  augustss 
    923        1.1  augustss 	DPRINTF(ALI_DEBUG_DMA,
    924        1.1  augustss 		("auacer_trigger_output(%p, %p, %d, %p, %p, %p)\n",
    925        1.1  augustss 		 start, end, blksize, intr, arg, param));
    926        1.7      kent 	sc = v;
    927        1.1  augustss 	for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
    928        1.7      kent 		continue;
    929        1.1  augustss 	if (!p) {
    930        1.1  augustss 		printf("auacer_trigger_output: bad addr %p\n", start);
    931        1.1  augustss 		return (EINVAL);
    932        1.1  augustss 	}
    933        1.1  augustss 
    934        1.1  augustss 	size = (char *)end - (char *)start;
    935        1.1  augustss 	auacer_setup_chan(sc, &sc->sc_pcmo, DMAADDR(p), size, blksize,
    936        1.1  augustss 			  intr, arg);
    937        1.1  augustss 
    938        1.1  augustss 	return 0;
    939        1.1  augustss }
    940        1.1  augustss 
    941       1.10   thorpej static int
    942       1.15  christos auacer_trigger_input(void *v, void *start, void *end,
    943       1.15  christos     int blksize, void (*intr)(void *), void *arg,
    944       1.15  christos     const audio_params_t *param)
    945        1.1  augustss {
    946        1.7      kent 	return EINVAL;
    947        1.1  augustss }
    948        1.1  augustss 
    949       1.10   thorpej static int
    950        1.1  augustss auacer_allocmem(struct auacer_softc *sc, size_t size, size_t align,
    951        1.1  augustss     struct auacer_dma *p)
    952        1.1  augustss {
    953        1.1  augustss 	int error;
    954        1.1  augustss 
    955        1.1  augustss 	p->size = size;
    956        1.1  augustss 	error = bus_dmamem_alloc(sc->dmat, p->size, align, 0,
    957        1.1  augustss 				 p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
    958  1.21.12.1        ad 				 &p->nsegs, BUS_DMA_WAITOK);
    959        1.1  augustss 	if (error)
    960        1.7      kent 		return error;
    961        1.1  augustss 
    962        1.1  augustss 	error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size,
    963  1.21.12.1        ad 			       &p->addr, BUS_DMA_WAITOK|sc->sc_dmamap_flags);
    964        1.1  augustss 	if (error)
    965        1.1  augustss 		goto free;
    966        1.1  augustss 
    967        1.1  augustss 	error = bus_dmamap_create(sc->dmat, p->size, 1, p->size,
    968  1.21.12.1        ad 				  0, BUS_DMA_WAITOK, &p->map);
    969        1.1  augustss 	if (error)
    970        1.1  augustss 		goto unmap;
    971        1.1  augustss 
    972        1.1  augustss 	error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL,
    973  1.21.12.1        ad 				BUS_DMA_WAITOK);
    974        1.1  augustss 	if (error)
    975        1.1  augustss 		goto destroy;
    976        1.1  augustss 	return (0);
    977        1.1  augustss 
    978        1.1  augustss  destroy:
    979        1.1  augustss 	bus_dmamap_destroy(sc->dmat, p->map);
    980        1.1  augustss  unmap:
    981        1.1  augustss 	bus_dmamem_unmap(sc->dmat, p->addr, p->size);
    982        1.1  augustss  free:
    983        1.1  augustss 	bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
    984        1.7      kent 	return error;
    985        1.1  augustss }
    986        1.1  augustss 
    987       1.10   thorpej static int
    988        1.1  augustss auacer_freemem(struct auacer_softc *sc, struct auacer_dma *p)
    989        1.1  augustss {
    990        1.1  augustss 
    991        1.1  augustss 	bus_dmamap_unload(sc->dmat, p->map);
    992        1.1  augustss 	bus_dmamap_destroy(sc->dmat, p->map);
    993        1.1  augustss 	bus_dmamem_unmap(sc->dmat, p->addr, p->size);
    994        1.1  augustss 	bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
    995        1.7      kent 	return 0;
    996        1.1  augustss }
    997        1.1  augustss 
    998       1.10   thorpej static int
    999        1.1  augustss auacer_alloc_cdata(struct auacer_softc *sc)
   1000        1.1  augustss {
   1001        1.1  augustss 	bus_dma_segment_t seg;
   1002        1.1  augustss 	int error, rseg;
   1003        1.1  augustss 
   1004        1.1  augustss 	/*
   1005        1.1  augustss 	 * Allocate the control data structure, and create and load the
   1006        1.1  augustss 	 * DMA map for it.
   1007        1.1  augustss 	 */
   1008        1.1  augustss 	if ((error = bus_dmamem_alloc(sc->dmat,
   1009        1.1  augustss 				      sizeof(struct auacer_cdata),
   1010        1.1  augustss 				      PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) {
   1011       1.20    cegger 		aprint_error_dev(&sc->sc_dev, "unable to allocate control data, error = %d\n",
   1012       1.20    cegger 		    error);
   1013        1.1  augustss 		goto fail_0;
   1014        1.1  augustss 	}
   1015        1.1  augustss 
   1016        1.1  augustss 	if ((error = bus_dmamem_map(sc->dmat, &seg, rseg,
   1017        1.1  augustss 				    sizeof(struct auacer_cdata),
   1018       1.16  christos 				    (void **) &sc->sc_cdata,
   1019        1.1  augustss 				    sc->sc_dmamap_flags)) != 0) {
   1020       1.20    cegger 		aprint_error_dev(&sc->sc_dev, "unable to map control data, error = %d\n",
   1021       1.20    cegger 		    error);
   1022        1.1  augustss 		goto fail_1;
   1023        1.1  augustss 	}
   1024        1.1  augustss 
   1025        1.1  augustss 	if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auacer_cdata), 1,
   1026        1.1  augustss 				       sizeof(struct auacer_cdata), 0, 0,
   1027        1.1  augustss 				       &sc->sc_cddmamap)) != 0) {
   1028       1.20    cegger 		aprint_error_dev(&sc->sc_dev, "unable to create control data DMA map, "
   1029       1.20    cegger 		    "error = %d\n", error);
   1030        1.1  augustss 		goto fail_2;
   1031        1.1  augustss 	}
   1032        1.1  augustss 
   1033        1.1  augustss 	if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap,
   1034        1.1  augustss 				     sc->sc_cdata, sizeof(struct auacer_cdata),
   1035        1.1  augustss 				     NULL, 0)) != 0) {
   1036       1.20    cegger 		aprint_error_dev(&sc->sc_dev, "unable to load control data DMA map, "
   1037       1.20    cegger 		    "error = %d\n", error);
   1038        1.1  augustss 		goto fail_3;
   1039        1.1  augustss 	}
   1040        1.1  augustss 
   1041        1.7      kent 	return 0;
   1042        1.1  augustss 
   1043        1.1  augustss  fail_3:
   1044        1.1  augustss 	bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap);
   1045        1.1  augustss  fail_2:
   1046       1.16  christos 	bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata,
   1047        1.1  augustss 	    sizeof(struct auacer_cdata));
   1048        1.1  augustss  fail_1:
   1049        1.1  augustss 	bus_dmamem_free(sc->dmat, &seg, rseg);
   1050        1.1  augustss  fail_0:
   1051        1.7      kent 	return error;
   1052        1.1  augustss }
   1053        1.1  augustss 
   1054       1.18  jmcneill static bool
   1055       1.19    dyoung auacer_resume(device_t dv PMF_FN_ARGS)
   1056        1.1  augustss {
   1057       1.18  jmcneill 	struct auacer_softc *sc = device_private(dv);
   1058       1.18  jmcneill 
   1059  1.21.12.1        ad 	mutex_enter(&sc->sc_lock);
   1060  1.21.12.1        ad 	mutex_spin_enter(&sc->sc_intr_lock);
   1061       1.18  jmcneill 	auacer_reset_codec(sc);
   1062  1.21.12.1        ad 	mutex_spin_exit(&sc->sc_intr_lock);
   1063       1.18  jmcneill 	delay(1000);
   1064       1.18  jmcneill 	sc->codec_if->vtbl->restore_ports(sc->codec_if);
   1065  1.21.12.1        ad 	mutex_exit(&sc->sc_lock);
   1066        1.1  augustss 
   1067       1.18  jmcneill 	return true;
   1068        1.1  augustss }
   1069