auacer.c revision 1.23 1 1.23 cegger /* $NetBSD: auacer.c,v 1.23 2009/05/06 10:34:32 cegger Exp $ */
2 1.1 augustss
3 1.1 augustss /*-
4 1.1 augustss * Copyright (c) 2004 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.1 augustss * by Lennart Augustsson.
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss *
19 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
30 1.1 augustss */
31 1.1 augustss
32 1.1 augustss /*
33 1.1 augustss * Acer Labs M5455 audio driver
34 1.1 augustss *
35 1.5 augustss * Acer provides data sheets after signing an NDA, so this is guess work.
36 1.1 augustss * The chip behaves somewhat like the Intel i8x0, so this driver
37 1.1 augustss * is loosely based on the auich driver. Additional information taken from
38 1.1 augustss * the ALSA intel8x0.c driver (which handles M5455 as well).
39 1.1 augustss *
40 1.1 augustss * As an historical note one can observe that the auich driver borrows
41 1.1 augustss * lot from the first NetBSD PCI audio driver, the eap driver. But this
42 1.1 augustss * is not attributed anywhere.
43 1.1 augustss */
44 1.1 augustss
45 1.1 augustss
46 1.1 augustss #include <sys/cdefs.h>
47 1.23 cegger __KERNEL_RCSID(0, "$NetBSD: auacer.c,v 1.23 2009/05/06 10:34:32 cegger Exp $");
48 1.1 augustss
49 1.1 augustss #include <sys/param.h>
50 1.1 augustss #include <sys/systm.h>
51 1.1 augustss #include <sys/kernel.h>
52 1.1 augustss #include <sys/malloc.h>
53 1.1 augustss #include <sys/device.h>
54 1.1 augustss #include <sys/fcntl.h>
55 1.1 augustss #include <sys/proc.h>
56 1.1 augustss
57 1.1 augustss #include <uvm/uvm_extern.h> /* for PAGE_SIZE */
58 1.1 augustss
59 1.1 augustss #include <dev/pci/pcidevs.h>
60 1.1 augustss #include <dev/pci/pcivar.h>
61 1.1 augustss #include <dev/pci/auacerreg.h>
62 1.1 augustss
63 1.1 augustss #include <sys/audioio.h>
64 1.1 augustss #include <dev/audio_if.h>
65 1.1 augustss #include <dev/mulaw.h>
66 1.1 augustss #include <dev/auconv.h>
67 1.1 augustss
68 1.17 ad #include <sys/bus.h>
69 1.1 augustss
70 1.1 augustss #include <dev/ic/ac97reg.h>
71 1.1 augustss #include <dev/ic/ac97var.h>
72 1.1 augustss
73 1.1 augustss struct auacer_dma {
74 1.1 augustss bus_dmamap_t map;
75 1.16 christos void *addr;
76 1.1 augustss bus_dma_segment_t segs[1];
77 1.1 augustss int nsegs;
78 1.1 augustss size_t size;
79 1.1 augustss struct auacer_dma *next;
80 1.1 augustss };
81 1.1 augustss
82 1.1 augustss #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr)
83 1.1 augustss #define KERNADDR(p) ((void *)((p)->addr))
84 1.1 augustss
85 1.1 augustss struct auacer_cdata {
86 1.1 augustss struct auacer_dmalist ic_dmalist_pcmo[ALI_DMALIST_MAX];
87 1.1 augustss };
88 1.1 augustss
89 1.1 augustss struct auacer_chan {
90 1.1 augustss uint32_t ptr;
91 1.1 augustss uint32_t start, p, end;
92 1.1 augustss uint32_t blksize, fifoe;
93 1.1 augustss uint32_t ack;
94 1.1 augustss uint32_t port;
95 1.1 augustss struct auacer_dmalist *dmalist;
96 1.1 augustss void (*intr)(void *);
97 1.1 augustss void *arg;
98 1.1 augustss };
99 1.1 augustss
100 1.1 augustss struct auacer_softc {
101 1.1 augustss struct device sc_dev;
102 1.1 augustss void *sc_ih;
103 1.1 augustss
104 1.1 augustss audio_device_t sc_audev;
105 1.1 augustss
106 1.1 augustss bus_space_tag_t iot;
107 1.1 augustss bus_space_handle_t mix_ioh;
108 1.1 augustss bus_space_handle_t aud_ioh;
109 1.1 augustss bus_dma_tag_t dmat;
110 1.1 augustss
111 1.1 augustss struct ac97_codec_if *codec_if;
112 1.1 augustss struct ac97_host_if host_if;
113 1.1 augustss
114 1.1 augustss /* DMA scatter-gather lists. */
115 1.1 augustss bus_dmamap_t sc_cddmamap;
116 1.1 augustss #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
117 1.1 augustss
118 1.1 augustss struct auacer_cdata *sc_cdata;
119 1.1 augustss
120 1.1 augustss struct auacer_chan sc_pcmo;
121 1.1 augustss
122 1.1 augustss struct auacer_dma *sc_dmas;
123 1.1 augustss
124 1.1 augustss pci_chipset_tag_t sc_pc;
125 1.1 augustss pcitag_t sc_pt;
126 1.1 augustss
127 1.1 augustss int sc_dmamap_flags;
128 1.1 augustss
129 1.4 kent #define AUACER_NFORMATS 3
130 1.4 kent struct audio_format sc_formats[AUACER_NFORMATS];
131 1.4 kent struct audio_encoding_set *sc_encodings;
132 1.1 augustss };
133 1.1 augustss
134 1.1 augustss #define READ1(sc, a) bus_space_read_1(sc->iot, sc->aud_ioh, a)
135 1.1 augustss #define READ2(sc, a) bus_space_read_2(sc->iot, sc->aud_ioh, a)
136 1.1 augustss #define READ4(sc, a) bus_space_read_4(sc->iot, sc->aud_ioh, a)
137 1.1 augustss #define WRITE1(sc, a, v) bus_space_write_1(sc->iot, sc->aud_ioh, a, v)
138 1.1 augustss #define WRITE2(sc, a, v) bus_space_write_2(sc->iot, sc->aud_ioh, a, v)
139 1.1 augustss #define WRITE4(sc, a, v) bus_space_write_4(sc->iot, sc->aud_ioh, a, v)
140 1.1 augustss
141 1.1 augustss /* Debug */
142 1.1 augustss #ifdef AUACER_DEBUG
143 1.1 augustss #define DPRINTF(l,x) do { if (auacer_debug & (l)) printf x; } while(0)
144 1.1 augustss int auacer_debug = 0;
145 1.1 augustss #define ALI_DEBUG_CODECIO 0x0001
146 1.1 augustss #define ALI_DEBUG_DMA 0x0002
147 1.1 augustss #define ALI_DEBUG_INTR 0x0004
148 1.1 augustss #define ALI_DEBUG_API 0x0008
149 1.1 augustss #define ALI_DEBUG_MIXERAPI 0x0010
150 1.1 augustss #else
151 1.1 augustss #define DPRINTF(x,y) /* nothing */
152 1.1 augustss #endif
153 1.1 augustss
154 1.10 thorpej static int auacer_intr(void *);
155 1.1 augustss
156 1.10 thorpej static int auacer_query_encoding(void *, struct audio_encoding *);
157 1.10 thorpej static int auacer_set_params(void *, int, int, audio_params_t *,
158 1.10 thorpej audio_params_t *, stream_filter_list_t *,
159 1.10 thorpej stream_filter_list_t *);
160 1.10 thorpej static int auacer_round_blocksize(void *, int, int,
161 1.10 thorpej const audio_params_t *);
162 1.10 thorpej static int auacer_halt_output(void *);
163 1.10 thorpej static int auacer_halt_input(void *);
164 1.10 thorpej static int auacer_getdev(void *, struct audio_device *);
165 1.10 thorpej static int auacer_set_port(void *, mixer_ctrl_t *);
166 1.10 thorpej static int auacer_get_port(void *, mixer_ctrl_t *);
167 1.10 thorpej static int auacer_query_devinfo(void *, mixer_devinfo_t *);
168 1.10 thorpej static void *auacer_allocm(void *, int, size_t, struct malloc_type *, int);
169 1.10 thorpej static void auacer_freem(void *, void *, struct malloc_type *);
170 1.10 thorpej static size_t auacer_round_buffersize(void *, int, size_t);
171 1.10 thorpej static paddr_t auacer_mappage(void *, void *, off_t, int);
172 1.10 thorpej static int auacer_get_props(void *);
173 1.10 thorpej static int auacer_trigger_output(void *, void *, void *, int,
174 1.10 thorpej void (*)(void *), void *,
175 1.10 thorpej const audio_params_t *);
176 1.10 thorpej static int auacer_trigger_input(void *, void *, void *, int,
177 1.10 thorpej void (*)(void *), void *,
178 1.10 thorpej const audio_params_t *);
179 1.10 thorpej
180 1.10 thorpej static int auacer_alloc_cdata(struct auacer_softc *);
181 1.10 thorpej
182 1.10 thorpej static int auacer_allocmem(struct auacer_softc *, size_t, size_t,
183 1.10 thorpej struct auacer_dma *);
184 1.10 thorpej static int auacer_freemem(struct auacer_softc *, struct auacer_dma *);
185 1.1 augustss
186 1.19 dyoung static bool auacer_resume(device_t PMF_FN_PROTO);
187 1.10 thorpej static int auacer_set_rate(struct auacer_softc *, int, u_int);
188 1.1 augustss
189 1.1 augustss static void auacer_reset(struct auacer_softc *sc);
190 1.1 augustss
191 1.10 thorpej static struct audio_hw_if auacer_hw_if = {
192 1.6 kent NULL, /* open */
193 1.6 kent NULL, /* close */
194 1.1 augustss NULL, /* drain */
195 1.1 augustss auacer_query_encoding,
196 1.1 augustss auacer_set_params,
197 1.1 augustss auacer_round_blocksize,
198 1.1 augustss NULL, /* commit_setting */
199 1.1 augustss NULL, /* init_output */
200 1.1 augustss NULL, /* init_input */
201 1.1 augustss NULL, /* start_output */
202 1.1 augustss NULL, /* start_input */
203 1.1 augustss auacer_halt_output,
204 1.1 augustss auacer_halt_input,
205 1.1 augustss NULL, /* speaker_ctl */
206 1.1 augustss auacer_getdev,
207 1.1 augustss NULL, /* getfd */
208 1.1 augustss auacer_set_port,
209 1.1 augustss auacer_get_port,
210 1.1 augustss auacer_query_devinfo,
211 1.1 augustss auacer_allocm,
212 1.1 augustss auacer_freem,
213 1.1 augustss auacer_round_buffersize,
214 1.1 augustss auacer_mappage,
215 1.1 augustss auacer_get_props,
216 1.1 augustss auacer_trigger_output,
217 1.1 augustss auacer_trigger_input,
218 1.1 augustss NULL, /* dev_ioctl */
219 1.12 christos NULL, /* powerstate */
220 1.1 augustss };
221 1.1 augustss
222 1.4 kent #define AUACER_FORMATS_4CH 1
223 1.4 kent #define AUACER_FORMATS_6CH 2
224 1.4 kent static const struct audio_format auacer_formats[AUACER_NFORMATS] = {
225 1.5 augustss {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
226 1.4 kent 2, AUFMT_STEREO, 0, {8000, 48000}},
227 1.4 kent {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
228 1.4 kent 4, AUFMT_SURROUND4, 0, {8000, 48000}},
229 1.4 kent {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
230 1.4 kent 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}},
231 1.4 kent };
232 1.4 kent
233 1.10 thorpej static int auacer_attach_codec(void *, struct ac97_codec_if *);
234 1.10 thorpej static int auacer_read_codec(void *, uint8_t, uint16_t *);
235 1.10 thorpej static int auacer_write_codec(void *, uint8_t, uint16_t);
236 1.10 thorpej static int auacer_reset_codec(void *);
237 1.1 augustss
238 1.10 thorpej static int
239 1.23 cegger auacer_match(device_t parent, cfdata_t match, void *aux)
240 1.1 augustss {
241 1.7 kent struct pci_attach_args *pa;
242 1.1 augustss
243 1.7 kent pa = (struct pci_attach_args *)aux;
244 1.1 augustss if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI &&
245 1.1 augustss PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M5455)
246 1.1 augustss return 1;
247 1.1 augustss return 0;
248 1.1 augustss }
249 1.1 augustss
250 1.10 thorpej static void
251 1.23 cegger auacer_attach(device_t parent, device_t self, void *aux)
252 1.1 augustss {
253 1.7 kent struct auacer_softc *sc;
254 1.7 kent struct pci_attach_args *pa;
255 1.1 augustss pci_intr_handle_t ih;
256 1.1 augustss bus_size_t aud_size;
257 1.1 augustss pcireg_t v;
258 1.1 augustss const char *intrstr;
259 1.4 kent int i;
260 1.1 augustss
261 1.7 kent sc = (struct auacer_softc *)self;
262 1.7 kent pa = aux;
263 1.1 augustss aprint_normal(": Acer Labs M5455 Audio controller\n");
264 1.1 augustss
265 1.1 augustss if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->iot,
266 1.1 augustss &sc->aud_ioh, NULL, &aud_size)) {
267 1.1 augustss aprint_error(": can't map i/o space\n");
268 1.1 augustss return;
269 1.1 augustss }
270 1.1 augustss
271 1.1 augustss sc->sc_pc = pa->pa_pc;
272 1.1 augustss sc->sc_pt = pa->pa_tag;
273 1.1 augustss sc->dmat = pa->pa_dmat;
274 1.1 augustss
275 1.1 augustss sc->sc_dmamap_flags = BUS_DMA_COHERENT; /* XXX remove */
276 1.1 augustss
277 1.1 augustss /* enable bus mastering */
278 1.1 augustss v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
279 1.1 augustss pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
280 1.1 augustss v | PCI_COMMAND_MASTER_ENABLE);
281 1.1 augustss
282 1.1 augustss /* Map and establish the interrupt. */
283 1.1 augustss if (pci_intr_map(pa, &ih)) {
284 1.20 cegger aprint_error_dev(&sc->sc_dev, "can't map interrupt\n");
285 1.1 augustss return;
286 1.1 augustss }
287 1.1 augustss intrstr = pci_intr_string(pa->pa_pc, ih);
288 1.1 augustss sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO,
289 1.1 augustss auacer_intr, sc);
290 1.1 augustss if (sc->sc_ih == NULL) {
291 1.20 cegger aprint_error_dev(&sc->sc_dev, "can't establish interrupt");
292 1.1 augustss if (intrstr != NULL)
293 1.1 augustss aprint_normal(" at %s", intrstr);
294 1.1 augustss aprint_normal("\n");
295 1.1 augustss return;
296 1.1 augustss }
297 1.20 cegger aprint_normal_dev(&sc->sc_dev, "interrupting at %s\n", intrstr);
298 1.1 augustss
299 1.1 augustss strlcpy(sc->sc_audev.name, "M5455 AC97", MAX_AUDIO_DEV_LEN);
300 1.1 augustss snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN,
301 1.1 augustss "0x%02x", PCI_REVISION(pa->pa_class));
302 1.20 cegger strlcpy(sc->sc_audev.config, device_xname(&sc->sc_dev), MAX_AUDIO_DEV_LEN);
303 1.1 augustss
304 1.1 augustss /* Set up DMA lists. */
305 1.1 augustss auacer_alloc_cdata(sc);
306 1.1 augustss sc->sc_pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo;
307 1.1 augustss sc->sc_pcmo.ptr = 0;
308 1.1 augustss sc->sc_pcmo.port = ALI_BASE_PO;
309 1.1 augustss
310 1.1 augustss DPRINTF(ALI_DEBUG_DMA, ("auacer_attach: lists %p\n",
311 1.1 augustss sc->sc_pcmo.dmalist));
312 1.1 augustss
313 1.1 augustss sc->host_if.arg = sc;
314 1.1 augustss sc->host_if.attach = auacer_attach_codec;
315 1.1 augustss sc->host_if.read = auacer_read_codec;
316 1.1 augustss sc->host_if.write = auacer_write_codec;
317 1.1 augustss sc->host_if.reset = auacer_reset_codec;
318 1.1 augustss
319 1.6 kent if (ac97_attach(&sc->host_if, self) != 0)
320 1.1 augustss return;
321 1.1 augustss
322 1.4 kent /* setup audio_format */
323 1.4 kent memcpy(sc->sc_formats, auacer_formats, sizeof(auacer_formats));
324 1.4 kent if (!AC97_IS_4CH(sc->codec_if))
325 1.4 kent AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_4CH]);
326 1.4 kent if (!AC97_IS_6CH(sc->codec_if))
327 1.4 kent AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_6CH]);
328 1.4 kent if (AC97_IS_FIXED_RATE(sc->codec_if)) {
329 1.4 kent for (i = 0; i < AUACER_NFORMATS; i++) {
330 1.4 kent sc->sc_formats[i].frequency_type = 1;
331 1.4 kent sc->sc_formats[i].frequency[0] = 48000;
332 1.4 kent }
333 1.4 kent }
334 1.4 kent
335 1.4 kent if (0 != auconv_create_encodings(sc->sc_formats, AUACER_NFORMATS,
336 1.4 kent &sc->sc_encodings)) {
337 1.4 kent return;
338 1.4 kent }
339 1.4 kent
340 1.1 augustss audio_attach_mi(&auacer_hw_if, sc, &sc->sc_dev);
341 1.1 augustss
342 1.1 augustss auacer_reset(sc);
343 1.18 jmcneill
344 1.18 jmcneill if (!pmf_device_register(self, NULL, auacer_resume))
345 1.18 jmcneill aprint_error_dev(self, "couldn't establish power handler\n");
346 1.1 augustss }
347 1.1 augustss
348 1.10 thorpej CFATTACH_DECL(auacer, sizeof(struct auacer_softc),
349 1.10 thorpej auacer_match, auacer_attach, NULL, NULL);
350 1.10 thorpej
351 1.1 augustss static int
352 1.1 augustss auacer_ready_codec(struct auacer_softc *sc, int mask)
353 1.1 augustss {
354 1.7 kent int count;
355 1.1 augustss
356 1.1 augustss for (count = 0; count < 0x7f; count++) {
357 1.1 augustss int val = READ1(sc, ALI_CSPSR);
358 1.1 augustss if (val & mask)
359 1.1 augustss return 0;
360 1.1 augustss }
361 1.1 augustss
362 1.1 augustss aprint_normal("auacer_ready_codec: AC97 codec ready timeout.\n");
363 1.1 augustss return EBUSY;
364 1.1 augustss }
365 1.1 augustss
366 1.1 augustss static int
367 1.1 augustss auacer_sema_codec(struct auacer_softc *sc)
368 1.1 augustss {
369 1.9 christos int ttime;
370 1.1 augustss
371 1.9 christos ttime = 100;
372 1.9 christos while (ttime-- && (READ4(sc, ALI_CAS) & ALI_CAS_SEM_BUSY))
373 1.1 augustss delay(1);
374 1.9 christos if (!ttime)
375 1.1 augustss aprint_normal("auacer_sema_codec: timeout\n");
376 1.1 augustss return auacer_ready_codec(sc, ALI_CSPSR_CODEC_READY);
377 1.1 augustss }
378 1.1 augustss
379 1.10 thorpej static int
380 1.7 kent auacer_read_codec(void *v, uint8_t reg, uint16_t *val)
381 1.1 augustss {
382 1.7 kent struct auacer_softc *sc;
383 1.1 augustss
384 1.7 kent sc = v;
385 1.1 augustss if (auacer_sema_codec(sc))
386 1.1 augustss return EIO;
387 1.1 augustss
388 1.1 augustss reg |= ALI_CPR_ADDR_READ;
389 1.1 augustss #if 0
390 1.1 augustss if (ac97->num)
391 1.1 augustss reg |= ALI_CPR_ADDR_SECONDARY;
392 1.1 augustss #endif
393 1.1 augustss WRITE2(sc, ALI_CPR_ADDR, reg);
394 1.1 augustss if (auacer_ready_codec(sc, ALI_CSPSR_READ_OK))
395 1.1 augustss return EIO;
396 1.1 augustss *val = READ2(sc, ALI_SPR);
397 1.1 augustss
398 1.1 augustss DPRINTF(ALI_DEBUG_CODECIO, ("auacer_read_codec: reg=0x%x val=0x%x\n",
399 1.1 augustss reg, *val));
400 1.1 augustss
401 1.1 augustss return 0;
402 1.1 augustss }
403 1.1 augustss
404 1.1 augustss int
405 1.7 kent auacer_write_codec(void *v, uint8_t reg, uint16_t val)
406 1.1 augustss {
407 1.7 kent struct auacer_softc *sc;
408 1.1 augustss
409 1.1 augustss DPRINTF(ALI_DEBUG_CODECIO, ("auacer_write_codec: reg=0x%x val=0x%x\n",
410 1.1 augustss reg, val));
411 1.7 kent sc = v;
412 1.1 augustss if (auacer_sema_codec(sc))
413 1.1 augustss return EIO;
414 1.1 augustss WRITE2(sc, ALI_CPR, val);
415 1.1 augustss #if 0
416 1.1 augustss if (ac97->num)
417 1.1 augustss reg |= ALI_CPR_ADDR_SECONDARY;
418 1.1 augustss #endif
419 1.1 augustss WRITE2(sc, ALI_CPR_ADDR, reg);
420 1.1 augustss auacer_ready_codec(sc, ALI_CSPSR_WRITE_OK);
421 1.1 augustss return 0;
422 1.1 augustss }
423 1.1 augustss
424 1.10 thorpej static int
425 1.1 augustss auacer_attach_codec(void *v, struct ac97_codec_if *cif)
426 1.1 augustss {
427 1.7 kent struct auacer_softc *sc;
428 1.1 augustss
429 1.7 kent sc = v;
430 1.1 augustss sc->codec_if = cif;
431 1.1 augustss return 0;
432 1.1 augustss }
433 1.1 augustss
434 1.10 thorpej static int
435 1.1 augustss auacer_reset_codec(void *v)
436 1.1 augustss {
437 1.7 kent struct auacer_softc *sc;
438 1.7 kent uint32_t reg;
439 1.7 kent int i;
440 1.1 augustss
441 1.7 kent sc = v;
442 1.7 kent i = 0;
443 1.1 augustss reg = READ4(sc, ALI_SCR);
444 1.1 augustss if ((reg & 2) == 0) /* Cold required */
445 1.1 augustss reg |= 2;
446 1.1 augustss else
447 1.1 augustss reg |= 1; /* Warm */
448 1.1 augustss reg &= ~0x80000000; /* ACLink on */
449 1.1 augustss WRITE4(sc, ALI_SCR, reg);
450 1.1 augustss
451 1.1 augustss while (i < 10) {
452 1.1 augustss if ((READ4(sc, ALI_INTERRUPTSR) & ALI_INT_GPIO) == 0)
453 1.1 augustss break;
454 1.1 augustss delay(50000); /* XXX */
455 1.1 augustss i++;
456 1.1 augustss }
457 1.1 augustss if (i == 10) {
458 1.1 augustss return EIO;
459 1.1 augustss }
460 1.1 augustss
461 1.1 augustss for (i = 0; i < 10; i++) {
462 1.1 augustss reg = READ4(sc, ALI_RTSR);
463 1.1 augustss if (reg & 0x80) /* primary codec */
464 1.1 augustss break;
465 1.1 augustss WRITE4(sc, ALI_RTSR, reg | 0x80);
466 1.1 augustss delay(50000); /* XXX */
467 1.1 augustss }
468 1.1 augustss
469 1.1 augustss return 0;
470 1.1 augustss }
471 1.1 augustss
472 1.1 augustss static void
473 1.1 augustss auacer_reset(struct auacer_softc *sc)
474 1.1 augustss {
475 1.1 augustss WRITE4(sc, ALI_SCR, ALI_SCR_RESET);
476 1.1 augustss WRITE4(sc, ALI_FIFOCR1, 0x83838383);
477 1.1 augustss WRITE4(sc, ALI_FIFOCR2, 0x83838383);
478 1.1 augustss WRITE4(sc, ALI_FIFOCR3, 0x83838383);
479 1.1 augustss WRITE4(sc, ALI_INTERFACECR, ALI_IF_PO); /* XXX pcm out only */
480 1.1 augustss WRITE4(sc, ALI_INTERRUPTCR, 0x00000000);
481 1.1 augustss WRITE4(sc, ALI_INTERRUPTSR, 0x00000000);
482 1.1 augustss }
483 1.1 augustss
484 1.10 thorpej static int
485 1.1 augustss auacer_query_encoding(void *v, struct audio_encoding *aep)
486 1.1 augustss {
487 1.4 kent struct auacer_softc *sc;
488 1.4 kent
489 1.1 augustss DPRINTF(ALI_DEBUG_API, ("auacer_query_encoding\n"));
490 1.4 kent sc = v;
491 1.4 kent return auconv_query_encoding(sc->sc_encodings, aep);
492 1.1 augustss }
493 1.1 augustss
494 1.10 thorpej static int
495 1.6 kent auacer_set_rate(struct auacer_softc *sc, int mode, u_int srate)
496 1.1 augustss {
497 1.1 augustss int ret;
498 1.6 kent u_int ratetmp;
499 1.1 augustss
500 1.8 augustss DPRINTF(ALI_DEBUG_API, ("auacer_set_rate: srate=%u\n", srate));
501 1.1 augustss
502 1.1 augustss ratetmp = srate;
503 1.1 augustss if (mode == AUMODE_RECORD)
504 1.1 augustss return sc->codec_if->vtbl->set_rate(sc->codec_if,
505 1.1 augustss AC97_REG_PCM_LR_ADC_RATE, &ratetmp);
506 1.1 augustss ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
507 1.1 augustss AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp);
508 1.1 augustss if (ret)
509 1.1 augustss return ret;
510 1.1 augustss ratetmp = srate;
511 1.1 augustss ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
512 1.1 augustss AC97_REG_PCM_SURR_DAC_RATE, &ratetmp);
513 1.1 augustss if (ret)
514 1.1 augustss return ret;
515 1.1 augustss ratetmp = srate;
516 1.1 augustss ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
517 1.1 augustss AC97_REG_PCM_LFE_DAC_RATE, &ratetmp);
518 1.1 augustss return ret;
519 1.1 augustss }
520 1.1 augustss
521 1.10 thorpej static int
522 1.15 christos auacer_set_params(void *v, int setmode, int usemode,
523 1.14 christos audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil,
524 1.14 christos stream_filter_list_t *rfil)
525 1.1 augustss {
526 1.7 kent struct auacer_softc *sc;
527 1.1 augustss struct audio_params *p;
528 1.6 kent stream_filter_list_t *fil;
529 1.1 augustss uint32_t control;
530 1.4 kent int mode, index;
531 1.1 augustss
532 1.1 augustss DPRINTF(ALI_DEBUG_API, ("auacer_set_params\n"));
533 1.7 kent sc = v;
534 1.1 augustss for (mode = AUMODE_RECORD; mode != -1;
535 1.1 augustss mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
536 1.1 augustss if ((setmode & mode) == 0)
537 1.1 augustss continue;
538 1.1 augustss
539 1.1 augustss p = mode == AUMODE_PLAY ? play : rec;
540 1.1 augustss if (p == NULL)
541 1.1 augustss continue;
542 1.1 augustss
543 1.1 augustss if ((p->sample_rate != 8000) &&
544 1.1 augustss (p->sample_rate != 11025) &&
545 1.1 augustss (p->sample_rate != 12000) &&
546 1.1 augustss (p->sample_rate != 16000) &&
547 1.1 augustss (p->sample_rate != 22050) &&
548 1.1 augustss (p->sample_rate != 24000) &&
549 1.1 augustss (p->sample_rate != 32000) &&
550 1.1 augustss (p->sample_rate != 44100) &&
551 1.1 augustss (p->sample_rate != 48000))
552 1.1 augustss return (EINVAL);
553 1.1 augustss
554 1.6 kent fil = mode == AUMODE_PLAY ? pfil : rfil;
555 1.4 kent index = auconv_set_converter(sc->sc_formats, AUACER_NFORMATS,
556 1.6 kent mode, p, TRUE, fil);
557 1.4 kent if (index < 0)
558 1.4 kent return EINVAL;
559 1.6 kent if (fil->req_size > 0)
560 1.6 kent p = &fil->filters[0].param;
561 1.6 kent /* p points HW encoding */
562 1.4 kent if (sc->sc_formats[index].frequency_type != 1
563 1.6 kent && auacer_set_rate(sc, mode, p->sample_rate))
564 1.4 kent return EINVAL;
565 1.1 augustss if (mode == AUMODE_PLAY) {
566 1.1 augustss control = READ4(sc, ALI_SCR);
567 1.1 augustss control &= ~ALI_SCR_PCM_246_MASK;
568 1.1 augustss if (p->channels == 4)
569 1.1 augustss control |= ALI_SCR_PCM_4;
570 1.1 augustss else if (p->channels == 6)
571 1.1 augustss control |= ALI_SCR_PCM_6;
572 1.1 augustss WRITE4(sc, ALI_SCR, control);
573 1.1 augustss }
574 1.1 augustss }
575 1.1 augustss
576 1.1 augustss return (0);
577 1.1 augustss }
578 1.1 augustss
579 1.10 thorpej static int
580 1.15 christos auacer_round_blocksize(void *v, int blk, int mode,
581 1.15 christos const audio_params_t *param)
582 1.1 augustss {
583 1.1 augustss
584 1.7 kent return blk & ~0x3f; /* keep good alignment */
585 1.1 augustss }
586 1.1 augustss
587 1.1 augustss static void
588 1.1 augustss auacer_halt(struct auacer_softc *sc, struct auacer_chan *chan)
589 1.1 augustss {
590 1.1 augustss uint32_t val;
591 1.7 kent uint8_t port;
592 1.1 augustss uint32_t slot;
593 1.1 augustss
594 1.7 kent port = chan->port;
595 1.1 augustss DPRINTF(ALI_DEBUG_API, ("auacer_halt: port=0x%x\n", port));
596 1.1 augustss chan->intr = 0;
597 1.1 augustss
598 1.1 augustss slot = ALI_PORT2SLOT(port);
599 1.1 augustss
600 1.1 augustss val = READ4(sc, ALI_DMACR);
601 1.1 augustss val |= 1 << (slot+16); /* pause */
602 1.1 augustss val &= ~(1 << slot); /* no start */
603 1.1 augustss WRITE4(sc, ALI_DMACR, val);
604 1.1 augustss WRITE1(sc, port + ALI_OFF_CR, 0);
605 1.1 augustss while (READ1(sc, port + ALI_OFF_CR))
606 1.1 augustss ;
607 1.1 augustss /* reset whole DMA things */
608 1.1 augustss WRITE1(sc, port + ALI_OFF_CR, ALI_CR_RR);
609 1.1 augustss /* clear interrupts */
610 1.1 augustss WRITE1(sc, port + ALI_OFF_SR, READ1(sc, port+ALI_OFF_SR) | ALI_SR_W1TC);
611 1.1 augustss WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(port));
612 1.1 augustss }
613 1.1 augustss
614 1.10 thorpej static int
615 1.1 augustss auacer_halt_output(void *v)
616 1.1 augustss {
617 1.7 kent struct auacer_softc *sc;
618 1.1 augustss
619 1.1 augustss DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_output\n"));
620 1.7 kent sc = v;
621 1.1 augustss auacer_halt(sc, &sc->sc_pcmo);
622 1.1 augustss
623 1.7 kent return 0;
624 1.1 augustss }
625 1.1 augustss
626 1.10 thorpej static int
627 1.15 christos auacer_halt_input(void *v)
628 1.1 augustss {
629 1.1 augustss DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_input\n"));
630 1.1 augustss
631 1.7 kent return 0;
632 1.1 augustss }
633 1.1 augustss
634 1.10 thorpej static int
635 1.1 augustss auacer_getdev(void *v, struct audio_device *adp)
636 1.1 augustss {
637 1.7 kent struct auacer_softc *sc;
638 1.1 augustss
639 1.1 augustss DPRINTF(ALI_DEBUG_API, ("auacer_getdev\n"));
640 1.7 kent sc = v;
641 1.1 augustss *adp = sc->sc_audev;
642 1.7 kent return 0;
643 1.1 augustss }
644 1.1 augustss
645 1.10 thorpej static int
646 1.1 augustss auacer_set_port(void *v, mixer_ctrl_t *cp)
647 1.1 augustss {
648 1.7 kent struct auacer_softc *sc;
649 1.1 augustss
650 1.1 augustss DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_set_port\n"));
651 1.7 kent sc = v;
652 1.7 kent return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp);
653 1.1 augustss }
654 1.1 augustss
655 1.10 thorpej static int
656 1.1 augustss auacer_get_port(void *v, mixer_ctrl_t *cp)
657 1.1 augustss {
658 1.7 kent struct auacer_softc *sc;
659 1.1 augustss
660 1.1 augustss DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_get_port\n"));
661 1.7 kent sc = v;
662 1.7 kent return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp);
663 1.1 augustss }
664 1.1 augustss
665 1.10 thorpej static int
666 1.1 augustss auacer_query_devinfo(void *v, mixer_devinfo_t *dp)
667 1.1 augustss {
668 1.7 kent struct auacer_softc *sc;
669 1.1 augustss
670 1.1 augustss DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_query_devinfo\n"));
671 1.7 kent sc = v;
672 1.7 kent return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp);
673 1.1 augustss }
674 1.1 augustss
675 1.10 thorpej static void *
676 1.15 christos auacer_allocm(void *v, int direction, size_t size,
677 1.14 christos struct malloc_type *pool, int flags)
678 1.1 augustss {
679 1.7 kent struct auacer_softc *sc;
680 1.1 augustss struct auacer_dma *p;
681 1.1 augustss int error;
682 1.1 augustss
683 1.1 augustss if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX))
684 1.7 kent return NULL;
685 1.1 augustss
686 1.1 augustss p = malloc(sizeof(*p), pool, flags | M_ZERO);
687 1.1 augustss if (p == NULL)
688 1.7 kent return NULL;
689 1.7 kent sc = v;
690 1.1 augustss error = auacer_allocmem(sc, size, 0, p);
691 1.1 augustss if (error) {
692 1.1 augustss free(p, pool);
693 1.7 kent return NULL;
694 1.1 augustss }
695 1.1 augustss
696 1.1 augustss p->next = sc->sc_dmas;
697 1.1 augustss sc->sc_dmas = p;
698 1.1 augustss
699 1.7 kent return KERNADDR(p);
700 1.1 augustss }
701 1.1 augustss
702 1.10 thorpej static void
703 1.1 augustss auacer_freem(void *v, void *ptr, struct malloc_type *pool)
704 1.1 augustss {
705 1.7 kent struct auacer_softc *sc;
706 1.1 augustss struct auacer_dma *p, **pp;
707 1.1 augustss
708 1.7 kent sc = v;
709 1.1 augustss for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
710 1.1 augustss if (KERNADDR(p) == ptr) {
711 1.1 augustss auacer_freemem(sc, p);
712 1.1 augustss *pp = p->next;
713 1.1 augustss free(p, pool);
714 1.1 augustss return;
715 1.1 augustss }
716 1.1 augustss }
717 1.1 augustss }
718 1.1 augustss
719 1.10 thorpej static size_t
720 1.15 christos auacer_round_buffersize(void *v, int direction, size_t size)
721 1.1 augustss {
722 1.1 augustss
723 1.1 augustss if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX))
724 1.1 augustss size = ALI_DMALIST_MAX * ALI_DMASEG_MAX;
725 1.1 augustss
726 1.1 augustss return size;
727 1.1 augustss }
728 1.1 augustss
729 1.10 thorpej static paddr_t
730 1.1 augustss auacer_mappage(void *v, void *mem, off_t off, int prot)
731 1.1 augustss {
732 1.7 kent struct auacer_softc *sc;
733 1.1 augustss struct auacer_dma *p;
734 1.1 augustss
735 1.1 augustss if (off < 0)
736 1.7 kent return -1;
737 1.7 kent sc = v;
738 1.1 augustss for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next)
739 1.7 kent continue;
740 1.7 kent if (p == NULL)
741 1.7 kent return -1;
742 1.7 kent return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs,
743 1.7 kent off, prot, BUS_DMA_WAITOK);
744 1.1 augustss }
745 1.1 augustss
746 1.10 thorpej static int
747 1.1 augustss auacer_get_props(void *v)
748 1.1 augustss {
749 1.7 kent struct auacer_softc *sc;
750 1.1 augustss int props;
751 1.1 augustss
752 1.7 kent sc = v;
753 1.1 augustss props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
754 1.1 augustss /*
755 1.1 augustss * Even if the codec is fixed-rate, set_param() succeeds for any sample
756 1.1 augustss * rate because of aurateconv. Applications can't know what rate the
757 1.1 augustss * device can process in the case of mmap().
758 1.1 augustss */
759 1.3 kent if (!AC97_IS_FIXED_RATE(sc->codec_if))
760 1.1 augustss props |= AUDIO_PROP_MMAP;
761 1.1 augustss return props;
762 1.1 augustss }
763 1.1 augustss
764 1.1 augustss static void
765 1.1 augustss auacer_add_entry(struct auacer_chan *chan)
766 1.1 augustss {
767 1.1 augustss struct auacer_dmalist *q;
768 1.1 augustss
769 1.1 augustss q = &chan->dmalist[chan->ptr];
770 1.1 augustss
771 1.1 augustss DPRINTF(ALI_DEBUG_INTR,
772 1.1 augustss ("auacer_add_entry: %p = %x @ 0x%x\n",
773 1.1 augustss q, chan->blksize / 2, chan->p));
774 1.1 augustss
775 1.1 augustss q->base = htole32(chan->p);
776 1.1 augustss q->len = htole32((chan->blksize / ALI_SAMPLE_SIZE) | ALI_DMAF_IOC);
777 1.1 augustss chan->p += chan->blksize;
778 1.1 augustss if (chan->p >= chan->end)
779 1.1 augustss chan->p = chan->start;
780 1.7 kent
781 1.1 augustss if (++chan->ptr >= ALI_DMALIST_MAX)
782 1.1 augustss chan->ptr = 0;
783 1.1 augustss }
784 1.1 augustss
785 1.1 augustss static void
786 1.1 augustss auacer_upd_chan(struct auacer_softc *sc, struct auacer_chan *chan)
787 1.1 augustss {
788 1.1 augustss uint32_t sts;
789 1.1 augustss uint32_t civ;
790 1.1 augustss
791 1.1 augustss sts = READ2(sc, chan->port + ALI_OFF_SR);
792 1.1 augustss /* intr ack */
793 1.1 augustss WRITE2(sc, chan->port + ALI_OFF_SR, sts & ALI_SR_W1TC);
794 1.1 augustss WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(chan->port));
795 1.1 augustss
796 1.1 augustss DPRINTF(ALI_DEBUG_INTR, ("auacer_upd_chan: sts=0x%x\n", sts));
797 1.1 augustss
798 1.1 augustss if (sts & ALI_SR_DMA_INT_FIFO) {
799 1.1 augustss printf("%s: fifo underrun # %u\n",
800 1.20 cegger device_xname(&sc->sc_dev), ++chan->fifoe);
801 1.1 augustss }
802 1.1 augustss
803 1.1 augustss civ = READ1(sc, chan->port + ALI_OFF_CIV);
804 1.7 kent
805 1.1 augustss DPRINTF(ALI_DEBUG_INTR,("auacer_intr: civ=%u ptr=%u\n",civ,chan->ptr));
806 1.7 kent
807 1.1 augustss /* XXX */
808 1.1 augustss while (chan->ptr != civ) {
809 1.1 augustss auacer_add_entry(chan);
810 1.1 augustss }
811 1.1 augustss
812 1.1 augustss WRITE1(sc, chan->port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK);
813 1.1 augustss
814 1.1 augustss while (chan->ack != civ) {
815 1.1 augustss if (chan->intr) {
816 1.1 augustss DPRINTF(ALI_DEBUG_INTR,("auacer_upd_chan: callback\n"));
817 1.1 augustss chan->intr(chan->arg);
818 1.1 augustss }
819 1.1 augustss chan->ack++;
820 1.1 augustss if (chan->ack >= ALI_DMALIST_MAX)
821 1.1 augustss chan->ack = 0;
822 1.1 augustss }
823 1.1 augustss }
824 1.1 augustss
825 1.10 thorpej static int
826 1.1 augustss auacer_intr(void *v)
827 1.1 augustss {
828 1.7 kent struct auacer_softc *sc;
829 1.1 augustss int ret, intrs;
830 1.1 augustss
831 1.7 kent sc = v;
832 1.1 augustss intrs = READ4(sc, ALI_INTERRUPTSR);
833 1.1 augustss DPRINTF(ALI_DEBUG_INTR, ("auacer_intr: intrs=0x%x\n", intrs));
834 1.1 augustss
835 1.1 augustss ret = 0;
836 1.1 augustss if (intrs & ALI_INT_PCMOUT) {
837 1.1 augustss auacer_upd_chan(sc, &sc->sc_pcmo);
838 1.1 augustss ret++;
839 1.1 augustss }
840 1.1 augustss
841 1.1 augustss return ret != 0;
842 1.1 augustss }
843 1.1 augustss
844 1.1 augustss static void
845 1.1 augustss auacer_setup_chan(struct auacer_softc *sc, struct auacer_chan *chan,
846 1.1 augustss uint32_t start, uint32_t size, uint32_t blksize,
847 1.1 augustss void (*intr)(void *), void *arg)
848 1.1 augustss {
849 1.1 augustss uint32_t port, slot;
850 1.1 augustss uint32_t offs, val;
851 1.1 augustss
852 1.1 augustss chan->start = start;
853 1.1 augustss chan->ptr = 0;
854 1.1 augustss chan->p = chan->start;
855 1.1 augustss chan->end = chan->start + size;
856 1.1 augustss chan->blksize = blksize;
857 1.1 augustss chan->ack = 0;
858 1.1 augustss chan->intr = intr;
859 1.1 augustss chan->arg = arg;
860 1.1 augustss
861 1.1 augustss auacer_add_entry(chan);
862 1.1 augustss auacer_add_entry(chan);
863 1.1 augustss
864 1.1 augustss port = chan->port;
865 1.1 augustss slot = ALI_PORT2SLOT(port);
866 1.1 augustss
867 1.1 augustss WRITE1(sc, port + ALI_OFF_CIV, 0);
868 1.1 augustss WRITE1(sc, port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK);
869 1.1 augustss offs = (char *)chan->dmalist - (char *)sc->sc_cdata;
870 1.1 augustss WRITE4(sc, port + ALI_OFF_BDBAR, sc->sc_cddma + offs);
871 1.1 augustss WRITE1(sc, port + ALI_OFF_CR,
872 1.1 augustss ALI_CR_IOCE | ALI_CR_FEIE | ALI_CR_LVBIE | ALI_CR_RPBM);
873 1.1 augustss val = READ4(sc, ALI_DMACR);
874 1.1 augustss val &= ~(1 << (slot+16)); /* no pause */
875 1.1 augustss val |= 1 << slot; /* start */
876 1.1 augustss WRITE4(sc, ALI_DMACR, val);
877 1.1 augustss }
878 1.1 augustss
879 1.10 thorpej static int
880 1.1 augustss auacer_trigger_output(void *v, void *start, void *end, int blksize,
881 1.15 christos void (*intr)(void *), void *arg, const audio_params_t *param)
882 1.1 augustss {
883 1.7 kent struct auacer_softc *sc;
884 1.1 augustss struct auacer_dma *p;
885 1.1 augustss uint32_t size;
886 1.1 augustss
887 1.1 augustss DPRINTF(ALI_DEBUG_DMA,
888 1.1 augustss ("auacer_trigger_output(%p, %p, %d, %p, %p, %p)\n",
889 1.1 augustss start, end, blksize, intr, arg, param));
890 1.7 kent sc = v;
891 1.1 augustss for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
892 1.7 kent continue;
893 1.1 augustss if (!p) {
894 1.1 augustss printf("auacer_trigger_output: bad addr %p\n", start);
895 1.1 augustss return (EINVAL);
896 1.1 augustss }
897 1.1 augustss
898 1.1 augustss size = (char *)end - (char *)start;
899 1.1 augustss auacer_setup_chan(sc, &sc->sc_pcmo, DMAADDR(p), size, blksize,
900 1.1 augustss intr, arg);
901 1.1 augustss
902 1.1 augustss return 0;
903 1.1 augustss }
904 1.1 augustss
905 1.10 thorpej static int
906 1.15 christos auacer_trigger_input(void *v, void *start, void *end,
907 1.15 christos int blksize, void (*intr)(void *), void *arg,
908 1.15 christos const audio_params_t *param)
909 1.1 augustss {
910 1.7 kent return EINVAL;
911 1.1 augustss }
912 1.1 augustss
913 1.10 thorpej static int
914 1.1 augustss auacer_allocmem(struct auacer_softc *sc, size_t size, size_t align,
915 1.1 augustss struct auacer_dma *p)
916 1.1 augustss {
917 1.1 augustss int error;
918 1.1 augustss
919 1.1 augustss p->size = size;
920 1.1 augustss error = bus_dmamem_alloc(sc->dmat, p->size, align, 0,
921 1.1 augustss p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
922 1.1 augustss &p->nsegs, BUS_DMA_NOWAIT);
923 1.1 augustss if (error)
924 1.7 kent return error;
925 1.1 augustss
926 1.1 augustss error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size,
927 1.1 augustss &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags);
928 1.1 augustss if (error)
929 1.1 augustss goto free;
930 1.1 augustss
931 1.1 augustss error = bus_dmamap_create(sc->dmat, p->size, 1, p->size,
932 1.1 augustss 0, BUS_DMA_NOWAIT, &p->map);
933 1.1 augustss if (error)
934 1.1 augustss goto unmap;
935 1.1 augustss
936 1.1 augustss error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL,
937 1.1 augustss BUS_DMA_NOWAIT);
938 1.1 augustss if (error)
939 1.1 augustss goto destroy;
940 1.1 augustss return (0);
941 1.1 augustss
942 1.1 augustss destroy:
943 1.1 augustss bus_dmamap_destroy(sc->dmat, p->map);
944 1.1 augustss unmap:
945 1.1 augustss bus_dmamem_unmap(sc->dmat, p->addr, p->size);
946 1.1 augustss free:
947 1.1 augustss bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
948 1.7 kent return error;
949 1.1 augustss }
950 1.1 augustss
951 1.10 thorpej static int
952 1.1 augustss auacer_freemem(struct auacer_softc *sc, struct auacer_dma *p)
953 1.1 augustss {
954 1.1 augustss
955 1.1 augustss bus_dmamap_unload(sc->dmat, p->map);
956 1.1 augustss bus_dmamap_destroy(sc->dmat, p->map);
957 1.1 augustss bus_dmamem_unmap(sc->dmat, p->addr, p->size);
958 1.1 augustss bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
959 1.7 kent return 0;
960 1.1 augustss }
961 1.1 augustss
962 1.10 thorpej static int
963 1.1 augustss auacer_alloc_cdata(struct auacer_softc *sc)
964 1.1 augustss {
965 1.1 augustss bus_dma_segment_t seg;
966 1.1 augustss int error, rseg;
967 1.1 augustss
968 1.1 augustss /*
969 1.1 augustss * Allocate the control data structure, and create and load the
970 1.1 augustss * DMA map for it.
971 1.1 augustss */
972 1.1 augustss if ((error = bus_dmamem_alloc(sc->dmat,
973 1.1 augustss sizeof(struct auacer_cdata),
974 1.1 augustss PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) {
975 1.20 cegger aprint_error_dev(&sc->sc_dev, "unable to allocate control data, error = %d\n",
976 1.20 cegger error);
977 1.1 augustss goto fail_0;
978 1.1 augustss }
979 1.1 augustss
980 1.1 augustss if ((error = bus_dmamem_map(sc->dmat, &seg, rseg,
981 1.1 augustss sizeof(struct auacer_cdata),
982 1.16 christos (void **) &sc->sc_cdata,
983 1.1 augustss sc->sc_dmamap_flags)) != 0) {
984 1.20 cegger aprint_error_dev(&sc->sc_dev, "unable to map control data, error = %d\n",
985 1.20 cegger error);
986 1.1 augustss goto fail_1;
987 1.1 augustss }
988 1.1 augustss
989 1.1 augustss if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auacer_cdata), 1,
990 1.1 augustss sizeof(struct auacer_cdata), 0, 0,
991 1.1 augustss &sc->sc_cddmamap)) != 0) {
992 1.20 cegger aprint_error_dev(&sc->sc_dev, "unable to create control data DMA map, "
993 1.20 cegger "error = %d\n", error);
994 1.1 augustss goto fail_2;
995 1.1 augustss }
996 1.1 augustss
997 1.1 augustss if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap,
998 1.1 augustss sc->sc_cdata, sizeof(struct auacer_cdata),
999 1.1 augustss NULL, 0)) != 0) {
1000 1.20 cegger aprint_error_dev(&sc->sc_dev, "unable to load control data DMA map, "
1001 1.20 cegger "error = %d\n", error);
1002 1.1 augustss goto fail_3;
1003 1.1 augustss }
1004 1.1 augustss
1005 1.7 kent return 0;
1006 1.1 augustss
1007 1.1 augustss fail_3:
1008 1.1 augustss bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap);
1009 1.1 augustss fail_2:
1010 1.16 christos bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata,
1011 1.1 augustss sizeof(struct auacer_cdata));
1012 1.1 augustss fail_1:
1013 1.1 augustss bus_dmamem_free(sc->dmat, &seg, rseg);
1014 1.1 augustss fail_0:
1015 1.7 kent return error;
1016 1.1 augustss }
1017 1.1 augustss
1018 1.18 jmcneill static bool
1019 1.19 dyoung auacer_resume(device_t dv PMF_FN_ARGS)
1020 1.1 augustss {
1021 1.18 jmcneill struct auacer_softc *sc = device_private(dv);
1022 1.18 jmcneill
1023 1.18 jmcneill auacer_reset_codec(sc);
1024 1.18 jmcneill delay(1000);
1025 1.18 jmcneill sc->codec_if->vtbl->restore_ports(sc->codec_if);
1026 1.1 augustss
1027 1.18 jmcneill return true;
1028 1.1 augustss }
1029