auacer.c revision 1.28 1 1.28 uebayasi /* $NetBSD: auacer.c,v 1.28 2010/11/13 13:52:05 uebayasi Exp $ */
2 1.1 augustss
3 1.1 augustss /*-
4 1.1 augustss * Copyright (c) 2004 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.1 augustss * by Lennart Augustsson.
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss *
19 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
30 1.1 augustss */
31 1.1 augustss
32 1.1 augustss /*
33 1.1 augustss * Acer Labs M5455 audio driver
34 1.1 augustss *
35 1.5 augustss * Acer provides data sheets after signing an NDA, so this is guess work.
36 1.1 augustss * The chip behaves somewhat like the Intel i8x0, so this driver
37 1.1 augustss * is loosely based on the auich driver. Additional information taken from
38 1.1 augustss * the ALSA intel8x0.c driver (which handles M5455 as well).
39 1.1 augustss *
40 1.1 augustss * As an historical note one can observe that the auich driver borrows
41 1.1 augustss * lot from the first NetBSD PCI audio driver, the eap driver. But this
42 1.1 augustss * is not attributed anywhere.
43 1.1 augustss */
44 1.1 augustss
45 1.1 augustss
46 1.1 augustss #include <sys/cdefs.h>
47 1.28 uebayasi __KERNEL_RCSID(0, "$NetBSD: auacer.c,v 1.28 2010/11/13 13:52:05 uebayasi Exp $");
48 1.1 augustss
49 1.1 augustss #include <sys/param.h>
50 1.1 augustss #include <sys/systm.h>
51 1.1 augustss #include <sys/kernel.h>
52 1.1 augustss #include <sys/malloc.h>
53 1.1 augustss #include <sys/device.h>
54 1.1 augustss #include <sys/fcntl.h>
55 1.1 augustss #include <sys/proc.h>
56 1.1 augustss
57 1.1 augustss #include <dev/pci/pcidevs.h>
58 1.1 augustss #include <dev/pci/pcivar.h>
59 1.1 augustss #include <dev/pci/auacerreg.h>
60 1.1 augustss
61 1.1 augustss #include <sys/audioio.h>
62 1.1 augustss #include <dev/audio_if.h>
63 1.1 augustss #include <dev/mulaw.h>
64 1.1 augustss #include <dev/auconv.h>
65 1.1 augustss
66 1.17 ad #include <sys/bus.h>
67 1.1 augustss
68 1.1 augustss #include <dev/ic/ac97reg.h>
69 1.1 augustss #include <dev/ic/ac97var.h>
70 1.1 augustss
71 1.1 augustss struct auacer_dma {
72 1.1 augustss bus_dmamap_t map;
73 1.16 christos void *addr;
74 1.1 augustss bus_dma_segment_t segs[1];
75 1.1 augustss int nsegs;
76 1.1 augustss size_t size;
77 1.1 augustss struct auacer_dma *next;
78 1.1 augustss };
79 1.1 augustss
80 1.1 augustss #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr)
81 1.1 augustss #define KERNADDR(p) ((void *)((p)->addr))
82 1.1 augustss
83 1.1 augustss struct auacer_cdata {
84 1.1 augustss struct auacer_dmalist ic_dmalist_pcmo[ALI_DMALIST_MAX];
85 1.1 augustss };
86 1.1 augustss
87 1.1 augustss struct auacer_chan {
88 1.1 augustss uint32_t ptr;
89 1.1 augustss uint32_t start, p, end;
90 1.1 augustss uint32_t blksize, fifoe;
91 1.1 augustss uint32_t ack;
92 1.1 augustss uint32_t port;
93 1.1 augustss struct auacer_dmalist *dmalist;
94 1.1 augustss void (*intr)(void *);
95 1.1 augustss void *arg;
96 1.1 augustss };
97 1.1 augustss
98 1.1 augustss struct auacer_softc {
99 1.1 augustss struct device sc_dev;
100 1.1 augustss void *sc_ih;
101 1.1 augustss
102 1.1 augustss audio_device_t sc_audev;
103 1.1 augustss
104 1.1 augustss bus_space_tag_t iot;
105 1.1 augustss bus_space_handle_t mix_ioh;
106 1.1 augustss bus_space_handle_t aud_ioh;
107 1.1 augustss bus_dma_tag_t dmat;
108 1.1 augustss
109 1.1 augustss struct ac97_codec_if *codec_if;
110 1.1 augustss struct ac97_host_if host_if;
111 1.1 augustss
112 1.1 augustss /* DMA scatter-gather lists. */
113 1.1 augustss bus_dmamap_t sc_cddmamap;
114 1.1 augustss #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
115 1.1 augustss
116 1.1 augustss struct auacer_cdata *sc_cdata;
117 1.1 augustss
118 1.1 augustss struct auacer_chan sc_pcmo;
119 1.1 augustss
120 1.1 augustss struct auacer_dma *sc_dmas;
121 1.1 augustss
122 1.1 augustss pci_chipset_tag_t sc_pc;
123 1.1 augustss pcitag_t sc_pt;
124 1.1 augustss
125 1.1 augustss int sc_dmamap_flags;
126 1.1 augustss
127 1.4 kent #define AUACER_NFORMATS 3
128 1.4 kent struct audio_format sc_formats[AUACER_NFORMATS];
129 1.4 kent struct audio_encoding_set *sc_encodings;
130 1.1 augustss };
131 1.1 augustss
132 1.1 augustss #define READ1(sc, a) bus_space_read_1(sc->iot, sc->aud_ioh, a)
133 1.1 augustss #define READ2(sc, a) bus_space_read_2(sc->iot, sc->aud_ioh, a)
134 1.1 augustss #define READ4(sc, a) bus_space_read_4(sc->iot, sc->aud_ioh, a)
135 1.1 augustss #define WRITE1(sc, a, v) bus_space_write_1(sc->iot, sc->aud_ioh, a, v)
136 1.1 augustss #define WRITE2(sc, a, v) bus_space_write_2(sc->iot, sc->aud_ioh, a, v)
137 1.1 augustss #define WRITE4(sc, a, v) bus_space_write_4(sc->iot, sc->aud_ioh, a, v)
138 1.1 augustss
139 1.1 augustss /* Debug */
140 1.1 augustss #ifdef AUACER_DEBUG
141 1.1 augustss #define DPRINTF(l,x) do { if (auacer_debug & (l)) printf x; } while(0)
142 1.1 augustss int auacer_debug = 0;
143 1.1 augustss #define ALI_DEBUG_CODECIO 0x0001
144 1.1 augustss #define ALI_DEBUG_DMA 0x0002
145 1.1 augustss #define ALI_DEBUG_INTR 0x0004
146 1.1 augustss #define ALI_DEBUG_API 0x0008
147 1.1 augustss #define ALI_DEBUG_MIXERAPI 0x0010
148 1.1 augustss #else
149 1.1 augustss #define DPRINTF(x,y) /* nothing */
150 1.1 augustss #endif
151 1.1 augustss
152 1.10 thorpej static int auacer_intr(void *);
153 1.1 augustss
154 1.10 thorpej static int auacer_query_encoding(void *, struct audio_encoding *);
155 1.10 thorpej static int auacer_set_params(void *, int, int, audio_params_t *,
156 1.10 thorpej audio_params_t *, stream_filter_list_t *,
157 1.10 thorpej stream_filter_list_t *);
158 1.10 thorpej static int auacer_round_blocksize(void *, int, int,
159 1.10 thorpej const audio_params_t *);
160 1.10 thorpej static int auacer_halt_output(void *);
161 1.10 thorpej static int auacer_halt_input(void *);
162 1.10 thorpej static int auacer_getdev(void *, struct audio_device *);
163 1.10 thorpej static int auacer_set_port(void *, mixer_ctrl_t *);
164 1.10 thorpej static int auacer_get_port(void *, mixer_ctrl_t *);
165 1.10 thorpej static int auacer_query_devinfo(void *, mixer_devinfo_t *);
166 1.10 thorpej static void *auacer_allocm(void *, int, size_t, struct malloc_type *, int);
167 1.10 thorpej static void auacer_freem(void *, void *, struct malloc_type *);
168 1.10 thorpej static size_t auacer_round_buffersize(void *, int, size_t);
169 1.10 thorpej static paddr_t auacer_mappage(void *, void *, off_t, int);
170 1.10 thorpej static int auacer_get_props(void *);
171 1.10 thorpej static int auacer_trigger_output(void *, void *, void *, int,
172 1.10 thorpej void (*)(void *), void *,
173 1.10 thorpej const audio_params_t *);
174 1.10 thorpej static int auacer_trigger_input(void *, void *, void *, int,
175 1.10 thorpej void (*)(void *), void *,
176 1.10 thorpej const audio_params_t *);
177 1.10 thorpej
178 1.10 thorpej static int auacer_alloc_cdata(struct auacer_softc *);
179 1.10 thorpej
180 1.10 thorpej static int auacer_allocmem(struct auacer_softc *, size_t, size_t,
181 1.10 thorpej struct auacer_dma *);
182 1.10 thorpej static int auacer_freemem(struct auacer_softc *, struct auacer_dma *);
183 1.1 augustss
184 1.27 dyoung static bool auacer_resume(device_t, const pmf_qual_t *);
185 1.10 thorpej static int auacer_set_rate(struct auacer_softc *, int, u_int);
186 1.1 augustss
187 1.1 augustss static void auacer_reset(struct auacer_softc *sc);
188 1.1 augustss
189 1.10 thorpej static struct audio_hw_if auacer_hw_if = {
190 1.6 kent NULL, /* open */
191 1.6 kent NULL, /* close */
192 1.1 augustss NULL, /* drain */
193 1.1 augustss auacer_query_encoding,
194 1.1 augustss auacer_set_params,
195 1.1 augustss auacer_round_blocksize,
196 1.1 augustss NULL, /* commit_setting */
197 1.1 augustss NULL, /* init_output */
198 1.1 augustss NULL, /* init_input */
199 1.1 augustss NULL, /* start_output */
200 1.1 augustss NULL, /* start_input */
201 1.1 augustss auacer_halt_output,
202 1.1 augustss auacer_halt_input,
203 1.1 augustss NULL, /* speaker_ctl */
204 1.1 augustss auacer_getdev,
205 1.1 augustss NULL, /* getfd */
206 1.1 augustss auacer_set_port,
207 1.1 augustss auacer_get_port,
208 1.1 augustss auacer_query_devinfo,
209 1.1 augustss auacer_allocm,
210 1.1 augustss auacer_freem,
211 1.1 augustss auacer_round_buffersize,
212 1.1 augustss auacer_mappage,
213 1.1 augustss auacer_get_props,
214 1.1 augustss auacer_trigger_output,
215 1.1 augustss auacer_trigger_input,
216 1.1 augustss NULL, /* dev_ioctl */
217 1.12 christos NULL, /* powerstate */
218 1.1 augustss };
219 1.1 augustss
220 1.4 kent #define AUACER_FORMATS_4CH 1
221 1.4 kent #define AUACER_FORMATS_6CH 2
222 1.4 kent static const struct audio_format auacer_formats[AUACER_NFORMATS] = {
223 1.5 augustss {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
224 1.4 kent 2, AUFMT_STEREO, 0, {8000, 48000}},
225 1.4 kent {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
226 1.4 kent 4, AUFMT_SURROUND4, 0, {8000, 48000}},
227 1.4 kent {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
228 1.4 kent 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}},
229 1.4 kent };
230 1.4 kent
231 1.10 thorpej static int auacer_attach_codec(void *, struct ac97_codec_if *);
232 1.10 thorpej static int auacer_read_codec(void *, uint8_t, uint16_t *);
233 1.10 thorpej static int auacer_write_codec(void *, uint8_t, uint16_t);
234 1.10 thorpej static int auacer_reset_codec(void *);
235 1.1 augustss
236 1.10 thorpej static int
237 1.23 cegger auacer_match(device_t parent, cfdata_t match, void *aux)
238 1.1 augustss {
239 1.7 kent struct pci_attach_args *pa;
240 1.1 augustss
241 1.7 kent pa = (struct pci_attach_args *)aux;
242 1.1 augustss if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI &&
243 1.1 augustss PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M5455)
244 1.1 augustss return 1;
245 1.1 augustss return 0;
246 1.1 augustss }
247 1.1 augustss
248 1.10 thorpej static void
249 1.23 cegger auacer_attach(device_t parent, device_t self, void *aux)
250 1.1 augustss {
251 1.7 kent struct auacer_softc *sc;
252 1.7 kent struct pci_attach_args *pa;
253 1.1 augustss pci_intr_handle_t ih;
254 1.1 augustss bus_size_t aud_size;
255 1.1 augustss pcireg_t v;
256 1.1 augustss const char *intrstr;
257 1.4 kent int i;
258 1.1 augustss
259 1.24 cegger sc = device_private(self);
260 1.7 kent pa = aux;
261 1.1 augustss aprint_normal(": Acer Labs M5455 Audio controller\n");
262 1.1 augustss
263 1.1 augustss if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->iot,
264 1.1 augustss &sc->aud_ioh, NULL, &aud_size)) {
265 1.1 augustss aprint_error(": can't map i/o space\n");
266 1.1 augustss return;
267 1.1 augustss }
268 1.1 augustss
269 1.1 augustss sc->sc_pc = pa->pa_pc;
270 1.1 augustss sc->sc_pt = pa->pa_tag;
271 1.1 augustss sc->dmat = pa->pa_dmat;
272 1.1 augustss
273 1.1 augustss sc->sc_dmamap_flags = BUS_DMA_COHERENT; /* XXX remove */
274 1.1 augustss
275 1.1 augustss /* enable bus mastering */
276 1.1 augustss v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
277 1.1 augustss pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
278 1.1 augustss v | PCI_COMMAND_MASTER_ENABLE);
279 1.1 augustss
280 1.1 augustss /* Map and establish the interrupt. */
281 1.1 augustss if (pci_intr_map(pa, &ih)) {
282 1.20 cegger aprint_error_dev(&sc->sc_dev, "can't map interrupt\n");
283 1.1 augustss return;
284 1.1 augustss }
285 1.1 augustss intrstr = pci_intr_string(pa->pa_pc, ih);
286 1.1 augustss sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO,
287 1.1 augustss auacer_intr, sc);
288 1.1 augustss if (sc->sc_ih == NULL) {
289 1.20 cegger aprint_error_dev(&sc->sc_dev, "can't establish interrupt");
290 1.1 augustss if (intrstr != NULL)
291 1.25 njoly aprint_error(" at %s", intrstr);
292 1.25 njoly aprint_error("\n");
293 1.1 augustss return;
294 1.1 augustss }
295 1.20 cegger aprint_normal_dev(&sc->sc_dev, "interrupting at %s\n", intrstr);
296 1.1 augustss
297 1.1 augustss strlcpy(sc->sc_audev.name, "M5455 AC97", MAX_AUDIO_DEV_LEN);
298 1.1 augustss snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN,
299 1.1 augustss "0x%02x", PCI_REVISION(pa->pa_class));
300 1.20 cegger strlcpy(sc->sc_audev.config, device_xname(&sc->sc_dev), MAX_AUDIO_DEV_LEN);
301 1.1 augustss
302 1.1 augustss /* Set up DMA lists. */
303 1.1 augustss auacer_alloc_cdata(sc);
304 1.1 augustss sc->sc_pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo;
305 1.1 augustss sc->sc_pcmo.ptr = 0;
306 1.1 augustss sc->sc_pcmo.port = ALI_BASE_PO;
307 1.1 augustss
308 1.1 augustss DPRINTF(ALI_DEBUG_DMA, ("auacer_attach: lists %p\n",
309 1.1 augustss sc->sc_pcmo.dmalist));
310 1.1 augustss
311 1.1 augustss sc->host_if.arg = sc;
312 1.1 augustss sc->host_if.attach = auacer_attach_codec;
313 1.1 augustss sc->host_if.read = auacer_read_codec;
314 1.1 augustss sc->host_if.write = auacer_write_codec;
315 1.1 augustss sc->host_if.reset = auacer_reset_codec;
316 1.1 augustss
317 1.6 kent if (ac97_attach(&sc->host_if, self) != 0)
318 1.1 augustss return;
319 1.1 augustss
320 1.4 kent /* setup audio_format */
321 1.4 kent memcpy(sc->sc_formats, auacer_formats, sizeof(auacer_formats));
322 1.4 kent if (!AC97_IS_4CH(sc->codec_if))
323 1.4 kent AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_4CH]);
324 1.4 kent if (!AC97_IS_6CH(sc->codec_if))
325 1.4 kent AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_6CH]);
326 1.4 kent if (AC97_IS_FIXED_RATE(sc->codec_if)) {
327 1.4 kent for (i = 0; i < AUACER_NFORMATS; i++) {
328 1.4 kent sc->sc_formats[i].frequency_type = 1;
329 1.4 kent sc->sc_formats[i].frequency[0] = 48000;
330 1.4 kent }
331 1.4 kent }
332 1.4 kent
333 1.4 kent if (0 != auconv_create_encodings(sc->sc_formats, AUACER_NFORMATS,
334 1.4 kent &sc->sc_encodings)) {
335 1.4 kent return;
336 1.4 kent }
337 1.4 kent
338 1.1 augustss audio_attach_mi(&auacer_hw_if, sc, &sc->sc_dev);
339 1.1 augustss
340 1.1 augustss auacer_reset(sc);
341 1.18 jmcneill
342 1.18 jmcneill if (!pmf_device_register(self, NULL, auacer_resume))
343 1.18 jmcneill aprint_error_dev(self, "couldn't establish power handler\n");
344 1.1 augustss }
345 1.1 augustss
346 1.10 thorpej CFATTACH_DECL(auacer, sizeof(struct auacer_softc),
347 1.10 thorpej auacer_match, auacer_attach, NULL, NULL);
348 1.10 thorpej
349 1.1 augustss static int
350 1.1 augustss auacer_ready_codec(struct auacer_softc *sc, int mask)
351 1.1 augustss {
352 1.7 kent int count;
353 1.1 augustss
354 1.1 augustss for (count = 0; count < 0x7f; count++) {
355 1.1 augustss int val = READ1(sc, ALI_CSPSR);
356 1.1 augustss if (val & mask)
357 1.1 augustss return 0;
358 1.1 augustss }
359 1.1 augustss
360 1.1 augustss aprint_normal("auacer_ready_codec: AC97 codec ready timeout.\n");
361 1.1 augustss return EBUSY;
362 1.1 augustss }
363 1.1 augustss
364 1.1 augustss static int
365 1.1 augustss auacer_sema_codec(struct auacer_softc *sc)
366 1.1 augustss {
367 1.9 christos int ttime;
368 1.1 augustss
369 1.9 christos ttime = 100;
370 1.9 christos while (ttime-- && (READ4(sc, ALI_CAS) & ALI_CAS_SEM_BUSY))
371 1.1 augustss delay(1);
372 1.9 christos if (!ttime)
373 1.1 augustss aprint_normal("auacer_sema_codec: timeout\n");
374 1.1 augustss return auacer_ready_codec(sc, ALI_CSPSR_CODEC_READY);
375 1.1 augustss }
376 1.1 augustss
377 1.10 thorpej static int
378 1.7 kent auacer_read_codec(void *v, uint8_t reg, uint16_t *val)
379 1.1 augustss {
380 1.7 kent struct auacer_softc *sc;
381 1.1 augustss
382 1.7 kent sc = v;
383 1.1 augustss if (auacer_sema_codec(sc))
384 1.1 augustss return EIO;
385 1.1 augustss
386 1.1 augustss reg |= ALI_CPR_ADDR_READ;
387 1.1 augustss #if 0
388 1.1 augustss if (ac97->num)
389 1.1 augustss reg |= ALI_CPR_ADDR_SECONDARY;
390 1.1 augustss #endif
391 1.1 augustss WRITE2(sc, ALI_CPR_ADDR, reg);
392 1.1 augustss if (auacer_ready_codec(sc, ALI_CSPSR_READ_OK))
393 1.1 augustss return EIO;
394 1.1 augustss *val = READ2(sc, ALI_SPR);
395 1.1 augustss
396 1.1 augustss DPRINTF(ALI_DEBUG_CODECIO, ("auacer_read_codec: reg=0x%x val=0x%x\n",
397 1.1 augustss reg, *val));
398 1.1 augustss
399 1.1 augustss return 0;
400 1.1 augustss }
401 1.1 augustss
402 1.1 augustss int
403 1.7 kent auacer_write_codec(void *v, uint8_t reg, uint16_t val)
404 1.1 augustss {
405 1.7 kent struct auacer_softc *sc;
406 1.1 augustss
407 1.1 augustss DPRINTF(ALI_DEBUG_CODECIO, ("auacer_write_codec: reg=0x%x val=0x%x\n",
408 1.1 augustss reg, val));
409 1.7 kent sc = v;
410 1.1 augustss if (auacer_sema_codec(sc))
411 1.1 augustss return EIO;
412 1.1 augustss WRITE2(sc, ALI_CPR, val);
413 1.1 augustss #if 0
414 1.1 augustss if (ac97->num)
415 1.1 augustss reg |= ALI_CPR_ADDR_SECONDARY;
416 1.1 augustss #endif
417 1.1 augustss WRITE2(sc, ALI_CPR_ADDR, reg);
418 1.1 augustss auacer_ready_codec(sc, ALI_CSPSR_WRITE_OK);
419 1.1 augustss return 0;
420 1.1 augustss }
421 1.1 augustss
422 1.10 thorpej static int
423 1.1 augustss auacer_attach_codec(void *v, struct ac97_codec_if *cif)
424 1.1 augustss {
425 1.7 kent struct auacer_softc *sc;
426 1.1 augustss
427 1.7 kent sc = v;
428 1.1 augustss sc->codec_if = cif;
429 1.1 augustss return 0;
430 1.1 augustss }
431 1.1 augustss
432 1.10 thorpej static int
433 1.1 augustss auacer_reset_codec(void *v)
434 1.1 augustss {
435 1.7 kent struct auacer_softc *sc;
436 1.7 kent uint32_t reg;
437 1.7 kent int i;
438 1.1 augustss
439 1.7 kent sc = v;
440 1.7 kent i = 0;
441 1.1 augustss reg = READ4(sc, ALI_SCR);
442 1.1 augustss if ((reg & 2) == 0) /* Cold required */
443 1.1 augustss reg |= 2;
444 1.1 augustss else
445 1.1 augustss reg |= 1; /* Warm */
446 1.1 augustss reg &= ~0x80000000; /* ACLink on */
447 1.1 augustss WRITE4(sc, ALI_SCR, reg);
448 1.1 augustss
449 1.1 augustss while (i < 10) {
450 1.1 augustss if ((READ4(sc, ALI_INTERRUPTSR) & ALI_INT_GPIO) == 0)
451 1.1 augustss break;
452 1.1 augustss delay(50000); /* XXX */
453 1.1 augustss i++;
454 1.1 augustss }
455 1.1 augustss if (i == 10) {
456 1.1 augustss return EIO;
457 1.1 augustss }
458 1.1 augustss
459 1.1 augustss for (i = 0; i < 10; i++) {
460 1.1 augustss reg = READ4(sc, ALI_RTSR);
461 1.1 augustss if (reg & 0x80) /* primary codec */
462 1.1 augustss break;
463 1.1 augustss WRITE4(sc, ALI_RTSR, reg | 0x80);
464 1.1 augustss delay(50000); /* XXX */
465 1.1 augustss }
466 1.1 augustss
467 1.1 augustss return 0;
468 1.1 augustss }
469 1.1 augustss
470 1.1 augustss static void
471 1.1 augustss auacer_reset(struct auacer_softc *sc)
472 1.1 augustss {
473 1.1 augustss WRITE4(sc, ALI_SCR, ALI_SCR_RESET);
474 1.1 augustss WRITE4(sc, ALI_FIFOCR1, 0x83838383);
475 1.1 augustss WRITE4(sc, ALI_FIFOCR2, 0x83838383);
476 1.1 augustss WRITE4(sc, ALI_FIFOCR3, 0x83838383);
477 1.1 augustss WRITE4(sc, ALI_INTERFACECR, ALI_IF_PO); /* XXX pcm out only */
478 1.1 augustss WRITE4(sc, ALI_INTERRUPTCR, 0x00000000);
479 1.1 augustss WRITE4(sc, ALI_INTERRUPTSR, 0x00000000);
480 1.1 augustss }
481 1.1 augustss
482 1.10 thorpej static int
483 1.1 augustss auacer_query_encoding(void *v, struct audio_encoding *aep)
484 1.1 augustss {
485 1.4 kent struct auacer_softc *sc;
486 1.4 kent
487 1.1 augustss DPRINTF(ALI_DEBUG_API, ("auacer_query_encoding\n"));
488 1.4 kent sc = v;
489 1.4 kent return auconv_query_encoding(sc->sc_encodings, aep);
490 1.1 augustss }
491 1.1 augustss
492 1.10 thorpej static int
493 1.6 kent auacer_set_rate(struct auacer_softc *sc, int mode, u_int srate)
494 1.1 augustss {
495 1.1 augustss int ret;
496 1.6 kent u_int ratetmp;
497 1.1 augustss
498 1.8 augustss DPRINTF(ALI_DEBUG_API, ("auacer_set_rate: srate=%u\n", srate));
499 1.1 augustss
500 1.1 augustss ratetmp = srate;
501 1.1 augustss if (mode == AUMODE_RECORD)
502 1.1 augustss return sc->codec_if->vtbl->set_rate(sc->codec_if,
503 1.1 augustss AC97_REG_PCM_LR_ADC_RATE, &ratetmp);
504 1.1 augustss ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
505 1.1 augustss AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp);
506 1.1 augustss if (ret)
507 1.1 augustss return ret;
508 1.1 augustss ratetmp = srate;
509 1.1 augustss ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
510 1.1 augustss AC97_REG_PCM_SURR_DAC_RATE, &ratetmp);
511 1.1 augustss if (ret)
512 1.1 augustss return ret;
513 1.1 augustss ratetmp = srate;
514 1.1 augustss ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
515 1.1 augustss AC97_REG_PCM_LFE_DAC_RATE, &ratetmp);
516 1.1 augustss return ret;
517 1.1 augustss }
518 1.1 augustss
519 1.10 thorpej static int
520 1.15 christos auacer_set_params(void *v, int setmode, int usemode,
521 1.14 christos audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil,
522 1.14 christos stream_filter_list_t *rfil)
523 1.1 augustss {
524 1.7 kent struct auacer_softc *sc;
525 1.1 augustss struct audio_params *p;
526 1.6 kent stream_filter_list_t *fil;
527 1.1 augustss uint32_t control;
528 1.4 kent int mode, index;
529 1.1 augustss
530 1.1 augustss DPRINTF(ALI_DEBUG_API, ("auacer_set_params\n"));
531 1.7 kent sc = v;
532 1.1 augustss for (mode = AUMODE_RECORD; mode != -1;
533 1.1 augustss mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
534 1.1 augustss if ((setmode & mode) == 0)
535 1.1 augustss continue;
536 1.1 augustss
537 1.1 augustss p = mode == AUMODE_PLAY ? play : rec;
538 1.1 augustss if (p == NULL)
539 1.1 augustss continue;
540 1.1 augustss
541 1.1 augustss if ((p->sample_rate != 8000) &&
542 1.1 augustss (p->sample_rate != 11025) &&
543 1.1 augustss (p->sample_rate != 12000) &&
544 1.1 augustss (p->sample_rate != 16000) &&
545 1.1 augustss (p->sample_rate != 22050) &&
546 1.1 augustss (p->sample_rate != 24000) &&
547 1.1 augustss (p->sample_rate != 32000) &&
548 1.1 augustss (p->sample_rate != 44100) &&
549 1.1 augustss (p->sample_rate != 48000))
550 1.1 augustss return (EINVAL);
551 1.1 augustss
552 1.6 kent fil = mode == AUMODE_PLAY ? pfil : rfil;
553 1.4 kent index = auconv_set_converter(sc->sc_formats, AUACER_NFORMATS,
554 1.6 kent mode, p, TRUE, fil);
555 1.4 kent if (index < 0)
556 1.4 kent return EINVAL;
557 1.6 kent if (fil->req_size > 0)
558 1.6 kent p = &fil->filters[0].param;
559 1.6 kent /* p points HW encoding */
560 1.4 kent if (sc->sc_formats[index].frequency_type != 1
561 1.6 kent && auacer_set_rate(sc, mode, p->sample_rate))
562 1.4 kent return EINVAL;
563 1.1 augustss if (mode == AUMODE_PLAY) {
564 1.1 augustss control = READ4(sc, ALI_SCR);
565 1.1 augustss control &= ~ALI_SCR_PCM_246_MASK;
566 1.1 augustss if (p->channels == 4)
567 1.1 augustss control |= ALI_SCR_PCM_4;
568 1.1 augustss else if (p->channels == 6)
569 1.1 augustss control |= ALI_SCR_PCM_6;
570 1.1 augustss WRITE4(sc, ALI_SCR, control);
571 1.1 augustss }
572 1.1 augustss }
573 1.1 augustss
574 1.1 augustss return (0);
575 1.1 augustss }
576 1.1 augustss
577 1.10 thorpej static int
578 1.15 christos auacer_round_blocksize(void *v, int blk, int mode,
579 1.15 christos const audio_params_t *param)
580 1.1 augustss {
581 1.1 augustss
582 1.7 kent return blk & ~0x3f; /* keep good alignment */
583 1.1 augustss }
584 1.1 augustss
585 1.1 augustss static void
586 1.1 augustss auacer_halt(struct auacer_softc *sc, struct auacer_chan *chan)
587 1.1 augustss {
588 1.1 augustss uint32_t val;
589 1.7 kent uint8_t port;
590 1.1 augustss uint32_t slot;
591 1.1 augustss
592 1.7 kent port = chan->port;
593 1.1 augustss DPRINTF(ALI_DEBUG_API, ("auacer_halt: port=0x%x\n", port));
594 1.1 augustss chan->intr = 0;
595 1.1 augustss
596 1.1 augustss slot = ALI_PORT2SLOT(port);
597 1.1 augustss
598 1.1 augustss val = READ4(sc, ALI_DMACR);
599 1.1 augustss val |= 1 << (slot+16); /* pause */
600 1.1 augustss val &= ~(1 << slot); /* no start */
601 1.1 augustss WRITE4(sc, ALI_DMACR, val);
602 1.1 augustss WRITE1(sc, port + ALI_OFF_CR, 0);
603 1.1 augustss while (READ1(sc, port + ALI_OFF_CR))
604 1.1 augustss ;
605 1.1 augustss /* reset whole DMA things */
606 1.1 augustss WRITE1(sc, port + ALI_OFF_CR, ALI_CR_RR);
607 1.1 augustss /* clear interrupts */
608 1.1 augustss WRITE1(sc, port + ALI_OFF_SR, READ1(sc, port+ALI_OFF_SR) | ALI_SR_W1TC);
609 1.1 augustss WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(port));
610 1.1 augustss }
611 1.1 augustss
612 1.10 thorpej static int
613 1.1 augustss auacer_halt_output(void *v)
614 1.1 augustss {
615 1.7 kent struct auacer_softc *sc;
616 1.1 augustss
617 1.1 augustss DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_output\n"));
618 1.7 kent sc = v;
619 1.1 augustss auacer_halt(sc, &sc->sc_pcmo);
620 1.1 augustss
621 1.7 kent return 0;
622 1.1 augustss }
623 1.1 augustss
624 1.10 thorpej static int
625 1.15 christos auacer_halt_input(void *v)
626 1.1 augustss {
627 1.1 augustss DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_input\n"));
628 1.1 augustss
629 1.7 kent return 0;
630 1.1 augustss }
631 1.1 augustss
632 1.10 thorpej static int
633 1.1 augustss auacer_getdev(void *v, struct audio_device *adp)
634 1.1 augustss {
635 1.7 kent struct auacer_softc *sc;
636 1.1 augustss
637 1.1 augustss DPRINTF(ALI_DEBUG_API, ("auacer_getdev\n"));
638 1.7 kent sc = v;
639 1.1 augustss *adp = sc->sc_audev;
640 1.7 kent return 0;
641 1.1 augustss }
642 1.1 augustss
643 1.10 thorpej static int
644 1.1 augustss auacer_set_port(void *v, mixer_ctrl_t *cp)
645 1.1 augustss {
646 1.7 kent struct auacer_softc *sc;
647 1.1 augustss
648 1.1 augustss DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_set_port\n"));
649 1.7 kent sc = v;
650 1.7 kent return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp);
651 1.1 augustss }
652 1.1 augustss
653 1.10 thorpej static int
654 1.1 augustss auacer_get_port(void *v, mixer_ctrl_t *cp)
655 1.1 augustss {
656 1.7 kent struct auacer_softc *sc;
657 1.1 augustss
658 1.1 augustss DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_get_port\n"));
659 1.7 kent sc = v;
660 1.7 kent return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp);
661 1.1 augustss }
662 1.1 augustss
663 1.10 thorpej static int
664 1.1 augustss auacer_query_devinfo(void *v, mixer_devinfo_t *dp)
665 1.1 augustss {
666 1.7 kent struct auacer_softc *sc;
667 1.1 augustss
668 1.1 augustss DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_query_devinfo\n"));
669 1.7 kent sc = v;
670 1.7 kent return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp);
671 1.1 augustss }
672 1.1 augustss
673 1.10 thorpej static void *
674 1.15 christos auacer_allocm(void *v, int direction, size_t size,
675 1.14 christos struct malloc_type *pool, int flags)
676 1.1 augustss {
677 1.7 kent struct auacer_softc *sc;
678 1.1 augustss struct auacer_dma *p;
679 1.1 augustss int error;
680 1.1 augustss
681 1.1 augustss if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX))
682 1.7 kent return NULL;
683 1.1 augustss
684 1.1 augustss p = malloc(sizeof(*p), pool, flags | M_ZERO);
685 1.1 augustss if (p == NULL)
686 1.7 kent return NULL;
687 1.7 kent sc = v;
688 1.1 augustss error = auacer_allocmem(sc, size, 0, p);
689 1.1 augustss if (error) {
690 1.1 augustss free(p, pool);
691 1.7 kent return NULL;
692 1.1 augustss }
693 1.1 augustss
694 1.1 augustss p->next = sc->sc_dmas;
695 1.1 augustss sc->sc_dmas = p;
696 1.1 augustss
697 1.7 kent return KERNADDR(p);
698 1.1 augustss }
699 1.1 augustss
700 1.10 thorpej static void
701 1.1 augustss auacer_freem(void *v, void *ptr, struct malloc_type *pool)
702 1.1 augustss {
703 1.7 kent struct auacer_softc *sc;
704 1.1 augustss struct auacer_dma *p, **pp;
705 1.1 augustss
706 1.7 kent sc = v;
707 1.1 augustss for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
708 1.1 augustss if (KERNADDR(p) == ptr) {
709 1.1 augustss auacer_freemem(sc, p);
710 1.1 augustss *pp = p->next;
711 1.1 augustss free(p, pool);
712 1.1 augustss return;
713 1.1 augustss }
714 1.1 augustss }
715 1.1 augustss }
716 1.1 augustss
717 1.10 thorpej static size_t
718 1.15 christos auacer_round_buffersize(void *v, int direction, size_t size)
719 1.1 augustss {
720 1.1 augustss
721 1.1 augustss if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX))
722 1.1 augustss size = ALI_DMALIST_MAX * ALI_DMASEG_MAX;
723 1.1 augustss
724 1.1 augustss return size;
725 1.1 augustss }
726 1.1 augustss
727 1.10 thorpej static paddr_t
728 1.1 augustss auacer_mappage(void *v, void *mem, off_t off, int prot)
729 1.1 augustss {
730 1.7 kent struct auacer_softc *sc;
731 1.1 augustss struct auacer_dma *p;
732 1.1 augustss
733 1.1 augustss if (off < 0)
734 1.7 kent return -1;
735 1.7 kent sc = v;
736 1.1 augustss for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next)
737 1.7 kent continue;
738 1.7 kent if (p == NULL)
739 1.7 kent return -1;
740 1.7 kent return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs,
741 1.7 kent off, prot, BUS_DMA_WAITOK);
742 1.1 augustss }
743 1.1 augustss
744 1.10 thorpej static int
745 1.1 augustss auacer_get_props(void *v)
746 1.1 augustss {
747 1.7 kent struct auacer_softc *sc;
748 1.1 augustss int props;
749 1.1 augustss
750 1.7 kent sc = v;
751 1.1 augustss props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
752 1.1 augustss /*
753 1.1 augustss * Even if the codec is fixed-rate, set_param() succeeds for any sample
754 1.1 augustss * rate because of aurateconv. Applications can't know what rate the
755 1.1 augustss * device can process in the case of mmap().
756 1.1 augustss */
757 1.3 kent if (!AC97_IS_FIXED_RATE(sc->codec_if))
758 1.1 augustss props |= AUDIO_PROP_MMAP;
759 1.1 augustss return props;
760 1.1 augustss }
761 1.1 augustss
762 1.1 augustss static void
763 1.1 augustss auacer_add_entry(struct auacer_chan *chan)
764 1.1 augustss {
765 1.1 augustss struct auacer_dmalist *q;
766 1.1 augustss
767 1.1 augustss q = &chan->dmalist[chan->ptr];
768 1.1 augustss
769 1.1 augustss DPRINTF(ALI_DEBUG_INTR,
770 1.1 augustss ("auacer_add_entry: %p = %x @ 0x%x\n",
771 1.1 augustss q, chan->blksize / 2, chan->p));
772 1.1 augustss
773 1.1 augustss q->base = htole32(chan->p);
774 1.1 augustss q->len = htole32((chan->blksize / ALI_SAMPLE_SIZE) | ALI_DMAF_IOC);
775 1.1 augustss chan->p += chan->blksize;
776 1.1 augustss if (chan->p >= chan->end)
777 1.1 augustss chan->p = chan->start;
778 1.7 kent
779 1.1 augustss if (++chan->ptr >= ALI_DMALIST_MAX)
780 1.1 augustss chan->ptr = 0;
781 1.1 augustss }
782 1.1 augustss
783 1.1 augustss static void
784 1.1 augustss auacer_upd_chan(struct auacer_softc *sc, struct auacer_chan *chan)
785 1.1 augustss {
786 1.1 augustss uint32_t sts;
787 1.1 augustss uint32_t civ;
788 1.1 augustss
789 1.1 augustss sts = READ2(sc, chan->port + ALI_OFF_SR);
790 1.1 augustss /* intr ack */
791 1.1 augustss WRITE2(sc, chan->port + ALI_OFF_SR, sts & ALI_SR_W1TC);
792 1.1 augustss WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(chan->port));
793 1.1 augustss
794 1.1 augustss DPRINTF(ALI_DEBUG_INTR, ("auacer_upd_chan: sts=0x%x\n", sts));
795 1.1 augustss
796 1.1 augustss if (sts & ALI_SR_DMA_INT_FIFO) {
797 1.1 augustss printf("%s: fifo underrun # %u\n",
798 1.20 cegger device_xname(&sc->sc_dev), ++chan->fifoe);
799 1.1 augustss }
800 1.1 augustss
801 1.1 augustss civ = READ1(sc, chan->port + ALI_OFF_CIV);
802 1.7 kent
803 1.1 augustss DPRINTF(ALI_DEBUG_INTR,("auacer_intr: civ=%u ptr=%u\n",civ,chan->ptr));
804 1.7 kent
805 1.1 augustss /* XXX */
806 1.1 augustss while (chan->ptr != civ) {
807 1.1 augustss auacer_add_entry(chan);
808 1.1 augustss }
809 1.1 augustss
810 1.1 augustss WRITE1(sc, chan->port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK);
811 1.1 augustss
812 1.1 augustss while (chan->ack != civ) {
813 1.1 augustss if (chan->intr) {
814 1.1 augustss DPRINTF(ALI_DEBUG_INTR,("auacer_upd_chan: callback\n"));
815 1.1 augustss chan->intr(chan->arg);
816 1.1 augustss }
817 1.1 augustss chan->ack++;
818 1.1 augustss if (chan->ack >= ALI_DMALIST_MAX)
819 1.1 augustss chan->ack = 0;
820 1.1 augustss }
821 1.1 augustss }
822 1.1 augustss
823 1.10 thorpej static int
824 1.1 augustss auacer_intr(void *v)
825 1.1 augustss {
826 1.7 kent struct auacer_softc *sc;
827 1.1 augustss int ret, intrs;
828 1.1 augustss
829 1.7 kent sc = v;
830 1.1 augustss intrs = READ4(sc, ALI_INTERRUPTSR);
831 1.1 augustss DPRINTF(ALI_DEBUG_INTR, ("auacer_intr: intrs=0x%x\n", intrs));
832 1.1 augustss
833 1.1 augustss ret = 0;
834 1.1 augustss if (intrs & ALI_INT_PCMOUT) {
835 1.1 augustss auacer_upd_chan(sc, &sc->sc_pcmo);
836 1.1 augustss ret++;
837 1.1 augustss }
838 1.1 augustss
839 1.1 augustss return ret != 0;
840 1.1 augustss }
841 1.1 augustss
842 1.1 augustss static void
843 1.1 augustss auacer_setup_chan(struct auacer_softc *sc, struct auacer_chan *chan,
844 1.1 augustss uint32_t start, uint32_t size, uint32_t blksize,
845 1.1 augustss void (*intr)(void *), void *arg)
846 1.1 augustss {
847 1.1 augustss uint32_t port, slot;
848 1.1 augustss uint32_t offs, val;
849 1.1 augustss
850 1.1 augustss chan->start = start;
851 1.1 augustss chan->ptr = 0;
852 1.1 augustss chan->p = chan->start;
853 1.1 augustss chan->end = chan->start + size;
854 1.1 augustss chan->blksize = blksize;
855 1.1 augustss chan->ack = 0;
856 1.1 augustss chan->intr = intr;
857 1.1 augustss chan->arg = arg;
858 1.1 augustss
859 1.1 augustss auacer_add_entry(chan);
860 1.1 augustss auacer_add_entry(chan);
861 1.1 augustss
862 1.1 augustss port = chan->port;
863 1.1 augustss slot = ALI_PORT2SLOT(port);
864 1.1 augustss
865 1.1 augustss WRITE1(sc, port + ALI_OFF_CIV, 0);
866 1.1 augustss WRITE1(sc, port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK);
867 1.1 augustss offs = (char *)chan->dmalist - (char *)sc->sc_cdata;
868 1.1 augustss WRITE4(sc, port + ALI_OFF_BDBAR, sc->sc_cddma + offs);
869 1.1 augustss WRITE1(sc, port + ALI_OFF_CR,
870 1.1 augustss ALI_CR_IOCE | ALI_CR_FEIE | ALI_CR_LVBIE | ALI_CR_RPBM);
871 1.1 augustss val = READ4(sc, ALI_DMACR);
872 1.1 augustss val &= ~(1 << (slot+16)); /* no pause */
873 1.1 augustss val |= 1 << slot; /* start */
874 1.1 augustss WRITE4(sc, ALI_DMACR, val);
875 1.1 augustss }
876 1.1 augustss
877 1.10 thorpej static int
878 1.1 augustss auacer_trigger_output(void *v, void *start, void *end, int blksize,
879 1.15 christos void (*intr)(void *), void *arg, const audio_params_t *param)
880 1.1 augustss {
881 1.7 kent struct auacer_softc *sc;
882 1.1 augustss struct auacer_dma *p;
883 1.1 augustss uint32_t size;
884 1.1 augustss
885 1.1 augustss DPRINTF(ALI_DEBUG_DMA,
886 1.1 augustss ("auacer_trigger_output(%p, %p, %d, %p, %p, %p)\n",
887 1.1 augustss start, end, blksize, intr, arg, param));
888 1.7 kent sc = v;
889 1.1 augustss for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
890 1.7 kent continue;
891 1.1 augustss if (!p) {
892 1.1 augustss printf("auacer_trigger_output: bad addr %p\n", start);
893 1.1 augustss return (EINVAL);
894 1.1 augustss }
895 1.1 augustss
896 1.1 augustss size = (char *)end - (char *)start;
897 1.1 augustss auacer_setup_chan(sc, &sc->sc_pcmo, DMAADDR(p), size, blksize,
898 1.1 augustss intr, arg);
899 1.1 augustss
900 1.1 augustss return 0;
901 1.1 augustss }
902 1.1 augustss
903 1.10 thorpej static int
904 1.15 christos auacer_trigger_input(void *v, void *start, void *end,
905 1.15 christos int blksize, void (*intr)(void *), void *arg,
906 1.15 christos const audio_params_t *param)
907 1.1 augustss {
908 1.7 kent return EINVAL;
909 1.1 augustss }
910 1.1 augustss
911 1.10 thorpej static int
912 1.1 augustss auacer_allocmem(struct auacer_softc *sc, size_t size, size_t align,
913 1.1 augustss struct auacer_dma *p)
914 1.1 augustss {
915 1.1 augustss int error;
916 1.1 augustss
917 1.1 augustss p->size = size;
918 1.1 augustss error = bus_dmamem_alloc(sc->dmat, p->size, align, 0,
919 1.1 augustss p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
920 1.1 augustss &p->nsegs, BUS_DMA_NOWAIT);
921 1.1 augustss if (error)
922 1.7 kent return error;
923 1.1 augustss
924 1.1 augustss error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size,
925 1.1 augustss &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags);
926 1.1 augustss if (error)
927 1.1 augustss goto free;
928 1.1 augustss
929 1.1 augustss error = bus_dmamap_create(sc->dmat, p->size, 1, p->size,
930 1.1 augustss 0, BUS_DMA_NOWAIT, &p->map);
931 1.1 augustss if (error)
932 1.1 augustss goto unmap;
933 1.1 augustss
934 1.1 augustss error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL,
935 1.1 augustss BUS_DMA_NOWAIT);
936 1.1 augustss if (error)
937 1.1 augustss goto destroy;
938 1.1 augustss return (0);
939 1.1 augustss
940 1.1 augustss destroy:
941 1.1 augustss bus_dmamap_destroy(sc->dmat, p->map);
942 1.1 augustss unmap:
943 1.1 augustss bus_dmamem_unmap(sc->dmat, p->addr, p->size);
944 1.1 augustss free:
945 1.1 augustss bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
946 1.7 kent return error;
947 1.1 augustss }
948 1.1 augustss
949 1.10 thorpej static int
950 1.1 augustss auacer_freemem(struct auacer_softc *sc, struct auacer_dma *p)
951 1.1 augustss {
952 1.1 augustss
953 1.1 augustss bus_dmamap_unload(sc->dmat, p->map);
954 1.1 augustss bus_dmamap_destroy(sc->dmat, p->map);
955 1.1 augustss bus_dmamem_unmap(sc->dmat, p->addr, p->size);
956 1.1 augustss bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
957 1.7 kent return 0;
958 1.1 augustss }
959 1.1 augustss
960 1.10 thorpej static int
961 1.1 augustss auacer_alloc_cdata(struct auacer_softc *sc)
962 1.1 augustss {
963 1.1 augustss bus_dma_segment_t seg;
964 1.1 augustss int error, rseg;
965 1.1 augustss
966 1.1 augustss /*
967 1.1 augustss * Allocate the control data structure, and create and load the
968 1.1 augustss * DMA map for it.
969 1.1 augustss */
970 1.1 augustss if ((error = bus_dmamem_alloc(sc->dmat,
971 1.1 augustss sizeof(struct auacer_cdata),
972 1.1 augustss PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) {
973 1.20 cegger aprint_error_dev(&sc->sc_dev, "unable to allocate control data, error = %d\n",
974 1.20 cegger error);
975 1.1 augustss goto fail_0;
976 1.1 augustss }
977 1.1 augustss
978 1.1 augustss if ((error = bus_dmamem_map(sc->dmat, &seg, rseg,
979 1.1 augustss sizeof(struct auacer_cdata),
980 1.16 christos (void **) &sc->sc_cdata,
981 1.1 augustss sc->sc_dmamap_flags)) != 0) {
982 1.20 cegger aprint_error_dev(&sc->sc_dev, "unable to map control data, error = %d\n",
983 1.20 cegger error);
984 1.1 augustss goto fail_1;
985 1.1 augustss }
986 1.1 augustss
987 1.1 augustss if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auacer_cdata), 1,
988 1.1 augustss sizeof(struct auacer_cdata), 0, 0,
989 1.1 augustss &sc->sc_cddmamap)) != 0) {
990 1.20 cegger aprint_error_dev(&sc->sc_dev, "unable to create control data DMA map, "
991 1.20 cegger "error = %d\n", error);
992 1.1 augustss goto fail_2;
993 1.1 augustss }
994 1.1 augustss
995 1.1 augustss if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap,
996 1.1 augustss sc->sc_cdata, sizeof(struct auacer_cdata),
997 1.1 augustss NULL, 0)) != 0) {
998 1.20 cegger aprint_error_dev(&sc->sc_dev, "unable to load control data DMA map, "
999 1.20 cegger "error = %d\n", error);
1000 1.1 augustss goto fail_3;
1001 1.1 augustss }
1002 1.1 augustss
1003 1.7 kent return 0;
1004 1.1 augustss
1005 1.1 augustss fail_3:
1006 1.1 augustss bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap);
1007 1.1 augustss fail_2:
1008 1.16 christos bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata,
1009 1.1 augustss sizeof(struct auacer_cdata));
1010 1.1 augustss fail_1:
1011 1.1 augustss bus_dmamem_free(sc->dmat, &seg, rseg);
1012 1.1 augustss fail_0:
1013 1.7 kent return error;
1014 1.1 augustss }
1015 1.1 augustss
1016 1.18 jmcneill static bool
1017 1.27 dyoung auacer_resume(device_t dv, const pmf_qual_t *qual)
1018 1.1 augustss {
1019 1.18 jmcneill struct auacer_softc *sc = device_private(dv);
1020 1.18 jmcneill
1021 1.18 jmcneill auacer_reset_codec(sc);
1022 1.18 jmcneill delay(1000);
1023 1.18 jmcneill sc->codec_if->vtbl->restore_ports(sc->codec_if);
1024 1.1 augustss
1025 1.18 jmcneill return true;
1026 1.1 augustss }
1027