auacer.c revision 1.1
1 /* $NetBSD: auacer.c,v 1.1 2004/10/10 16:37:07 augustss Exp $ */ 2 3 /*- 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Acer Labs M5455 audio driver 41 * 42 * Acer provides data sheets after signing an NDA. 43 * The chip behaves somewhat like the Intel i8x0, so this driver 44 * is loosely based on the auich driver. Additional information taken from 45 * the ALSA intel8x0.c driver (which handles M5455 as well). 46 * 47 * As an historical note one can observe that the auich driver borrows 48 * lot from the first NetBSD PCI audio driver, the eap driver. But this 49 * is not attributed anywhere. 50 */ 51 52 53 #include <sys/cdefs.h> 54 __KERNEL_RCSID(0, "$NetBSD: auacer.c,v 1.1 2004/10/10 16:37:07 augustss Exp $"); 55 56 #include <sys/param.h> 57 #include <sys/systm.h> 58 #include <sys/kernel.h> 59 #include <sys/malloc.h> 60 #include <sys/device.h> 61 #include <sys/fcntl.h> 62 #include <sys/proc.h> 63 64 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 65 66 #include <dev/pci/pcidevs.h> 67 #include <dev/pci/pcivar.h> 68 #include <dev/pci/auacerreg.h> 69 70 #include <sys/audioio.h> 71 #include <dev/audio_if.h> 72 #include <dev/mulaw.h> 73 #include <dev/auconv.h> 74 75 #include <machine/bus.h> 76 77 #include <dev/ic/ac97reg.h> 78 #include <dev/ic/ac97var.h> 79 80 struct auacer_dma { 81 bus_dmamap_t map; 82 caddr_t addr; 83 bus_dma_segment_t segs[1]; 84 int nsegs; 85 size_t size; 86 struct auacer_dma *next; 87 }; 88 89 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 90 #define KERNADDR(p) ((void *)((p)->addr)) 91 92 struct auacer_cdata { 93 struct auacer_dmalist ic_dmalist_pcmo[ALI_DMALIST_MAX]; 94 }; 95 96 struct auacer_chan { 97 uint32_t ptr; 98 uint32_t start, p, end; 99 uint32_t blksize, fifoe; 100 uint32_t ack; 101 uint32_t port; 102 struct auacer_dmalist *dmalist; 103 void (*intr)(void *); 104 void *arg; 105 }; 106 107 struct auacer_softc { 108 struct device sc_dev; 109 void *sc_ih; 110 111 audio_device_t sc_audev; 112 113 bus_space_tag_t iot; 114 bus_space_handle_t mix_ioh; 115 bus_space_handle_t aud_ioh; 116 bus_dma_tag_t dmat; 117 118 struct ac97_codec_if *codec_if; 119 struct ac97_host_if host_if; 120 121 /* DMA scatter-gather lists. */ 122 bus_dmamap_t sc_cddmamap; 123 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 124 125 struct auacer_cdata *sc_cdata; 126 127 struct auacer_chan sc_pcmo; 128 129 struct auacer_dma *sc_dmas; 130 131 pci_chipset_tag_t sc_pc; 132 pcitag_t sc_pt; 133 134 int sc_dmamap_flags; 135 136 /* Power Management */ 137 void *sc_powerhook; 138 int sc_suspend; 139 u_int16_t ext_status; 140 }; 141 142 #define READ1(sc, a) bus_space_read_1(sc->iot, sc->aud_ioh, a) 143 #define READ2(sc, a) bus_space_read_2(sc->iot, sc->aud_ioh, a) 144 #define READ4(sc, a) bus_space_read_4(sc->iot, sc->aud_ioh, a) 145 #define WRITE1(sc, a, v) bus_space_write_1(sc->iot, sc->aud_ioh, a, v) 146 #define WRITE2(sc, a, v) bus_space_write_2(sc->iot, sc->aud_ioh, a, v) 147 #define WRITE4(sc, a, v) bus_space_write_4(sc->iot, sc->aud_ioh, a, v) 148 149 #define IS_FIXED_RATE(codec) !((codec)->vtbl->get_extcaps(codec) \ 150 & AC97_EXT_AUDIO_VRA) 151 #define SUPPORTS_4CH(codec) ((codec)->vtbl->get_extcaps(codec) \ 152 & AC97_EXT_AUDIO_SDAC) 153 #define AC97_6CH_DACS (AC97_EXT_AUDIO_SDAC | AC97_EXT_AUDIO_CDAC \ 154 | AC97_EXT_AUDIO_LDAC) 155 #define SUPPORTS_6CH(codec) (((codec)->vtbl->get_extcaps(codec) \ 156 & AC97_6CH_DACS) == AC97_6CH_DACS) 157 158 /* Debug */ 159 #ifdef AUACER_DEBUG 160 #define DPRINTF(l,x) do { if (auacer_debug & (l)) printf x; } while(0) 161 int auacer_debug = 0; 162 #define ALI_DEBUG_CODECIO 0x0001 163 #define ALI_DEBUG_DMA 0x0002 164 #define ALI_DEBUG_INTR 0x0004 165 #define ALI_DEBUG_API 0x0008 166 #define ALI_DEBUG_MIXERAPI 0x0010 167 #else 168 #define DPRINTF(x,y) /* nothing */ 169 #endif 170 171 int auacer_match(struct device *, struct cfdata *, void *); 172 void auacer_attach(struct device *, struct device *, void *); 173 int auacer_intr(void *); 174 175 CFATTACH_DECL(auacer, sizeof(struct auacer_softc), 176 auacer_match, auacer_attach, NULL, NULL); 177 178 int auacer_open(void *, int); 179 void auacer_close(void *); 180 int auacer_query_encoding(void *, struct audio_encoding *); 181 int auacer_set_params(void *, int, int, struct audio_params *, 182 struct audio_params *); 183 int auacer_round_blocksize(void *, int); 184 int auacer_halt_output(void *); 185 int auacer_halt_input(void *); 186 int auacer_getdev(void *, struct audio_device *); 187 int auacer_set_port(void *, mixer_ctrl_t *); 188 int auacer_get_port(void *, mixer_ctrl_t *); 189 int auacer_query_devinfo(void *, mixer_devinfo_t *); 190 void *auacer_allocm(void *, int, size_t, struct malloc_type *, int); 191 void auacer_freem(void *, void *, struct malloc_type *); 192 size_t auacer_round_buffersize(void *, int, size_t); 193 paddr_t auacer_mappage(void *, void *, off_t, int); 194 int auacer_get_props(void *); 195 int auacer_trigger_output(void *, void *, void *, int, void (*)(void *), 196 void *, struct audio_params *); 197 int auacer_trigger_input(void *, void *, void *, int, void (*)(void *), 198 void *, struct audio_params *); 199 200 int auacer_alloc_cdata(struct auacer_softc *); 201 202 int auacer_allocmem(struct auacer_softc *, size_t, size_t, 203 struct auacer_dma *); 204 int auacer_freemem(struct auacer_softc *, struct auacer_dma *); 205 206 void auacer_powerhook(int, void *); 207 int auacer_set_rate(struct auacer_softc *, int, u_long); 208 void auacer_finish_attach(struct device *); 209 210 static void auacer_reset(struct auacer_softc *sc); 211 212 struct audio_hw_if auacer_hw_if = { 213 auacer_open, 214 auacer_close, 215 NULL, /* drain */ 216 auacer_query_encoding, 217 auacer_set_params, 218 auacer_round_blocksize, 219 NULL, /* commit_setting */ 220 NULL, /* init_output */ 221 NULL, /* init_input */ 222 NULL, /* start_output */ 223 NULL, /* start_input */ 224 auacer_halt_output, 225 auacer_halt_input, 226 NULL, /* speaker_ctl */ 227 auacer_getdev, 228 NULL, /* getfd */ 229 auacer_set_port, 230 auacer_get_port, 231 auacer_query_devinfo, 232 auacer_allocm, 233 auacer_freem, 234 auacer_round_buffersize, 235 auacer_mappage, 236 auacer_get_props, 237 auacer_trigger_output, 238 auacer_trigger_input, 239 NULL, /* dev_ioctl */ 240 }; 241 242 int auacer_attach_codec(void *, struct ac97_codec_if *); 243 int auacer_read_codec(void *, u_int8_t, u_int16_t *); 244 int auacer_write_codec(void *, u_int8_t, u_int16_t); 245 int auacer_reset_codec(void *); 246 247 int 248 auacer_match(struct device *parent, struct cfdata *match, void *aux) 249 { 250 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 251 252 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI && 253 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M5455) 254 return 1; 255 return 0; 256 } 257 258 void 259 auacer_attach(struct device *parent, struct device *self, void *aux) 260 { 261 struct auacer_softc *sc = (struct auacer_softc *)self; 262 struct pci_attach_args *pa = aux; 263 pci_intr_handle_t ih; 264 bus_size_t aud_size; 265 pcireg_t v; 266 const char *intrstr; 267 268 aprint_normal(": Acer Labs M5455 Audio controller\n"); 269 270 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->iot, 271 &sc->aud_ioh, NULL, &aud_size)) { 272 aprint_error(": can't map i/o space\n"); 273 return; 274 } 275 276 sc->sc_pc = pa->pa_pc; 277 sc->sc_pt = pa->pa_tag; 278 sc->dmat = pa->pa_dmat; 279 280 sc->sc_dmamap_flags = BUS_DMA_COHERENT; /* XXX remove */ 281 282 /* enable bus mastering */ 283 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 284 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 285 v | PCI_COMMAND_MASTER_ENABLE); 286 287 /* Map and establish the interrupt. */ 288 if (pci_intr_map(pa, &ih)) { 289 aprint_error("%s: can't map interrupt\n", sc->sc_dev.dv_xname); 290 return; 291 } 292 intrstr = pci_intr_string(pa->pa_pc, ih); 293 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, 294 auacer_intr, sc); 295 if (sc->sc_ih == NULL) { 296 aprint_error("%s: can't establish interrupt", 297 sc->sc_dev.dv_xname); 298 if (intrstr != NULL) 299 aprint_normal(" at %s", intrstr); 300 aprint_normal("\n"); 301 return; 302 } 303 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 304 305 strlcpy(sc->sc_audev.name, "M5455 AC97", MAX_AUDIO_DEV_LEN); 306 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 307 "0x%02x", PCI_REVISION(pa->pa_class)); 308 strlcpy(sc->sc_audev.config, sc->sc_dev.dv_xname, MAX_AUDIO_DEV_LEN); 309 310 /* Set up DMA lists. */ 311 auacer_alloc_cdata(sc); 312 sc->sc_pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 313 sc->sc_pcmo.ptr = 0; 314 sc->sc_pcmo.port = ALI_BASE_PO; 315 316 DPRINTF(ALI_DEBUG_DMA, ("auacer_attach: lists %p\n", 317 sc->sc_pcmo.dmalist)); 318 319 sc->host_if.arg = sc; 320 sc->host_if.attach = auacer_attach_codec; 321 sc->host_if.read = auacer_read_codec; 322 sc->host_if.write = auacer_write_codec; 323 sc->host_if.reset = auacer_reset_codec; 324 325 if (ac97_attach(&sc->host_if) != 0) 326 return; 327 328 /* Watch for power change */ 329 sc->sc_suspend = PWR_RESUME; 330 sc->sc_powerhook = powerhook_establish(auacer_powerhook, sc); 331 332 sc->codec_if->vtbl->set_clock(sc->codec_if, 48000); /* XXX ? */ 333 audio_attach_mi(&auacer_hw_if, sc, &sc->sc_dev); 334 335 auacer_reset(sc); 336 } 337 338 static int 339 auacer_ready_codec(struct auacer_softc *sc, int mask) 340 { 341 int count = 0; 342 343 for (count = 0; count < 0x7f; count++) { 344 int val = READ1(sc, ALI_CSPSR); 345 if (val & mask) 346 return 0; 347 } 348 349 aprint_normal("auacer_ready_codec: AC97 codec ready timeout.\n"); 350 return EBUSY; 351 } 352 353 static int 354 auacer_sema_codec(struct auacer_softc *sc) 355 { 356 int time = 100; 357 358 while (time-- && (READ4(sc, ALI_CAS) & ALI_CAS_SEM_BUSY)) 359 delay(1); 360 if (!time) 361 aprint_normal("auacer_sema_codec: timeout\n"); 362 return auacer_ready_codec(sc, ALI_CSPSR_CODEC_READY); 363 } 364 365 int 366 auacer_read_codec(void *v, u_int8_t reg, u_int16_t *val) 367 { 368 struct auacer_softc *sc = v; 369 370 if (auacer_sema_codec(sc)) 371 return EIO; 372 373 reg |= ALI_CPR_ADDR_READ; 374 #if 0 375 if (ac97->num) 376 reg |= ALI_CPR_ADDR_SECONDARY; 377 #endif 378 WRITE2(sc, ALI_CPR_ADDR, reg); 379 if (auacer_ready_codec(sc, ALI_CSPSR_READ_OK)) 380 return EIO; 381 *val = READ2(sc, ALI_SPR); 382 383 DPRINTF(ALI_DEBUG_CODECIO, ("auacer_read_codec: reg=0x%x val=0x%x\n", 384 reg, *val)); 385 386 return 0; 387 } 388 389 int 390 auacer_write_codec(void *v, u_int8_t reg, u_int16_t val) 391 { 392 struct auacer_softc *sc = v; 393 394 DPRINTF(ALI_DEBUG_CODECIO, ("auacer_write_codec: reg=0x%x val=0x%x\n", 395 reg, val)); 396 397 if (auacer_sema_codec(sc)) 398 return EIO; 399 WRITE2(sc, ALI_CPR, val); 400 #if 0 401 if (ac97->num) 402 reg |= ALI_CPR_ADDR_SECONDARY; 403 #endif 404 WRITE2(sc, ALI_CPR_ADDR, reg); 405 auacer_ready_codec(sc, ALI_CSPSR_WRITE_OK); 406 return 0; 407 } 408 409 int 410 auacer_attach_codec(void *v, struct ac97_codec_if *cif) 411 { 412 struct auacer_softc *sc = v; 413 414 sc->codec_if = cif; 415 return 0; 416 } 417 418 int 419 auacer_reset_codec(void *v) 420 { 421 struct auacer_softc *sc = v; 422 u_int32_t reg; 423 int i = 0; 424 425 reg = READ4(sc, ALI_SCR); 426 if ((reg & 2) == 0) /* Cold required */ 427 reg |= 2; 428 else 429 reg |= 1; /* Warm */ 430 reg &= ~0x80000000; /* ACLink on */ 431 WRITE4(sc, ALI_SCR, reg); 432 433 while (i < 10) { 434 if ((READ4(sc, ALI_INTERRUPTSR) & ALI_INT_GPIO) == 0) 435 break; 436 delay(50000); /* XXX */ 437 i++; 438 } 439 if (i == 10) { 440 return EIO; 441 } 442 443 for (i = 0; i < 10; i++) { 444 reg = READ4(sc, ALI_RTSR); 445 if (reg & 0x80) /* primary codec */ 446 break; 447 WRITE4(sc, ALI_RTSR, reg | 0x80); 448 delay(50000); /* XXX */ 449 } 450 451 return 0; 452 } 453 454 static void 455 auacer_reset(struct auacer_softc *sc) 456 { 457 WRITE4(sc, ALI_SCR, ALI_SCR_RESET); 458 WRITE4(sc, ALI_FIFOCR1, 0x83838383); 459 WRITE4(sc, ALI_FIFOCR2, 0x83838383); 460 WRITE4(sc, ALI_FIFOCR3, 0x83838383); 461 WRITE4(sc, ALI_INTERFACECR, ALI_IF_PO); /* XXX pcm out only */ 462 WRITE4(sc, ALI_INTERRUPTCR, 0x00000000); 463 WRITE4(sc, ALI_INTERRUPTSR, 0x00000000); 464 } 465 466 int 467 auacer_open(void *v, int flags) 468 { 469 DPRINTF(ALI_DEBUG_API, ("auacer_open: flags=%d\n", flags)); 470 return 0; 471 } 472 473 void 474 auacer_close(void *v) 475 { 476 DPRINTF(ALI_DEBUG_API, ("auacer_close\n")); 477 } 478 479 int 480 auacer_query_encoding(void *v, struct audio_encoding *aep) 481 { 482 DPRINTF(ALI_DEBUG_API, ("auacer_query_encoding\n")); 483 484 switch (aep->index) { 485 case 0: 486 strcpy(aep->name, AudioEulinear); 487 aep->encoding = AUDIO_ENCODING_ULINEAR; 488 aep->precision = 8; 489 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 490 return (0); 491 case 1: 492 strcpy(aep->name, AudioEmulaw); 493 aep->encoding = AUDIO_ENCODING_ULAW; 494 aep->precision = 8; 495 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 496 return (0); 497 case 2: 498 strcpy(aep->name, AudioEalaw); 499 aep->encoding = AUDIO_ENCODING_ALAW; 500 aep->precision = 8; 501 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 502 return (0); 503 case 3: 504 strcpy(aep->name, AudioEslinear); 505 aep->encoding = AUDIO_ENCODING_SLINEAR; 506 aep->precision = 8; 507 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 508 return (0); 509 case 4: 510 strcpy(aep->name, AudioEslinear_le); 511 aep->encoding = AUDIO_ENCODING_SLINEAR_LE; 512 aep->precision = 16; 513 aep->flags = 0; 514 return (0); 515 case 5: 516 strcpy(aep->name, AudioEulinear_le); 517 aep->encoding = AUDIO_ENCODING_ULINEAR_LE; 518 aep->precision = 16; 519 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 520 return (0); 521 case 6: 522 strcpy(aep->name, AudioEslinear_be); 523 aep->encoding = AUDIO_ENCODING_SLINEAR_BE; 524 aep->precision = 16; 525 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 526 return (0); 527 case 7: 528 strcpy(aep->name, AudioEulinear_be); 529 aep->encoding = AUDIO_ENCODING_ULINEAR_BE; 530 aep->precision = 16; 531 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 532 return (0); 533 default: 534 return (EINVAL); 535 } 536 } 537 538 int 539 auacer_set_rate(struct auacer_softc *sc, int mode, u_long srate) 540 { 541 int ret; 542 u_long ratetmp; 543 544 DPRINTF(ALI_DEBUG_API, ("auacer_set_rate: srate=%lu\n", srate)); 545 546 ratetmp = srate; 547 if (mode == AUMODE_RECORD) 548 return sc->codec_if->vtbl->set_rate(sc->codec_if, 549 AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 550 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 551 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 552 if (ret) 553 return ret; 554 ratetmp = srate; 555 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 556 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 557 if (ret) 558 return ret; 559 ratetmp = srate; 560 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 561 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 562 return ret; 563 } 564 565 int 566 auacer_set_params(void *v, int setmode, int usemode, struct audio_params *play, 567 struct audio_params *rec) 568 { 569 struct auacer_softc *sc = v; 570 struct audio_params *p; 571 uint32_t control; 572 int mode; 573 574 DPRINTF(ALI_DEBUG_API, ("auacer_set_params\n")); 575 576 for (mode = AUMODE_RECORD; mode != -1; 577 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 578 if ((setmode & mode) == 0) 579 continue; 580 581 p = mode == AUMODE_PLAY ? play : rec; 582 if (p == NULL) 583 continue; 584 585 if ((p->sample_rate != 8000) && 586 (p->sample_rate != 11025) && 587 (p->sample_rate != 12000) && 588 (p->sample_rate != 16000) && 589 (p->sample_rate != 22050) && 590 (p->sample_rate != 24000) && 591 (p->sample_rate != 32000) && 592 (p->sample_rate != 44100) && 593 (p->sample_rate != 48000)) 594 return (EINVAL); 595 596 p->factor = 1; 597 if (p->precision == 8) 598 p->factor *= 2; 599 600 p->sw_code = NULL; 601 /* setup hardware formats */ 602 p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE; 603 p->hw_precision = 16; 604 605 if (mode == AUMODE_RECORD) { 606 if (p->channels < 1 || p->channels > 2) 607 return EINVAL; 608 } else { 609 switch (p->channels) { 610 case 1: 611 break; 612 case 2: 613 break; 614 case 4: 615 if (!SUPPORTS_4CH(sc->codec_if)) 616 return EINVAL; 617 break; 618 case 6: 619 if (!SUPPORTS_6CH(sc->codec_if)) 620 return EINVAL; 621 break; 622 default: 623 return EINVAL; 624 } 625 } 626 /* If monaural is requested, aurateconv expands a monaural 627 * stream to stereo. */ 628 if (p->channels == 1) 629 p->hw_channels = 2; 630 631 switch (p->encoding) { 632 case AUDIO_ENCODING_SLINEAR_BE: 633 if (p->precision == 16) { 634 p->sw_code = swap_bytes; 635 } else { 636 if (mode == AUMODE_PLAY) 637 p->sw_code = linear8_to_linear16_le; 638 else 639 p->sw_code = linear16_to_linear8_le; 640 } 641 break; 642 643 case AUDIO_ENCODING_SLINEAR_LE: 644 if (p->precision != 16) { 645 if (mode == AUMODE_PLAY) 646 p->sw_code = linear8_to_linear16_le; 647 else 648 p->sw_code = linear16_to_linear8_le; 649 } 650 break; 651 652 case AUDIO_ENCODING_ULINEAR_BE: 653 if (p->precision == 16) { 654 if (mode == AUMODE_PLAY) 655 p->sw_code = 656 swap_bytes_change_sign16_le; 657 else 658 p->sw_code = 659 change_sign16_swap_bytes_le; 660 } else { 661 if (mode == AUMODE_PLAY) 662 p->sw_code = 663 ulinear8_to_slinear16_le; 664 else 665 p->sw_code = 666 slinear16_to_ulinear8_le; 667 } 668 break; 669 670 case AUDIO_ENCODING_ULINEAR_LE: 671 if (p->precision == 16) { 672 p->sw_code = change_sign16_le; 673 } else { 674 if (mode == AUMODE_PLAY) 675 p->sw_code = 676 ulinear8_to_slinear16_le; 677 else 678 p->sw_code = 679 slinear16_to_ulinear8_le; 680 } 681 break; 682 683 case AUDIO_ENCODING_ULAW: 684 if (mode == AUMODE_PLAY) { 685 p->sw_code = mulaw_to_slinear16_le; 686 } else { 687 p->sw_code = slinear16_to_mulaw_le; 688 } 689 break; 690 691 case AUDIO_ENCODING_ALAW: 692 if (mode == AUMODE_PLAY) { 693 p->sw_code = alaw_to_slinear16_le; 694 } else { 695 p->sw_code = slinear16_to_alaw_le; 696 } 697 break; 698 699 default: 700 return (EINVAL); 701 } 702 703 if (IS_FIXED_RATE(sc->codec_if)) { 704 p->hw_sample_rate = AC97_SINGLE_RATE; 705 /* If hw_sample_rate is changed, aurateconv works. */ 706 } else { 707 if (auacer_set_rate(sc, mode, p->sample_rate)) 708 return EINVAL; 709 } 710 711 if (mode == AUMODE_PLAY) { 712 control = READ4(sc, ALI_SCR); 713 control &= ~ALI_SCR_PCM_246_MASK; 714 if (p->channels == 4) 715 control |= ALI_SCR_PCM_4; 716 else if (p->channels == 6) 717 control |= ALI_SCR_PCM_6; 718 WRITE4(sc, ALI_SCR, control); 719 } 720 } 721 722 return (0); 723 } 724 725 int 726 auacer_round_blocksize(void *v, int blk) 727 { 728 729 return (blk & ~0x3f); /* keep good alignment */ 730 } 731 732 static void 733 auacer_halt(struct auacer_softc *sc, struct auacer_chan *chan) 734 { 735 uint32_t val; 736 uint8_t port = chan->port; 737 uint32_t slot; 738 739 DPRINTF(ALI_DEBUG_API, ("auacer_halt: port=0x%x\n", port)); 740 741 chan->intr = 0; 742 743 slot = ALI_PORT2SLOT(port); 744 745 val = READ4(sc, ALI_DMACR); 746 val |= 1 << (slot+16); /* pause */ 747 val &= ~(1 << slot); /* no start */ 748 WRITE4(sc, ALI_DMACR, val); 749 WRITE1(sc, port + ALI_OFF_CR, 0); 750 while (READ1(sc, port + ALI_OFF_CR)) 751 ; 752 /* reset whole DMA things */ 753 WRITE1(sc, port + ALI_OFF_CR, ALI_CR_RR); 754 /* clear interrupts */ 755 WRITE1(sc, port + ALI_OFF_SR, READ1(sc, port+ALI_OFF_SR) | ALI_SR_W1TC); 756 WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(port)); 757 } 758 759 int 760 auacer_halt_output(void *v) 761 { 762 struct auacer_softc *sc = v; 763 764 DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_output\n")); 765 766 auacer_halt(sc, &sc->sc_pcmo); 767 768 return (0); 769 } 770 771 int 772 auacer_halt_input(void *v) 773 { 774 /*struct auacer_softc *sc = v;*/ 775 776 DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_input\n")); 777 778 return (0); 779 } 780 781 int 782 auacer_getdev(void *v, struct audio_device *adp) 783 { 784 struct auacer_softc *sc = v; 785 786 DPRINTF(ALI_DEBUG_API, ("auacer_getdev\n")); 787 788 *adp = sc->sc_audev; 789 return (0); 790 } 791 792 int 793 auacer_set_port(void *v, mixer_ctrl_t *cp) 794 { 795 struct auacer_softc *sc = v; 796 797 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_set_port\n")); 798 799 return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp)); 800 } 801 802 int 803 auacer_get_port(void *v, mixer_ctrl_t *cp) 804 { 805 struct auacer_softc *sc = v; 806 807 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_get_port\n")); 808 809 return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp)); 810 } 811 812 int 813 auacer_query_devinfo(void *v, mixer_devinfo_t *dp) 814 { 815 struct auacer_softc *sc = v; 816 817 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_query_devinfo\n")); 818 819 return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp)); 820 } 821 822 void * 823 auacer_allocm(void *v, int direction, size_t size, struct malloc_type *pool, 824 int flags) 825 { 826 struct auacer_softc *sc = v; 827 struct auacer_dma *p; 828 int error; 829 830 if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX)) 831 return (NULL); 832 833 p = malloc(sizeof(*p), pool, flags | M_ZERO); 834 if (p == NULL) 835 return (NULL); 836 837 error = auacer_allocmem(sc, size, 0, p); 838 if (error) { 839 free(p, pool); 840 return (NULL); 841 } 842 843 p->next = sc->sc_dmas; 844 sc->sc_dmas = p; 845 846 return (KERNADDR(p)); 847 } 848 849 void 850 auacer_freem(void *v, void *ptr, struct malloc_type *pool) 851 { 852 struct auacer_softc *sc = v; 853 struct auacer_dma *p, **pp; 854 855 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 856 if (KERNADDR(p) == ptr) { 857 auacer_freemem(sc, p); 858 *pp = p->next; 859 free(p, pool); 860 return; 861 } 862 } 863 } 864 865 size_t 866 auacer_round_buffersize(void *v, int direction, size_t size) 867 { 868 869 if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX)) 870 size = ALI_DMALIST_MAX * ALI_DMASEG_MAX; 871 872 return size; 873 } 874 875 paddr_t 876 auacer_mappage(void *v, void *mem, off_t off, int prot) 877 { 878 struct auacer_softc *sc = v; 879 struct auacer_dma *p; 880 881 if (off < 0) 882 return (-1); 883 884 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 885 ; 886 if (!p) 887 return (-1); 888 return (bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 889 off, prot, BUS_DMA_WAITOK)); 890 } 891 892 int 893 auacer_get_props(void *v) 894 { 895 struct auacer_softc *sc = v; 896 int props; 897 898 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 899 /* 900 * Even if the codec is fixed-rate, set_param() succeeds for any sample 901 * rate because of aurateconv. Applications can't know what rate the 902 * device can process in the case of mmap(). 903 */ 904 if (!IS_FIXED_RATE(sc->codec_if)) 905 props |= AUDIO_PROP_MMAP; 906 return props; 907 } 908 909 static void 910 auacer_add_entry(struct auacer_chan *chan) 911 { 912 struct auacer_dmalist *q; 913 914 q = &chan->dmalist[chan->ptr]; 915 916 DPRINTF(ALI_DEBUG_INTR, 917 ("auacer_add_entry: %p = %x @ 0x%x\n", 918 q, chan->blksize / 2, chan->p)); 919 920 q->base = htole32(chan->p); 921 q->len = htole32((chan->blksize / ALI_SAMPLE_SIZE) | ALI_DMAF_IOC); 922 chan->p += chan->blksize; 923 if (chan->p >= chan->end) 924 chan->p = chan->start; 925 926 if (++chan->ptr >= ALI_DMALIST_MAX) 927 chan->ptr = 0; 928 } 929 930 static void 931 auacer_upd_chan(struct auacer_softc *sc, struct auacer_chan *chan) 932 { 933 uint32_t sts; 934 uint32_t civ; 935 936 sts = READ2(sc, chan->port + ALI_OFF_SR); 937 /* intr ack */ 938 WRITE2(sc, chan->port + ALI_OFF_SR, sts & ALI_SR_W1TC); 939 WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(chan->port)); 940 941 DPRINTF(ALI_DEBUG_INTR, ("auacer_upd_chan: sts=0x%x\n", sts)); 942 943 if (sts & ALI_SR_DMA_INT_FIFO) { 944 printf("%s: fifo underrun # %u\n", 945 sc->sc_dev.dv_xname, ++chan->fifoe); 946 } 947 948 civ = READ1(sc, chan->port + ALI_OFF_CIV); 949 950 DPRINTF(ALI_DEBUG_INTR,("auacer_intr: civ=%u ptr=%u\n",civ,chan->ptr)); 951 952 /* XXX */ 953 while (chan->ptr != civ) { 954 auacer_add_entry(chan); 955 } 956 957 WRITE1(sc, chan->port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK); 958 959 while (chan->ack != civ) { 960 if (chan->intr) { 961 DPRINTF(ALI_DEBUG_INTR,("auacer_upd_chan: callback\n")); 962 chan->intr(chan->arg); 963 } 964 chan->ack++; 965 if (chan->ack >= ALI_DMALIST_MAX) 966 chan->ack = 0; 967 } 968 } 969 970 int 971 auacer_intr(void *v) 972 { 973 struct auacer_softc *sc = v; 974 int ret, intrs; 975 976 intrs = READ4(sc, ALI_INTERRUPTSR); 977 DPRINTF(ALI_DEBUG_INTR, ("auacer_intr: intrs=0x%x\n", intrs)); 978 979 ret = 0; 980 if (intrs & ALI_INT_PCMOUT) { 981 auacer_upd_chan(sc, &sc->sc_pcmo); 982 ret++; 983 } 984 985 return ret != 0; 986 } 987 988 static void 989 auacer_setup_chan(struct auacer_softc *sc, struct auacer_chan *chan, 990 uint32_t start, uint32_t size, uint32_t blksize, 991 void (*intr)(void *), void *arg) 992 { 993 uint32_t port, slot; 994 uint32_t offs, val; 995 996 chan->start = start; 997 chan->ptr = 0; 998 chan->p = chan->start; 999 chan->end = chan->start + size; 1000 chan->blksize = blksize; 1001 chan->ack = 0; 1002 chan->intr = intr; 1003 chan->arg = arg; 1004 1005 auacer_add_entry(chan); 1006 auacer_add_entry(chan); 1007 1008 port = chan->port; 1009 slot = ALI_PORT2SLOT(port); 1010 1011 WRITE1(sc, port + ALI_OFF_CIV, 0); 1012 WRITE1(sc, port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK); 1013 offs = (char *)chan->dmalist - (char *)sc->sc_cdata; 1014 WRITE4(sc, port + ALI_OFF_BDBAR, sc->sc_cddma + offs); 1015 WRITE1(sc, port + ALI_OFF_CR, 1016 ALI_CR_IOCE | ALI_CR_FEIE | ALI_CR_LVBIE | ALI_CR_RPBM); 1017 val = READ4(sc, ALI_DMACR); 1018 val &= ~(1 << (slot+16)); /* no pause */ 1019 val |= 1 << slot; /* start */ 1020 WRITE4(sc, ALI_DMACR, val); 1021 } 1022 1023 int 1024 auacer_trigger_output(void *v, void *start, void *end, int blksize, 1025 void (*intr)(void *), void *arg, struct audio_params *param) 1026 { 1027 struct auacer_softc *sc = v; 1028 struct auacer_dma *p; 1029 uint32_t size; 1030 1031 DPRINTF(ALI_DEBUG_DMA, 1032 ("auacer_trigger_output(%p, %p, %d, %p, %p, %p)\n", 1033 start, end, blksize, intr, arg, param)); 1034 1035 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1036 ; 1037 if (!p) { 1038 printf("auacer_trigger_output: bad addr %p\n", start); 1039 return (EINVAL); 1040 } 1041 1042 size = (char *)end - (char *)start; 1043 auacer_setup_chan(sc, &sc->sc_pcmo, DMAADDR(p), size, blksize, 1044 intr, arg); 1045 1046 return 0; 1047 } 1048 1049 int 1050 auacer_trigger_input(void *v, void *start, void *end, int blksize, 1051 void (*intr)(void *), void *arg, 1052 struct audio_params *param) 1053 { 1054 return (EINVAL); 1055 } 1056 1057 int 1058 auacer_allocmem(struct auacer_softc *sc, size_t size, size_t align, 1059 struct auacer_dma *p) 1060 { 1061 int error; 1062 1063 p->size = size; 1064 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1065 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1066 &p->nsegs, BUS_DMA_NOWAIT); 1067 if (error) 1068 return (error); 1069 1070 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1071 &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags); 1072 if (error) 1073 goto free; 1074 1075 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1076 0, BUS_DMA_NOWAIT, &p->map); 1077 if (error) 1078 goto unmap; 1079 1080 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1081 BUS_DMA_NOWAIT); 1082 if (error) 1083 goto destroy; 1084 return (0); 1085 1086 destroy: 1087 bus_dmamap_destroy(sc->dmat, p->map); 1088 unmap: 1089 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1090 free: 1091 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1092 return (error); 1093 } 1094 1095 int 1096 auacer_freemem(struct auacer_softc *sc, struct auacer_dma *p) 1097 { 1098 1099 bus_dmamap_unload(sc->dmat, p->map); 1100 bus_dmamap_destroy(sc->dmat, p->map); 1101 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1102 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1103 return (0); 1104 } 1105 1106 int 1107 auacer_alloc_cdata(struct auacer_softc *sc) 1108 { 1109 bus_dma_segment_t seg; 1110 int error, rseg; 1111 1112 /* 1113 * Allocate the control data structure, and create and load the 1114 * DMA map for it. 1115 */ 1116 if ((error = bus_dmamem_alloc(sc->dmat, 1117 sizeof(struct auacer_cdata), 1118 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1119 printf("%s: unable to allocate control data, error = %d\n", 1120 sc->sc_dev.dv_xname, error); 1121 goto fail_0; 1122 } 1123 1124 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1125 sizeof(struct auacer_cdata), 1126 (caddr_t *) &sc->sc_cdata, 1127 sc->sc_dmamap_flags)) != 0) { 1128 printf("%s: unable to map control data, error = %d\n", 1129 sc->sc_dev.dv_xname, error); 1130 goto fail_1; 1131 } 1132 1133 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auacer_cdata), 1, 1134 sizeof(struct auacer_cdata), 0, 0, 1135 &sc->sc_cddmamap)) != 0) { 1136 printf("%s: unable to create control data DMA map, " 1137 "error = %d\n", sc->sc_dev.dv_xname, error); 1138 goto fail_2; 1139 } 1140 1141 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1142 sc->sc_cdata, sizeof(struct auacer_cdata), 1143 NULL, 0)) != 0) { 1144 printf("%s: unable tp load control data DMA map, " 1145 "error = %d\n", sc->sc_dev.dv_xname, error); 1146 goto fail_3; 1147 } 1148 1149 return (0); 1150 1151 fail_3: 1152 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1153 fail_2: 1154 bus_dmamem_unmap(sc->dmat, (caddr_t) sc->sc_cdata, 1155 sizeof(struct auacer_cdata)); 1156 fail_1: 1157 bus_dmamem_free(sc->dmat, &seg, rseg); 1158 fail_0: 1159 return (error); 1160 } 1161 1162 void 1163 auacer_powerhook(int why, void *addr) 1164 { 1165 struct auacer_softc *sc = (struct auacer_softc *)addr; 1166 1167 switch (why) { 1168 case PWR_SUSPEND: 1169 case PWR_STANDBY: 1170 /* Power down */ 1171 DPRINTF(1, ("%s: power down\n", sc->sc_dev.dv_xname)); 1172 sc->sc_suspend = why; 1173 auacer_read_codec(sc, AC97_REG_EXT_AUDIO_CTRL, &sc->ext_status); 1174 break; 1175 1176 case PWR_RESUME: 1177 /* Wake up */ 1178 DPRINTF(1, ("%s: power resume\n", sc->sc_dev.dv_xname)); 1179 if (sc->sc_suspend == PWR_RESUME) { 1180 printf("%s: resume without suspend.\n", 1181 sc->sc_dev.dv_xname); 1182 sc->sc_suspend = why; 1183 return; 1184 } 1185 sc->sc_suspend = why; 1186 auacer_reset_codec(sc); 1187 delay(1000); 1188 sc->codec_if->vtbl->restore_ports(sc->codec_if); 1189 auacer_write_codec(sc, AC97_REG_EXT_AUDIO_CTRL, sc->ext_status); 1190 break; 1191 1192 case PWR_SOFTSUSPEND: 1193 case PWR_SOFTSTANDBY: 1194 case PWR_SOFTRESUME: 1195 break; 1196 } 1197 } 1198
Indexes created Fri Oct 03 02:09:57 GMT 2025