auacer.c revision 1.2
1 /* $NetBSD: auacer.c,v 1.2 2004/11/09 15:57:11 kent Exp $ */ 2 3 /*- 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Acer Labs M5455 audio driver 41 * 42 * Acer provides data sheets after signing an NDA. 43 * The chip behaves somewhat like the Intel i8x0, so this driver 44 * is loosely based on the auich driver. Additional information taken from 45 * the ALSA intel8x0.c driver (which handles M5455 as well). 46 * 47 * As an historical note one can observe that the auich driver borrows 48 * lot from the first NetBSD PCI audio driver, the eap driver. But this 49 * is not attributed anywhere. 50 */ 51 52 53 #include <sys/cdefs.h> 54 __KERNEL_RCSID(0, "$NetBSD: auacer.c,v 1.2 2004/11/09 15:57:11 kent Exp $"); 55 56 #include <sys/param.h> 57 #include <sys/systm.h> 58 #include <sys/kernel.h> 59 #include <sys/malloc.h> 60 #include <sys/device.h> 61 #include <sys/fcntl.h> 62 #include <sys/proc.h> 63 64 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 65 66 #include <dev/pci/pcidevs.h> 67 #include <dev/pci/pcivar.h> 68 #include <dev/pci/auacerreg.h> 69 70 #include <sys/audioio.h> 71 #include <dev/audio_if.h> 72 #include <dev/mulaw.h> 73 #include <dev/auconv.h> 74 75 #include <machine/bus.h> 76 77 #include <dev/ic/ac97reg.h> 78 #include <dev/ic/ac97var.h> 79 80 struct auacer_dma { 81 bus_dmamap_t map; 82 caddr_t addr; 83 bus_dma_segment_t segs[1]; 84 int nsegs; 85 size_t size; 86 struct auacer_dma *next; 87 }; 88 89 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 90 #define KERNADDR(p) ((void *)((p)->addr)) 91 92 struct auacer_cdata { 93 struct auacer_dmalist ic_dmalist_pcmo[ALI_DMALIST_MAX]; 94 }; 95 96 struct auacer_chan { 97 uint32_t ptr; 98 uint32_t start, p, end; 99 uint32_t blksize, fifoe; 100 uint32_t ack; 101 uint32_t port; 102 struct auacer_dmalist *dmalist; 103 void (*intr)(void *); 104 void *arg; 105 }; 106 107 struct auacer_softc { 108 struct device sc_dev; 109 void *sc_ih; 110 111 audio_device_t sc_audev; 112 113 bus_space_tag_t iot; 114 bus_space_handle_t mix_ioh; 115 bus_space_handle_t aud_ioh; 116 bus_dma_tag_t dmat; 117 118 struct ac97_codec_if *codec_if; 119 struct ac97_host_if host_if; 120 121 /* DMA scatter-gather lists. */ 122 bus_dmamap_t sc_cddmamap; 123 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 124 125 struct auacer_cdata *sc_cdata; 126 127 struct auacer_chan sc_pcmo; 128 129 struct auacer_dma *sc_dmas; 130 131 pci_chipset_tag_t sc_pc; 132 pcitag_t sc_pt; 133 134 int sc_dmamap_flags; 135 136 /* Power Management */ 137 void *sc_powerhook; 138 int sc_suspend; 139 }; 140 141 #define READ1(sc, a) bus_space_read_1(sc->iot, sc->aud_ioh, a) 142 #define READ2(sc, a) bus_space_read_2(sc->iot, sc->aud_ioh, a) 143 #define READ4(sc, a) bus_space_read_4(sc->iot, sc->aud_ioh, a) 144 #define WRITE1(sc, a, v) bus_space_write_1(sc->iot, sc->aud_ioh, a, v) 145 #define WRITE2(sc, a, v) bus_space_write_2(sc->iot, sc->aud_ioh, a, v) 146 #define WRITE4(sc, a, v) bus_space_write_4(sc->iot, sc->aud_ioh, a, v) 147 148 #define IS_FIXED_RATE(codec) !((codec)->vtbl->get_extcaps(codec) \ 149 & AC97_EXT_AUDIO_VRA) 150 #define SUPPORTS_4CH(codec) ((codec)->vtbl->get_extcaps(codec) \ 151 & AC97_EXT_AUDIO_SDAC) 152 #define AC97_6CH_DACS (AC97_EXT_AUDIO_SDAC | AC97_EXT_AUDIO_CDAC \ 153 | AC97_EXT_AUDIO_LDAC) 154 #define SUPPORTS_6CH(codec) (((codec)->vtbl->get_extcaps(codec) \ 155 & AC97_6CH_DACS) == AC97_6CH_DACS) 156 157 /* Debug */ 158 #ifdef AUACER_DEBUG 159 #define DPRINTF(l,x) do { if (auacer_debug & (l)) printf x; } while(0) 160 int auacer_debug = 0; 161 #define ALI_DEBUG_CODECIO 0x0001 162 #define ALI_DEBUG_DMA 0x0002 163 #define ALI_DEBUG_INTR 0x0004 164 #define ALI_DEBUG_API 0x0008 165 #define ALI_DEBUG_MIXERAPI 0x0010 166 #else 167 #define DPRINTF(x,y) /* nothing */ 168 #endif 169 170 int auacer_match(struct device *, struct cfdata *, void *); 171 void auacer_attach(struct device *, struct device *, void *); 172 int auacer_intr(void *); 173 174 CFATTACH_DECL(auacer, sizeof(struct auacer_softc), 175 auacer_match, auacer_attach, NULL, NULL); 176 177 int auacer_open(void *, int); 178 void auacer_close(void *); 179 int auacer_query_encoding(void *, struct audio_encoding *); 180 int auacer_set_params(void *, int, int, struct audio_params *, 181 struct audio_params *); 182 int auacer_round_blocksize(void *, int); 183 int auacer_halt_output(void *); 184 int auacer_halt_input(void *); 185 int auacer_getdev(void *, struct audio_device *); 186 int auacer_set_port(void *, mixer_ctrl_t *); 187 int auacer_get_port(void *, mixer_ctrl_t *); 188 int auacer_query_devinfo(void *, mixer_devinfo_t *); 189 void *auacer_allocm(void *, int, size_t, struct malloc_type *, int); 190 void auacer_freem(void *, void *, struct malloc_type *); 191 size_t auacer_round_buffersize(void *, int, size_t); 192 paddr_t auacer_mappage(void *, void *, off_t, int); 193 int auacer_get_props(void *); 194 int auacer_trigger_output(void *, void *, void *, int, void (*)(void *), 195 void *, struct audio_params *); 196 int auacer_trigger_input(void *, void *, void *, int, void (*)(void *), 197 void *, struct audio_params *); 198 199 int auacer_alloc_cdata(struct auacer_softc *); 200 201 int auacer_allocmem(struct auacer_softc *, size_t, size_t, 202 struct auacer_dma *); 203 int auacer_freemem(struct auacer_softc *, struct auacer_dma *); 204 205 void auacer_powerhook(int, void *); 206 int auacer_set_rate(struct auacer_softc *, int, u_long); 207 void auacer_finish_attach(struct device *); 208 209 static void auacer_reset(struct auacer_softc *sc); 210 211 struct audio_hw_if auacer_hw_if = { 212 auacer_open, 213 auacer_close, 214 NULL, /* drain */ 215 auacer_query_encoding, 216 auacer_set_params, 217 auacer_round_blocksize, 218 NULL, /* commit_setting */ 219 NULL, /* init_output */ 220 NULL, /* init_input */ 221 NULL, /* start_output */ 222 NULL, /* start_input */ 223 auacer_halt_output, 224 auacer_halt_input, 225 NULL, /* speaker_ctl */ 226 auacer_getdev, 227 NULL, /* getfd */ 228 auacer_set_port, 229 auacer_get_port, 230 auacer_query_devinfo, 231 auacer_allocm, 232 auacer_freem, 233 auacer_round_buffersize, 234 auacer_mappage, 235 auacer_get_props, 236 auacer_trigger_output, 237 auacer_trigger_input, 238 NULL, /* dev_ioctl */ 239 }; 240 241 int auacer_attach_codec(void *, struct ac97_codec_if *); 242 int auacer_read_codec(void *, u_int8_t, u_int16_t *); 243 int auacer_write_codec(void *, u_int8_t, u_int16_t); 244 int auacer_reset_codec(void *); 245 246 int 247 auacer_match(struct device *parent, struct cfdata *match, void *aux) 248 { 249 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 250 251 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI && 252 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M5455) 253 return 1; 254 return 0; 255 } 256 257 void 258 auacer_attach(struct device *parent, struct device *self, void *aux) 259 { 260 struct auacer_softc *sc = (struct auacer_softc *)self; 261 struct pci_attach_args *pa = aux; 262 pci_intr_handle_t ih; 263 bus_size_t aud_size; 264 pcireg_t v; 265 const char *intrstr; 266 267 aprint_normal(": Acer Labs M5455 Audio controller\n"); 268 269 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->iot, 270 &sc->aud_ioh, NULL, &aud_size)) { 271 aprint_error(": can't map i/o space\n"); 272 return; 273 } 274 275 sc->sc_pc = pa->pa_pc; 276 sc->sc_pt = pa->pa_tag; 277 sc->dmat = pa->pa_dmat; 278 279 sc->sc_dmamap_flags = BUS_DMA_COHERENT; /* XXX remove */ 280 281 /* enable bus mastering */ 282 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 283 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 284 v | PCI_COMMAND_MASTER_ENABLE); 285 286 /* Map and establish the interrupt. */ 287 if (pci_intr_map(pa, &ih)) { 288 aprint_error("%s: can't map interrupt\n", sc->sc_dev.dv_xname); 289 return; 290 } 291 intrstr = pci_intr_string(pa->pa_pc, ih); 292 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, 293 auacer_intr, sc); 294 if (sc->sc_ih == NULL) { 295 aprint_error("%s: can't establish interrupt", 296 sc->sc_dev.dv_xname); 297 if (intrstr != NULL) 298 aprint_normal(" at %s", intrstr); 299 aprint_normal("\n"); 300 return; 301 } 302 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 303 304 strlcpy(sc->sc_audev.name, "M5455 AC97", MAX_AUDIO_DEV_LEN); 305 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 306 "0x%02x", PCI_REVISION(pa->pa_class)); 307 strlcpy(sc->sc_audev.config, sc->sc_dev.dv_xname, MAX_AUDIO_DEV_LEN); 308 309 /* Set up DMA lists. */ 310 auacer_alloc_cdata(sc); 311 sc->sc_pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 312 sc->sc_pcmo.ptr = 0; 313 sc->sc_pcmo.port = ALI_BASE_PO; 314 315 DPRINTF(ALI_DEBUG_DMA, ("auacer_attach: lists %p\n", 316 sc->sc_pcmo.dmalist)); 317 318 sc->host_if.arg = sc; 319 sc->host_if.attach = auacer_attach_codec; 320 sc->host_if.read = auacer_read_codec; 321 sc->host_if.write = auacer_write_codec; 322 sc->host_if.reset = auacer_reset_codec; 323 324 if (ac97_attach(&sc->host_if) != 0) 325 return; 326 327 /* Watch for power change */ 328 sc->sc_suspend = PWR_RESUME; 329 sc->sc_powerhook = powerhook_establish(auacer_powerhook, sc); 330 331 audio_attach_mi(&auacer_hw_if, sc, &sc->sc_dev); 332 333 auacer_reset(sc); 334 } 335 336 static int 337 auacer_ready_codec(struct auacer_softc *sc, int mask) 338 { 339 int count = 0; 340 341 for (count = 0; count < 0x7f; count++) { 342 int val = READ1(sc, ALI_CSPSR); 343 if (val & mask) 344 return 0; 345 } 346 347 aprint_normal("auacer_ready_codec: AC97 codec ready timeout.\n"); 348 return EBUSY; 349 } 350 351 static int 352 auacer_sema_codec(struct auacer_softc *sc) 353 { 354 int time = 100; 355 356 while (time-- && (READ4(sc, ALI_CAS) & ALI_CAS_SEM_BUSY)) 357 delay(1); 358 if (!time) 359 aprint_normal("auacer_sema_codec: timeout\n"); 360 return auacer_ready_codec(sc, ALI_CSPSR_CODEC_READY); 361 } 362 363 int 364 auacer_read_codec(void *v, u_int8_t reg, u_int16_t *val) 365 { 366 struct auacer_softc *sc = v; 367 368 if (auacer_sema_codec(sc)) 369 return EIO; 370 371 reg |= ALI_CPR_ADDR_READ; 372 #if 0 373 if (ac97->num) 374 reg |= ALI_CPR_ADDR_SECONDARY; 375 #endif 376 WRITE2(sc, ALI_CPR_ADDR, reg); 377 if (auacer_ready_codec(sc, ALI_CSPSR_READ_OK)) 378 return EIO; 379 *val = READ2(sc, ALI_SPR); 380 381 DPRINTF(ALI_DEBUG_CODECIO, ("auacer_read_codec: reg=0x%x val=0x%x\n", 382 reg, *val)); 383 384 return 0; 385 } 386 387 int 388 auacer_write_codec(void *v, u_int8_t reg, u_int16_t val) 389 { 390 struct auacer_softc *sc = v; 391 392 DPRINTF(ALI_DEBUG_CODECIO, ("auacer_write_codec: reg=0x%x val=0x%x\n", 393 reg, val)); 394 395 if (auacer_sema_codec(sc)) 396 return EIO; 397 WRITE2(sc, ALI_CPR, val); 398 #if 0 399 if (ac97->num) 400 reg |= ALI_CPR_ADDR_SECONDARY; 401 #endif 402 WRITE2(sc, ALI_CPR_ADDR, reg); 403 auacer_ready_codec(sc, ALI_CSPSR_WRITE_OK); 404 return 0; 405 } 406 407 int 408 auacer_attach_codec(void *v, struct ac97_codec_if *cif) 409 { 410 struct auacer_softc *sc = v; 411 412 sc->codec_if = cif; 413 return 0; 414 } 415 416 int 417 auacer_reset_codec(void *v) 418 { 419 struct auacer_softc *sc = v; 420 u_int32_t reg; 421 int i = 0; 422 423 reg = READ4(sc, ALI_SCR); 424 if ((reg & 2) == 0) /* Cold required */ 425 reg |= 2; 426 else 427 reg |= 1; /* Warm */ 428 reg &= ~0x80000000; /* ACLink on */ 429 WRITE4(sc, ALI_SCR, reg); 430 431 while (i < 10) { 432 if ((READ4(sc, ALI_INTERRUPTSR) & ALI_INT_GPIO) == 0) 433 break; 434 delay(50000); /* XXX */ 435 i++; 436 } 437 if (i == 10) { 438 return EIO; 439 } 440 441 for (i = 0; i < 10; i++) { 442 reg = READ4(sc, ALI_RTSR); 443 if (reg & 0x80) /* primary codec */ 444 break; 445 WRITE4(sc, ALI_RTSR, reg | 0x80); 446 delay(50000); /* XXX */ 447 } 448 449 return 0; 450 } 451 452 static void 453 auacer_reset(struct auacer_softc *sc) 454 { 455 WRITE4(sc, ALI_SCR, ALI_SCR_RESET); 456 WRITE4(sc, ALI_FIFOCR1, 0x83838383); 457 WRITE4(sc, ALI_FIFOCR2, 0x83838383); 458 WRITE4(sc, ALI_FIFOCR3, 0x83838383); 459 WRITE4(sc, ALI_INTERFACECR, ALI_IF_PO); /* XXX pcm out only */ 460 WRITE4(sc, ALI_INTERRUPTCR, 0x00000000); 461 WRITE4(sc, ALI_INTERRUPTSR, 0x00000000); 462 } 463 464 int 465 auacer_open(void *v, int flags) 466 { 467 DPRINTF(ALI_DEBUG_API, ("auacer_open: flags=%d\n", flags)); 468 return 0; 469 } 470 471 void 472 auacer_close(void *v) 473 { 474 DPRINTF(ALI_DEBUG_API, ("auacer_close\n")); 475 } 476 477 int 478 auacer_query_encoding(void *v, struct audio_encoding *aep) 479 { 480 DPRINTF(ALI_DEBUG_API, ("auacer_query_encoding\n")); 481 482 switch (aep->index) { 483 case 0: 484 strcpy(aep->name, AudioEulinear); 485 aep->encoding = AUDIO_ENCODING_ULINEAR; 486 aep->precision = 8; 487 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 488 return (0); 489 case 1: 490 strcpy(aep->name, AudioEmulaw); 491 aep->encoding = AUDIO_ENCODING_ULAW; 492 aep->precision = 8; 493 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 494 return (0); 495 case 2: 496 strcpy(aep->name, AudioEalaw); 497 aep->encoding = AUDIO_ENCODING_ALAW; 498 aep->precision = 8; 499 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 500 return (0); 501 case 3: 502 strcpy(aep->name, AudioEslinear); 503 aep->encoding = AUDIO_ENCODING_SLINEAR; 504 aep->precision = 8; 505 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 506 return (0); 507 case 4: 508 strcpy(aep->name, AudioEslinear_le); 509 aep->encoding = AUDIO_ENCODING_SLINEAR_LE; 510 aep->precision = 16; 511 aep->flags = 0; 512 return (0); 513 case 5: 514 strcpy(aep->name, AudioEulinear_le); 515 aep->encoding = AUDIO_ENCODING_ULINEAR_LE; 516 aep->precision = 16; 517 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 518 return (0); 519 case 6: 520 strcpy(aep->name, AudioEslinear_be); 521 aep->encoding = AUDIO_ENCODING_SLINEAR_BE; 522 aep->precision = 16; 523 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 524 return (0); 525 case 7: 526 strcpy(aep->name, AudioEulinear_be); 527 aep->encoding = AUDIO_ENCODING_ULINEAR_BE; 528 aep->precision = 16; 529 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 530 return (0); 531 default: 532 return (EINVAL); 533 } 534 } 535 536 int 537 auacer_set_rate(struct auacer_softc *sc, int mode, u_long srate) 538 { 539 int ret; 540 u_long ratetmp; 541 542 DPRINTF(ALI_DEBUG_API, ("auacer_set_rate: srate=%lu\n", srate)); 543 544 ratetmp = srate; 545 if (mode == AUMODE_RECORD) 546 return sc->codec_if->vtbl->set_rate(sc->codec_if, 547 AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 548 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 549 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 550 if (ret) 551 return ret; 552 ratetmp = srate; 553 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 554 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 555 if (ret) 556 return ret; 557 ratetmp = srate; 558 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 559 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 560 return ret; 561 } 562 563 int 564 auacer_set_params(void *v, int setmode, int usemode, struct audio_params *play, 565 struct audio_params *rec) 566 { 567 struct auacer_softc *sc = v; 568 struct audio_params *p; 569 uint32_t control; 570 int mode; 571 572 DPRINTF(ALI_DEBUG_API, ("auacer_set_params\n")); 573 574 for (mode = AUMODE_RECORD; mode != -1; 575 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 576 if ((setmode & mode) == 0) 577 continue; 578 579 p = mode == AUMODE_PLAY ? play : rec; 580 if (p == NULL) 581 continue; 582 583 if ((p->sample_rate != 8000) && 584 (p->sample_rate != 11025) && 585 (p->sample_rate != 12000) && 586 (p->sample_rate != 16000) && 587 (p->sample_rate != 22050) && 588 (p->sample_rate != 24000) && 589 (p->sample_rate != 32000) && 590 (p->sample_rate != 44100) && 591 (p->sample_rate != 48000)) 592 return (EINVAL); 593 594 p->factor = 1; 595 if (p->precision == 8) 596 p->factor *= 2; 597 598 p->sw_code = NULL; 599 /* setup hardware formats */ 600 p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE; 601 p->hw_precision = 16; 602 603 if (mode == AUMODE_RECORD) { 604 if (p->channels < 1 || p->channels > 2) 605 return EINVAL; 606 } else { 607 switch (p->channels) { 608 case 1: 609 break; 610 case 2: 611 break; 612 case 4: 613 if (!SUPPORTS_4CH(sc->codec_if)) 614 return EINVAL; 615 break; 616 case 6: 617 if (!SUPPORTS_6CH(sc->codec_if)) 618 return EINVAL; 619 break; 620 default: 621 return EINVAL; 622 } 623 } 624 /* If monaural is requested, aurateconv expands a monaural 625 * stream to stereo. */ 626 if (p->channels == 1) 627 p->hw_channels = 2; 628 629 switch (p->encoding) { 630 case AUDIO_ENCODING_SLINEAR_BE: 631 if (p->precision == 16) { 632 p->sw_code = swap_bytes; 633 } else { 634 if (mode == AUMODE_PLAY) 635 p->sw_code = linear8_to_linear16_le; 636 else 637 p->sw_code = linear16_to_linear8_le; 638 } 639 break; 640 641 case AUDIO_ENCODING_SLINEAR_LE: 642 if (p->precision != 16) { 643 if (mode == AUMODE_PLAY) 644 p->sw_code = linear8_to_linear16_le; 645 else 646 p->sw_code = linear16_to_linear8_le; 647 } 648 break; 649 650 case AUDIO_ENCODING_ULINEAR_BE: 651 if (p->precision == 16) { 652 if (mode == AUMODE_PLAY) 653 p->sw_code = 654 swap_bytes_change_sign16_le; 655 else 656 p->sw_code = 657 change_sign16_swap_bytes_le; 658 } else { 659 if (mode == AUMODE_PLAY) 660 p->sw_code = 661 ulinear8_to_slinear16_le; 662 else 663 p->sw_code = 664 slinear16_to_ulinear8_le; 665 } 666 break; 667 668 case AUDIO_ENCODING_ULINEAR_LE: 669 if (p->precision == 16) { 670 p->sw_code = change_sign16_le; 671 } else { 672 if (mode == AUMODE_PLAY) 673 p->sw_code = 674 ulinear8_to_slinear16_le; 675 else 676 p->sw_code = 677 slinear16_to_ulinear8_le; 678 } 679 break; 680 681 case AUDIO_ENCODING_ULAW: 682 if (mode == AUMODE_PLAY) { 683 p->sw_code = mulaw_to_slinear16_le; 684 } else { 685 p->sw_code = slinear16_to_mulaw_le; 686 } 687 break; 688 689 case AUDIO_ENCODING_ALAW: 690 if (mode == AUMODE_PLAY) { 691 p->sw_code = alaw_to_slinear16_le; 692 } else { 693 p->sw_code = slinear16_to_alaw_le; 694 } 695 break; 696 697 default: 698 return (EINVAL); 699 } 700 701 if (IS_FIXED_RATE(sc->codec_if)) { 702 p->hw_sample_rate = AC97_SINGLE_RATE; 703 /* If hw_sample_rate is changed, aurateconv works. */ 704 } else { 705 if (auacer_set_rate(sc, mode, p->sample_rate)) 706 return EINVAL; 707 } 708 709 if (mode == AUMODE_PLAY) { 710 control = READ4(sc, ALI_SCR); 711 control &= ~ALI_SCR_PCM_246_MASK; 712 if (p->channels == 4) 713 control |= ALI_SCR_PCM_4; 714 else if (p->channels == 6) 715 control |= ALI_SCR_PCM_6; 716 WRITE4(sc, ALI_SCR, control); 717 } 718 } 719 720 return (0); 721 } 722 723 int 724 auacer_round_blocksize(void *v, int blk) 725 { 726 727 return (blk & ~0x3f); /* keep good alignment */ 728 } 729 730 static void 731 auacer_halt(struct auacer_softc *sc, struct auacer_chan *chan) 732 { 733 uint32_t val; 734 uint8_t port = chan->port; 735 uint32_t slot; 736 737 DPRINTF(ALI_DEBUG_API, ("auacer_halt: port=0x%x\n", port)); 738 739 chan->intr = 0; 740 741 slot = ALI_PORT2SLOT(port); 742 743 val = READ4(sc, ALI_DMACR); 744 val |= 1 << (slot+16); /* pause */ 745 val &= ~(1 << slot); /* no start */ 746 WRITE4(sc, ALI_DMACR, val); 747 WRITE1(sc, port + ALI_OFF_CR, 0); 748 while (READ1(sc, port + ALI_OFF_CR)) 749 ; 750 /* reset whole DMA things */ 751 WRITE1(sc, port + ALI_OFF_CR, ALI_CR_RR); 752 /* clear interrupts */ 753 WRITE1(sc, port + ALI_OFF_SR, READ1(sc, port+ALI_OFF_SR) | ALI_SR_W1TC); 754 WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(port)); 755 } 756 757 int 758 auacer_halt_output(void *v) 759 { 760 struct auacer_softc *sc = v; 761 762 DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_output\n")); 763 764 auacer_halt(sc, &sc->sc_pcmo); 765 766 return (0); 767 } 768 769 int 770 auacer_halt_input(void *v) 771 { 772 /*struct auacer_softc *sc = v;*/ 773 774 DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_input\n")); 775 776 return (0); 777 } 778 779 int 780 auacer_getdev(void *v, struct audio_device *adp) 781 { 782 struct auacer_softc *sc = v; 783 784 DPRINTF(ALI_DEBUG_API, ("auacer_getdev\n")); 785 786 *adp = sc->sc_audev; 787 return (0); 788 } 789 790 int 791 auacer_set_port(void *v, mixer_ctrl_t *cp) 792 { 793 struct auacer_softc *sc = v; 794 795 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_set_port\n")); 796 797 return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp)); 798 } 799 800 int 801 auacer_get_port(void *v, mixer_ctrl_t *cp) 802 { 803 struct auacer_softc *sc = v; 804 805 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_get_port\n")); 806 807 return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp)); 808 } 809 810 int 811 auacer_query_devinfo(void *v, mixer_devinfo_t *dp) 812 { 813 struct auacer_softc *sc = v; 814 815 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_query_devinfo\n")); 816 817 return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp)); 818 } 819 820 void * 821 auacer_allocm(void *v, int direction, size_t size, struct malloc_type *pool, 822 int flags) 823 { 824 struct auacer_softc *sc = v; 825 struct auacer_dma *p; 826 int error; 827 828 if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX)) 829 return (NULL); 830 831 p = malloc(sizeof(*p), pool, flags | M_ZERO); 832 if (p == NULL) 833 return (NULL); 834 835 error = auacer_allocmem(sc, size, 0, p); 836 if (error) { 837 free(p, pool); 838 return (NULL); 839 } 840 841 p->next = sc->sc_dmas; 842 sc->sc_dmas = p; 843 844 return (KERNADDR(p)); 845 } 846 847 void 848 auacer_freem(void *v, void *ptr, struct malloc_type *pool) 849 { 850 struct auacer_softc *sc = v; 851 struct auacer_dma *p, **pp; 852 853 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 854 if (KERNADDR(p) == ptr) { 855 auacer_freemem(sc, p); 856 *pp = p->next; 857 free(p, pool); 858 return; 859 } 860 } 861 } 862 863 size_t 864 auacer_round_buffersize(void *v, int direction, size_t size) 865 { 866 867 if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX)) 868 size = ALI_DMALIST_MAX * ALI_DMASEG_MAX; 869 870 return size; 871 } 872 873 paddr_t 874 auacer_mappage(void *v, void *mem, off_t off, int prot) 875 { 876 struct auacer_softc *sc = v; 877 struct auacer_dma *p; 878 879 if (off < 0) 880 return (-1); 881 882 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 883 ; 884 if (!p) 885 return (-1); 886 return (bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 887 off, prot, BUS_DMA_WAITOK)); 888 } 889 890 int 891 auacer_get_props(void *v) 892 { 893 struct auacer_softc *sc = v; 894 int props; 895 896 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 897 /* 898 * Even if the codec is fixed-rate, set_param() succeeds for any sample 899 * rate because of aurateconv. Applications can't know what rate the 900 * device can process in the case of mmap(). 901 */ 902 if (!IS_FIXED_RATE(sc->codec_if)) 903 props |= AUDIO_PROP_MMAP; 904 return props; 905 } 906 907 static void 908 auacer_add_entry(struct auacer_chan *chan) 909 { 910 struct auacer_dmalist *q; 911 912 q = &chan->dmalist[chan->ptr]; 913 914 DPRINTF(ALI_DEBUG_INTR, 915 ("auacer_add_entry: %p = %x @ 0x%x\n", 916 q, chan->blksize / 2, chan->p)); 917 918 q->base = htole32(chan->p); 919 q->len = htole32((chan->blksize / ALI_SAMPLE_SIZE) | ALI_DMAF_IOC); 920 chan->p += chan->blksize; 921 if (chan->p >= chan->end) 922 chan->p = chan->start; 923 924 if (++chan->ptr >= ALI_DMALIST_MAX) 925 chan->ptr = 0; 926 } 927 928 static void 929 auacer_upd_chan(struct auacer_softc *sc, struct auacer_chan *chan) 930 { 931 uint32_t sts; 932 uint32_t civ; 933 934 sts = READ2(sc, chan->port + ALI_OFF_SR); 935 /* intr ack */ 936 WRITE2(sc, chan->port + ALI_OFF_SR, sts & ALI_SR_W1TC); 937 WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(chan->port)); 938 939 DPRINTF(ALI_DEBUG_INTR, ("auacer_upd_chan: sts=0x%x\n", sts)); 940 941 if (sts & ALI_SR_DMA_INT_FIFO) { 942 printf("%s: fifo underrun # %u\n", 943 sc->sc_dev.dv_xname, ++chan->fifoe); 944 } 945 946 civ = READ1(sc, chan->port + ALI_OFF_CIV); 947 948 DPRINTF(ALI_DEBUG_INTR,("auacer_intr: civ=%u ptr=%u\n",civ,chan->ptr)); 949 950 /* XXX */ 951 while (chan->ptr != civ) { 952 auacer_add_entry(chan); 953 } 954 955 WRITE1(sc, chan->port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK); 956 957 while (chan->ack != civ) { 958 if (chan->intr) { 959 DPRINTF(ALI_DEBUG_INTR,("auacer_upd_chan: callback\n")); 960 chan->intr(chan->arg); 961 } 962 chan->ack++; 963 if (chan->ack >= ALI_DMALIST_MAX) 964 chan->ack = 0; 965 } 966 } 967 968 int 969 auacer_intr(void *v) 970 { 971 struct auacer_softc *sc = v; 972 int ret, intrs; 973 974 intrs = READ4(sc, ALI_INTERRUPTSR); 975 DPRINTF(ALI_DEBUG_INTR, ("auacer_intr: intrs=0x%x\n", intrs)); 976 977 ret = 0; 978 if (intrs & ALI_INT_PCMOUT) { 979 auacer_upd_chan(sc, &sc->sc_pcmo); 980 ret++; 981 } 982 983 return ret != 0; 984 } 985 986 static void 987 auacer_setup_chan(struct auacer_softc *sc, struct auacer_chan *chan, 988 uint32_t start, uint32_t size, uint32_t blksize, 989 void (*intr)(void *), void *arg) 990 { 991 uint32_t port, slot; 992 uint32_t offs, val; 993 994 chan->start = start; 995 chan->ptr = 0; 996 chan->p = chan->start; 997 chan->end = chan->start + size; 998 chan->blksize = blksize; 999 chan->ack = 0; 1000 chan->intr = intr; 1001 chan->arg = arg; 1002 1003 auacer_add_entry(chan); 1004 auacer_add_entry(chan); 1005 1006 port = chan->port; 1007 slot = ALI_PORT2SLOT(port); 1008 1009 WRITE1(sc, port + ALI_OFF_CIV, 0); 1010 WRITE1(sc, port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK); 1011 offs = (char *)chan->dmalist - (char *)sc->sc_cdata; 1012 WRITE4(sc, port + ALI_OFF_BDBAR, sc->sc_cddma + offs); 1013 WRITE1(sc, port + ALI_OFF_CR, 1014 ALI_CR_IOCE | ALI_CR_FEIE | ALI_CR_LVBIE | ALI_CR_RPBM); 1015 val = READ4(sc, ALI_DMACR); 1016 val &= ~(1 << (slot+16)); /* no pause */ 1017 val |= 1 << slot; /* start */ 1018 WRITE4(sc, ALI_DMACR, val); 1019 } 1020 1021 int 1022 auacer_trigger_output(void *v, void *start, void *end, int blksize, 1023 void (*intr)(void *), void *arg, struct audio_params *param) 1024 { 1025 struct auacer_softc *sc = v; 1026 struct auacer_dma *p; 1027 uint32_t size; 1028 1029 DPRINTF(ALI_DEBUG_DMA, 1030 ("auacer_trigger_output(%p, %p, %d, %p, %p, %p)\n", 1031 start, end, blksize, intr, arg, param)); 1032 1033 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1034 ; 1035 if (!p) { 1036 printf("auacer_trigger_output: bad addr %p\n", start); 1037 return (EINVAL); 1038 } 1039 1040 size = (char *)end - (char *)start; 1041 auacer_setup_chan(sc, &sc->sc_pcmo, DMAADDR(p), size, blksize, 1042 intr, arg); 1043 1044 return 0; 1045 } 1046 1047 int 1048 auacer_trigger_input(void *v, void *start, void *end, int blksize, 1049 void (*intr)(void *), void *arg, 1050 struct audio_params *param) 1051 { 1052 return (EINVAL); 1053 } 1054 1055 int 1056 auacer_allocmem(struct auacer_softc *sc, size_t size, size_t align, 1057 struct auacer_dma *p) 1058 { 1059 int error; 1060 1061 p->size = size; 1062 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1063 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1064 &p->nsegs, BUS_DMA_NOWAIT); 1065 if (error) 1066 return (error); 1067 1068 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1069 &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags); 1070 if (error) 1071 goto free; 1072 1073 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1074 0, BUS_DMA_NOWAIT, &p->map); 1075 if (error) 1076 goto unmap; 1077 1078 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1079 BUS_DMA_NOWAIT); 1080 if (error) 1081 goto destroy; 1082 return (0); 1083 1084 destroy: 1085 bus_dmamap_destroy(sc->dmat, p->map); 1086 unmap: 1087 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1088 free: 1089 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1090 return (error); 1091 } 1092 1093 int 1094 auacer_freemem(struct auacer_softc *sc, struct auacer_dma *p) 1095 { 1096 1097 bus_dmamap_unload(sc->dmat, p->map); 1098 bus_dmamap_destroy(sc->dmat, p->map); 1099 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1100 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1101 return (0); 1102 } 1103 1104 int 1105 auacer_alloc_cdata(struct auacer_softc *sc) 1106 { 1107 bus_dma_segment_t seg; 1108 int error, rseg; 1109 1110 /* 1111 * Allocate the control data structure, and create and load the 1112 * DMA map for it. 1113 */ 1114 if ((error = bus_dmamem_alloc(sc->dmat, 1115 sizeof(struct auacer_cdata), 1116 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1117 printf("%s: unable to allocate control data, error = %d\n", 1118 sc->sc_dev.dv_xname, error); 1119 goto fail_0; 1120 } 1121 1122 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1123 sizeof(struct auacer_cdata), 1124 (caddr_t *) &sc->sc_cdata, 1125 sc->sc_dmamap_flags)) != 0) { 1126 printf("%s: unable to map control data, error = %d\n", 1127 sc->sc_dev.dv_xname, error); 1128 goto fail_1; 1129 } 1130 1131 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auacer_cdata), 1, 1132 sizeof(struct auacer_cdata), 0, 0, 1133 &sc->sc_cddmamap)) != 0) { 1134 printf("%s: unable to create control data DMA map, " 1135 "error = %d\n", sc->sc_dev.dv_xname, error); 1136 goto fail_2; 1137 } 1138 1139 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1140 sc->sc_cdata, sizeof(struct auacer_cdata), 1141 NULL, 0)) != 0) { 1142 printf("%s: unable tp load control data DMA map, " 1143 "error = %d\n", sc->sc_dev.dv_xname, error); 1144 goto fail_3; 1145 } 1146 1147 return (0); 1148 1149 fail_3: 1150 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1151 fail_2: 1152 bus_dmamem_unmap(sc->dmat, (caddr_t) sc->sc_cdata, 1153 sizeof(struct auacer_cdata)); 1154 fail_1: 1155 bus_dmamem_free(sc->dmat, &seg, rseg); 1156 fail_0: 1157 return (error); 1158 } 1159 1160 void 1161 auacer_powerhook(int why, void *addr) 1162 { 1163 struct auacer_softc *sc = (struct auacer_softc *)addr; 1164 1165 switch (why) { 1166 case PWR_SUSPEND: 1167 case PWR_STANDBY: 1168 /* Power down */ 1169 DPRINTF(1, ("%s: power down\n", sc->sc_dev.dv_xname)); 1170 sc->sc_suspend = why; 1171 break; 1172 1173 case PWR_RESUME: 1174 /* Wake up */ 1175 DPRINTF(1, ("%s: power resume\n", sc->sc_dev.dv_xname)); 1176 if (sc->sc_suspend == PWR_RESUME) { 1177 printf("%s: resume without suspend.\n", 1178 sc->sc_dev.dv_xname); 1179 sc->sc_suspend = why; 1180 return; 1181 } 1182 sc->sc_suspend = why; 1183 auacer_reset_codec(sc); 1184 delay(1000); 1185 sc->codec_if->vtbl->restore_ports(sc->codec_if); 1186 break; 1187 1188 case PWR_SOFTSUSPEND: 1189 case PWR_SOFTSTANDBY: 1190 case PWR_SOFTRESUME: 1191 break; 1192 } 1193 } 1194
Indexes created Fri Oct 31 11:10:07 GMT 2025