auacer.c revision 1.20
1 /* $NetBSD: auacer.c,v 1.20 2008/04/10 19:13:36 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Acer Labs M5455 audio driver 41 * 42 * Acer provides data sheets after signing an NDA, so this is guess work. 43 * The chip behaves somewhat like the Intel i8x0, so this driver 44 * is loosely based on the auich driver. Additional information taken from 45 * the ALSA intel8x0.c driver (which handles M5455 as well). 46 * 47 * As an historical note one can observe that the auich driver borrows 48 * lot from the first NetBSD PCI audio driver, the eap driver. But this 49 * is not attributed anywhere. 50 */ 51 52 53 #include <sys/cdefs.h> 54 __KERNEL_RCSID(0, "$NetBSD: auacer.c,v 1.20 2008/04/10 19:13:36 cegger Exp $"); 55 56 #include <sys/param.h> 57 #include <sys/systm.h> 58 #include <sys/kernel.h> 59 #include <sys/malloc.h> 60 #include <sys/device.h> 61 #include <sys/fcntl.h> 62 #include <sys/proc.h> 63 64 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 65 66 #include <dev/pci/pcidevs.h> 67 #include <dev/pci/pcivar.h> 68 #include <dev/pci/auacerreg.h> 69 70 #include <sys/audioio.h> 71 #include <dev/audio_if.h> 72 #include <dev/mulaw.h> 73 #include <dev/auconv.h> 74 75 #include <sys/bus.h> 76 77 #include <dev/ic/ac97reg.h> 78 #include <dev/ic/ac97var.h> 79 80 struct auacer_dma { 81 bus_dmamap_t map; 82 void *addr; 83 bus_dma_segment_t segs[1]; 84 int nsegs; 85 size_t size; 86 struct auacer_dma *next; 87 }; 88 89 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 90 #define KERNADDR(p) ((void *)((p)->addr)) 91 92 struct auacer_cdata { 93 struct auacer_dmalist ic_dmalist_pcmo[ALI_DMALIST_MAX]; 94 }; 95 96 struct auacer_chan { 97 uint32_t ptr; 98 uint32_t start, p, end; 99 uint32_t blksize, fifoe; 100 uint32_t ack; 101 uint32_t port; 102 struct auacer_dmalist *dmalist; 103 void (*intr)(void *); 104 void *arg; 105 }; 106 107 struct auacer_softc { 108 struct device sc_dev; 109 void *sc_ih; 110 111 audio_device_t sc_audev; 112 113 bus_space_tag_t iot; 114 bus_space_handle_t mix_ioh; 115 bus_space_handle_t aud_ioh; 116 bus_dma_tag_t dmat; 117 118 struct ac97_codec_if *codec_if; 119 struct ac97_host_if host_if; 120 121 /* DMA scatter-gather lists. */ 122 bus_dmamap_t sc_cddmamap; 123 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 124 125 struct auacer_cdata *sc_cdata; 126 127 struct auacer_chan sc_pcmo; 128 129 struct auacer_dma *sc_dmas; 130 131 pci_chipset_tag_t sc_pc; 132 pcitag_t sc_pt; 133 134 int sc_dmamap_flags; 135 136 #define AUACER_NFORMATS 3 137 struct audio_format sc_formats[AUACER_NFORMATS]; 138 struct audio_encoding_set *sc_encodings; 139 }; 140 141 #define READ1(sc, a) bus_space_read_1(sc->iot, sc->aud_ioh, a) 142 #define READ2(sc, a) bus_space_read_2(sc->iot, sc->aud_ioh, a) 143 #define READ4(sc, a) bus_space_read_4(sc->iot, sc->aud_ioh, a) 144 #define WRITE1(sc, a, v) bus_space_write_1(sc->iot, sc->aud_ioh, a, v) 145 #define WRITE2(sc, a, v) bus_space_write_2(sc->iot, sc->aud_ioh, a, v) 146 #define WRITE4(sc, a, v) bus_space_write_4(sc->iot, sc->aud_ioh, a, v) 147 148 /* Debug */ 149 #ifdef AUACER_DEBUG 150 #define DPRINTF(l,x) do { if (auacer_debug & (l)) printf x; } while(0) 151 int auacer_debug = 0; 152 #define ALI_DEBUG_CODECIO 0x0001 153 #define ALI_DEBUG_DMA 0x0002 154 #define ALI_DEBUG_INTR 0x0004 155 #define ALI_DEBUG_API 0x0008 156 #define ALI_DEBUG_MIXERAPI 0x0010 157 #else 158 #define DPRINTF(x,y) /* nothing */ 159 #endif 160 161 static int auacer_intr(void *); 162 163 static int auacer_query_encoding(void *, struct audio_encoding *); 164 static int auacer_set_params(void *, int, int, audio_params_t *, 165 audio_params_t *, stream_filter_list_t *, 166 stream_filter_list_t *); 167 static int auacer_round_blocksize(void *, int, int, 168 const audio_params_t *); 169 static int auacer_halt_output(void *); 170 static int auacer_halt_input(void *); 171 static int auacer_getdev(void *, struct audio_device *); 172 static int auacer_set_port(void *, mixer_ctrl_t *); 173 static int auacer_get_port(void *, mixer_ctrl_t *); 174 static int auacer_query_devinfo(void *, mixer_devinfo_t *); 175 static void *auacer_allocm(void *, int, size_t, struct malloc_type *, int); 176 static void auacer_freem(void *, void *, struct malloc_type *); 177 static size_t auacer_round_buffersize(void *, int, size_t); 178 static paddr_t auacer_mappage(void *, void *, off_t, int); 179 static int auacer_get_props(void *); 180 static int auacer_trigger_output(void *, void *, void *, int, 181 void (*)(void *), void *, 182 const audio_params_t *); 183 static int auacer_trigger_input(void *, void *, void *, int, 184 void (*)(void *), void *, 185 const audio_params_t *); 186 187 static int auacer_alloc_cdata(struct auacer_softc *); 188 189 static int auacer_allocmem(struct auacer_softc *, size_t, size_t, 190 struct auacer_dma *); 191 static int auacer_freemem(struct auacer_softc *, struct auacer_dma *); 192 193 static bool auacer_resume(device_t PMF_FN_PROTO); 194 static int auacer_set_rate(struct auacer_softc *, int, u_int); 195 196 static void auacer_reset(struct auacer_softc *sc); 197 198 static struct audio_hw_if auacer_hw_if = { 199 NULL, /* open */ 200 NULL, /* close */ 201 NULL, /* drain */ 202 auacer_query_encoding, 203 auacer_set_params, 204 auacer_round_blocksize, 205 NULL, /* commit_setting */ 206 NULL, /* init_output */ 207 NULL, /* init_input */ 208 NULL, /* start_output */ 209 NULL, /* start_input */ 210 auacer_halt_output, 211 auacer_halt_input, 212 NULL, /* speaker_ctl */ 213 auacer_getdev, 214 NULL, /* getfd */ 215 auacer_set_port, 216 auacer_get_port, 217 auacer_query_devinfo, 218 auacer_allocm, 219 auacer_freem, 220 auacer_round_buffersize, 221 auacer_mappage, 222 auacer_get_props, 223 auacer_trigger_output, 224 auacer_trigger_input, 225 NULL, /* dev_ioctl */ 226 NULL, /* powerstate */ 227 }; 228 229 #define AUACER_FORMATS_4CH 1 230 #define AUACER_FORMATS_6CH 2 231 static const struct audio_format auacer_formats[AUACER_NFORMATS] = { 232 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 233 2, AUFMT_STEREO, 0, {8000, 48000}}, 234 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 235 4, AUFMT_SURROUND4, 0, {8000, 48000}}, 236 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 237 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}}, 238 }; 239 240 static int auacer_attach_codec(void *, struct ac97_codec_if *); 241 static int auacer_read_codec(void *, uint8_t, uint16_t *); 242 static int auacer_write_codec(void *, uint8_t, uint16_t); 243 static int auacer_reset_codec(void *); 244 245 static int 246 auacer_match(struct device *parent, struct cfdata *match, 247 void *aux) 248 { 249 struct pci_attach_args *pa; 250 251 pa = (struct pci_attach_args *)aux; 252 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI && 253 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M5455) 254 return 1; 255 return 0; 256 } 257 258 static void 259 auacer_attach(struct device *parent, struct device *self, void *aux) 260 { 261 struct auacer_softc *sc; 262 struct pci_attach_args *pa; 263 pci_intr_handle_t ih; 264 bus_size_t aud_size; 265 pcireg_t v; 266 const char *intrstr; 267 int i; 268 269 sc = (struct auacer_softc *)self; 270 pa = aux; 271 aprint_normal(": Acer Labs M5455 Audio controller\n"); 272 273 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->iot, 274 &sc->aud_ioh, NULL, &aud_size)) { 275 aprint_error(": can't map i/o space\n"); 276 return; 277 } 278 279 sc->sc_pc = pa->pa_pc; 280 sc->sc_pt = pa->pa_tag; 281 sc->dmat = pa->pa_dmat; 282 283 sc->sc_dmamap_flags = BUS_DMA_COHERENT; /* XXX remove */ 284 285 /* enable bus mastering */ 286 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 287 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 288 v | PCI_COMMAND_MASTER_ENABLE); 289 290 /* Map and establish the interrupt. */ 291 if (pci_intr_map(pa, &ih)) { 292 aprint_error_dev(&sc->sc_dev, "can't map interrupt\n"); 293 return; 294 } 295 intrstr = pci_intr_string(pa->pa_pc, ih); 296 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, 297 auacer_intr, sc); 298 if (sc->sc_ih == NULL) { 299 aprint_error_dev(&sc->sc_dev, "can't establish interrupt"); 300 if (intrstr != NULL) 301 aprint_normal(" at %s", intrstr); 302 aprint_normal("\n"); 303 return; 304 } 305 aprint_normal_dev(&sc->sc_dev, "interrupting at %s\n", intrstr); 306 307 strlcpy(sc->sc_audev.name, "M5455 AC97", MAX_AUDIO_DEV_LEN); 308 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 309 "0x%02x", PCI_REVISION(pa->pa_class)); 310 strlcpy(sc->sc_audev.config, device_xname(&sc->sc_dev), MAX_AUDIO_DEV_LEN); 311 312 /* Set up DMA lists. */ 313 auacer_alloc_cdata(sc); 314 sc->sc_pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 315 sc->sc_pcmo.ptr = 0; 316 sc->sc_pcmo.port = ALI_BASE_PO; 317 318 DPRINTF(ALI_DEBUG_DMA, ("auacer_attach: lists %p\n", 319 sc->sc_pcmo.dmalist)); 320 321 sc->host_if.arg = sc; 322 sc->host_if.attach = auacer_attach_codec; 323 sc->host_if.read = auacer_read_codec; 324 sc->host_if.write = auacer_write_codec; 325 sc->host_if.reset = auacer_reset_codec; 326 327 if (ac97_attach(&sc->host_if, self) != 0) 328 return; 329 330 /* setup audio_format */ 331 memcpy(sc->sc_formats, auacer_formats, sizeof(auacer_formats)); 332 if (!AC97_IS_4CH(sc->codec_if)) 333 AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_4CH]); 334 if (!AC97_IS_6CH(sc->codec_if)) 335 AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_6CH]); 336 if (AC97_IS_FIXED_RATE(sc->codec_if)) { 337 for (i = 0; i < AUACER_NFORMATS; i++) { 338 sc->sc_formats[i].frequency_type = 1; 339 sc->sc_formats[i].frequency[0] = 48000; 340 } 341 } 342 343 if (0 != auconv_create_encodings(sc->sc_formats, AUACER_NFORMATS, 344 &sc->sc_encodings)) { 345 return; 346 } 347 348 audio_attach_mi(&auacer_hw_if, sc, &sc->sc_dev); 349 350 auacer_reset(sc); 351 352 if (!pmf_device_register(self, NULL, auacer_resume)) 353 aprint_error_dev(self, "couldn't establish power handler\n"); 354 } 355 356 CFATTACH_DECL(auacer, sizeof(struct auacer_softc), 357 auacer_match, auacer_attach, NULL, NULL); 358 359 static int 360 auacer_ready_codec(struct auacer_softc *sc, int mask) 361 { 362 int count; 363 364 for (count = 0; count < 0x7f; count++) { 365 int val = READ1(sc, ALI_CSPSR); 366 if (val & mask) 367 return 0; 368 } 369 370 aprint_normal("auacer_ready_codec: AC97 codec ready timeout.\n"); 371 return EBUSY; 372 } 373 374 static int 375 auacer_sema_codec(struct auacer_softc *sc) 376 { 377 int ttime; 378 379 ttime = 100; 380 while (ttime-- && (READ4(sc, ALI_CAS) & ALI_CAS_SEM_BUSY)) 381 delay(1); 382 if (!ttime) 383 aprint_normal("auacer_sema_codec: timeout\n"); 384 return auacer_ready_codec(sc, ALI_CSPSR_CODEC_READY); 385 } 386 387 static int 388 auacer_read_codec(void *v, uint8_t reg, uint16_t *val) 389 { 390 struct auacer_softc *sc; 391 392 sc = v; 393 if (auacer_sema_codec(sc)) 394 return EIO; 395 396 reg |= ALI_CPR_ADDR_READ; 397 #if 0 398 if (ac97->num) 399 reg |= ALI_CPR_ADDR_SECONDARY; 400 #endif 401 WRITE2(sc, ALI_CPR_ADDR, reg); 402 if (auacer_ready_codec(sc, ALI_CSPSR_READ_OK)) 403 return EIO; 404 *val = READ2(sc, ALI_SPR); 405 406 DPRINTF(ALI_DEBUG_CODECIO, ("auacer_read_codec: reg=0x%x val=0x%x\n", 407 reg, *val)); 408 409 return 0; 410 } 411 412 int 413 auacer_write_codec(void *v, uint8_t reg, uint16_t val) 414 { 415 struct auacer_softc *sc; 416 417 DPRINTF(ALI_DEBUG_CODECIO, ("auacer_write_codec: reg=0x%x val=0x%x\n", 418 reg, val)); 419 sc = v; 420 if (auacer_sema_codec(sc)) 421 return EIO; 422 WRITE2(sc, ALI_CPR, val); 423 #if 0 424 if (ac97->num) 425 reg |= ALI_CPR_ADDR_SECONDARY; 426 #endif 427 WRITE2(sc, ALI_CPR_ADDR, reg); 428 auacer_ready_codec(sc, ALI_CSPSR_WRITE_OK); 429 return 0; 430 } 431 432 static int 433 auacer_attach_codec(void *v, struct ac97_codec_if *cif) 434 { 435 struct auacer_softc *sc; 436 437 sc = v; 438 sc->codec_if = cif; 439 return 0; 440 } 441 442 static int 443 auacer_reset_codec(void *v) 444 { 445 struct auacer_softc *sc; 446 uint32_t reg; 447 int i; 448 449 sc = v; 450 i = 0; 451 reg = READ4(sc, ALI_SCR); 452 if ((reg & 2) == 0) /* Cold required */ 453 reg |= 2; 454 else 455 reg |= 1; /* Warm */ 456 reg &= ~0x80000000; /* ACLink on */ 457 WRITE4(sc, ALI_SCR, reg); 458 459 while (i < 10) { 460 if ((READ4(sc, ALI_INTERRUPTSR) & ALI_INT_GPIO) == 0) 461 break; 462 delay(50000); /* XXX */ 463 i++; 464 } 465 if (i == 10) { 466 return EIO; 467 } 468 469 for (i = 0; i < 10; i++) { 470 reg = READ4(sc, ALI_RTSR); 471 if (reg & 0x80) /* primary codec */ 472 break; 473 WRITE4(sc, ALI_RTSR, reg | 0x80); 474 delay(50000); /* XXX */ 475 } 476 477 return 0; 478 } 479 480 static void 481 auacer_reset(struct auacer_softc *sc) 482 { 483 WRITE4(sc, ALI_SCR, ALI_SCR_RESET); 484 WRITE4(sc, ALI_FIFOCR1, 0x83838383); 485 WRITE4(sc, ALI_FIFOCR2, 0x83838383); 486 WRITE4(sc, ALI_FIFOCR3, 0x83838383); 487 WRITE4(sc, ALI_INTERFACECR, ALI_IF_PO); /* XXX pcm out only */ 488 WRITE4(sc, ALI_INTERRUPTCR, 0x00000000); 489 WRITE4(sc, ALI_INTERRUPTSR, 0x00000000); 490 } 491 492 static int 493 auacer_query_encoding(void *v, struct audio_encoding *aep) 494 { 495 struct auacer_softc *sc; 496 497 DPRINTF(ALI_DEBUG_API, ("auacer_query_encoding\n")); 498 sc = v; 499 return auconv_query_encoding(sc->sc_encodings, aep); 500 } 501 502 static int 503 auacer_set_rate(struct auacer_softc *sc, int mode, u_int srate) 504 { 505 int ret; 506 u_int ratetmp; 507 508 DPRINTF(ALI_DEBUG_API, ("auacer_set_rate: srate=%u\n", srate)); 509 510 ratetmp = srate; 511 if (mode == AUMODE_RECORD) 512 return sc->codec_if->vtbl->set_rate(sc->codec_if, 513 AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 514 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 515 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 516 if (ret) 517 return ret; 518 ratetmp = srate; 519 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 520 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 521 if (ret) 522 return ret; 523 ratetmp = srate; 524 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 525 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 526 return ret; 527 } 528 529 static int 530 auacer_set_params(void *v, int setmode, int usemode, 531 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 532 stream_filter_list_t *rfil) 533 { 534 struct auacer_softc *sc; 535 struct audio_params *p; 536 stream_filter_list_t *fil; 537 uint32_t control; 538 int mode, index; 539 540 DPRINTF(ALI_DEBUG_API, ("auacer_set_params\n")); 541 sc = v; 542 for (mode = AUMODE_RECORD; mode != -1; 543 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 544 if ((setmode & mode) == 0) 545 continue; 546 547 p = mode == AUMODE_PLAY ? play : rec; 548 if (p == NULL) 549 continue; 550 551 if ((p->sample_rate != 8000) && 552 (p->sample_rate != 11025) && 553 (p->sample_rate != 12000) && 554 (p->sample_rate != 16000) && 555 (p->sample_rate != 22050) && 556 (p->sample_rate != 24000) && 557 (p->sample_rate != 32000) && 558 (p->sample_rate != 44100) && 559 (p->sample_rate != 48000)) 560 return (EINVAL); 561 562 fil = mode == AUMODE_PLAY ? pfil : rfil; 563 index = auconv_set_converter(sc->sc_formats, AUACER_NFORMATS, 564 mode, p, TRUE, fil); 565 if (index < 0) 566 return EINVAL; 567 if (fil->req_size > 0) 568 p = &fil->filters[0].param; 569 /* p points HW encoding */ 570 if (sc->sc_formats[index].frequency_type != 1 571 && auacer_set_rate(sc, mode, p->sample_rate)) 572 return EINVAL; 573 if (mode == AUMODE_PLAY) { 574 control = READ4(sc, ALI_SCR); 575 control &= ~ALI_SCR_PCM_246_MASK; 576 if (p->channels == 4) 577 control |= ALI_SCR_PCM_4; 578 else if (p->channels == 6) 579 control |= ALI_SCR_PCM_6; 580 WRITE4(sc, ALI_SCR, control); 581 } 582 } 583 584 return (0); 585 } 586 587 static int 588 auacer_round_blocksize(void *v, int blk, int mode, 589 const audio_params_t *param) 590 { 591 592 return blk & ~0x3f; /* keep good alignment */ 593 } 594 595 static void 596 auacer_halt(struct auacer_softc *sc, struct auacer_chan *chan) 597 { 598 uint32_t val; 599 uint8_t port; 600 uint32_t slot; 601 602 port = chan->port; 603 DPRINTF(ALI_DEBUG_API, ("auacer_halt: port=0x%x\n", port)); 604 chan->intr = 0; 605 606 slot = ALI_PORT2SLOT(port); 607 608 val = READ4(sc, ALI_DMACR); 609 val |= 1 << (slot+16); /* pause */ 610 val &= ~(1 << slot); /* no start */ 611 WRITE4(sc, ALI_DMACR, val); 612 WRITE1(sc, port + ALI_OFF_CR, 0); 613 while (READ1(sc, port + ALI_OFF_CR)) 614 ; 615 /* reset whole DMA things */ 616 WRITE1(sc, port + ALI_OFF_CR, ALI_CR_RR); 617 /* clear interrupts */ 618 WRITE1(sc, port + ALI_OFF_SR, READ1(sc, port+ALI_OFF_SR) | ALI_SR_W1TC); 619 WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(port)); 620 } 621 622 static int 623 auacer_halt_output(void *v) 624 { 625 struct auacer_softc *sc; 626 627 DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_output\n")); 628 sc = v; 629 auacer_halt(sc, &sc->sc_pcmo); 630 631 return 0; 632 } 633 634 static int 635 auacer_halt_input(void *v) 636 { 637 DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_input\n")); 638 639 return 0; 640 } 641 642 static int 643 auacer_getdev(void *v, struct audio_device *adp) 644 { 645 struct auacer_softc *sc; 646 647 DPRINTF(ALI_DEBUG_API, ("auacer_getdev\n")); 648 sc = v; 649 *adp = sc->sc_audev; 650 return 0; 651 } 652 653 static int 654 auacer_set_port(void *v, mixer_ctrl_t *cp) 655 { 656 struct auacer_softc *sc; 657 658 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_set_port\n")); 659 sc = v; 660 return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp); 661 } 662 663 static int 664 auacer_get_port(void *v, mixer_ctrl_t *cp) 665 { 666 struct auacer_softc *sc; 667 668 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_get_port\n")); 669 sc = v; 670 return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp); 671 } 672 673 static int 674 auacer_query_devinfo(void *v, mixer_devinfo_t *dp) 675 { 676 struct auacer_softc *sc; 677 678 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_query_devinfo\n")); 679 sc = v; 680 return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp); 681 } 682 683 static void * 684 auacer_allocm(void *v, int direction, size_t size, 685 struct malloc_type *pool, int flags) 686 { 687 struct auacer_softc *sc; 688 struct auacer_dma *p; 689 int error; 690 691 if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX)) 692 return NULL; 693 694 p = malloc(sizeof(*p), pool, flags | M_ZERO); 695 if (p == NULL) 696 return NULL; 697 sc = v; 698 error = auacer_allocmem(sc, size, 0, p); 699 if (error) { 700 free(p, pool); 701 return NULL; 702 } 703 704 p->next = sc->sc_dmas; 705 sc->sc_dmas = p; 706 707 return KERNADDR(p); 708 } 709 710 static void 711 auacer_freem(void *v, void *ptr, struct malloc_type *pool) 712 { 713 struct auacer_softc *sc; 714 struct auacer_dma *p, **pp; 715 716 sc = v; 717 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 718 if (KERNADDR(p) == ptr) { 719 auacer_freemem(sc, p); 720 *pp = p->next; 721 free(p, pool); 722 return; 723 } 724 } 725 } 726 727 static size_t 728 auacer_round_buffersize(void *v, int direction, size_t size) 729 { 730 731 if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX)) 732 size = ALI_DMALIST_MAX * ALI_DMASEG_MAX; 733 734 return size; 735 } 736 737 static paddr_t 738 auacer_mappage(void *v, void *mem, off_t off, int prot) 739 { 740 struct auacer_softc *sc; 741 struct auacer_dma *p; 742 743 if (off < 0) 744 return -1; 745 sc = v; 746 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 747 continue; 748 if (p == NULL) 749 return -1; 750 return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 751 off, prot, BUS_DMA_WAITOK); 752 } 753 754 static int 755 auacer_get_props(void *v) 756 { 757 struct auacer_softc *sc; 758 int props; 759 760 sc = v; 761 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 762 /* 763 * Even if the codec is fixed-rate, set_param() succeeds for any sample 764 * rate because of aurateconv. Applications can't know what rate the 765 * device can process in the case of mmap(). 766 */ 767 if (!AC97_IS_FIXED_RATE(sc->codec_if)) 768 props |= AUDIO_PROP_MMAP; 769 return props; 770 } 771 772 static void 773 auacer_add_entry(struct auacer_chan *chan) 774 { 775 struct auacer_dmalist *q; 776 777 q = &chan->dmalist[chan->ptr]; 778 779 DPRINTF(ALI_DEBUG_INTR, 780 ("auacer_add_entry: %p = %x @ 0x%x\n", 781 q, chan->blksize / 2, chan->p)); 782 783 q->base = htole32(chan->p); 784 q->len = htole32((chan->blksize / ALI_SAMPLE_SIZE) | ALI_DMAF_IOC); 785 chan->p += chan->blksize; 786 if (chan->p >= chan->end) 787 chan->p = chan->start; 788 789 if (++chan->ptr >= ALI_DMALIST_MAX) 790 chan->ptr = 0; 791 } 792 793 static void 794 auacer_upd_chan(struct auacer_softc *sc, struct auacer_chan *chan) 795 { 796 uint32_t sts; 797 uint32_t civ; 798 799 sts = READ2(sc, chan->port + ALI_OFF_SR); 800 /* intr ack */ 801 WRITE2(sc, chan->port + ALI_OFF_SR, sts & ALI_SR_W1TC); 802 WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(chan->port)); 803 804 DPRINTF(ALI_DEBUG_INTR, ("auacer_upd_chan: sts=0x%x\n", sts)); 805 806 if (sts & ALI_SR_DMA_INT_FIFO) { 807 printf("%s: fifo underrun # %u\n", 808 device_xname(&sc->sc_dev), ++chan->fifoe); 809 } 810 811 civ = READ1(sc, chan->port + ALI_OFF_CIV); 812 813 DPRINTF(ALI_DEBUG_INTR,("auacer_intr: civ=%u ptr=%u\n",civ,chan->ptr)); 814 815 /* XXX */ 816 while (chan->ptr != civ) { 817 auacer_add_entry(chan); 818 } 819 820 WRITE1(sc, chan->port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK); 821 822 while (chan->ack != civ) { 823 if (chan->intr) { 824 DPRINTF(ALI_DEBUG_INTR,("auacer_upd_chan: callback\n")); 825 chan->intr(chan->arg); 826 } 827 chan->ack++; 828 if (chan->ack >= ALI_DMALIST_MAX) 829 chan->ack = 0; 830 } 831 } 832 833 static int 834 auacer_intr(void *v) 835 { 836 struct auacer_softc *sc; 837 int ret, intrs; 838 839 sc = v; 840 intrs = READ4(sc, ALI_INTERRUPTSR); 841 DPRINTF(ALI_DEBUG_INTR, ("auacer_intr: intrs=0x%x\n", intrs)); 842 843 ret = 0; 844 if (intrs & ALI_INT_PCMOUT) { 845 auacer_upd_chan(sc, &sc->sc_pcmo); 846 ret++; 847 } 848 849 return ret != 0; 850 } 851 852 static void 853 auacer_setup_chan(struct auacer_softc *sc, struct auacer_chan *chan, 854 uint32_t start, uint32_t size, uint32_t blksize, 855 void (*intr)(void *), void *arg) 856 { 857 uint32_t port, slot; 858 uint32_t offs, val; 859 860 chan->start = start; 861 chan->ptr = 0; 862 chan->p = chan->start; 863 chan->end = chan->start + size; 864 chan->blksize = blksize; 865 chan->ack = 0; 866 chan->intr = intr; 867 chan->arg = arg; 868 869 auacer_add_entry(chan); 870 auacer_add_entry(chan); 871 872 port = chan->port; 873 slot = ALI_PORT2SLOT(port); 874 875 WRITE1(sc, port + ALI_OFF_CIV, 0); 876 WRITE1(sc, port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK); 877 offs = (char *)chan->dmalist - (char *)sc->sc_cdata; 878 WRITE4(sc, port + ALI_OFF_BDBAR, sc->sc_cddma + offs); 879 WRITE1(sc, port + ALI_OFF_CR, 880 ALI_CR_IOCE | ALI_CR_FEIE | ALI_CR_LVBIE | ALI_CR_RPBM); 881 val = READ4(sc, ALI_DMACR); 882 val &= ~(1 << (slot+16)); /* no pause */ 883 val |= 1 << slot; /* start */ 884 WRITE4(sc, ALI_DMACR, val); 885 } 886 887 static int 888 auacer_trigger_output(void *v, void *start, void *end, int blksize, 889 void (*intr)(void *), void *arg, const audio_params_t *param) 890 { 891 struct auacer_softc *sc; 892 struct auacer_dma *p; 893 uint32_t size; 894 895 DPRINTF(ALI_DEBUG_DMA, 896 ("auacer_trigger_output(%p, %p, %d, %p, %p, %p)\n", 897 start, end, blksize, intr, arg, param)); 898 sc = v; 899 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 900 continue; 901 if (!p) { 902 printf("auacer_trigger_output: bad addr %p\n", start); 903 return (EINVAL); 904 } 905 906 size = (char *)end - (char *)start; 907 auacer_setup_chan(sc, &sc->sc_pcmo, DMAADDR(p), size, blksize, 908 intr, arg); 909 910 return 0; 911 } 912 913 static int 914 auacer_trigger_input(void *v, void *start, void *end, 915 int blksize, void (*intr)(void *), void *arg, 916 const audio_params_t *param) 917 { 918 return EINVAL; 919 } 920 921 static int 922 auacer_allocmem(struct auacer_softc *sc, size_t size, size_t align, 923 struct auacer_dma *p) 924 { 925 int error; 926 927 p->size = size; 928 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 929 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 930 &p->nsegs, BUS_DMA_NOWAIT); 931 if (error) 932 return error; 933 934 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 935 &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags); 936 if (error) 937 goto free; 938 939 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 940 0, BUS_DMA_NOWAIT, &p->map); 941 if (error) 942 goto unmap; 943 944 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 945 BUS_DMA_NOWAIT); 946 if (error) 947 goto destroy; 948 return (0); 949 950 destroy: 951 bus_dmamap_destroy(sc->dmat, p->map); 952 unmap: 953 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 954 free: 955 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 956 return error; 957 } 958 959 static int 960 auacer_freemem(struct auacer_softc *sc, struct auacer_dma *p) 961 { 962 963 bus_dmamap_unload(sc->dmat, p->map); 964 bus_dmamap_destroy(sc->dmat, p->map); 965 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 966 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 967 return 0; 968 } 969 970 static int 971 auacer_alloc_cdata(struct auacer_softc *sc) 972 { 973 bus_dma_segment_t seg; 974 int error, rseg; 975 976 /* 977 * Allocate the control data structure, and create and load the 978 * DMA map for it. 979 */ 980 if ((error = bus_dmamem_alloc(sc->dmat, 981 sizeof(struct auacer_cdata), 982 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 983 aprint_error_dev(&sc->sc_dev, "unable to allocate control data, error = %d\n", 984 error); 985 goto fail_0; 986 } 987 988 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 989 sizeof(struct auacer_cdata), 990 (void **) &sc->sc_cdata, 991 sc->sc_dmamap_flags)) != 0) { 992 aprint_error_dev(&sc->sc_dev, "unable to map control data, error = %d\n", 993 error); 994 goto fail_1; 995 } 996 997 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auacer_cdata), 1, 998 sizeof(struct auacer_cdata), 0, 0, 999 &sc->sc_cddmamap)) != 0) { 1000 aprint_error_dev(&sc->sc_dev, "unable to create control data DMA map, " 1001 "error = %d\n", error); 1002 goto fail_2; 1003 } 1004 1005 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1006 sc->sc_cdata, sizeof(struct auacer_cdata), 1007 NULL, 0)) != 0) { 1008 aprint_error_dev(&sc->sc_dev, "unable to load control data DMA map, " 1009 "error = %d\n", error); 1010 goto fail_3; 1011 } 1012 1013 return 0; 1014 1015 fail_3: 1016 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1017 fail_2: 1018 bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata, 1019 sizeof(struct auacer_cdata)); 1020 fail_1: 1021 bus_dmamem_free(sc->dmat, &seg, rseg); 1022 fail_0: 1023 return error; 1024 } 1025 1026 static bool 1027 auacer_resume(device_t dv PMF_FN_ARGS) 1028 { 1029 struct auacer_softc *sc = device_private(dv); 1030 1031 auacer_reset_codec(sc); 1032 delay(1000); 1033 sc->codec_if->vtbl->restore_ports(sc->codec_if); 1034 1035 return true; 1036 } 1037
Indexes created Fri Oct 03 02:09:57 GMT 2025