auacer.c revision 1.30
1 /* $NetBSD: auacer.c,v 1.30 2011/11/24 03:35:58 mrg Exp $ */ 2 3 /*- 4 * Copyright (c) 2004, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Acer Labs M5455 audio driver 34 * 35 * Acer provides data sheets after signing an NDA, so this is guess work. 36 * The chip behaves somewhat like the Intel i8x0, so this driver 37 * is loosely based on the auich driver. Additional information taken from 38 * the ALSA intel8x0.c driver (which handles M5455 as well). 39 * 40 * As an historical note one can observe that the auich driver borrows 41 * lot from the first NetBSD PCI audio driver, the eap driver. But this 42 * is not attributed anywhere. 43 */ 44 45 46 #include <sys/cdefs.h> 47 __KERNEL_RCSID(0, "$NetBSD: auacer.c,v 1.30 2011/11/24 03:35:58 mrg Exp $"); 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/kernel.h> 52 #include <sys/kmem.h> 53 #include <sys/device.h> 54 #include <sys/fcntl.h> 55 #include <sys/proc.h> 56 57 #include <dev/pci/pcidevs.h> 58 #include <dev/pci/pcivar.h> 59 #include <dev/pci/auacerreg.h> 60 61 #include <sys/audioio.h> 62 #include <dev/audio_if.h> 63 #include <dev/mulaw.h> 64 #include <dev/auconv.h> 65 66 #include <sys/bus.h> 67 68 #include <dev/ic/ac97reg.h> 69 #include <dev/ic/ac97var.h> 70 71 struct auacer_dma { 72 bus_dmamap_t map; 73 void *addr; 74 bus_dma_segment_t segs[1]; 75 int nsegs; 76 size_t size; 77 struct auacer_dma *next; 78 }; 79 80 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 81 #define KERNADDR(p) ((void *)((p)->addr)) 82 83 struct auacer_cdata { 84 struct auacer_dmalist ic_dmalist_pcmo[ALI_DMALIST_MAX]; 85 }; 86 87 struct auacer_chan { 88 uint32_t ptr; 89 uint32_t start, p, end; 90 uint32_t blksize, fifoe; 91 uint32_t ack; 92 uint32_t port; 93 struct auacer_dmalist *dmalist; 94 void (*intr)(void *); 95 void *arg; 96 }; 97 98 struct auacer_softc { 99 struct device sc_dev; 100 void *sc_ih; 101 kmutex_t sc_lock; 102 kmutex_t sc_intr_lock; 103 104 audio_device_t sc_audev; 105 106 bus_space_tag_t iot; 107 bus_space_handle_t mix_ioh; 108 bus_space_handle_t aud_ioh; 109 bus_dma_tag_t dmat; 110 111 struct ac97_codec_if *codec_if; 112 struct ac97_host_if host_if; 113 114 /* DMA scatter-gather lists. */ 115 bus_dmamap_t sc_cddmamap; 116 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 117 118 struct auacer_cdata *sc_cdata; 119 120 struct auacer_chan sc_pcmo; 121 122 struct auacer_dma *sc_dmas; 123 124 pci_chipset_tag_t sc_pc; 125 pcitag_t sc_pt; 126 127 int sc_dmamap_flags; 128 129 #define AUACER_NFORMATS 3 130 struct audio_format sc_formats[AUACER_NFORMATS]; 131 struct audio_encoding_set *sc_encodings; 132 }; 133 134 #define READ1(sc, a) bus_space_read_1(sc->iot, sc->aud_ioh, a) 135 #define READ2(sc, a) bus_space_read_2(sc->iot, sc->aud_ioh, a) 136 #define READ4(sc, a) bus_space_read_4(sc->iot, sc->aud_ioh, a) 137 #define WRITE1(sc, a, v) bus_space_write_1(sc->iot, sc->aud_ioh, a, v) 138 #define WRITE2(sc, a, v) bus_space_write_2(sc->iot, sc->aud_ioh, a, v) 139 #define WRITE4(sc, a, v) bus_space_write_4(sc->iot, sc->aud_ioh, a, v) 140 141 /* Debug */ 142 #ifdef AUACER_DEBUG 143 #define DPRINTF(l,x) do { if (auacer_debug & (l)) printf x; } while(0) 144 int auacer_debug = 0; 145 #define ALI_DEBUG_CODECIO 0x0001 146 #define ALI_DEBUG_DMA 0x0002 147 #define ALI_DEBUG_INTR 0x0004 148 #define ALI_DEBUG_API 0x0008 149 #define ALI_DEBUG_MIXERAPI 0x0010 150 #else 151 #define DPRINTF(x,y) /* nothing */ 152 #endif 153 154 static int auacer_intr(void *); 155 156 static int auacer_query_encoding(void *, struct audio_encoding *); 157 static int auacer_set_params(void *, int, int, audio_params_t *, 158 audio_params_t *, stream_filter_list_t *, 159 stream_filter_list_t *); 160 static int auacer_round_blocksize(void *, int, int, 161 const audio_params_t *); 162 static int auacer_halt_output(void *); 163 static int auacer_halt_input(void *); 164 static int auacer_getdev(void *, struct audio_device *); 165 static int auacer_set_port(void *, mixer_ctrl_t *); 166 static int auacer_get_port(void *, mixer_ctrl_t *); 167 static int auacer_query_devinfo(void *, mixer_devinfo_t *); 168 static void *auacer_allocm(void *, int, size_t); 169 static void auacer_freem(void *, void *, size_t); 170 static size_t auacer_round_buffersize(void *, int, size_t); 171 static paddr_t auacer_mappage(void *, void *, off_t, int); 172 static int auacer_get_props(void *); 173 static int auacer_trigger_output(void *, void *, void *, int, 174 void (*)(void *), void *, 175 const audio_params_t *); 176 static int auacer_trigger_input(void *, void *, void *, int, 177 void (*)(void *), void *, 178 const audio_params_t *); 179 180 static int auacer_alloc_cdata(struct auacer_softc *); 181 182 static int auacer_allocmem(struct auacer_softc *, size_t, size_t, 183 struct auacer_dma *); 184 static int auacer_freemem(struct auacer_softc *, struct auacer_dma *); 185 static void auacer_get_locks(void *, kmutex_t **, kmutex_t **); 186 187 static bool auacer_resume(device_t, const pmf_qual_t *); 188 static int auacer_set_rate(struct auacer_softc *, int, u_int); 189 190 static void auacer_reset(struct auacer_softc *sc); 191 192 static struct audio_hw_if auacer_hw_if = { 193 NULL, /* open */ 194 NULL, /* close */ 195 NULL, /* drain */ 196 auacer_query_encoding, 197 auacer_set_params, 198 auacer_round_blocksize, 199 NULL, /* commit_setting */ 200 NULL, /* init_output */ 201 NULL, /* init_input */ 202 NULL, /* start_output */ 203 NULL, /* start_input */ 204 auacer_halt_output, 205 auacer_halt_input, 206 NULL, /* speaker_ctl */ 207 auacer_getdev, 208 NULL, /* getfd */ 209 auacer_set_port, 210 auacer_get_port, 211 auacer_query_devinfo, 212 auacer_allocm, 213 auacer_freem, 214 auacer_round_buffersize, 215 auacer_mappage, 216 auacer_get_props, 217 auacer_trigger_output, 218 auacer_trigger_input, 219 NULL, /* dev_ioctl */ 220 auacer_get_locks, 221 }; 222 223 #define AUACER_FORMATS_4CH 1 224 #define AUACER_FORMATS_6CH 2 225 static const struct audio_format auacer_formats[AUACER_NFORMATS] = { 226 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 227 2, AUFMT_STEREO, 0, {8000, 48000}}, 228 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 229 4, AUFMT_SURROUND4, 0, {8000, 48000}}, 230 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 231 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}}, 232 }; 233 234 static int auacer_attach_codec(void *, struct ac97_codec_if *); 235 static int auacer_read_codec(void *, uint8_t, uint16_t *); 236 static int auacer_write_codec(void *, uint8_t, uint16_t); 237 static int auacer_reset_codec(void *); 238 239 static int 240 auacer_match(device_t parent, cfdata_t match, void *aux) 241 { 242 struct pci_attach_args *pa; 243 244 pa = (struct pci_attach_args *)aux; 245 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI && 246 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M5455) 247 return 1; 248 return 0; 249 } 250 251 static void 252 auacer_attach(device_t parent, device_t self, void *aux) 253 { 254 struct auacer_softc *sc; 255 struct pci_attach_args *pa; 256 pci_intr_handle_t ih; 257 bus_size_t aud_size; 258 pcireg_t v; 259 const char *intrstr; 260 int i; 261 262 sc = device_private(self); 263 pa = aux; 264 aprint_normal(": Acer Labs M5455 Audio controller\n"); 265 266 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->iot, 267 &sc->aud_ioh, NULL, &aud_size)) { 268 aprint_error(": can't map i/o space\n"); 269 return; 270 } 271 272 sc->sc_pc = pa->pa_pc; 273 sc->sc_pt = pa->pa_tag; 274 sc->dmat = pa->pa_dmat; 275 276 sc->sc_dmamap_flags = BUS_DMA_COHERENT; /* XXX remove */ 277 278 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 279 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); 280 281 /* enable bus mastering */ 282 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 283 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 284 v | PCI_COMMAND_MASTER_ENABLE); 285 286 /* Map and establish the interrupt. */ 287 if (pci_intr_map(pa, &ih)) { 288 aprint_error_dev(&sc->sc_dev, "can't map interrupt\n"); 289 mutex_destroy(&sc->sc_lock); 290 mutex_destroy(&sc->sc_intr_lock); 291 return; 292 } 293 intrstr = pci_intr_string(pa->pa_pc, ih); 294 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, 295 auacer_intr, sc); 296 if (sc->sc_ih == NULL) { 297 aprint_error_dev(&sc->sc_dev, "can't establish interrupt"); 298 if (intrstr != NULL) 299 aprint_error(" at %s", intrstr); 300 aprint_error("\n"); 301 mutex_destroy(&sc->sc_lock); 302 mutex_destroy(&sc->sc_intr_lock); 303 return; 304 } 305 aprint_normal_dev(&sc->sc_dev, "interrupting at %s\n", intrstr); 306 307 strlcpy(sc->sc_audev.name, "M5455 AC97", MAX_AUDIO_DEV_LEN); 308 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 309 "0x%02x", PCI_REVISION(pa->pa_class)); 310 strlcpy(sc->sc_audev.config, device_xname(&sc->sc_dev), MAX_AUDIO_DEV_LEN); 311 312 /* Set up DMA lists. */ 313 auacer_alloc_cdata(sc); 314 sc->sc_pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 315 sc->sc_pcmo.ptr = 0; 316 sc->sc_pcmo.port = ALI_BASE_PO; 317 318 DPRINTF(ALI_DEBUG_DMA, ("auacer_attach: lists %p\n", 319 sc->sc_pcmo.dmalist)); 320 321 sc->host_if.arg = sc; 322 sc->host_if.attach = auacer_attach_codec; 323 sc->host_if.read = auacer_read_codec; 324 sc->host_if.write = auacer_write_codec; 325 sc->host_if.reset = auacer_reset_codec; 326 327 if (ac97_attach(&sc->host_if, self, &sc->sc_lock) != 0) { 328 mutex_destroy(&sc->sc_lock); 329 mutex_destroy(&sc->sc_intr_lock); 330 return; 331 } 332 333 /* setup audio_format */ 334 memcpy(sc->sc_formats, auacer_formats, sizeof(auacer_formats)); 335 mutex_enter(&sc->sc_lock); 336 if (!AC97_IS_4CH(sc->codec_if)) 337 AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_4CH]); 338 if (!AC97_IS_6CH(sc->codec_if)) 339 AUFMT_INVALIDATE(&sc->sc_formats[AUACER_FORMATS_6CH]); 340 if (AC97_IS_FIXED_RATE(sc->codec_if)) { 341 for (i = 0; i < AUACER_NFORMATS; i++) { 342 sc->sc_formats[i].frequency_type = 1; 343 sc->sc_formats[i].frequency[0] = 48000; 344 } 345 } 346 mutex_exit(&sc->sc_lock); 347 348 if (0 != auconv_create_encodings(sc->sc_formats, AUACER_NFORMATS, 349 &sc->sc_encodings)) { 350 mutex_destroy(&sc->sc_lock); 351 mutex_destroy(&sc->sc_intr_lock); 352 return; 353 } 354 355 mutex_enter(&sc->sc_lock); 356 mutex_spin_enter(&sc->sc_intr_lock); 357 auacer_reset(sc); 358 mutex_spin_exit(&sc->sc_intr_lock); 359 mutex_exit(&sc->sc_lock); 360 361 audio_attach_mi(&auacer_hw_if, sc, &sc->sc_dev); 362 363 if (!pmf_device_register(self, NULL, auacer_resume)) 364 aprint_error_dev(self, "couldn't establish power handler\n"); 365 } 366 367 CFATTACH_DECL(auacer, sizeof(struct auacer_softc), 368 auacer_match, auacer_attach, NULL, NULL); 369 370 static int 371 auacer_ready_codec(struct auacer_softc *sc, int mask) 372 { 373 int count; 374 375 for (count = 0; count < 0x7f; count++) { 376 int val = READ1(sc, ALI_CSPSR); 377 if (val & mask) 378 return 0; 379 } 380 381 aprint_normal("auacer_ready_codec: AC97 codec ready timeout.\n"); 382 return EBUSY; 383 } 384 385 static int 386 auacer_sema_codec(struct auacer_softc *sc) 387 { 388 int ttime; 389 390 ttime = 100; 391 while (ttime-- && (READ4(sc, ALI_CAS) & ALI_CAS_SEM_BUSY)) 392 delay(1); 393 if (!ttime) 394 aprint_normal("auacer_sema_codec: timeout\n"); 395 return auacer_ready_codec(sc, ALI_CSPSR_CODEC_READY); 396 } 397 398 static int 399 auacer_read_codec(void *v, uint8_t reg, uint16_t *val) 400 { 401 struct auacer_softc *sc; 402 403 sc = v; 404 if (auacer_sema_codec(sc)) 405 return EIO; 406 407 reg |= ALI_CPR_ADDR_READ; 408 #if 0 409 if (ac97->num) 410 reg |= ALI_CPR_ADDR_SECONDARY; 411 #endif 412 WRITE2(sc, ALI_CPR_ADDR, reg); 413 if (auacer_ready_codec(sc, ALI_CSPSR_READ_OK)) 414 return EIO; 415 *val = READ2(sc, ALI_SPR); 416 417 DPRINTF(ALI_DEBUG_CODECIO, ("auacer_read_codec: reg=0x%x val=0x%x\n", 418 reg, *val)); 419 420 return 0; 421 } 422 423 int 424 auacer_write_codec(void *v, uint8_t reg, uint16_t val) 425 { 426 struct auacer_softc *sc; 427 428 DPRINTF(ALI_DEBUG_CODECIO, ("auacer_write_codec: reg=0x%x val=0x%x\n", 429 reg, val)); 430 sc = v; 431 if (auacer_sema_codec(sc)) 432 return EIO; 433 WRITE2(sc, ALI_CPR, val); 434 #if 0 435 if (ac97->num) 436 reg |= ALI_CPR_ADDR_SECONDARY; 437 #endif 438 WRITE2(sc, ALI_CPR_ADDR, reg); 439 auacer_ready_codec(sc, ALI_CSPSR_WRITE_OK); 440 return 0; 441 } 442 443 static int 444 auacer_attach_codec(void *v, struct ac97_codec_if *cif) 445 { 446 struct auacer_softc *sc; 447 448 sc = v; 449 sc->codec_if = cif; 450 return 0; 451 } 452 453 static int 454 auacer_reset_codec(void *v) 455 { 456 struct auacer_softc *sc; 457 uint32_t reg; 458 int i; 459 460 sc = v; 461 i = 0; 462 reg = READ4(sc, ALI_SCR); 463 if ((reg & 2) == 0) /* Cold required */ 464 reg |= 2; 465 else 466 reg |= 1; /* Warm */ 467 reg &= ~0x80000000; /* ACLink on */ 468 WRITE4(sc, ALI_SCR, reg); 469 470 while (i < 10) { 471 if ((READ4(sc, ALI_INTERRUPTSR) & ALI_INT_GPIO) == 0) 472 break; 473 delay(50000); /* XXX */ 474 i++; 475 } 476 if (i == 10) { 477 return EIO; 478 } 479 480 for (i = 0; i < 10; i++) { 481 reg = READ4(sc, ALI_RTSR); 482 if (reg & 0x80) /* primary codec */ 483 break; 484 WRITE4(sc, ALI_RTSR, reg | 0x80); 485 delay(50000); /* XXX */ 486 } 487 488 return 0; 489 } 490 491 static void 492 auacer_reset(struct auacer_softc *sc) 493 { 494 WRITE4(sc, ALI_SCR, ALI_SCR_RESET); 495 WRITE4(sc, ALI_FIFOCR1, 0x83838383); 496 WRITE4(sc, ALI_FIFOCR2, 0x83838383); 497 WRITE4(sc, ALI_FIFOCR3, 0x83838383); 498 WRITE4(sc, ALI_INTERFACECR, ALI_IF_PO); /* XXX pcm out only */ 499 WRITE4(sc, ALI_INTERRUPTCR, 0x00000000); 500 WRITE4(sc, ALI_INTERRUPTSR, 0x00000000); 501 } 502 503 static int 504 auacer_query_encoding(void *v, struct audio_encoding *aep) 505 { 506 struct auacer_softc *sc; 507 508 DPRINTF(ALI_DEBUG_API, ("auacer_query_encoding\n")); 509 sc = v; 510 return auconv_query_encoding(sc->sc_encodings, aep); 511 } 512 513 static int 514 auacer_set_rate(struct auacer_softc *sc, int mode, u_int srate) 515 { 516 int ret; 517 u_int ratetmp; 518 519 DPRINTF(ALI_DEBUG_API, ("auacer_set_rate: srate=%u\n", srate)); 520 521 ratetmp = srate; 522 if (mode == AUMODE_RECORD) 523 return sc->codec_if->vtbl->set_rate(sc->codec_if, 524 AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 525 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 526 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 527 if (ret) 528 return ret; 529 ratetmp = srate; 530 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 531 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 532 if (ret) 533 return ret; 534 ratetmp = srate; 535 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 536 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 537 return ret; 538 } 539 540 static int 541 auacer_set_params(void *v, int setmode, int usemode, 542 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 543 stream_filter_list_t *rfil) 544 { 545 struct auacer_softc *sc; 546 struct audio_params *p; 547 stream_filter_list_t *fil; 548 uint32_t control; 549 int mode, index; 550 551 DPRINTF(ALI_DEBUG_API, ("auacer_set_params\n")); 552 sc = v; 553 for (mode = AUMODE_RECORD; mode != -1; 554 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 555 if ((setmode & mode) == 0) 556 continue; 557 558 p = mode == AUMODE_PLAY ? play : rec; 559 if (p == NULL) 560 continue; 561 562 if ((p->sample_rate != 8000) && 563 (p->sample_rate != 11025) && 564 (p->sample_rate != 12000) && 565 (p->sample_rate != 16000) && 566 (p->sample_rate != 22050) && 567 (p->sample_rate != 24000) && 568 (p->sample_rate != 32000) && 569 (p->sample_rate != 44100) && 570 (p->sample_rate != 48000)) 571 return (EINVAL); 572 573 fil = mode == AUMODE_PLAY ? pfil : rfil; 574 index = auconv_set_converter(sc->sc_formats, AUACER_NFORMATS, 575 mode, p, TRUE, fil); 576 if (index < 0) 577 return EINVAL; 578 if (fil->req_size > 0) 579 p = &fil->filters[0].param; 580 /* p points HW encoding */ 581 if (sc->sc_formats[index].frequency_type != 1 582 && auacer_set_rate(sc, mode, p->sample_rate)) 583 return EINVAL; 584 if (mode == AUMODE_PLAY) { 585 control = READ4(sc, ALI_SCR); 586 control &= ~ALI_SCR_PCM_246_MASK; 587 if (p->channels == 4) 588 control |= ALI_SCR_PCM_4; 589 else if (p->channels == 6) 590 control |= ALI_SCR_PCM_6; 591 WRITE4(sc, ALI_SCR, control); 592 } 593 } 594 595 return (0); 596 } 597 598 static int 599 auacer_round_blocksize(void *v, int blk, int mode, 600 const audio_params_t *param) 601 { 602 603 return blk & ~0x3f; /* keep good alignment */ 604 } 605 606 static void 607 auacer_halt(struct auacer_softc *sc, struct auacer_chan *chan) 608 { 609 uint32_t val; 610 uint8_t port; 611 uint32_t slot; 612 613 port = chan->port; 614 DPRINTF(ALI_DEBUG_API, ("auacer_halt: port=0x%x\n", port)); 615 chan->intr = 0; 616 617 slot = ALI_PORT2SLOT(port); 618 619 val = READ4(sc, ALI_DMACR); 620 val |= 1 << (slot+16); /* pause */ 621 val &= ~(1 << slot); /* no start */ 622 WRITE4(sc, ALI_DMACR, val); 623 WRITE1(sc, port + ALI_OFF_CR, 0); 624 while (READ1(sc, port + ALI_OFF_CR)) 625 ; 626 /* reset whole DMA things */ 627 WRITE1(sc, port + ALI_OFF_CR, ALI_CR_RR); 628 /* clear interrupts */ 629 WRITE1(sc, port + ALI_OFF_SR, READ1(sc, port+ALI_OFF_SR) | ALI_SR_W1TC); 630 WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(port)); 631 } 632 633 static int 634 auacer_halt_output(void *v) 635 { 636 struct auacer_softc *sc; 637 638 DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_output\n")); 639 sc = v; 640 auacer_halt(sc, &sc->sc_pcmo); 641 642 return 0; 643 } 644 645 static int 646 auacer_halt_input(void *v) 647 { 648 DPRINTF(ALI_DEBUG_DMA, ("auacer_halt_input\n")); 649 650 return 0; 651 } 652 653 static int 654 auacer_getdev(void *v, struct audio_device *adp) 655 { 656 struct auacer_softc *sc; 657 658 DPRINTF(ALI_DEBUG_API, ("auacer_getdev\n")); 659 sc = v; 660 *adp = sc->sc_audev; 661 return 0; 662 } 663 664 static int 665 auacer_set_port(void *v, mixer_ctrl_t *cp) 666 { 667 struct auacer_softc *sc; 668 669 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_set_port\n")); 670 sc = v; 671 return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp); 672 } 673 674 static int 675 auacer_get_port(void *v, mixer_ctrl_t *cp) 676 { 677 struct auacer_softc *sc; 678 679 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_get_port\n")); 680 sc = v; 681 return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp); 682 } 683 684 static int 685 auacer_query_devinfo(void *v, mixer_devinfo_t *dp) 686 { 687 struct auacer_softc *sc; 688 689 DPRINTF(ALI_DEBUG_MIXERAPI, ("auacer_query_devinfo\n")); 690 sc = v; 691 return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp); 692 } 693 694 static void * 695 auacer_allocm(void *v, int direction, size_t size) 696 { 697 struct auacer_softc *sc; 698 struct auacer_dma *p; 699 int error; 700 701 if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX)) 702 return NULL; 703 704 p = kmem_zalloc(sizeof(*p), KM_SLEEP); 705 if (p == NULL) 706 return NULL; 707 sc = v; 708 error = auacer_allocmem(sc, size, 0, p); 709 if (error) { 710 kmem_free(p, sizeof(*p)); 711 return NULL; 712 } 713 714 p->next = sc->sc_dmas; 715 sc->sc_dmas = p; 716 717 return KERNADDR(p); 718 } 719 720 static void 721 auacer_freem(void *v, void *ptr, size_t size) 722 { 723 struct auacer_softc *sc; 724 struct auacer_dma *p, **pp; 725 726 sc = v; 727 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 728 if (KERNADDR(p) == ptr) { 729 auacer_freemem(sc, p); 730 *pp = p->next; 731 kmem_free(p, sizeof(*p)); 732 return; 733 } 734 } 735 } 736 737 static size_t 738 auacer_round_buffersize(void *v, int direction, size_t size) 739 { 740 741 if (size > (ALI_DMALIST_MAX * ALI_DMASEG_MAX)) 742 size = ALI_DMALIST_MAX * ALI_DMASEG_MAX; 743 744 return size; 745 } 746 747 static paddr_t 748 auacer_mappage(void *v, void *mem, off_t off, int prot) 749 { 750 struct auacer_softc *sc; 751 struct auacer_dma *p; 752 753 if (off < 0) 754 return -1; 755 sc = v; 756 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 757 continue; 758 if (p == NULL) 759 return -1; 760 return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 761 off, prot, BUS_DMA_WAITOK); 762 } 763 764 static int 765 auacer_get_props(void *v) 766 { 767 struct auacer_softc *sc; 768 int props; 769 770 sc = v; 771 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 772 /* 773 * Even if the codec is fixed-rate, set_param() succeeds for any sample 774 * rate because of aurateconv. Applications can't know what rate the 775 * device can process in the case of mmap(). 776 */ 777 if (!AC97_IS_FIXED_RATE(sc->codec_if)) 778 props |= AUDIO_PROP_MMAP; 779 return props; 780 } 781 782 static void 783 auacer_get_locks(void *v, kmutex_t **intr, kmutex_t **proc) 784 { 785 struct auacer_softc *sc; 786 787 sc = v; 788 *intr = &sc->sc_intr_lock; 789 *proc = &sc->sc_lock; 790 } 791 792 static void 793 auacer_add_entry(struct auacer_chan *chan) 794 { 795 struct auacer_dmalist *q; 796 797 q = &chan->dmalist[chan->ptr]; 798 799 DPRINTF(ALI_DEBUG_INTR, 800 ("auacer_add_entry: %p = %x @ 0x%x\n", 801 q, chan->blksize / 2, chan->p)); 802 803 q->base = htole32(chan->p); 804 q->len = htole32((chan->blksize / ALI_SAMPLE_SIZE) | ALI_DMAF_IOC); 805 chan->p += chan->blksize; 806 if (chan->p >= chan->end) 807 chan->p = chan->start; 808 809 if (++chan->ptr >= ALI_DMALIST_MAX) 810 chan->ptr = 0; 811 } 812 813 static void 814 auacer_upd_chan(struct auacer_softc *sc, struct auacer_chan *chan) 815 { 816 uint32_t sts; 817 uint32_t civ; 818 819 sts = READ2(sc, chan->port + ALI_OFF_SR); 820 /* intr ack */ 821 WRITE2(sc, chan->port + ALI_OFF_SR, sts & ALI_SR_W1TC); 822 WRITE4(sc, ALI_INTERRUPTSR, ALI_PORT2INTR(chan->port)); 823 824 DPRINTF(ALI_DEBUG_INTR, ("auacer_upd_chan: sts=0x%x\n", sts)); 825 826 if (sts & ALI_SR_DMA_INT_FIFO) { 827 printf("%s: fifo underrun # %u\n", 828 device_xname(&sc->sc_dev), ++chan->fifoe); 829 } 830 831 civ = READ1(sc, chan->port + ALI_OFF_CIV); 832 833 DPRINTF(ALI_DEBUG_INTR,("auacer_intr: civ=%u ptr=%u\n",civ,chan->ptr)); 834 835 /* XXX */ 836 while (chan->ptr != civ) { 837 auacer_add_entry(chan); 838 } 839 840 WRITE1(sc, chan->port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK); 841 842 while (chan->ack != civ) { 843 if (chan->intr) { 844 DPRINTF(ALI_DEBUG_INTR,("auacer_upd_chan: callback\n")); 845 chan->intr(chan->arg); 846 } 847 chan->ack++; 848 if (chan->ack >= ALI_DMALIST_MAX) 849 chan->ack = 0; 850 } 851 } 852 853 static int 854 auacer_intr(void *v) 855 { 856 struct auacer_softc *sc; 857 int ret, intrs; 858 859 sc = v; 860 861 DPRINTF(ALI_DEBUG_INTR, ("auacer_intr: intrs=0x%x\n", 862 READ4(sc, ALI_INTERRUPTSR))); 863 864 mutex_spin_enter(&sc->sc_intr_lock); 865 intrs = READ4(sc, ALI_INTERRUPTSR); 866 ret = 0; 867 if (intrs & ALI_INT_PCMOUT) { 868 auacer_upd_chan(sc, &sc->sc_pcmo); 869 ret++; 870 } 871 mutex_spin_exit(&sc->sc_intr_lock); 872 873 return ret != 0; 874 } 875 876 static void 877 auacer_setup_chan(struct auacer_softc *sc, struct auacer_chan *chan, 878 uint32_t start, uint32_t size, uint32_t blksize, 879 void (*intr)(void *), void *arg) 880 { 881 uint32_t port, slot; 882 uint32_t offs, val; 883 884 chan->start = start; 885 chan->ptr = 0; 886 chan->p = chan->start; 887 chan->end = chan->start + size; 888 chan->blksize = blksize; 889 chan->ack = 0; 890 chan->intr = intr; 891 chan->arg = arg; 892 893 auacer_add_entry(chan); 894 auacer_add_entry(chan); 895 896 port = chan->port; 897 slot = ALI_PORT2SLOT(port); 898 899 WRITE1(sc, port + ALI_OFF_CIV, 0); 900 WRITE1(sc, port + ALI_OFF_LVI, (chan->ptr - 1) & ALI_LVI_MASK); 901 offs = (char *)chan->dmalist - (char *)sc->sc_cdata; 902 WRITE4(sc, port + ALI_OFF_BDBAR, sc->sc_cddma + offs); 903 WRITE1(sc, port + ALI_OFF_CR, 904 ALI_CR_IOCE | ALI_CR_FEIE | ALI_CR_LVBIE | ALI_CR_RPBM); 905 val = READ4(sc, ALI_DMACR); 906 val &= ~(1 << (slot+16)); /* no pause */ 907 val |= 1 << slot; /* start */ 908 WRITE4(sc, ALI_DMACR, val); 909 } 910 911 static int 912 auacer_trigger_output(void *v, void *start, void *end, int blksize, 913 void (*intr)(void *), void *arg, const audio_params_t *param) 914 { 915 struct auacer_softc *sc; 916 struct auacer_dma *p; 917 uint32_t size; 918 919 DPRINTF(ALI_DEBUG_DMA, 920 ("auacer_trigger_output(%p, %p, %d, %p, %p, %p)\n", 921 start, end, blksize, intr, arg, param)); 922 sc = v; 923 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 924 continue; 925 if (!p) { 926 printf("auacer_trigger_output: bad addr %p\n", start); 927 return (EINVAL); 928 } 929 930 size = (char *)end - (char *)start; 931 auacer_setup_chan(sc, &sc->sc_pcmo, DMAADDR(p), size, blksize, 932 intr, arg); 933 934 return 0; 935 } 936 937 static int 938 auacer_trigger_input(void *v, void *start, void *end, 939 int blksize, void (*intr)(void *), void *arg, 940 const audio_params_t *param) 941 { 942 return EINVAL; 943 } 944 945 static int 946 auacer_allocmem(struct auacer_softc *sc, size_t size, size_t align, 947 struct auacer_dma *p) 948 { 949 int error; 950 951 p->size = size; 952 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 953 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 954 &p->nsegs, BUS_DMA_WAITOK); 955 if (error) 956 return error; 957 958 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 959 &p->addr, BUS_DMA_WAITOK|sc->sc_dmamap_flags); 960 if (error) 961 goto free; 962 963 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 964 0, BUS_DMA_WAITOK, &p->map); 965 if (error) 966 goto unmap; 967 968 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 969 BUS_DMA_WAITOK); 970 if (error) 971 goto destroy; 972 return (0); 973 974 destroy: 975 bus_dmamap_destroy(sc->dmat, p->map); 976 unmap: 977 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 978 free: 979 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 980 return error; 981 } 982 983 static int 984 auacer_freemem(struct auacer_softc *sc, struct auacer_dma *p) 985 { 986 987 bus_dmamap_unload(sc->dmat, p->map); 988 bus_dmamap_destroy(sc->dmat, p->map); 989 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 990 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 991 return 0; 992 } 993 994 static int 995 auacer_alloc_cdata(struct auacer_softc *sc) 996 { 997 bus_dma_segment_t seg; 998 int error, rseg; 999 1000 /* 1001 * Allocate the control data structure, and create and load the 1002 * DMA map for it. 1003 */ 1004 if ((error = bus_dmamem_alloc(sc->dmat, 1005 sizeof(struct auacer_cdata), 1006 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1007 aprint_error_dev(&sc->sc_dev, "unable to allocate control data, error = %d\n", 1008 error); 1009 goto fail_0; 1010 } 1011 1012 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1013 sizeof(struct auacer_cdata), 1014 (void **) &sc->sc_cdata, 1015 sc->sc_dmamap_flags)) != 0) { 1016 aprint_error_dev(&sc->sc_dev, "unable to map control data, error = %d\n", 1017 error); 1018 goto fail_1; 1019 } 1020 1021 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auacer_cdata), 1, 1022 sizeof(struct auacer_cdata), 0, 0, 1023 &sc->sc_cddmamap)) != 0) { 1024 aprint_error_dev(&sc->sc_dev, "unable to create control data DMA map, " 1025 "error = %d\n", error); 1026 goto fail_2; 1027 } 1028 1029 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1030 sc->sc_cdata, sizeof(struct auacer_cdata), 1031 NULL, 0)) != 0) { 1032 aprint_error_dev(&sc->sc_dev, "unable to load control data DMA map, " 1033 "error = %d\n", error); 1034 goto fail_3; 1035 } 1036 1037 return 0; 1038 1039 fail_3: 1040 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1041 fail_2: 1042 bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata, 1043 sizeof(struct auacer_cdata)); 1044 fail_1: 1045 bus_dmamem_free(sc->dmat, &seg, rseg); 1046 fail_0: 1047 return error; 1048 } 1049 1050 static bool 1051 auacer_resume(device_t dv, const pmf_qual_t *qual) 1052 { 1053 struct auacer_softc *sc = device_private(dv); 1054 1055 mutex_enter(&sc->sc_lock); 1056 mutex_spin_enter(&sc->sc_intr_lock); 1057 auacer_reset_codec(sc); 1058 mutex_spin_exit(&sc->sc_intr_lock); 1059 delay(1000); 1060 sc->codec_if->vtbl->restore_ports(sc->codec_if); 1061 mutex_exit(&sc->sc_lock); 1062 1063 return true; 1064 } 1065
Indexes created Fri Oct 03 02:09:57 GMT 2025