auich.c revision 1.116.2.1
1 /* $NetBSD: auich.c,v 1.116.2.1 2007/02/27 14:16:13 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2004, 2005, 2006, 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 2000 Michael Shalayeff 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. The name of the author may not be used to endorse or promote products 52 * derived from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 57 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 58 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 59 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 60 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 61 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 62 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 63 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 64 * THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 67 */ 68 69 /* 70 * Copyright (c) 2000 Katsurajima Naoto <raven (at) katsurajima.seya.yokohama.jp> 71 * Copyright (c) 2001 Cameron Grant <cg (at) freebsd.org> 72 * All rights reserved. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce the above copyright 80 * notice, this list of conditions and the following disclaimer in the 81 * documentation and/or other materials provided with the distribution. 82 * 83 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 84 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 85 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 86 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 87 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 88 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 89 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 90 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT 91 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 92 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF 93 * SUCH DAMAGE. 94 * 95 * auich_calibrate() was from FreeBSD: ich.c,v 1.22 2002/06/27 22:36:01 scottl Exp 96 */ 97 98 99 /* #define AUICH_DEBUG */ 100 /* 101 * AC'97 audio found on Intel 810/820/440MX chipsets. 102 * http://developer.intel.com/design/chipsets/datashts/290655.htm 103 * http://developer.intel.com/design/chipsets/manuals/298028.htm 104 * ICH3:http://www.intel.com/design/chipsets/datashts/290716.htm 105 * ICH4:http://www.intel.com/design/chipsets/datashts/290744.htm 106 * ICH5:http://www.intel.com/design/chipsets/datashts/252516.htm 107 * AMD8111: 108 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24674.pdf 109 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25720.pdf 110 * 111 * TODO: 112 * - Add support for the dedicated microphone input. 113 * 114 * NOTE: 115 * - The 440MX B-stepping at running 100MHz has a hardware erratum. 116 * It causes PCI master abort and hangups until cold reboot. 117 * http://www.intel.com/design/chipsets/specupdt/245051.htm 118 */ 119 120 #include <sys/cdefs.h> 121 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.116.2.1 2007/02/27 14:16:13 ad Exp $"); 122 123 #include <sys/param.h> 124 #include <sys/systm.h> 125 #include <sys/kernel.h> 126 #include <sys/malloc.h> 127 #include <sys/device.h> 128 #include <sys/fcntl.h> 129 #include <sys/proc.h> 130 #include <sys/sysctl.h> 131 132 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 133 134 #include <dev/pci/pcidevs.h> 135 #include <dev/pci/pcivar.h> 136 #include <dev/pci/auichreg.h> 137 138 #include <sys/audioio.h> 139 #include <dev/audio_if.h> 140 #include <dev/mulaw.h> 141 #include <dev/auconv.h> 142 143 #include <machine/bus.h> 144 145 #include <dev/ic/ac97reg.h> 146 #include <dev/ic/ac97var.h> 147 148 struct auich_dma { 149 bus_dmamap_t map; 150 caddr_t addr; 151 bus_dma_segment_t segs[1]; 152 int nsegs; 153 size_t size; 154 struct auich_dma *next; 155 }; 156 157 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 158 #define KERNADDR(p) ((void *)((p)->addr)) 159 160 struct auich_cdata { 161 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX]; 162 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX]; 163 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX]; 164 }; 165 166 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x) 167 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)]) 168 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)]) 169 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)]) 170 171 struct auich_softc { 172 struct device sc_dev; 173 void *sc_ih; 174 kmutex_t sc_lock; 175 kmutex_t sc_intr_lock; 176 177 struct device *sc_audiodev; 178 audio_device_t sc_audev; 179 180 pci_chipset_tag_t sc_pc; 181 pcitag_t sc_pt; 182 bus_space_tag_t iot; 183 bus_space_handle_t mix_ioh; 184 bus_size_t mix_size; 185 bus_space_handle_t aud_ioh; 186 bus_size_t aud_size; 187 bus_dma_tag_t dmat; 188 pci_intr_handle_t intrh; 189 190 struct ac97_codec_if *codec_if; 191 struct ac97_host_if host_if; 192 int sc_codecnum; 193 int sc_codectype; 194 enum ac97_host_flags sc_codecflags; 195 bool sc_spdif; 196 197 /* DMA scatter-gather lists. */ 198 bus_dmamap_t sc_cddmamap; 199 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 200 201 struct auich_cdata *sc_cdata; 202 203 struct auich_ring { 204 int qptr; 205 struct auich_dmalist *dmalist; 206 207 uint32_t start, p, end; 208 int blksize; 209 210 void (*intr)(void *); 211 void *arg; 212 } pcmo, pcmi, mici; 213 214 struct auich_dma *sc_dmas; 215 216 /* SiS 7012 hack */ 217 int sc_sample_shift; 218 int sc_sts_reg; 219 /* 440MX workaround */ 220 int sc_dmamap_flags; 221 222 /* Power Management */ 223 void *sc_powerhook; 224 int sc_suspend; 225 int sc_powerstate; 226 struct pci_conf_state sc_pciconf; 227 228 /* sysctl */ 229 struct sysctllog *sc_log; 230 uint32_t sc_ac97_clock; 231 int sc_ac97_clock_mib; 232 233 int sc_modem_offset; 234 235 #define AUICH_AUDIO_NFORMATS 3 236 #define AUICH_MODEM_NFORMATS 1 237 struct audio_format sc_audio_formats[AUICH_AUDIO_NFORMATS]; 238 struct audio_format sc_modem_formats[AUICH_MODEM_NFORMATS]; 239 struct audio_encoding_set *sc_encodings; 240 struct audio_encoding_set *sc_spdif_encodings; 241 }; 242 243 /* Debug */ 244 #ifdef AUICH_DEBUG 245 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0) 246 int auich_debug = 0xfffe; 247 #define ICH_DEBUG_CODECIO 0x0001 248 #define ICH_DEBUG_DMA 0x0002 249 #define ICH_DEBUG_INTR 0x0004 250 #else 251 #define DPRINTF(x,y) /* nothing */ 252 #endif 253 254 static int auich_match(struct device *, struct cfdata *, void *); 255 static void auich_attach(struct device *, struct device *, void *); 256 static int auich_detach(struct device *, int); 257 static int auich_activate(struct device *, enum devact); 258 static int auich_intr(void *); 259 260 CFATTACH_DECL(auich, sizeof(struct auich_softc), 261 auich_match, auich_attach, auich_detach, auich_activate); 262 263 static int auich_open(void *, int); 264 static void auich_close(void *); 265 static int auich_query_encoding(void *, struct audio_encoding *); 266 static int auich_set_params(void *, int, int, audio_params_t *, 267 audio_params_t *, stream_filter_list_t *, 268 stream_filter_list_t *); 269 static int auich_round_blocksize(void *, int, int, const audio_params_t *); 270 static void auich_halt_pipe(struct auich_softc *, int); 271 static int auich_halt_output(void *); 272 static int auich_halt_input(void *); 273 static int auich_getdev(void *, struct audio_device *); 274 static int auich_set_port(void *, mixer_ctrl_t *); 275 static int auich_get_port(void *, mixer_ctrl_t *); 276 static int auich_query_devinfo(void *, mixer_devinfo_t *); 277 static void *auich_allocm(void *, int, size_t, struct malloc_type *, int); 278 static void auich_freem(void *, void *, struct malloc_type *); 279 static size_t auich_round_buffersize(void *, int, size_t); 280 static paddr_t auich_mappage(void *, void *, off_t, int); 281 static int auich_get_props(void *); 282 static void auich_trigger_pipe(struct auich_softc *, int, struct auich_ring *); 283 static void auich_intr_pipe(struct auich_softc *, int, struct auich_ring *); 284 static int auich_trigger_output(void *, void *, void *, int, 285 void (*)(void *), void *, const audio_params_t *); 286 static int auich_trigger_input(void *, void *, void *, int, 287 void (*)(void *), void *, const audio_params_t *); 288 static int auich_powerstate(void *, int); 289 static void auich_get_locks(void *, kmutex_t **, kmutex_t **); 290 291 static int auich_alloc_cdata(struct auich_softc *); 292 293 static int auich_allocmem(struct auich_softc *, size_t, size_t, 294 struct auich_dma *); 295 static int auich_freemem(struct auich_softc *, struct auich_dma *); 296 297 static void auich_powerhook(int, void *); 298 static int auich_set_rate(struct auich_softc *, int, u_long); 299 static int auich_sysctl_verify(SYSCTLFN_ARGS); 300 static void auich_finish_attach(struct device *); 301 static void auich_calibrate(struct auich_softc *); 302 static void auich_clear_cas(struct auich_softc *); 303 304 static int auich_attach_codec(void *, struct ac97_codec_if *); 305 static int auich_read_codec(void *, uint8_t, uint16_t *); 306 static int auich_write_codec(void *, uint8_t, uint16_t); 307 static int auich_reset_codec(void *); 308 static enum ac97_host_flags auich_flags_codec(void *); 309 static void auich_spdif_event(void *, bool); 310 311 static const struct audio_hw_if auich_hw_if = { 312 auich_open, 313 auich_close, 314 NULL, /* drain */ 315 auich_query_encoding, 316 auich_set_params, 317 auich_round_blocksize, 318 NULL, /* commit_setting */ 319 NULL, /* init_output */ 320 NULL, /* init_input */ 321 NULL, /* start_output */ 322 NULL, /* start_input */ 323 auich_halt_output, 324 auich_halt_input, 325 NULL, /* speaker_ctl */ 326 auich_getdev, 327 NULL, /* getfd */ 328 auich_set_port, 329 auich_get_port, 330 auich_query_devinfo, 331 auich_allocm, 332 auich_freem, 333 auich_round_buffersize, 334 auich_mappage, 335 auich_get_props, 336 auich_trigger_output, 337 auich_trigger_input, 338 NULL, /* dev_ioctl */ 339 auich_powerstate, 340 auich_get_locks, 341 }; 342 343 #define AUICH_FORMATS_1CH 0 344 #define AUICH_FORMATS_4CH 1 345 #define AUICH_FORMATS_6CH 2 346 static const struct audio_format auich_audio_formats[AUICH_AUDIO_NFORMATS] = { 347 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 348 2, AUFMT_STEREO, 0, {8000, 48000}}, 349 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 350 4, AUFMT_SURROUND4, 0, {8000, 48000}}, 351 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 352 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}}, 353 }; 354 355 #define AUICH_SPDIF_NFORMATS 1 356 static const struct audio_format auich_spdif_formats[AUICH_SPDIF_NFORMATS] = { 357 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 358 2, AUFMT_STEREO, 1, {48000}}, 359 }; 360 361 static const struct audio_format auich_modem_formats[AUICH_MODEM_NFORMATS] = { 362 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 363 1, AUFMT_MONAURAL, 0, {8000, 16000}}, 364 }; 365 366 #define PCI_ID_CODE0(v, p) PCI_ID_CODE(PCI_VENDOR_##v, PCI_PRODUCT_##v##_##p) 367 #define PCIID_ICH PCI_ID_CODE0(INTEL, 82801AA_ACA) 368 #define PCIID_ICH0 PCI_ID_CODE0(INTEL, 82801AB_ACA) 369 #define PCIID_ICH2 PCI_ID_CODE0(INTEL, 82801BA_ACA) 370 #define PCIID_440MX PCI_ID_CODE0(INTEL, 82440MX_ACA) 371 #define PCIID_ICH3 PCI_ID_CODE0(INTEL, 82801CA_AC) 372 #define PCIID_ICH4 PCI_ID_CODE0(INTEL, 82801DB_AC) 373 #define PCIID_ICH5 PCI_ID_CODE0(INTEL, 82801EB_AC) 374 #define PCIID_ICH6 PCI_ID_CODE0(INTEL, 82801FB_AC) 375 #define PCIID_ICH7 PCI_ID_CODE0(INTEL, 82801G_ACA) 376 #define PCIID_I6300ESB PCI_ID_CODE0(INTEL, 6300ESB_ACA) 377 #define PCIID_SIS7012 PCI_ID_CODE0(SIS, 7012_AC) 378 #define PCIID_NFORCE PCI_ID_CODE0(NVIDIA, NFORCE_MCP_AC) 379 #define PCIID_NFORCE2 PCI_ID_CODE0(NVIDIA, NFORCE2_MCPT_AC) 380 #define PCIID_NFORCE2_400 PCI_ID_CODE0(NVIDIA, NFORCE2_400_MCPT_AC) 381 #define PCIID_NFORCE3 PCI_ID_CODE0(NVIDIA, NFORCE3_MCPT_AC) 382 #define PCIID_NFORCE3_250 PCI_ID_CODE0(NVIDIA, NFORCE3_250_MCPT_AC) 383 #define PCIID_NFORCE4 PCI_ID_CODE0(NVIDIA, NFORCE4_AC) 384 #define PCIID_NFORCE430 PCI_ID_CODE0(NVIDIA, NFORCE430_AC) 385 #define PCIID_AMD768 PCI_ID_CODE0(AMD, PBC768_AC) 386 #define PCIID_AMD8111 PCI_ID_CODE0(AMD, PBC8111_AC) 387 388 #define PCIID_ICH3MODEM PCI_ID_CODE0(INTEL, 82801CA_MOD) 389 #define PCIID_ICH4MODEM PCI_ID_CODE0(INTEL, 82801DB_MOD) 390 391 struct auich_devtype { 392 pcireg_t id; 393 const char *name; 394 const char *shortname; /* must be less than 11 characters */ 395 }; 396 397 static const struct auich_devtype auich_audio_devices[] = { 398 { PCIID_ICH, "i82801AA (ICH) AC-97 Audio", "ICH" }, 399 { PCIID_ICH0, "i82801AB (ICH0) AC-97 Audio", "ICH0" }, 400 { PCIID_ICH2, "i82801BA (ICH2) AC-97 Audio", "ICH2" }, 401 { PCIID_440MX, "i82440MX AC-97 Audio", "440MX" }, 402 { PCIID_ICH3, "i82801CA (ICH3) AC-97 Audio", "ICH3" }, 403 { PCIID_ICH4, "i82801DB/DBM (ICH4/ICH4M) AC-97 Audio", "ICH4" }, 404 { PCIID_ICH5, "i82801EB (ICH5) AC-97 Audio", "ICH5" }, 405 { PCIID_ICH6, "i82801FB (ICH6) AC-97 Audio", "ICH6" }, 406 { PCIID_ICH7, "i82801GB/GR (ICH7) AC-97 Audio", "ICH7" }, 407 { PCIID_I6300ESB, "Intel 6300ESB AC-97 Audio", "I6300ESB" }, 408 { PCIID_SIS7012, "SiS 7012 AC-97 Audio", "SiS7012" }, 409 { PCIID_NFORCE, "nForce MCP AC-97 Audio", "nForce" }, 410 { PCIID_NFORCE2, "nForce2 MCP-T AC-97 Audio", "nForce2" }, 411 { PCIID_NFORCE2_400, "nForce2 400 MCP-T AC-97 Audio", "nForce2" }, 412 { PCIID_NFORCE3, "nForce3 MCP-T AC-97 Audio", "nForce3" }, 413 { PCIID_NFORCE3_250, "nForce3 250 MCP-T AC-97 Audio", "nForce3" }, 414 { PCIID_NFORCE4, "nForce4 AC-97 Audio", "nForce4" }, 415 { PCIID_NFORCE430, "nForce430 (MCP51) AC-97 Audio", "nForce430" }, 416 { PCIID_AMD768, "AMD768 AC-97 Audio", "AMD768" }, 417 { PCIID_AMD8111,"AMD8111 AC-97 Audio", "AMD8111" }, 418 { 0, NULL, NULL }, 419 }; 420 421 static const struct auich_devtype auich_modem_devices[] = { 422 #ifdef AUICH_ATTACH_MODEM 423 { PCIID_ICH3MODEM, "i82801CA (ICH3) AC-97 Modem", "ICH3MODEM" }, 424 { PCIID_ICH4MODEM, "i82801DB (ICH4) AC-97 Modem", "ICH4MODEM" }, 425 #endif 426 { 0, NULL, NULL }, 427 }; 428 429 static const struct auich_devtype * 430 auich_lookup(struct pci_attach_args *pa, const struct auich_devtype *auich_devices) 431 { 432 const struct auich_devtype *d; 433 434 for (d = auich_devices; d->name != NULL; d++) { 435 if (pa->pa_id == d->id) 436 return d; 437 } 438 439 return NULL; 440 } 441 442 static int 443 auich_match(struct device *parent, struct cfdata *match, 444 void *aux) 445 { 446 struct pci_attach_args *pa; 447 448 pa = aux; 449 if (auich_lookup(pa, auich_audio_devices) != NULL) 450 return 1; 451 if (auich_lookup(pa, auich_modem_devices) != NULL) 452 return 1; 453 454 return 0; 455 } 456 457 static void 458 auich_attach(struct device *parent, struct device *self, void *aux) 459 { 460 struct auich_softc *sc; 461 struct pci_attach_args *pa; 462 pcireg_t v, subdev; 463 const char *intrstr; 464 const struct auich_devtype *d; 465 const struct sysctlnode *node, *node_ac97clock; 466 int err, node_mib, i; 467 468 sc = (struct auich_softc *)self; 469 pa = aux; 470 471 if ((d = auich_lookup(pa, auich_modem_devices)) != NULL) { 472 sc->sc_modem_offset = 0x10; 473 sc->sc_codectype = AC97_CODEC_TYPE_MODEM; 474 } else if ((d = auich_lookup(pa, auich_audio_devices)) != NULL) { 475 sc->sc_modem_offset = 0; 476 sc->sc_codectype = AC97_CODEC_TYPE_AUDIO; 477 } else 478 panic("auich_attach: impossible"); 479 480 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 481 aprint_naive(": Audio controller\n"); 482 else 483 aprint_naive(": Modem controller\n"); 484 485 sc->sc_pc = pa->pa_pc; 486 sc->sc_pt = pa->pa_tag; 487 488 aprint_normal(": %s\n", d->name); 489 490 if (d->id == PCIID_ICH4 || d->id == PCIID_ICH5 || d->id == PCIID_ICH6 491 || d->id == PCIID_ICH7 || d->id == PCIID_I6300ESB 492 || d->id == PCIID_ICH4MODEM) { 493 /* 494 * Use native mode for Intel 6300ESB and ICH4/ICH5/ICH6/ICH7 495 */ 496 if (pci_mapreg_map(pa, ICH_MMBAR, PCI_MAPREG_TYPE_MEM, 0, 497 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 498 v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG); 499 pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG, 500 v | ICH_CFG_IOSE); 501 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 502 0, &sc->iot, &sc->mix_ioh, NULL, 503 &sc->mix_size)) { 504 aprint_error("%s: can't map codec i/o space\n", 505 sc->sc_dev.dv_xname); 506 return; 507 } 508 } 509 if (pci_mapreg_map(pa, ICH_MBBAR, PCI_MAPREG_TYPE_MEM, 0, 510 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 511 v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG); 512 pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG, 513 v | ICH_CFG_IOSE); 514 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 515 0, &sc->iot, &sc->aud_ioh, NULL, 516 &sc->aud_size)) { 517 aprint_error("%s: can't map device i/o space\n", 518 sc->sc_dev.dv_xname); 519 return; 520 } 521 } 522 } else { 523 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0, 524 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) { 525 aprint_error("%s: can't map codec i/o space\n", 526 sc->sc_dev.dv_xname); 527 return; 528 } 529 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0, 530 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) { 531 aprint_error("%s: can't map device i/o space\n", 532 sc->sc_dev.dv_xname); 533 return; 534 } 535 } 536 sc->dmat = pa->pa_dmat; 537 538 /* enable bus mastering */ 539 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 540 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 541 v | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_BACKTOBACK_ENABLE); 542 543 mutex_init(&sc->sc_lock, MUTEX_DRIVER, IPL_NONE); 544 mutex_init(&sc->sc_intr_lock, MUTEX_DRIVER, IPL_AUDIO); 545 546 /* Map and establish the interrupt. */ 547 if (pci_intr_map(pa, &sc->intrh)) { 548 aprint_error("%s: can't map interrupt\n", sc->sc_dev.dv_xname); 549 return; 550 } 551 intrstr = pci_intr_string(pa->pa_pc, sc->intrh); 552 sc->sc_ih = pci_intr_establish(pa->pa_pc, sc->intrh, IPL_AUDIO, 553 auich_intr, sc); 554 if (sc->sc_ih == NULL) { 555 aprint_error("%s: can't establish interrupt", 556 sc->sc_dev.dv_xname); 557 if (intrstr != NULL) 558 aprint_normal(" at %s", intrstr); 559 aprint_normal("\n"); 560 return; 561 } 562 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 563 564 snprintf(sc->sc_audev.name, MAX_AUDIO_DEV_LEN, "%s AC97", d->shortname); 565 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN, 566 "0x%02x", PCI_REVISION(pa->pa_class)); 567 strlcpy(sc->sc_audev.config, sc->sc_dev.dv_xname, MAX_AUDIO_DEV_LEN); 568 569 /* SiS 7012 needs special handling */ 570 if (d->id == PCIID_SIS7012) { 571 sc->sc_sts_reg = ICH_PICB; 572 sc->sc_sample_shift = 0; 573 /* Un-mute output. From Linux. */ 574 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL, 575 bus_space_read_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL) | 576 ICH_SIS_CTL_UNMUTE); 577 } else { 578 sc->sc_sts_reg = ICH_STS; 579 sc->sc_sample_shift = 1; 580 } 581 582 /* Workaround for a 440MX B-stepping erratum */ 583 sc->sc_dmamap_flags = BUS_DMA_COHERENT; 584 if (d->id == PCIID_440MX) { 585 sc->sc_dmamap_flags |= BUS_DMA_NOCACHE; 586 printf("%s: DMA bug workaround enabled\n", sc->sc_dev.dv_xname); 587 } 588 589 /* Set up DMA lists. */ 590 sc->pcmo.qptr = sc->pcmi.qptr = sc->mici.qptr = 0; 591 auich_alloc_cdata(sc); 592 593 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n", 594 sc->pcmo.dmalist, sc->pcmi.dmalist, sc->mici.dmalist)); 595 596 /* Modem codecs are always the secondary codec on ICH */ 597 sc->sc_codecnum = sc->sc_codectype == AC97_CODEC_TYPE_MODEM ? 1 : 0; 598 599 sc->host_if.arg = sc; 600 sc->host_if.attach = auich_attach_codec; 601 sc->host_if.read = auich_read_codec; 602 sc->host_if.write = auich_write_codec; 603 sc->host_if.reset = auich_reset_codec; 604 sc->host_if.flags = auich_flags_codec; 605 sc->host_if.spdif_event = auich_spdif_event; 606 607 subdev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 608 switch (subdev) { 609 case 0x202f161f: /* Gateway 7326GZ */ 610 case 0x203a161f: /* Gateway 4028GZ */ 611 case 0x204c161f: /* Kvazar-Micro Senator 3592XT */ 612 case 0x8144104d: /* Sony VAIO PCG-TR* */ 613 case 0x8197104d: /* Sony S1XP */ 614 case 0x81c0104d: /* Sony VAIO type T */ 615 case 0x81c5104d: /* Sony VAIO VGN-B1XP */ 616 sc->sc_codecflags = AC97_HOST_INVERTED_EAMP; 617 break; 618 default: 619 sc->sc_codecflags = 0; 620 break; 621 } 622 623 if (ac97_attach_type(&sc->host_if, self, sc->sc_codectype, 624 &sc->sc_lock) != 0) 625 return; 626 sc->codec_if->vtbl->unlock(sc->codec_if); 627 628 /* setup audio_format */ 629 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 630 memcpy(sc->sc_audio_formats, auich_audio_formats, sizeof(auich_audio_formats)); 631 if (!AC97_IS_4CH(sc->codec_if)) 632 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_4CH]); 633 if (!AC97_IS_6CH(sc->codec_if)) 634 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_6CH]); 635 if (AC97_IS_FIXED_RATE(sc->codec_if)) { 636 for (i = 0; i < AUICH_AUDIO_NFORMATS; i++) { 637 sc->sc_audio_formats[i].frequency_type = 1; 638 sc->sc_audio_formats[i].frequency[0] = 48000; 639 } 640 } 641 if (0 != auconv_create_encodings(sc->sc_audio_formats, AUICH_AUDIO_NFORMATS, 642 &sc->sc_encodings)) 643 return; 644 if (0 != auconv_create_encodings(auich_spdif_formats, AUICH_SPDIF_NFORMATS, 645 &sc->sc_spdif_encodings)) 646 return; 647 } else { 648 memcpy(sc->sc_modem_formats, auich_modem_formats, sizeof(auich_modem_formats)); 649 if (0 != auconv_create_encodings(sc->sc_modem_formats, AUICH_MODEM_NFORMATS, 650 &sc->sc_encodings)) 651 return; 652 } 653 654 655 /* Watch for power change */ 656 sc->sc_suspend = PWR_RESUME; 657 sc->sc_powerhook = powerhook_establish(sc->sc_dev.dv_xname, 658 auich_powerhook, sc); 659 660 config_interrupts(self, auich_finish_attach); 661 662 /* sysctl setup */ 663 if (AC97_IS_FIXED_RATE(sc->codec_if) && 664 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 665 return; 666 667 err = sysctl_createv(&sc->sc_log, 0, NULL, NULL, 0, 668 CTLTYPE_NODE, "hw", NULL, NULL, 0, NULL, 0, 669 CTL_HW, CTL_EOL); 670 if (err != 0) 671 goto sysctl_err; 672 err = sysctl_createv(&sc->sc_log, 0, NULL, &node, 0, 673 CTLTYPE_NODE, sc->sc_dev.dv_xname, NULL, NULL, 0, 674 NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 675 if (err != 0) 676 goto sysctl_err; 677 node_mib = node->sysctl_num; 678 679 if (!AC97_IS_FIXED_RATE(sc->codec_if)) { 680 /* passing the sc address instead of &sc->sc_ac97_clock */ 681 err = sysctl_createv(&sc->sc_log, 0, NULL, &node_ac97clock, 682 CTLFLAG_READWRITE, 683 CTLTYPE_INT, "ac97rate", 684 SYSCTL_DESCR("AC'97 codec link rate"), 685 auich_sysctl_verify, 0, sc, 0, 686 CTL_HW, node_mib, CTL_CREATE, CTL_EOL); 687 if (err != 0) 688 goto sysctl_err; 689 sc->sc_ac97_clock_mib = node_ac97clock->sysctl_num; 690 } 691 692 return; 693 694 sysctl_err: 695 printf("%s: failed to add sysctl nodes. (%d)\n", 696 sc->sc_dev.dv_xname, err); 697 return; /* failure of sysctl is not fatal. */ 698 } 699 700 static int 701 auich_activate(struct device *self, enum devact act) 702 { 703 struct auich_softc *sc; 704 int ret; 705 706 sc = (struct auich_softc *)self; 707 ret = 0; 708 switch (act) { 709 case DVACT_ACTIVATE: 710 return EOPNOTSUPP; 711 case DVACT_DEACTIVATE: 712 if (sc->sc_audiodev != NULL) 713 ret = config_deactivate(sc->sc_audiodev); 714 return ret; 715 } 716 return EOPNOTSUPP; 717 } 718 719 static int 720 auich_detach(struct device *self, int flags) 721 { 722 struct auich_softc *sc; 723 724 sc = (struct auich_softc *)self; 725 726 /* audio */ 727 if (sc->sc_audiodev != NULL) 728 config_detach(sc->sc_audiodev, flags); 729 730 /* sysctl */ 731 sysctl_teardown(&sc->sc_log); 732 733 mutex_enter(&sc->sc_lock); 734 735 /* audio_encoding_set */ 736 auconv_delete_encodings(sc->sc_encodings); 737 auconv_delete_encodings(sc->sc_spdif_encodings); 738 739 /* ac97 */ 740 if (sc->codec_if != NULL) 741 sc->codec_if->vtbl->detach(sc->codec_if); 742 743 mutex_exit(&sc->sc_lock); 744 mutex_destroy(&sc->sc_lock); 745 mutex_destroy(&sc->sc_intr_lock); 746 747 /* PCI */ 748 if (sc->sc_ih != NULL) 749 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 750 if (sc->mix_size != 0) 751 bus_space_unmap(sc->iot, sc->mix_ioh, sc->mix_size); 752 if (sc->aud_size != 0) 753 bus_space_unmap(sc->iot, sc->aud_ioh, sc->aud_size); 754 return 0; 755 } 756 757 static int 758 auich_sysctl_verify(SYSCTLFN_ARGS) 759 { 760 int error, tmp; 761 struct sysctlnode node; 762 struct auich_softc *sc; 763 764 node = *rnode; 765 sc = rnode->sysctl_data; 766 if (node.sysctl_num == sc->sc_ac97_clock_mib) { 767 tmp = sc->sc_ac97_clock; 768 node.sysctl_data = &tmp; 769 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 770 if (error || newp == NULL) 771 return error; 772 773 if (tmp < 48000 || tmp > 96000) 774 return EINVAL; 775 sc->sc_ac97_clock = tmp; 776 } 777 778 return 0; 779 } 780 781 static void 782 auich_finish_attach(struct device *self) 783 { 784 struct auich_softc *sc; 785 786 sc = (void *)self; 787 if (!AC97_IS_FIXED_RATE(sc->codec_if)) 788 auich_calibrate(sc); 789 790 sc->sc_audiodev = audio_attach_mi(&auich_hw_if, sc, &sc->sc_dev); 791 792 #if notyet 793 auich_powerhook(PWR_SUSPEND, sc); 794 #endif 795 796 return; 797 } 798 799 #define ICH_CODECIO_INTERVAL 10 800 static int 801 auich_read_codec(void *v, uint8_t reg, uint16_t *val) 802 { 803 struct auich_softc *sc; 804 int i; 805 uint32_t status; 806 807 sc = v; 808 /* wait for an access semaphore */ 809 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 810 bus_space_read_1(sc->iot, sc->aud_ioh, 811 ICH_CAS + sc->sc_modem_offset) & 1; 812 DELAY(ICH_CODECIO_INTERVAL)); 813 814 if (i > 0) { 815 *val = bus_space_read_2(sc->iot, sc->mix_ioh, 816 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET)); 817 DPRINTF(ICH_DEBUG_CODECIO, 818 ("auich_read_codec(%x, %x)\n", reg, *val)); 819 status = bus_space_read_4(sc->iot, sc->aud_ioh, 820 ICH_GSTS + sc->sc_modem_offset); 821 if (status & ICH_RCS) { 822 bus_space_write_4(sc->iot, sc->aud_ioh, 823 ICH_GSTS + sc->sc_modem_offset, 824 status & ~(ICH_SRI|ICH_PRI|ICH_GSCI)); 825 *val = 0xffff; 826 DPRINTF(ICH_DEBUG_CODECIO, 827 ("%s: read_codec error\n", sc->sc_dev.dv_xname)); 828 if (reg == AC97_REG_GPIO_STATUS) 829 auich_clear_cas(sc); 830 return -1; 831 } 832 if (reg == AC97_REG_GPIO_STATUS) 833 auich_clear_cas(sc); 834 return 0; 835 } else { 836 aprint_normal("%s: read_codec timeout\n", sc->sc_dev.dv_xname); 837 if (reg == AC97_REG_GPIO_STATUS) 838 auich_clear_cas(sc); 839 return -1; 840 } 841 } 842 843 static int 844 auich_write_codec(void *v, uint8_t reg, uint16_t val) 845 { 846 struct auich_softc *sc; 847 int i; 848 849 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val)); 850 sc = v; 851 /* wait for an access semaphore */ 852 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- && 853 bus_space_read_1(sc->iot, sc->aud_ioh, 854 ICH_CAS + sc->sc_modem_offset) & 1; 855 DELAY(ICH_CODECIO_INTERVAL)); 856 857 if (i > 0) { 858 bus_space_write_2(sc->iot, sc->mix_ioh, 859 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET), val); 860 return 0; 861 } else { 862 aprint_normal("%s: write_codec timeout\n", sc->sc_dev.dv_xname); 863 return -1; 864 } 865 } 866 867 static int 868 auich_attach_codec(void *v, struct ac97_codec_if *cif) 869 { 870 struct auich_softc *sc; 871 872 sc = v; 873 sc->codec_if = cif; 874 875 return 0; 876 } 877 878 static int 879 auich_reset_codec(void *v) 880 { 881 struct auich_softc *sc; 882 int i; 883 uint32_t control, status; 884 885 sc = v; 886 control = bus_space_read_4(sc->iot, sc->aud_ioh, 887 ICH_GCTRL + sc->sc_modem_offset); 888 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 889 control &= ~(ICH_ACLSO | ICH_PCM246_MASK); 890 } else { 891 control &= ~ICH_ACLSO; 892 control |= ICH_GIE; 893 } 894 control |= (control & ICH_CRESET) ? ICH_WRESET : ICH_CRESET; 895 bus_space_write_4(sc->iot, sc->aud_ioh, 896 ICH_GCTRL + sc->sc_modem_offset, control); 897 898 for (i = 500000; i >= 0; i--) { 899 status = bus_space_read_4(sc->iot, sc->aud_ioh, 900 ICH_GSTS + sc->sc_modem_offset); 901 if (status & (ICH_PCR | ICH_SCR | ICH_S2CR)) 902 break; 903 DELAY(1); 904 } 905 if (i <= 0) { 906 printf("%s: auich_reset_codec: time out\n", sc->sc_dev.dv_xname); 907 return ETIMEDOUT; 908 } 909 #ifdef AUICH_DEBUG 910 if (status & ICH_SCR) 911 printf("%s: The 2nd codec is ready.\n", 912 sc->sc_dev.dv_xname); 913 if (status & ICH_S2CR) 914 printf("%s: The 3rd codec is ready.\n", 915 sc->sc_dev.dv_xname); 916 #endif 917 return 0; 918 } 919 920 static enum ac97_host_flags 921 auich_flags_codec(void *v) 922 { 923 struct auich_softc *sc = v; 924 return sc->sc_codecflags; 925 } 926 927 static void 928 auich_spdif_event(void *addr, bool flag) 929 { 930 struct auich_softc *sc; 931 932 sc = addr; 933 sc->sc_spdif = flag; 934 } 935 936 static int 937 auich_open(void *addr, int flags) 938 { 939 struct auich_softc *sc; 940 941 sc = (struct auich_softc *)addr; 942 sc->codec_if->vtbl->lock(sc->codec_if); 943 return 0; 944 } 945 946 static void 947 auich_close(void *addr) 948 { 949 struct auich_softc *sc; 950 951 sc = (struct auich_softc *)addr; 952 sc->codec_if->vtbl->unlock(sc->codec_if); 953 } 954 955 static int 956 auich_query_encoding(void *v, struct audio_encoding *aep) 957 { 958 struct auich_softc *sc; 959 960 sc = (struct auich_softc *)v; 961 return auconv_query_encoding( 962 sc->sc_spdif ? sc->sc_spdif_encodings : sc->sc_encodings, aep); 963 } 964 965 static int 966 auich_set_rate(struct auich_softc *sc, int mode, u_long srate) 967 { 968 int ret; 969 u_int ratetmp; 970 971 sc->codec_if->vtbl->set_clock(sc->codec_if, sc->sc_ac97_clock); 972 ratetmp = srate; 973 if (mode == AUMODE_RECORD) 974 return sc->codec_if->vtbl->set_rate(sc->codec_if, 975 AC97_REG_PCM_LR_ADC_RATE, &ratetmp); 976 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 977 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); 978 if (ret) 979 return ret; 980 ratetmp = srate; 981 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 982 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); 983 if (ret) 984 return ret; 985 ratetmp = srate; 986 ret = sc->codec_if->vtbl->set_rate(sc->codec_if, 987 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); 988 return ret; 989 } 990 991 static int 992 auich_set_params(void *v, int setmode, int usemode, 993 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, 994 stream_filter_list_t *rfil) 995 { 996 struct auich_softc *sc; 997 audio_params_t *p; 998 stream_filter_list_t *fil; 999 int mode, index; 1000 uint32_t control; 1001 1002 sc = v; 1003 for (mode = AUMODE_RECORD; mode != -1; 1004 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1005 if ((setmode & mode) == 0) 1006 continue; 1007 1008 p = mode == AUMODE_PLAY ? play : rec; 1009 fil = mode == AUMODE_PLAY ? pfil : rfil; 1010 if (p == NULL) 1011 continue; 1012 1013 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1014 if (p->sample_rate < 8000 || 1015 p->sample_rate > 48000) 1016 return EINVAL; 1017 1018 if (sc->sc_spdif) 1019 index = auconv_set_converter(sc->sc_audio_formats, 1020 AUICH_AUDIO_NFORMATS, mode, p, TRUE, fil); 1021 else 1022 index = auconv_set_converter(auich_spdif_formats, 1023 AUICH_SPDIF_NFORMATS, mode, p, TRUE, fil); 1024 } else { 1025 if (p->sample_rate != 8000 && p->sample_rate != 16000) 1026 return EINVAL; 1027 index = auconv_set_converter(sc->sc_modem_formats, 1028 AUICH_MODEM_NFORMATS, mode, p, TRUE, fil); 1029 } 1030 if (index < 0) 1031 return EINVAL; 1032 if (fil->req_size > 0) 1033 p = &fil->filters[0].param; 1034 /* p represents HW encoding */ 1035 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1036 if (sc->sc_audio_formats[index].frequency_type != 1 1037 && auich_set_rate(sc, mode, p->sample_rate)) 1038 return EINVAL; 1039 } else { 1040 if (sc->sc_modem_formats[index].frequency_type != 1 1041 && auich_set_rate(sc, mode, p->sample_rate)) 1042 return EINVAL; 1043 auich_write_codec(sc, AC97_REG_LINE1_RATE, 1044 p->sample_rate); 1045 auich_write_codec(sc, AC97_REG_LINE1_LEVEL, 0); 1046 } 1047 if (mode == AUMODE_PLAY && 1048 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) { 1049 control = bus_space_read_4(sc->iot, sc->aud_ioh, 1050 ICH_GCTRL + sc->sc_modem_offset); 1051 control &= ~ICH_PCM246_MASK; 1052 if (p->channels == 4) { 1053 control |= ICH_PCM4; 1054 } else if (p->channels == 6) { 1055 control |= ICH_PCM6; 1056 } 1057 bus_space_write_4(sc->iot, sc->aud_ioh, 1058 ICH_GCTRL + sc->sc_modem_offset, control); 1059 } 1060 } 1061 1062 return 0; 1063 } 1064 1065 static int 1066 auich_round_blocksize(void *v, int blk, int mode, 1067 const audio_params_t *param) 1068 { 1069 1070 return blk & ~0x3f; /* keep good alignment */ 1071 } 1072 1073 static void 1074 auich_halt_pipe(struct auich_softc *sc, int pipe) 1075 { 1076 int i; 1077 uint32_t status; 1078 1079 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 0); 1080 for (i = 0; i < 100; i++) { 1081 status = bus_space_read_4(sc->iot, sc->aud_ioh, pipe + ICH_STS); 1082 if (status & ICH_DCH) 1083 break; 1084 DELAY(1); 1085 } 1086 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, ICH_RR); 1087 1088 #if AUICH_DEBUG 1089 if (i > 0) 1090 printf("auich_halt_pipe: halt took %d cycles\n", i); 1091 #endif 1092 } 1093 1094 static int 1095 auich_halt_output(void *v) 1096 { 1097 struct auich_softc *sc; 1098 1099 sc = v; 1100 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", sc->sc_dev.dv_xname)); 1101 1102 auich_halt_pipe(sc, ICH_PCMO); 1103 sc->pcmo.intr = NULL; 1104 1105 return 0; 1106 } 1107 1108 static int 1109 auich_halt_input(void *v) 1110 { 1111 struct auich_softc *sc; 1112 1113 sc = v; 1114 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_input\n", sc->sc_dev.dv_xname)); 1115 1116 auich_halt_pipe(sc, ICH_PCMI); 1117 sc->pcmi.intr = NULL; 1118 1119 return 0; 1120 } 1121 1122 static int 1123 auich_getdev(void *v, struct audio_device *adp) 1124 { 1125 struct auich_softc *sc; 1126 1127 sc = v; 1128 *adp = sc->sc_audev; 1129 return 0; 1130 } 1131 1132 static int 1133 auich_set_port(void *v, mixer_ctrl_t *cp) 1134 { 1135 struct auich_softc *sc; 1136 1137 sc = v; 1138 return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp); 1139 } 1140 1141 static int 1142 auich_get_port(void *v, mixer_ctrl_t *cp) 1143 { 1144 struct auich_softc *sc; 1145 1146 sc = v; 1147 return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp); 1148 } 1149 1150 static int 1151 auich_query_devinfo(void *v, mixer_devinfo_t *dp) 1152 { 1153 struct auich_softc *sc; 1154 1155 sc = v; 1156 return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp); 1157 } 1158 1159 static void * 1160 auich_allocm(void *v, int direction, size_t size, 1161 struct malloc_type *pool, int flags) 1162 { 1163 struct auich_softc *sc; 1164 struct auich_dma *p; 1165 int error; 1166 1167 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1168 return NULL; 1169 1170 p = malloc(sizeof(*p), pool, flags|M_ZERO); 1171 if (p == NULL) 1172 return NULL; 1173 1174 sc = v; 1175 error = auich_allocmem(sc, size, 0, p); 1176 if (error) { 1177 free(p, pool); 1178 return NULL; 1179 } 1180 1181 p->next = sc->sc_dmas; 1182 sc->sc_dmas = p; 1183 1184 return KERNADDR(p); 1185 } 1186 1187 static void 1188 auich_freem(void *v, void *ptr, struct malloc_type *pool) 1189 { 1190 struct auich_softc *sc; 1191 struct auich_dma *p, **pp; 1192 1193 sc = v; 1194 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1195 if (KERNADDR(p) == ptr) { 1196 auich_freemem(sc, p); 1197 *pp = p->next; 1198 free(p, pool); 1199 return; 1200 } 1201 } 1202 } 1203 1204 static size_t 1205 auich_round_buffersize(void *v, int direction, size_t size) 1206 { 1207 1208 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 1209 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX; 1210 1211 return size; 1212 } 1213 1214 static paddr_t 1215 auich_mappage(void *v, void *mem, off_t off, int prot) 1216 { 1217 struct auich_softc *sc; 1218 struct auich_dma *p; 1219 paddr_t pa; 1220 1221 if (off < 0) 1222 return -1; 1223 sc = v; 1224 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 1225 continue; 1226 if (!p) 1227 return -1; 1228 1229 mutex_exit(&sc->sc_lock); 1230 pa = bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 1231 off, prot, BUS_DMA_WAITOK); 1232 mutex_enter(&sc->sc_lock); 1233 1234 return pa; 1235 } 1236 1237 static int 1238 auich_get_props(void *v) 1239 { 1240 struct auich_softc *sc; 1241 int props; 1242 1243 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1244 sc = v; 1245 /* 1246 * Even if the codec is fixed-rate, set_param() succeeds for any sample 1247 * rate because of aurateconv. Applications can't know what rate the 1248 * device can process in the case of mmap(). 1249 */ 1250 if (!AC97_IS_FIXED_RATE(sc->codec_if) || 1251 sc->sc_codectype == AC97_CODEC_TYPE_MODEM) 1252 props |= AUDIO_PROP_MMAP; 1253 return props; 1254 } 1255 1256 static int 1257 auich_intr(void *v) 1258 { 1259 struct auich_softc *sc; 1260 int ret, gsts; 1261 #ifdef DIAGNOSTIC 1262 int csts; 1263 #endif 1264 1265 sc = v; 1266 1267 mutex_enter(&sc->sc_intr_lock); 1268 1269 ret = 0; 1270 #ifdef DIAGNOSTIC 1271 csts = pci_conf_read(sc->sc_pc, sc->sc_pt, PCI_COMMAND_STATUS_REG); 1272 if (csts & PCI_STATUS_MASTER_ABORT) { 1273 printf("auich_intr: PCI master abort\n"); 1274 } 1275 #endif 1276 1277 gsts = bus_space_read_4(sc->iot, sc->aud_ioh, 1278 ICH_GSTS + sc->sc_modem_offset); 1279 DPRINTF(ICH_DEBUG_INTR, ("auich_intr: gsts=0x%x\n", gsts)); 1280 1281 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_POINT) || 1282 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MOINT)) { 1283 int sts; 1284 1285 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1286 ICH_PCMO + sc->sc_sts_reg); 1287 DPRINTF(ICH_DEBUG_INTR, 1288 ("auich_intr: osts=0x%x\n", sts)); 1289 1290 if (sts & ICH_FIFOE) 1291 printf("%s: fifo underrun\n", sc->sc_dev.dv_xname); 1292 1293 if (sts & ICH_BCIS) 1294 auich_intr_pipe(sc, ICH_PCMO, &sc->pcmo); 1295 1296 /* int ack */ 1297 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO + 1298 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1299 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1300 bus_space_write_4(sc->iot, sc->aud_ioh, 1301 ICH_GSTS + sc->sc_modem_offset, ICH_POINT); 1302 else 1303 bus_space_write_4(sc->iot, sc->aud_ioh, 1304 ICH_GSTS + sc->sc_modem_offset, ICH_MOINT); 1305 ret++; 1306 } 1307 1308 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_PIINT) || 1309 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MIINT)) { 1310 int sts; 1311 1312 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1313 ICH_PCMI + sc->sc_sts_reg); 1314 DPRINTF(ICH_DEBUG_INTR, 1315 ("auich_intr: ists=0x%x\n", sts)); 1316 1317 if (sts & ICH_FIFOE) 1318 printf("%s: fifo overrun\n", sc->sc_dev.dv_xname); 1319 1320 if (sts & ICH_BCIS) 1321 auich_intr_pipe(sc, ICH_PCMI, &sc->pcmi); 1322 1323 /* int ack */ 1324 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI + 1325 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1326 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) 1327 bus_space_write_4(sc->iot, sc->aud_ioh, 1328 ICH_GSTS + sc->sc_modem_offset, ICH_PIINT); 1329 else 1330 bus_space_write_4(sc->iot, sc->aud_ioh, 1331 ICH_GSTS + sc->sc_modem_offset, ICH_MIINT); 1332 ret++; 1333 } 1334 1335 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_MINT) { 1336 int sts; 1337 1338 sts = bus_space_read_2(sc->iot, sc->aud_ioh, 1339 ICH_MICI + sc->sc_sts_reg); 1340 DPRINTF(ICH_DEBUG_INTR, 1341 ("auich_intr: ists=0x%x\n", sts)); 1342 1343 if (sts & ICH_FIFOE) 1344 printf("%s: fifo overrun\n", sc->sc_dev.dv_xname); 1345 1346 if (sts & ICH_BCIS) 1347 auich_intr_pipe(sc, ICH_MICI, &sc->mici); 1348 1349 /* int ack */ 1350 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_MICI + 1351 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE)); 1352 bus_space_write_4(sc->iot, sc->aud_ioh, 1353 ICH_GSTS + sc->sc_modem_offset, ICH_MINT); 1354 ret++; 1355 } 1356 1357 #ifdef AUICH_MODEM_DEBUG 1358 if (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_GSCI) { 1359 printf("%s: gsts=0x%x\n", sc->sc_dev.dv_xname, gsts); 1360 /* int ack */ 1361 bus_space_write_4(sc->iot, sc->aud_ioh, 1362 ICH_GSTS + sc->sc_modem_offset, ICH_GSCI); 1363 ret++; 1364 } 1365 #endif 1366 1367 mutex_exit(&sc->sc_intr_lock); 1368 1369 return ret; 1370 } 1371 1372 static void 1373 auich_trigger_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1374 { 1375 int blksize, qptr; 1376 struct auich_dmalist *q; 1377 1378 blksize = ring->blksize; 1379 1380 for (qptr = 0; qptr < ICH_DMALIST_MAX; qptr++) { 1381 q = &ring->dmalist[qptr]; 1382 q->base = ring->p; 1383 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1384 1385 ring->p += blksize; 1386 if (ring->p >= ring->end) 1387 ring->p = ring->start; 1388 } 1389 ring->qptr = 0; 1390 1391 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1392 (qptr - 1) & ICH_LVI_MASK); 1393 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 1394 ICH_IOCE | ICH_FEIE | ICH_RPBM); 1395 } 1396 1397 static void 1398 auich_intr_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring) 1399 { 1400 int blksize, qptr, nqptr; 1401 struct auich_dmalist *q; 1402 1403 blksize = ring->blksize; 1404 qptr = ring->qptr; 1405 nqptr = bus_space_read_1(sc->iot, sc->aud_ioh, pipe + ICH_CIV); 1406 1407 while (qptr != nqptr) { 1408 q = &ring->dmalist[qptr]; 1409 q->base = ring->p; 1410 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC; 1411 1412 DPRINTF(ICH_DEBUG_INTR, 1413 ("auich_intr: %p, %p = %x @ 0x%x\n", 1414 &ring->dmalist[qptr], q, q->len, q->base)); 1415 1416 ring->p += blksize; 1417 if (ring->p >= ring->end) 1418 ring->p = ring->start; 1419 1420 qptr = (qptr + 1) & ICH_LVI_MASK; 1421 if (ring->intr) 1422 ring->intr(ring->arg); 1423 } 1424 ring->qptr = qptr; 1425 1426 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI, 1427 (qptr - 1) & ICH_LVI_MASK); 1428 } 1429 1430 static int 1431 auich_trigger_output(void *v, void *start, void *end, int blksize, 1432 void (*intr)(void *), void *arg, const audio_params_t *param) 1433 { 1434 struct auich_softc *sc; 1435 struct auich_dma *p; 1436 size_t size; 1437 1438 DPRINTF(ICH_DEBUG_DMA, 1439 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n", 1440 start, end, blksize, intr, arg, param)); 1441 sc = v; 1442 1443 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1444 continue; 1445 if (!p) { 1446 printf("auich_trigger_output: bad addr %p\n", start); 1447 return EINVAL; 1448 } 1449 1450 size = (size_t)((caddr_t)end - (caddr_t)start); 1451 1452 sc->pcmo.intr = intr; 1453 sc->pcmo.arg = arg; 1454 sc->pcmo.start = DMAADDR(p); 1455 sc->pcmo.p = sc->pcmo.start; 1456 sc->pcmo.end = sc->pcmo.start + size; 1457 sc->pcmo.blksize = blksize; 1458 1459 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR, 1460 sc->sc_cddma + ICH_PCMO_OFF(0)); 1461 auich_trigger_pipe(sc, ICH_PCMO, &sc->pcmo); 1462 1463 return 0; 1464 } 1465 1466 static int 1467 auich_trigger_input(void *v, void *start, void *end, int blksize, 1468 void (*intr)(void *), void *arg, const audio_params_t *param) 1469 { 1470 struct auich_softc *sc; 1471 struct auich_dma *p; 1472 size_t size; 1473 1474 DPRINTF(ICH_DEBUG_DMA, 1475 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n", 1476 start, end, blksize, intr, arg, param)); 1477 sc = v; 1478 1479 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1480 continue; 1481 if (!p) { 1482 printf("auich_trigger_input: bad addr %p\n", start); 1483 return EINVAL; 1484 } 1485 1486 size = (size_t)((caddr_t)end - (caddr_t)start); 1487 1488 sc->pcmi.intr = intr; 1489 sc->pcmi.arg = arg; 1490 sc->pcmi.start = DMAADDR(p); 1491 sc->pcmi.p = sc->pcmi.start; 1492 sc->pcmi.end = sc->pcmi.start + size; 1493 sc->pcmi.blksize = blksize; 1494 1495 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1496 sc->sc_cddma + ICH_PCMI_OFF(0)); 1497 auich_trigger_pipe(sc, ICH_PCMI, &sc->pcmi); 1498 1499 return 0; 1500 } 1501 1502 static int 1503 auich_powerstate(void *v, int state) 1504 { 1505 #if notyet 1506 struct auich_softc *sc; 1507 int rv; 1508 1509 sc = (struct auich_softc *)v; 1510 rv = 0; 1511 1512 switch (state) { 1513 case AUDIOPOWER_OFF: 1514 auich_powerhook(PWR_SUSPEND, sc); 1515 break; 1516 case AUDIOPOWER_ON: 1517 auich_powerhook(PWR_RESUME, sc); 1518 break; 1519 default: 1520 aprint_error("%s: unknown power state %d\n", 1521 sc->sc_dev.dv_xname, state); 1522 rv = 1; 1523 break; 1524 } 1525 1526 return rv; 1527 #else 1528 return 0; 1529 #endif 1530 } 1531 1532 static int 1533 auich_allocmem(struct auich_softc *sc, size_t size, size_t align, 1534 struct auich_dma *p) 1535 { 1536 int error; 1537 1538 p->size = size; 1539 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1540 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1541 &p->nsegs, BUS_DMA_NOWAIT); 1542 if (error) 1543 return error; 1544 1545 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1546 &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags); 1547 if (error) 1548 goto free; 1549 1550 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1551 0, BUS_DMA_NOWAIT, &p->map); 1552 if (error) 1553 goto unmap; 1554 1555 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1556 BUS_DMA_NOWAIT); 1557 if (error) 1558 goto destroy; 1559 return 0; 1560 1561 destroy: 1562 bus_dmamap_destroy(sc->dmat, p->map); 1563 unmap: 1564 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1565 free: 1566 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1567 return error; 1568 } 1569 1570 static int 1571 auich_freemem(struct auich_softc *sc, struct auich_dma *p) 1572 { 1573 1574 bus_dmamap_unload(sc->dmat, p->map); 1575 bus_dmamap_destroy(sc->dmat, p->map); 1576 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1577 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1578 return 0; 1579 } 1580 1581 static int 1582 auich_alloc_cdata(struct auich_softc *sc) 1583 { 1584 bus_dma_segment_t seg; 1585 int error, rseg; 1586 1587 /* 1588 * Allocate the control data structure, and create and load the 1589 * DMA map for it. 1590 */ 1591 if ((error = bus_dmamem_alloc(sc->dmat, 1592 sizeof(struct auich_cdata), 1593 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1594 printf("%s: unable to allocate control data, error = %d\n", 1595 sc->sc_dev.dv_xname, error); 1596 goto fail_0; 1597 } 1598 1599 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1600 sizeof(struct auich_cdata), 1601 (caddr_t *) &sc->sc_cdata, 1602 sc->sc_dmamap_flags)) != 0) { 1603 printf("%s: unable to map control data, error = %d\n", 1604 sc->sc_dev.dv_xname, error); 1605 goto fail_1; 1606 } 1607 1608 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1, 1609 sizeof(struct auich_cdata), 0, 0, 1610 &sc->sc_cddmamap)) != 0) { 1611 printf("%s: unable to create control data DMA map, " 1612 "error = %d\n", sc->sc_dev.dv_xname, error); 1613 goto fail_2; 1614 } 1615 1616 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1617 sc->sc_cdata, sizeof(struct auich_cdata), 1618 NULL, 0)) != 0) { 1619 printf("%s: unable tp load control data DMA map, " 1620 "error = %d\n", sc->sc_dev.dv_xname, error); 1621 goto fail_3; 1622 } 1623 1624 sc->pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo; 1625 sc->pcmi.dmalist = sc->sc_cdata->ic_dmalist_pcmi; 1626 sc->mici.dmalist = sc->sc_cdata->ic_dmalist_mici; 1627 1628 return 0; 1629 1630 fail_3: 1631 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1632 fail_2: 1633 bus_dmamem_unmap(sc->dmat, (caddr_t) sc->sc_cdata, 1634 sizeof(struct auich_cdata)); 1635 fail_1: 1636 bus_dmamem_free(sc->dmat, &seg, rseg); 1637 fail_0: 1638 return error; 1639 } 1640 1641 static void 1642 auich_powerhook(int why, void *addr) 1643 { 1644 struct auich_softc *sc; 1645 1646 sc = (struct auich_softc *)addr; 1647 1648 mutex_enter(&sc->sc_lock); 1649 1650 switch (why) { 1651 case PWR_SUSPEND: 1652 case PWR_STANDBY: 1653 /* Power down */ 1654 DPRINTF(1, ("%s: power down\n", sc->sc_dev.dv_xname)); 1655 1656 /* if we're already asleep, don't try to sleep again */ 1657 if (sc->sc_suspend == PWR_SUSPEND || 1658 sc->sc_suspend == PWR_STANDBY) 1659 break; 1660 sc->sc_suspend = why; 1661 1662 DELAY(1000); 1663 pci_conf_capture(sc->sc_pc, sc->sc_pt, &sc->sc_pciconf); 1664 1665 if (sc->sc_ih != NULL) 1666 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 1667 1668 break; 1669 1670 case PWR_RESUME: 1671 /* Wake up */ 1672 DPRINTF(1, ("%s: power resume\n", sc->sc_dev.dv_xname)); 1673 if (sc->sc_suspend == PWR_RESUME) { 1674 printf("%s: resume without suspend.\n", 1675 sc->sc_dev.dv_xname); 1676 sc->sc_suspend = why; 1677 break; 1678 } 1679 1680 sc->sc_ih = pci_intr_establish(sc->sc_pc, sc->intrh, IPL_AUDIO, 1681 auich_intr, sc); 1682 if (sc->sc_ih == NULL) { 1683 aprint_error("%s: can't establish interrupt", 1684 sc->sc_dev.dv_xname); 1685 /* XXX jmcneill what should we do here? */ 1686 break; 1687 } 1688 pci_conf_restore(sc->sc_pc, sc->sc_pt, &sc->sc_pciconf); 1689 sc->sc_suspend = why; 1690 auich_reset_codec(sc); 1691 DELAY(1000); 1692 (sc->codec_if->vtbl->restore_ports)(sc->codec_if); 1693 break; 1694 1695 case PWR_SOFTSUSPEND: 1696 case PWR_SOFTSTANDBY: 1697 case PWR_SOFTRESUME: 1698 break; 1699 } 1700 1701 mutex_exit(&sc->sc_lock); 1702 } 1703 1704 /* 1705 * Calibrate card (some boards are overclocked and need scaling) 1706 */ 1707 static void 1708 auich_calibrate(struct auich_softc *sc) 1709 { 1710 struct timeval t1, t2; 1711 uint8_t ociv, nciv; 1712 uint64_t wait_us; 1713 uint32_t actual_48k_rate, bytes, ac97rate; 1714 void *temp_buffer; 1715 struct auich_dma *p; 1716 u_int rate; 1717 1718 /* 1719 * Grab audio from input for fixed interval and compare how 1720 * much we actually get with what we expect. Interval needs 1721 * to be sufficiently short that no interrupts are 1722 * generated. 1723 */ 1724 1725 /* Force the codec to a known state first. */ 1726 sc->codec_if->vtbl->set_clock(sc->codec_if, 48000); 1727 rate = sc->sc_ac97_clock = 48000; 1728 sc->codec_if->vtbl->set_rate(sc->codec_if, AC97_REG_PCM_LR_ADC_RATE, 1729 &rate); 1730 1731 /* Setup a buffer */ 1732 bytes = 64000; 1733 temp_buffer = auich_allocm(sc, AUMODE_RECORD, bytes, M_DEVBUF, M_WAITOK); 1734 1735 for (p = sc->sc_dmas; p && KERNADDR(p) != temp_buffer; p = p->next) 1736 continue; 1737 if (p == NULL) { 1738 printf("auich_calibrate: bad address %p\n", temp_buffer); 1739 return; 1740 } 1741 sc->pcmi.dmalist[0].base = DMAADDR(p); 1742 sc->pcmi.dmalist[0].len = (bytes >> sc->sc_sample_shift); 1743 1744 /* 1745 * our data format is stereo, 16 bit so each sample is 4 bytes. 1746 * assuming we get 48000 samples per second, we get 192000 bytes/sec. 1747 * we're going to start recording with interrupts disabled and measure 1748 * the time taken for one block to complete. we know the block size, 1749 * we know the time in microseconds, we calculate the sample rate: 1750 * 1751 * actual_rate [bps] = bytes / (time [s] * 4) 1752 * actual_rate [bps] = (bytes * 1000000) / (time [us] * 4) 1753 * actual_rate [Hz] = (bytes * 250000) / time [us] 1754 */ 1755 1756 /* prepare */ 1757 ociv = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV); 1758 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1759 sc->sc_cddma + ICH_PCMI_OFF(0)); 1760 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI, 1761 (0 - 1) & ICH_LVI_MASK); 1762 1763 /* start */ 1764 microtime(&t1); 1765 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RPBM); 1766 1767 /* wait */ 1768 nciv = ociv; 1769 do { 1770 microtime(&t2); 1771 if (t2.tv_sec - t1.tv_sec > 1) 1772 break; 1773 nciv = bus_space_read_1(sc->iot, sc->aud_ioh, 1774 ICH_PCMI + ICH_CIV); 1775 } while (nciv == ociv); 1776 microtime(&t2); 1777 1778 /* stop */ 1779 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 0); 1780 1781 /* reset */ 1782 DELAY(100); 1783 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR); 1784 1785 /* turn time delta into us */ 1786 wait_us = ((t2.tv_sec - t1.tv_sec) * 1000000) + t2.tv_usec - t1.tv_usec; 1787 1788 auich_freem(sc, temp_buffer, M_DEVBUF); 1789 1790 if (nciv == ociv) { 1791 printf("%s: ac97 link rate calibration timed out after %" 1792 PRIu64 " us\n", sc->sc_dev.dv_xname, wait_us); 1793 return; 1794 } 1795 1796 actual_48k_rate = (bytes * UINT64_C(250000)) / wait_us; 1797 1798 if (actual_48k_rate < 50000) 1799 ac97rate = 48000; 1800 else 1801 ac97rate = ((actual_48k_rate + 500) / 1000) * 1000; 1802 1803 printf("%s: measured ac97 link rate at %d Hz", 1804 sc->sc_dev.dv_xname, actual_48k_rate); 1805 if (ac97rate != actual_48k_rate) 1806 printf(", will use %d Hz", ac97rate); 1807 printf("\n"); 1808 1809 sc->sc_ac97_clock = ac97rate; 1810 } 1811 1812 static void 1813 auich_clear_cas(struct auich_softc *sc) 1814 { 1815 /* Clear the codec access semaphore */ 1816 (void)bus_space_read_2(sc->iot, sc->mix_ioh, 1817 AC97_REG_RESET * (sc->sc_codecnum * ICH_CODEC_OFFSET)); 1818 1819 return; 1820 } 1821 1822 1823 static void 1824 auich_get_locks(void *addr, kmutex_t **intr, kmutex_t **proc) 1825 { 1826 struct auich_softc *sc; 1827 1828 sc = addr; 1829 *intr = &sc->sc_intr_lock; 1830 *proc = &sc->sc_lock; 1831 } 1832
Indexes created Thu Oct 23 22:10:10 GMT 2025