auich.c revision 1.12
1 /* $NetBSD: auich.c,v 1.12 2002/03/07 14:37:03 kent Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 2000 Michael Shalayeff 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. The name of the author may not be used to endorse or promote products 52 * derived from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 57 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 58 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 59 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 60 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 61 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 62 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 63 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 64 * THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 67 */ 68 69 /* #define ICH_DEBUG */ 70 /* 71 * AC'97 audio found on Intel 810/820/440MX chipsets. 72 * http://developer.intel.com/design/chipsets/datashts/290655.htm 73 * http://developer.intel.com/design/chipsets/manuals/298028.htm 74 * 75 * TODO: 76 * 77 * - Probe codecs for supported sample rates. 78 * 79 * - Add support for the microphone input. 80 */ 81 82 #include <sys/cdefs.h> 83 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.12 2002/03/07 14:37:03 kent Exp $"); 84 85 #include <sys/param.h> 86 #include <sys/systm.h> 87 #include <sys/kernel.h> 88 #include <sys/malloc.h> 89 #include <sys/device.h> 90 #include <sys/fcntl.h> 91 #include <sys/proc.h> 92 93 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 94 95 #include <dev/pci/pcidevs.h> 96 #include <dev/pci/pcivar.h> 97 #include <dev/pci/auichreg.h> 98 99 #include <sys/audioio.h> 100 #include <dev/audio_if.h> 101 #include <dev/mulaw.h> 102 #include <dev/auconv.h> 103 104 #include <machine/bus.h> 105 106 #include <dev/ic/ac97reg.h> 107 #include <dev/ic/ac97var.h> 108 109 struct auich_dma { 110 bus_dmamap_t map; 111 caddr_t addr; 112 bus_dma_segment_t segs[1]; 113 int nsegs; 114 size_t size; 115 struct auich_dma *next; 116 }; 117 118 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 119 #define KERNADDR(p) ((void *)((p)->addr)) 120 121 struct auich_cdata { 122 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX]; 123 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX]; 124 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX]; 125 }; 126 127 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x) 128 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)]) 129 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)]) 130 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)]) 131 132 struct auich_softc { 133 struct device sc_dev; 134 void *sc_ih; 135 136 audio_device_t sc_audev; 137 138 bus_space_tag_t iot; 139 bus_space_handle_t mix_ioh; 140 bus_space_handle_t aud_ioh; 141 bus_dma_tag_t dmat; 142 143 struct ac97_codec_if *codec_if; 144 struct ac97_host_if host_if; 145 146 /* DMA scatter-gather lists. */ 147 bus_dmamap_t sc_cddmamap; 148 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 149 150 struct auich_cdata *sc_cdata; 151 #define dmalist_pcmo sc_cdata->ic_dmalist_pcmo 152 #define dmalist_pcmi sc_cdata->ic_dmalist_pcmi 153 #define dmalist_mici sc_cdata->ic_dmalist_mici 154 155 int ptr_pcmo, 156 ptr_pcmi, 157 ptr_mici; 158 159 /* i/o buffer pointers */ 160 u_int32_t pcmo_start, pcmo_p, pcmo_end; 161 int pcmo_blksize, pcmo_fifoe; 162 163 u_int32_t pcmi_start, pcmi_p, pcmi_end; 164 int pcmi_blksize, pcmi_fifoe; 165 166 u_int32_t mici_start, mici_p, mici_end; 167 int mici_blksize, mici_fifoe; 168 169 struct auich_dma *sc_dmas; 170 171 int sc_fixed_rate; 172 173 void (*sc_pintr)(void *); 174 void *sc_parg; 175 176 void (*sc_rintr)(void *); 177 void *sc_rarg; 178 179 /* Power Management */ 180 void *sc_powerhook; 181 int sc_suspend; 182 u_int16_t ext_status; 183 }; 184 185 /* Debug */ 186 #ifdef AUDIO_DEBUG 187 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0) 188 int auich_debug = 0xfffe; 189 #define ICH_DEBUG_CODECIO 0x0001 190 #define ICH_DEBUG_DMA 0x0002 191 #define ICH_DEBUG_PARAM 0x0004 192 #else 193 #define DPRINTF(x,y) /* nothing */ 194 #endif 195 196 int auich_match(struct device *, struct cfdata *, void *); 197 void auich_attach(struct device *, struct device *, void *); 198 int auich_intr(void *); 199 200 struct cfattach auich_ca = { 201 sizeof(struct auich_softc), auich_match, auich_attach 202 }; 203 204 int auich_open(void *, int); 205 void auich_close(void *); 206 int auich_query_encoding(void *, struct audio_encoding *); 207 int auich_set_params(void *, int, int, struct audio_params *, 208 struct audio_params *); 209 int auich_round_blocksize(void *, int); 210 int auich_halt_output(void *); 211 int auich_halt_input(void *); 212 int auich_getdev(void *, struct audio_device *); 213 int auich_set_port(void *, mixer_ctrl_t *); 214 int auich_get_port(void *, mixer_ctrl_t *); 215 int auich_query_devinfo(void *, mixer_devinfo_t *); 216 void *auich_allocm(void *, int, size_t, int, int); 217 void auich_freem(void *, void *, int); 218 size_t auich_round_buffersize(void *, int, size_t); 219 paddr_t auich_mappage(void *, void *, off_t, int); 220 int auich_get_props(void *); 221 int auich_trigger_output(void *, void *, void *, int, void (*)(void *), 222 void *, struct audio_params *); 223 int auich_trigger_input(void *, void *, void *, int, void (*)(void *), 224 void *, struct audio_params *); 225 226 int auich_alloc_cdata(struct auich_softc *); 227 228 int auich_allocmem(struct auich_softc *, size_t, size_t, 229 struct auich_dma *); 230 int auich_freemem(struct auich_softc *, struct auich_dma *); 231 232 void auich_powerhook(int, void *); 233 234 struct audio_hw_if auich_hw_if = { 235 auich_open, 236 auich_close, 237 NULL, /* drain */ 238 auich_query_encoding, 239 auich_set_params, 240 auich_round_blocksize, 241 NULL, /* commit_setting */ 242 NULL, /* init_output */ 243 NULL, /* init_input */ 244 NULL, /* start_output */ 245 NULL, /* start_input */ 246 auich_halt_output, 247 auich_halt_input, 248 NULL, /* speaker_ctl */ 249 auich_getdev, 250 NULL, /* getfd */ 251 auich_set_port, 252 auich_get_port, 253 auich_query_devinfo, 254 auich_allocm, 255 auich_freem, 256 auich_round_buffersize, 257 auich_mappage, 258 auich_get_props, 259 auich_trigger_output, 260 auich_trigger_input, 261 NULL, /* dev_ioctl */ 262 }; 263 264 int auich_attach_codec(void *, struct ac97_codec_if *); 265 int auich_read_codec(void *, u_int8_t, u_int16_t *); 266 int auich_write_codec(void *, u_int8_t, u_int16_t); 267 void auich_reset_codec(void *); 268 269 static const struct auich_devtype { 270 int product; 271 const char *name; 272 const char *shortname; 273 } auich_devices[] = { 274 { PCI_PRODUCT_INTEL_82801AA_ACA, 275 "i82801AA (ICH) AC-97 Audio", "ICH" }, 276 { PCI_PRODUCT_INTEL_82801AB_ACA, 277 "i82801AB (ICH0) AC-97 Audio", "ICH0" }, 278 { PCI_PRODUCT_INTEL_82801BA_ACA, 279 "i82801BA (ICH2) AC-97 Audio", "ICH2" }, 280 { PCI_PRODUCT_INTEL_82440MX_ACA, 281 "i82440MX AC-97 Audio", "440MX" }, 282 { PCI_PRODUCT_INTEL_82801CA_AC, 283 "i82801CA AC-97 Audio", "i830M" }, 284 285 { 0, 286 NULL, NULL }, 287 }; 288 289 static const struct auich_devtype * 290 auich_lookup(struct pci_attach_args *pa) 291 { 292 const struct auich_devtype *d; 293 294 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 295 return (NULL); 296 297 for (d = auich_devices; d->name != NULL; d++) { 298 if (PCI_PRODUCT(pa->pa_id) == d->product) 299 return (d); 300 } 301 302 return (NULL); 303 } 304 305 int 306 auich_match(struct device *parent, struct cfdata *match, void *aux) 307 { 308 struct pci_attach_args *pa = aux; 309 310 if (auich_lookup(pa) != NULL) 311 return (1); 312 313 return (0); 314 } 315 316 void 317 auich_attach(struct device *parent, struct device *self, void *aux) 318 { 319 struct auich_softc *sc = (struct auich_softc *)self; 320 struct pci_attach_args *pa = aux; 321 pci_intr_handle_t ih; 322 bus_size_t mix_size, aud_size; 323 pcireg_t csr; 324 const char *intrstr; 325 const struct auich_devtype *d; 326 u_int16_t ext_id, ext_status; 327 328 d = auich_lookup(pa); 329 if (d == NULL) 330 panic("auich_attach: impossible"); 331 332 printf(": %s\n", d->name); 333 334 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0, 335 &sc->iot, &sc->mix_ioh, NULL, &mix_size)) { 336 printf("%s: can't map codec i/o space\n", 337 sc->sc_dev.dv_xname); 338 return; 339 } 340 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0, 341 &sc->iot, &sc->aud_ioh, NULL, &aud_size)) { 342 printf("%s: can't map device i/o space\n", 343 sc->sc_dev.dv_xname); 344 return; 345 } 346 sc->dmat = pa->pa_dmat; 347 348 /* enable bus mastering */ 349 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 350 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 351 csr | PCI_COMMAND_MASTER_ENABLE); 352 353 /* Map and establish the interrupt. */ 354 if (pci_intr_map(pa, &ih)) { 355 printf("%s: can't map interrupt\n", sc->sc_dev.dv_xname); 356 return; 357 } 358 intrstr = pci_intr_string(pa->pa_pc, ih); 359 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, 360 auich_intr, sc); 361 if (sc->sc_ih == NULL) { 362 printf("%s: can't establish interrupt", sc->sc_dev.dv_xname); 363 if (intrstr != NULL) 364 printf(" at %s", intrstr); 365 printf("\n"); 366 return; 367 } 368 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 369 370 sprintf(sc->sc_audev.name, "%s AC97", d->shortname); 371 sprintf(sc->sc_audev.version, "0x%02x", PCI_REVISION(pa->pa_class)); 372 strcpy(sc->sc_audev.config, sc->sc_dev.dv_xname); 373 374 /* Set up DMA lists. */ 375 sc->ptr_pcmo = sc->ptr_pcmi = sc->ptr_mici = 0; 376 auich_alloc_cdata(sc); 377 378 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n", 379 sc->dmalist_pcmo, sc->dmalist_pcmi, sc->dmalist_mici)); 380 381 /* Reset codec and AC'97 */ 382 auich_reset_codec(sc); 383 384 sc->host_if.arg = sc; 385 sc->host_if.attach = auich_attach_codec; 386 sc->host_if.read = auich_read_codec; 387 sc->host_if.write = auich_write_codec; 388 sc->host_if.reset = auich_reset_codec; 389 390 if (ac97_attach(&sc->host_if) != 0) 391 return; 392 393 auich_read_codec(sc, AC97_REG_EXTENDED_ID, &ext_id); 394 if ((ext_id & (AC97_CODEC_DOES_VRA | AC97_CODEC_DOES_MICVRA)) != 0) { 395 auich_read_codec(sc, AC97_REG_EXTENDED_STATUS, &ext_status); 396 if ((ext_id & AC97_CODEC_DOES_VRA) !=0) 397 ext_status |= AC97_ENAB_VRA; 398 if ((ext_id & AC97_CODEC_DOES_MICVRA) !=0) 399 ext_status |= AC97_ENAB_MICVRA; 400 auich_write_codec(sc, AC97_REG_EXTENDED_STATUS, ext_status); 401 sc->sc_fixed_rate = 0; 402 } else { 403 sc->sc_fixed_rate = 48000; 404 printf("%s: warning, fixed rate codec\n", sc->sc_dev.dv_xname); 405 } 406 407 audio_attach_mi(&auich_hw_if, sc, &sc->sc_dev); 408 409 /* Watch for power change */ 410 sc->sc_suspend = PWR_RESUME; 411 sc->sc_powerhook = powerhook_establish(auich_powerhook, sc); 412 } 413 414 int 415 auich_read_codec(void *v, u_int8_t reg, u_int16_t *val) 416 { 417 struct auich_softc *sc = v; 418 int i; 419 420 /* wait for an access semaphore */ 421 for (i = ICH_SEMATIMO; i-- && 422 bus_space_read_1(sc->iot, sc->aud_ioh, ICH_CAS) & 1; DELAY(1)); 423 424 if (i > 0) { 425 *val = bus_space_read_2(sc->iot, sc->mix_ioh, reg); 426 DPRINTF(ICH_DEBUG_CODECIO, 427 ("auich_read_codec(%x, %x)\n", reg, *val)); 428 429 return 0; 430 } else { 431 DPRINTF(ICH_DEBUG_CODECIO, 432 ("%s: read_codec timeout\n", sc->sc_dev.dv_xname)); 433 return -1; 434 } 435 } 436 437 int 438 auich_write_codec(void *v, u_int8_t reg, u_int16_t val) 439 { 440 struct auich_softc *sc = v; 441 int i; 442 443 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val)); 444 445 /* wait for an access semaphore */ 446 for (i = ICH_SEMATIMO; i-- && 447 bus_space_read_1(sc->iot, sc->aud_ioh, ICH_CAS) & 1; DELAY(1)); 448 449 if (i > 0) { 450 bus_space_write_2(sc->iot, sc->mix_ioh, reg, val); 451 return 0; 452 } else { 453 DPRINTF(ICH_DEBUG_CODECIO, 454 ("%s: write_codec timeout\n", sc->sc_dev.dv_xname)); 455 return -1; 456 } 457 } 458 459 int 460 auich_attach_codec(void *v, struct ac97_codec_if *cif) 461 { 462 struct auich_softc *sc = v; 463 464 sc->codec_if = cif; 465 return 0; 466 } 467 468 void 469 auich_reset_codec(void *v) 470 { 471 struct auich_softc *sc = v; 472 473 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, 0); 474 DELAY(10); 475 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, ICH_CRESET); 476 } 477 478 int 479 auich_open(void *v, int flags) 480 { 481 482 return 0; 483 } 484 485 void 486 auich_close(void *v) 487 { 488 struct auich_softc *sc = v; 489 490 auich_halt_output(sc); 491 auich_halt_input(sc); 492 493 sc->sc_pintr = NULL; 494 sc->sc_rintr = NULL; 495 } 496 497 int 498 auich_query_encoding(void *v, struct audio_encoding *aep) 499 { 500 501 #if 0 /* XXX Not until we emulate it. */ 502 switch (aep->index) { 503 case 0: 504 strcpy(aep->name, AudioEulinear); 505 aep->encoding = AUDIO_ENCODING_ULINEAR; 506 aep->precision = 8; 507 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 508 return (0); 509 #else 510 switch (aep->index + 1) { 511 #endif 512 case 1: 513 strcpy(aep->name, AudioEmulaw); 514 aep->encoding = AUDIO_ENCODING_ULAW; 515 aep->precision = 8; 516 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 517 return (0); 518 case 2: 519 strcpy(aep->name, AudioEalaw); 520 aep->encoding = AUDIO_ENCODING_ALAW; 521 aep->precision = 8; 522 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 523 return (0); 524 case 3: 525 strcpy(aep->name, AudioEslinear); 526 aep->encoding = AUDIO_ENCODING_SLINEAR; 527 aep->precision = 8; 528 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 529 return (0); 530 case 4: 531 strcpy(aep->name, AudioEslinear_le); 532 aep->encoding = AUDIO_ENCODING_SLINEAR_LE; 533 aep->precision = 16; 534 aep->flags = 0; 535 return (0); 536 case 5: 537 strcpy(aep->name, AudioEulinear_le); 538 aep->encoding = AUDIO_ENCODING_ULINEAR_LE; 539 aep->precision = 16; 540 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 541 return (0); 542 case 6: 543 strcpy(aep->name, AudioEslinear_be); 544 aep->encoding = AUDIO_ENCODING_SLINEAR_BE; 545 aep->precision = 16; 546 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 547 return (0); 548 case 7: 549 strcpy(aep->name, AudioEulinear_be); 550 aep->encoding = AUDIO_ENCODING_ULINEAR_BE; 551 aep->precision = 16; 552 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 553 return (0); 554 default: 555 return (EINVAL); 556 } 557 } 558 559 int 560 auich_set_params(void *v, int setmode, int usemode, struct audio_params *play, 561 struct audio_params *rec) 562 { 563 struct auich_softc *sc = v; 564 struct audio_params *p; 565 int mode; 566 u_int16_t val, rate, inout; 567 568 for (mode = AUMODE_RECORD; mode != -1; 569 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 570 if ((setmode & mode) == 0) 571 continue; 572 573 p = mode == AUMODE_PLAY ? play : rec; 574 if (p == NULL) 575 continue; 576 577 inout = mode == AUMODE_PLAY ? ICH_PM_PCMO : ICH_PM_PCMI; 578 579 if ((p->sample_rate != 8000) && 580 (p->sample_rate != 11025) && 581 (p->sample_rate != 16000) && 582 (p->sample_rate != 22050) && 583 (p->sample_rate != 32000) && 584 (p->sample_rate != 44100) && 585 (p->sample_rate != 48000)) 586 return (EINVAL); 587 588 p->factor = 1; 589 p->sw_code = NULL; 590 switch (p->encoding) { 591 case AUDIO_ENCODING_SLINEAR_BE: 592 if (p->precision == 16) { 593 p->sw_code = swap_bytes; 594 p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE; 595 } else { 596 if (mode == AUMODE_PLAY) 597 p->sw_code = linear8_to_linear16_le; 598 else 599 p->sw_code = linear16_to_linear8_le; 600 p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE; 601 p->hw_precision = 16; 602 } 603 break; 604 605 case AUDIO_ENCODING_SLINEAR_LE: 606 if (p->precision != 16) { 607 if (mode == AUMODE_PLAY) 608 p->sw_code = linear8_to_linear16_le; 609 else 610 p->sw_code = linear16_to_linear8_le; 611 p->hw_precision = 16; 612 } 613 break; 614 615 case AUDIO_ENCODING_ULINEAR_BE: 616 if (p->precision == 16) { 617 if (mode == AUMODE_PLAY) 618 p->sw_code = 619 swap_bytes_change_sign16_le; 620 else 621 p->sw_code = 622 change_sign16_swap_bytes_le; 623 p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE; 624 } else { 625 /* 626 * XXX ulinear8_to_slinear16_le 627 */ 628 return (EINVAL); 629 } 630 break; 631 632 case AUDIO_ENCODING_ULINEAR_LE: 633 if (p->precision == 16) { 634 p->sw_code = change_sign16_le; 635 p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE; 636 } else { 637 /* 638 * XXX ulinear8_to_slinear16_le 639 */ 640 return (EINVAL); 641 } 642 break; 643 644 case AUDIO_ENCODING_ULAW: 645 if (mode == AUMODE_PLAY) { 646 p->sw_code = mulaw_to_slinear16_le; 647 } else { 648 p->sw_code = slinear16_to_mulaw_le; 649 } 650 p->factor = 2; 651 p->hw_precision = 16; 652 p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE; 653 p->hw_channels = 2; 654 break; 655 656 case AUDIO_ENCODING_ALAW: 657 if (mode == AUMODE_PLAY) { 658 p->factor = 2; 659 p->sw_code = alaw_to_slinear16_le; 660 p->hw_precision = 16; 661 p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE; 662 } else { 663 /* 664 * XXX slinear16_le_to_alaw 665 */ 666 return (EINVAL); 667 } 668 break; 669 670 default: 671 return (EINVAL); 672 } 673 674 auich_read_codec(sc, AC97_REG_POWER, &val); 675 auich_write_codec(sc, AC97_REG_POWER, val | inout); 676 677 if (sc->sc_fixed_rate) { 678 p->hw_sample_rate = sc->sc_fixed_rate; 679 } else { 680 auich_write_codec(sc, AC97_REG_PCM_FRONT_DAC_RATE, 681 p->sample_rate); 682 auich_read_codec(sc, AC97_REG_PCM_FRONT_DAC_RATE, 683 &rate); 684 p->hw_sample_rate = rate; 685 } 686 687 auich_write_codec(sc, AC97_REG_POWER, val); 688 } 689 690 return (0); 691 } 692 693 int 694 auich_round_blocksize(void *v, int blk) 695 { 696 697 return (blk & ~0x3f); /* keep good alignment */ 698 } 699 700 int 701 auich_halt_output(void *v) 702 { 703 struct auich_softc *sc = v; 704 705 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", sc->sc_dev.dv_xname)); 706 707 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CTRL, ICH_RR); 708 709 return (0); 710 } 711 712 int 713 auich_halt_input(void *v) 714 { 715 struct auich_softc *sc = v; 716 717 DPRINTF(ICH_DEBUG_DMA, 718 ("%s: halt_input\n", sc->sc_dev.dv_xname)); 719 720 /* XXX halt both unless known otherwise */ 721 722 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR); 723 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_MICI + ICH_CTRL, ICH_RR); 724 725 return (0); 726 } 727 728 int 729 auich_getdev(void *v, struct audio_device *adp) 730 { 731 struct auich_softc *sc = v; 732 733 *adp = sc->sc_audev; 734 return (0); 735 } 736 737 int 738 auich_set_port(void *v, mixer_ctrl_t *cp) 739 { 740 struct auich_softc *sc = v; 741 742 return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp)); 743 } 744 745 int 746 auich_get_port(void *v, mixer_ctrl_t *cp) 747 { 748 struct auich_softc *sc = v; 749 750 return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp)); 751 } 752 753 int 754 auich_query_devinfo(void *v, mixer_devinfo_t *dp) 755 { 756 struct auich_softc *sc = v; 757 758 return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp)); 759 } 760 761 void * 762 auich_allocm(void *v, int direction, size_t size, int pool, int flags) 763 { 764 struct auich_softc *sc = v; 765 struct auich_dma *p; 766 int error; 767 768 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 769 return (NULL); 770 771 p = malloc(sizeof(*p), pool, flags|M_ZERO); 772 if (p == NULL) 773 return (NULL); 774 775 error = auich_allocmem(sc, size, 0, p); 776 if (error) { 777 free(p, pool); 778 return (NULL); 779 } 780 781 p->next = sc->sc_dmas; 782 sc->sc_dmas = p; 783 784 return (KERNADDR(p)); 785 } 786 787 void 788 auich_freem(void *v, void *ptr, int pool) 789 { 790 struct auich_softc *sc = v; 791 struct auich_dma *p, **pp; 792 793 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 794 if (KERNADDR(p) == ptr) { 795 auich_freemem(sc, p); 796 *pp = p->next; 797 free(p, pool); 798 return; 799 } 800 } 801 } 802 803 size_t 804 auich_round_buffersize(void *v, int direction, size_t size) 805 { 806 807 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 808 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX; 809 810 return size; 811 } 812 813 paddr_t 814 auich_mappage(void *v, void *mem, off_t off, int prot) 815 { 816 struct auich_softc *sc = v; 817 struct auich_dma *p; 818 819 if (off < 0) 820 return (-1); 821 822 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 823 ; 824 if (!p) 825 return (-1); 826 return (bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 827 off, prot, BUS_DMA_WAITOK)); 828 } 829 830 int 831 auich_get_props(void *v) 832 { 833 834 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 835 AUDIO_PROP_FULLDUPLEX); 836 } 837 838 int 839 auich_intr(void *v) 840 { 841 struct auich_softc *sc = v; 842 int ret = 0, sts, gsts, i, qptr; 843 844 gsts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_GSTS); 845 DPRINTF(ICH_DEBUG_DMA, ("auich_intr: gsts=0x%x\n", gsts)); 846 847 if (gsts & ICH_POINT) { 848 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_PCMO+ICH_STS); 849 DPRINTF(ICH_DEBUG_DMA, 850 ("auich_intr: osts=0x%x\n", sts)); 851 852 if (sts & ICH_FIFOE) { 853 printf("%s: fifo underrun # %u\n", 854 sc->sc_dev.dv_xname, ++sc->pcmo_fifoe); 855 } 856 857 i = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CIV); 858 if (sts & (ICH_LVBCI | ICH_CELV)) { 859 struct auich_dmalist *q; 860 861 qptr = sc->ptr_pcmo; 862 863 while (qptr != i) { 864 q = &sc->dmalist_pcmo[qptr]; 865 866 q->base = sc->pcmo_p; 867 q->len = (sc->pcmo_blksize / 2) | ICH_DMAF_IOC; 868 DPRINTF(ICH_DEBUG_DMA, 869 ("auich_intr: %p, %p = %x @ 0x%x\n", 870 &sc->dmalist_pcmo[i], q, 871 sc->pcmo_blksize / 2, sc->pcmo_p)); 872 873 sc->pcmo_p += sc->pcmo_blksize; 874 if (sc->pcmo_p >= sc->pcmo_end) 875 sc->pcmo_p = sc->pcmo_start; 876 877 if (++qptr == ICH_DMALIST_MAX) 878 qptr = 0; 879 } 880 881 sc->ptr_pcmo = qptr; 882 bus_space_write_1(sc->iot, sc->aud_ioh, 883 ICH_PCMO + ICH_LVI, 884 (sc->ptr_pcmo - 1) & ICH_LVI_MASK); 885 } 886 887 if (sts & ICH_BCIS && sc->sc_pintr) 888 sc->sc_pintr(sc->sc_parg); 889 890 /* int ack */ 891 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_STS, 892 sts & (ICH_LVBCI | ICH_CELV | ICH_BCIS | ICH_FIFOE)); 893 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_POINT); 894 ret++; 895 } 896 897 if (gsts & ICH_PIINT) { 898 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_PCMI+ICH_STS); 899 DPRINTF(ICH_DEBUG_DMA, 900 ("auich_intr: ists=0x%x\n", sts)); 901 902 if (sts & ICH_FIFOE) { 903 printf("%s: fifo overrun # %u\n", 904 sc->sc_dev.dv_xname, ++sc->pcmi_fifoe); 905 } 906 907 i = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV); 908 if (sts & (ICH_LVBCI | ICH_CELV)) { 909 struct auich_dmalist *q; 910 911 qptr = sc->ptr_pcmi; 912 913 while (qptr != i) { 914 q = &sc->dmalist_pcmi[qptr]; 915 916 q->base = sc->pcmi_p; 917 q->len = (sc->pcmi_blksize / 2) | ICH_DMAF_IOC; 918 DPRINTF(ICH_DEBUG_DMA, 919 ("auich_intr: %p, %p = %x @ 0x%x\n", 920 &sc->dmalist_pcmi[i], q, 921 sc->pcmi_blksize / 2, sc->pcmi_p)); 922 923 sc->pcmi_p += sc->pcmi_blksize; 924 if (sc->pcmi_p >= sc->pcmi_end) 925 sc->pcmi_p = sc->pcmi_start; 926 927 if (++qptr == ICH_DMALIST_MAX) 928 qptr = 0; 929 } 930 931 sc->ptr_pcmi = qptr; 932 bus_space_write_1(sc->iot, sc->aud_ioh, 933 ICH_PCMI + ICH_LVI, 934 (sc->ptr_pcmi - 1) & ICH_LVI_MASK); 935 } 936 937 if (sts & ICH_BCIS && sc->sc_rintr) 938 sc->sc_rintr(sc->sc_rarg); 939 940 /* int ack */ 941 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_STS, 942 sts & (ICH_LVBCI | ICH_CELV | ICH_BCIS | ICH_FIFOE)); 943 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_POINT); 944 ret++; 945 } 946 947 if (gsts & ICH_MIINT) { 948 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_MICI+ICH_STS); 949 DPRINTF(ICH_DEBUG_DMA, 950 ("auich_intr: ists=0x%x\n", sts)); 951 if (sts & ICH_FIFOE) 952 printf("%s: fifo overrun\n", sc->sc_dev.dv_xname); 953 954 /* TODO mic input dma */ 955 956 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_MIINT); 957 } 958 959 return ret; 960 } 961 962 int 963 auich_trigger_output(void *v, void *start, void *end, int blksize, 964 void (*intr)(void *), void *arg, struct audio_params *param) 965 { 966 struct auich_softc *sc = v; 967 struct auich_dmalist *q; 968 struct auich_dma *p; 969 size_t size; 970 971 DPRINTF(ICH_DEBUG_DMA, 972 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n", 973 start, end, blksize, intr, arg, param)); 974 975 sc->sc_pintr = intr; 976 sc->sc_parg = arg; 977 978 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 979 ; 980 if (!p) { 981 printf("auich_trigger_output: bad addr %p\n", start); 982 return (EINVAL); 983 } 984 985 size = (size_t)((caddr_t)end - (caddr_t)start); 986 987 /* 988 * The logic behind this is: 989 * setup one buffer to play, then LVI dump out the rest 990 * to the scatter-gather chain. 991 */ 992 sc->pcmo_start = DMAADDR(p); 993 sc->pcmo_p = sc->pcmo_start + blksize; 994 sc->pcmo_end = sc->pcmo_start + size; 995 sc->pcmo_blksize = blksize; 996 997 sc->ptr_pcmo = 0; 998 q = &sc->dmalist_pcmo[sc->ptr_pcmo]; 999 q->base = sc->pcmo_start; 1000 q->len = (blksize / 2) | ICH_DMAF_IOC; 1001 if (++sc->ptr_pcmo == ICH_DMALIST_MAX) 1002 sc->ptr_pcmo = 0; 1003 1004 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR, 1005 sc->sc_cddma + ICH_PCMO_OFF(0)); 1006 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CTRL, 1007 ICH_IOCE | ICH_FEIE | ICH_LVBIE | ICH_RPBM); 1008 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_LVI, 1009 (sc->ptr_pcmo - 1) & ICH_LVI_MASK); 1010 1011 return (0); 1012 } 1013 1014 int 1015 auich_trigger_input(v, start, end, blksize, intr, arg, param) 1016 void *v; 1017 void *start, *end; 1018 int blksize; 1019 void (*intr)(void *); 1020 void *arg; 1021 struct audio_params *param; 1022 { 1023 struct auich_softc *sc = v; 1024 struct auich_dmalist *q; 1025 struct auich_dma *p; 1026 size_t size; 1027 1028 DPRINTF(ICH_DEBUG_DMA, 1029 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n", 1030 start, end, blksize, intr, arg, param)); 1031 1032 sc->sc_rintr = intr; 1033 sc->sc_rarg = arg; 1034 1035 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1036 ; 1037 if (!p) { 1038 printf("auich_trigger_input: bad addr %p\n", start); 1039 return (EINVAL); 1040 } 1041 1042 size = (size_t)((caddr_t)end - (caddr_t)start); 1043 1044 /* 1045 * The logic behind this is: 1046 * setup one buffer to play, then LVI dump out the rest 1047 * to the scatter-gather chain. 1048 */ 1049 sc->pcmi_start = DMAADDR(p); 1050 sc->pcmi_p = sc->pcmi_start + blksize; 1051 sc->pcmi_end = sc->pcmi_start + size; 1052 sc->pcmi_blksize = blksize; 1053 1054 sc->ptr_pcmi = 0; 1055 q = &sc->dmalist_pcmi[sc->ptr_pcmi]; 1056 q->base = sc->pcmi_start; 1057 q->len = (blksize / 2) | ICH_DMAF_IOC; 1058 if (++sc->ptr_pcmi == ICH_DMALIST_MAX) 1059 sc->ptr_pcmi = 0; 1060 1061 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1062 sc->sc_cddma + ICH_PCMI_OFF(0)); 1063 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 1064 ICH_IOCE | ICH_FEIE | ICH_LVBIE | ICH_RPBM); 1065 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI, 1066 (sc->ptr_pcmi - 1) & ICH_LVI_MASK); 1067 1068 return (0); 1069 } 1070 1071 int 1072 auich_allocmem(struct auich_softc *sc, size_t size, size_t align, 1073 struct auich_dma *p) 1074 { 1075 int error; 1076 1077 p->size = size; 1078 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1079 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1080 &p->nsegs, BUS_DMA_NOWAIT); 1081 if (error) 1082 return (error); 1083 1084 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1085 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1086 if (error) 1087 goto free; 1088 1089 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1090 0, BUS_DMA_NOWAIT, &p->map); 1091 if (error) 1092 goto unmap; 1093 1094 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1095 BUS_DMA_NOWAIT); 1096 if (error) 1097 goto destroy; 1098 return (0); 1099 1100 destroy: 1101 bus_dmamap_destroy(sc->dmat, p->map); 1102 unmap: 1103 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1104 free: 1105 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1106 return (error); 1107 } 1108 1109 int 1110 auich_freemem(struct auich_softc *sc, struct auich_dma *p) 1111 { 1112 1113 bus_dmamap_unload(sc->dmat, p->map); 1114 bus_dmamap_destroy(sc->dmat, p->map); 1115 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1116 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1117 return (0); 1118 } 1119 1120 int 1121 auich_alloc_cdata(struct auich_softc *sc) 1122 { 1123 bus_dma_segment_t seg; 1124 int error, rseg; 1125 1126 /* 1127 * Allocate the control data structure, and create and load the 1128 * DMA map for it. 1129 */ 1130 if ((error = bus_dmamem_alloc(sc->dmat, 1131 sizeof(struct auich_cdata), 1132 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1133 printf("%s: unable to allocate control data, error = %d\n", 1134 sc->sc_dev.dv_xname, error); 1135 goto fail_0; 1136 } 1137 1138 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1139 sizeof(struct auich_cdata), 1140 (caddr_t *) &sc->sc_cdata, 1141 BUS_DMA_COHERENT)) != 0) { 1142 printf("%s: unable to map control data, error = %d\n", 1143 sc->sc_dev.dv_xname, error); 1144 goto fail_1; 1145 } 1146 1147 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1, 1148 sizeof(struct auich_cdata), 0, 0, 1149 &sc->sc_cddmamap)) != 0) { 1150 printf("%s: unable to create control data DMA map, " 1151 "error = %d\n", sc->sc_dev.dv_xname, error); 1152 goto fail_2; 1153 } 1154 1155 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1156 sc->sc_cdata, sizeof(struct auich_cdata), 1157 NULL, 0)) != 0) { 1158 printf("%s: unable tp load control data DMA map, " 1159 "error = %d\n", sc->sc_dev.dv_xname, error); 1160 goto fail_3; 1161 } 1162 1163 return (0); 1164 1165 fail_3: 1166 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1167 fail_2: 1168 bus_dmamem_unmap(sc->dmat, (caddr_t) sc->sc_cdata, 1169 sizeof(struct auich_cdata)); 1170 fail_1: 1171 bus_dmamem_free(sc->dmat, &seg, rseg); 1172 fail_0: 1173 return (error); 1174 } 1175 1176 void 1177 auich_powerhook(int why, void *addr) 1178 { 1179 struct auich_softc *sc = (struct auich_softc *)addr; 1180 1181 switch (why) { 1182 case PWR_SUSPEND: 1183 case PWR_STANDBY: 1184 /* Power down */ 1185 DPRINTF(1, ("%s: power down\n", sc->sc_dev.dv_xname)); 1186 sc->sc_suspend = why; 1187 auich_read_codec(sc, AC97_REG_EXTENDED_STATUS, &sc->ext_status); 1188 break; 1189 1190 case PWR_RESUME: 1191 /* Wake up */ 1192 DPRINTF(1, ("%s: power resume\n", sc->sc_dev.dv_xname)); 1193 if (sc->sc_suspend == PWR_RESUME) { 1194 printf("%s: resume without suspend.\n", 1195 sc->sc_dev.dv_xname); 1196 sc->sc_suspend = why; 1197 return; 1198 } 1199 sc->sc_suspend = why; 1200 auich_reset_codec(sc); 1201 DELAY(1000); 1202 (sc->codec_if->vtbl->restore_ports)(sc->codec_if); 1203 auich_write_codec(sc, AC97_REG_EXTENDED_STATUS, sc->ext_status); 1204 break; 1205 1206 case PWR_SOFTSUSPEND: 1207 case PWR_SOFTSTANDBY: 1208 case PWR_SOFTRESUME: 1209 break; 1210 } 1211 } 1212
Indexes created Thu Oct 23 22:10:10 GMT 2025