auich.c revision 1.125.4.3 1 /* $NetBSD: auich.c,v 1.125.4.3 2009/09/16 13:37:50 yamt Exp $ */
2
3 /*-
4 * Copyright (c) 2000, 2004, 2005 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe and by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Copyright (c) 2000 Michael Shalayeff
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. The name of the author may not be used to endorse or promote products
45 * derived from this software without specific prior written permission.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
57 * THE POSSIBILITY OF SUCH DAMAGE.
58 *
59 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp
60 */
61
62 /*
63 * Copyright (c) 2000 Katsurajima Naoto <raven (at) katsurajima.seya.yokohama.jp>
64 * Copyright (c) 2001 Cameron Grant <cg (at) freebsd.org>
65 * All rights reserved.
66 *
67 * Redistribution and use in source and binary forms, with or without
68 * modification, are permitted provided that the following conditions
69 * are met:
70 * 1. Redistributions of source code must retain the above copyright
71 * notice, this list of conditions and the following disclaimer.
72 * 2. Redistributions in binary form must reproduce the above copyright
73 * notice, this list of conditions and the following disclaimer in the
74 * documentation and/or other materials provided with the distribution.
75 *
76 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
77 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
78 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
79 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
80 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
81 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
82 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
83 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
84 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
85 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
86 * SUCH DAMAGE.
87 *
88 * auich_calibrate() was from FreeBSD: ich.c,v 1.22 2002/06/27 22:36:01 scottl Exp
89 */
90
91
92 /* #define AUICH_DEBUG */
93 /*
94 * AC'97 audio found on Intel 810/820/440MX chipsets.
95 * http://developer.intel.com/design/chipsets/datashts/290655.htm
96 * http://developer.intel.com/design/chipsets/manuals/298028.htm
97 * ICH3:http://www.intel.com/design/chipsets/datashts/290716.htm
98 * ICH4:http://www.intel.com/design/chipsets/datashts/290744.htm
99 * ICH5:http://www.intel.com/design/chipsets/datashts/252516.htm
100 * AMD8111:
101 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24674.pdf
102 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25720.pdf
103 *
104 * TODO:
105 * - Add support for the dedicated microphone input.
106 *
107 * NOTE:
108 * - The 440MX B-stepping at running 100MHz has a hardware erratum.
109 * It causes PCI master abort and hangups until cold reboot.
110 * http://www.intel.com/design/chipsets/specupdt/245051.htm
111 */
112
113 #include <sys/cdefs.h>
114 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.125.4.3 2009/09/16 13:37:50 yamt Exp $");
115
116 #include <sys/param.h>
117 #include <sys/systm.h>
118 #include <sys/kernel.h>
119 #include <sys/malloc.h>
120 #include <sys/device.h>
121 #include <sys/fcntl.h>
122 #include <sys/proc.h>
123 #include <sys/sysctl.h>
124
125 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */
126
127 #include <dev/pci/pcidevs.h>
128 #include <dev/pci/pcivar.h>
129 #include <dev/pci/auichreg.h>
130
131 #include <sys/audioio.h>
132 #include <dev/audio_if.h>
133 #include <dev/mulaw.h>
134 #include <dev/auconv.h>
135
136 #include <sys/bus.h>
137
138 #include <dev/ic/ac97reg.h>
139 #include <dev/ic/ac97var.h>
140
141 struct auich_dma {
142 bus_dmamap_t map;
143 void *addr;
144 bus_dma_segment_t segs[1];
145 int nsegs;
146 size_t size;
147 struct auich_dma *next;
148 };
149
150 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr)
151 #define KERNADDR(p) ((void *)((p)->addr))
152
153 struct auich_cdata {
154 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX];
155 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX];
156 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX];
157 };
158
159 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x)
160 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)])
161 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)])
162 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)])
163
164 struct auich_softc {
165 device_t sc_dev;
166 void *sc_ih;
167
168 device_t sc_audiodev;
169 audio_device_t sc_audev;
170
171 pci_chipset_tag_t sc_pc;
172 pcitag_t sc_pt;
173 bus_space_tag_t iot;
174 bus_space_handle_t mix_ioh;
175 bus_size_t mix_size;
176 bus_space_handle_t aud_ioh;
177 bus_size_t aud_size;
178 bus_dma_tag_t dmat;
179 pci_intr_handle_t intrh;
180
181 struct ac97_codec_if *codec_if;
182 struct ac97_host_if host_if;
183 int sc_codecnum;
184 int sc_codectype;
185 enum ac97_host_flags sc_codecflags;
186 bool sc_spdif;
187
188 /* multi-channel control bits */
189 int sc_pcm246_mask;
190 int sc_pcm2;
191 int sc_pcm4;
192 int sc_pcm6;
193
194 /* DMA scatter-gather lists. */
195 bus_dmamap_t sc_cddmamap;
196 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
197
198 struct auich_cdata *sc_cdata;
199
200 struct auich_ring {
201 int qptr;
202 struct auich_dmalist *dmalist;
203
204 uint32_t start, p, end;
205 int blksize;
206
207 void (*intr)(void *);
208 void *arg;
209 } pcmo, pcmi, mici;
210
211 struct auich_dma *sc_dmas;
212
213 /* SiS 7012 hack */
214 int sc_sample_shift;
215 int sc_sts_reg;
216 /* 440MX workaround */
217 int sc_dmamap_flags;
218 /* Native mode? */
219 int sc_native_mode;
220
221 /* sysctl */
222 struct sysctllog *sc_log;
223 uint32_t sc_ac97_clock;
224 int sc_ac97_clock_mib;
225
226 int sc_modem_offset;
227
228 #define AUICH_AUDIO_NFORMATS 3
229 #define AUICH_MODEM_NFORMATS 1
230 struct audio_format sc_audio_formats[AUICH_AUDIO_NFORMATS];
231 struct audio_format sc_modem_formats[AUICH_MODEM_NFORMATS];
232 struct audio_encoding_set *sc_encodings;
233 struct audio_encoding_set *sc_spdif_encodings;
234 };
235
236 /* Debug */
237 #ifdef AUICH_DEBUG
238 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0)
239 int auich_debug = 0xfffe;
240 #define ICH_DEBUG_CODECIO 0x0001
241 #define ICH_DEBUG_DMA 0x0002
242 #define ICH_DEBUG_INTR 0x0004
243 #else
244 #define DPRINTF(x,y) /* nothing */
245 #endif
246
247 static int auich_match(device_t, cfdata_t, void *);
248 static void auich_attach(device_t, device_t, void *);
249 static int auich_detach(device_t, int);
250 static void auich_childdet(device_t, device_t);
251 static int auich_activate(device_t, enum devact);
252 static int auich_intr(void *);
253
254 CFATTACH_DECL2_NEW(auich, sizeof(struct auich_softc),
255 auich_match, auich_attach, auich_detach, auich_activate, NULL,
256 auich_childdet);
257
258 static int auich_open(void *, int);
259 static void auich_close(void *);
260 static int auich_query_encoding(void *, struct audio_encoding *);
261 static int auich_set_params(void *, int, int, audio_params_t *,
262 audio_params_t *, stream_filter_list_t *,
263 stream_filter_list_t *);
264 static int auich_round_blocksize(void *, int, int, const audio_params_t *);
265 static void auich_halt_pipe(struct auich_softc *, int);
266 static int auich_halt_output(void *);
267 static int auich_halt_input(void *);
268 static int auich_getdev(void *, struct audio_device *);
269 static int auich_set_port(void *, mixer_ctrl_t *);
270 static int auich_get_port(void *, mixer_ctrl_t *);
271 static int auich_query_devinfo(void *, mixer_devinfo_t *);
272 static void *auich_allocm(void *, int, size_t, struct malloc_type *, int);
273 static void auich_freem(void *, void *, struct malloc_type *);
274 static size_t auich_round_buffersize(void *, int, size_t);
275 static paddr_t auich_mappage(void *, void *, off_t, int);
276 static int auich_get_props(void *);
277 static void auich_trigger_pipe(struct auich_softc *, int, struct auich_ring *);
278 static void auich_intr_pipe(struct auich_softc *, int, struct auich_ring *);
279 static int auich_trigger_output(void *, void *, void *, int,
280 void (*)(void *), void *, const audio_params_t *);
281 static int auich_trigger_input(void *, void *, void *, int,
282 void (*)(void *), void *, const audio_params_t *);
283 static int auich_powerstate(void *, int);
284
285 static int auich_alloc_cdata(struct auich_softc *);
286
287 static int auich_allocmem(struct auich_softc *, size_t, size_t,
288 struct auich_dma *);
289 static int auich_freemem(struct auich_softc *, struct auich_dma *);
290
291 static bool auich_resume(device_t PMF_FN_PROTO);
292 static int auich_set_rate(struct auich_softc *, int, u_long);
293 static int auich_sysctl_verify(SYSCTLFN_ARGS);
294 static void auich_finish_attach(device_t);
295 static void auich_calibrate(struct auich_softc *);
296 static void auich_clear_cas(struct auich_softc *);
297
298 static int auich_attach_codec(void *, struct ac97_codec_if *);
299 static int auich_read_codec(void *, uint8_t, uint16_t *);
300 static int auich_write_codec(void *, uint8_t, uint16_t);
301 static int auich_reset_codec(void *);
302 static enum ac97_host_flags auich_flags_codec(void *);
303 static void auich_spdif_event(void *, bool);
304
305 static const struct audio_hw_if auich_hw_if = {
306 auich_open,
307 auich_close,
308 NULL, /* drain */
309 auich_query_encoding,
310 auich_set_params,
311 auich_round_blocksize,
312 NULL, /* commit_setting */
313 NULL, /* init_output */
314 NULL, /* init_input */
315 NULL, /* start_output */
316 NULL, /* start_input */
317 auich_halt_output,
318 auich_halt_input,
319 NULL, /* speaker_ctl */
320 auich_getdev,
321 NULL, /* getfd */
322 auich_set_port,
323 auich_get_port,
324 auich_query_devinfo,
325 auich_allocm,
326 auich_freem,
327 auich_round_buffersize,
328 auich_mappage,
329 auich_get_props,
330 auich_trigger_output,
331 auich_trigger_input,
332 NULL, /* dev_ioctl */
333 auich_powerstate,
334 };
335
336 #define AUICH_FORMATS_1CH 0
337 #define AUICH_FORMATS_4CH 1
338 #define AUICH_FORMATS_6CH 2
339 static const struct audio_format auich_audio_formats[AUICH_AUDIO_NFORMATS] = {
340 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
341 2, AUFMT_STEREO, 0, {8000, 48000}},
342 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
343 4, AUFMT_SURROUND4, 0, {8000, 48000}},
344 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
345 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}},
346 };
347
348 #define AUICH_SPDIF_NFORMATS 1
349 static const struct audio_format auich_spdif_formats[AUICH_SPDIF_NFORMATS] = {
350 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
351 2, AUFMT_STEREO, 1, {48000}},
352 };
353
354 static const struct audio_format auich_modem_formats[AUICH_MODEM_NFORMATS] = {
355 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
356 1, AUFMT_MONAURAL, 0, {8000, 16000}},
357 };
358
359 #define PCI_ID_CODE0(v, p) PCI_ID_CODE(PCI_VENDOR_##v, PCI_PRODUCT_##v##_##p)
360 #define PCIID_ICH PCI_ID_CODE0(INTEL, 82801AA_ACA)
361 #define PCIID_ICH0 PCI_ID_CODE0(INTEL, 82801AB_ACA)
362 #define PCIID_ICH2 PCI_ID_CODE0(INTEL, 82801BA_ACA)
363 #define PCIID_440MX PCI_ID_CODE0(INTEL, 82440MX_ACA)
364 #define PCIID_ICH3 PCI_ID_CODE0(INTEL, 82801CA_AC)
365 #define PCIID_ICH4 PCI_ID_CODE0(INTEL, 82801DB_AC)
366 #define PCIID_ICH5 PCI_ID_CODE0(INTEL, 82801EB_AC)
367 #define PCIID_ICH6 PCI_ID_CODE0(INTEL, 82801FB_AC)
368 #define PCIID_ICH7 PCI_ID_CODE0(INTEL, 82801G_ACA)
369 #define PCIID_I6300ESB PCI_ID_CODE0(INTEL, 6300ESB_ACA)
370 #define PCIID_SIS7012 PCI_ID_CODE0(SIS, 7012_AC)
371 #define PCIID_NFORCE PCI_ID_CODE0(NVIDIA, NFORCE_MCP_AC)
372 #define PCIID_NFORCE2 PCI_ID_CODE0(NVIDIA, NFORCE2_MCPT_AC)
373 #define PCIID_NFORCE2_400 PCI_ID_CODE0(NVIDIA, NFORCE2_400_MCPT_AC)
374 #define PCIID_NFORCE3 PCI_ID_CODE0(NVIDIA, NFORCE3_MCPT_AC)
375 #define PCIID_NFORCE3_250 PCI_ID_CODE0(NVIDIA, NFORCE3_250_MCPT_AC)
376 #define PCIID_NFORCE4 PCI_ID_CODE0(NVIDIA, NFORCE4_AC)
377 #define PCIID_NFORCE430 PCI_ID_CODE0(NVIDIA, NFORCE430_AC)
378 #define PCIID_AMD768 PCI_ID_CODE0(AMD, PBC768_AC)
379 #define PCIID_AMD8111 PCI_ID_CODE0(AMD, PBC8111_AC)
380
381 #define PCIID_ICH3MODEM PCI_ID_CODE0(INTEL, 82801CA_MOD)
382 #define PCIID_ICH4MODEM PCI_ID_CODE0(INTEL, 82801DB_MOD)
383 #define PCIID_ICH6MODEM PCI_ID_CODE0(INTEL, 82801FB_ACM)
384
385 struct auich_devtype {
386 pcireg_t id;
387 const char *name;
388 const char *shortname; /* must be less than 11 characters */
389 };
390
391 static const struct auich_devtype auich_audio_devices[] = {
392 { PCIID_ICH, "i82801AA (ICH) AC-97 Audio", "ICH" },
393 { PCIID_ICH0, "i82801AB (ICH0) AC-97 Audio", "ICH0" },
394 { PCIID_ICH2, "i82801BA (ICH2) AC-97 Audio", "ICH2" },
395 { PCIID_440MX, "i82440MX AC-97 Audio", "440MX" },
396 { PCIID_ICH3, "i82801CA (ICH3) AC-97 Audio", "ICH3" },
397 { PCIID_ICH4, "i82801DB/DBM (ICH4/ICH4M) AC-97 Audio", "ICH4" },
398 { PCIID_ICH5, "i82801EB (ICH5) AC-97 Audio", "ICH5" },
399 { PCIID_ICH6, "i82801FB (ICH6) AC-97 Audio", "ICH6" },
400 { PCIID_ICH7, "i82801GB/GR (ICH7) AC-97 Audio", "ICH7" },
401 { PCIID_I6300ESB, "Intel 6300ESB AC-97 Audio", "I6300ESB" },
402 { PCIID_SIS7012, "SiS 7012 AC-97 Audio", "SiS7012" },
403 { PCIID_NFORCE, "nForce MCP AC-97 Audio", "nForce" },
404 { PCIID_NFORCE2, "nForce2 MCP-T AC-97 Audio", "nForce2" },
405 { PCIID_NFORCE2_400, "nForce2 400 MCP-T AC-97 Audio", "nForce2" },
406 { PCIID_NFORCE3, "nForce3 MCP-T AC-97 Audio", "nForce3" },
407 { PCIID_NFORCE3_250, "nForce3 250 MCP-T AC-97 Audio", "nForce3" },
408 { PCIID_NFORCE4, "nForce4 AC-97 Audio", "nForce4" },
409 { PCIID_NFORCE430, "nForce430 (MCP51) AC-97 Audio", "nForce430" },
410 { PCIID_AMD768, "AMD768 AC-97 Audio", "AMD768" },
411 { PCIID_AMD8111,"AMD8111 AC-97 Audio", "AMD8111" },
412 { 0, NULL, NULL },
413 };
414
415 static const struct auich_devtype auich_modem_devices[] = {
416 #ifdef AUICH_ATTACH_MODEM
417 { PCIID_ICH3MODEM, "i82801CA (ICH3) AC-97 Modem", "ICH3MODEM" },
418 { PCIID_ICH4MODEM, "i82801DB (ICH4) AC-97 Modem", "ICH4MODEM" },
419 { PCIID_ICH6MODEM, "i82801FB (ICH6) AC-97 Modem", "ICH6MODEM" },
420 #endif
421 { 0, NULL, NULL },
422 };
423
424 static const struct auich_devtype *
425 auich_lookup(struct pci_attach_args *pa, const struct auich_devtype *auich_devices)
426 {
427 const struct auich_devtype *d;
428
429 for (d = auich_devices; d->name != NULL; d++) {
430 if (pa->pa_id == d->id)
431 return d;
432 }
433
434 return NULL;
435 }
436
437 static int
438 auich_match(device_t parent, cfdata_t match, void *aux)
439 {
440 struct pci_attach_args *pa;
441
442 pa = aux;
443 if (auich_lookup(pa, auich_audio_devices) != NULL)
444 return 1;
445 if (auich_lookup(pa, auich_modem_devices) != NULL)
446 return 1;
447
448 return 0;
449 }
450
451 static void
452 auich_attach(device_t parent, device_t self, void *aux)
453 {
454 struct auich_softc *sc = device_private(self);
455 struct pci_attach_args *pa;
456 pcireg_t v, subdev;
457 const char *intrstr;
458 const struct auich_devtype *d;
459 const struct sysctlnode *node, *node_ac97clock;
460 int err, node_mib, i;
461
462 sc->sc_dev = self;
463 pa = aux;
464
465 if ((d = auich_lookup(pa, auich_modem_devices)) != NULL) {
466 sc->sc_modem_offset = 0x10;
467 sc->sc_codectype = AC97_CODEC_TYPE_MODEM;
468 } else if ((d = auich_lookup(pa, auich_audio_devices)) != NULL) {
469 sc->sc_modem_offset = 0;
470 sc->sc_codectype = AC97_CODEC_TYPE_AUDIO;
471 } else
472 panic("auich_attach: impossible");
473
474 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO)
475 aprint_naive(": Audio controller\n");
476 else
477 aprint_naive(": Modem controller\n");
478
479 sc->sc_pc = pa->pa_pc;
480 sc->sc_pt = pa->pa_tag;
481
482 aprint_normal(": %s\n", d->name);
483
484 if (d->id == PCIID_ICH4 || d->id == PCIID_ICH5 || d->id == PCIID_ICH6
485 || d->id == PCIID_ICH7 || d->id == PCIID_I6300ESB
486 || d->id == PCIID_ICH4MODEM) {
487 sc->sc_native_mode = 1;
488 /*
489 * Use native mode for Intel 6300ESB and ICH4/ICH5/ICH6/ICH7
490 */
491 if (pci_mapreg_map(pa, ICH_MMBAR, PCI_MAPREG_TYPE_MEM, 0,
492 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) {
493 v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG);
494 pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG,
495 v | ICH_CFG_IOSE);
496 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO,
497 0, &sc->iot, &sc->mix_ioh, NULL,
498 &sc->mix_size)) {
499 aprint_error_dev(self, "can't map codec i/o space\n");
500 return;
501 }
502 }
503 if (pci_mapreg_map(pa, ICH_MBBAR, PCI_MAPREG_TYPE_MEM, 0,
504 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) {
505 v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG);
506 pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG,
507 v | ICH_CFG_IOSE);
508 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO,
509 0, &sc->iot, &sc->aud_ioh, NULL,
510 &sc->aud_size)) {
511 aprint_error_dev(self, "can't map device i/o space\n");
512 return;
513 }
514 }
515 } else {
516 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0,
517 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) {
518 aprint_error_dev(self, "can't map codec i/o space\n");
519 return;
520 }
521 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0,
522 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) {
523 aprint_error_dev(self, "can't map device i/o space\n");
524 return;
525 }
526 }
527 sc->dmat = pa->pa_dmat;
528
529 /* enable bus mastering */
530 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
531 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
532 v | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_BACKTOBACK_ENABLE);
533
534 /* Map and establish the interrupt. */
535 if (pci_intr_map(pa, &sc->intrh)) {
536 aprint_error_dev(self, "can't map interrupt\n");
537 return;
538 }
539 intrstr = pci_intr_string(pa->pa_pc, sc->intrh);
540 sc->sc_ih = pci_intr_establish(pa->pa_pc, sc->intrh, IPL_AUDIO,
541 auich_intr, sc);
542 if (sc->sc_ih == NULL) {
543 aprint_error_dev(self, "can't establish interrupt");
544 if (intrstr != NULL)
545 aprint_normal(" at %s", intrstr);
546 aprint_normal("\n");
547 return;
548 }
549 aprint_normal_dev(self, "interrupting at %s\n", intrstr);
550
551 snprintf(sc->sc_audev.name, MAX_AUDIO_DEV_LEN, "%s AC97", d->shortname);
552 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN,
553 "0x%02x", PCI_REVISION(pa->pa_class));
554 strlcpy(sc->sc_audev.config, device_xname(self), MAX_AUDIO_DEV_LEN);
555
556 /* SiS 7012 needs special handling */
557 if (d->id == PCIID_SIS7012) {
558 sc->sc_sts_reg = ICH_PICB;
559 sc->sc_sample_shift = 0;
560 sc->sc_pcm246_mask = ICH_SIS_PCM246_MASK;
561 sc->sc_pcm2 = ICH_SIS_PCM2;
562 sc->sc_pcm4 = ICH_SIS_PCM4;
563 sc->sc_pcm6 = ICH_SIS_PCM6;
564 /* Un-mute output. From Linux. */
565 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL,
566 bus_space_read_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL) |
567 ICH_SIS_CTL_UNMUTE);
568 } else {
569 sc->sc_sts_reg = ICH_STS;
570 sc->sc_sample_shift = 1;
571 sc->sc_pcm246_mask = ICH_PCM246_MASK;
572 sc->sc_pcm2 = ICH_PCM2;
573 sc->sc_pcm4 = ICH_PCM4;
574 sc->sc_pcm6 = ICH_PCM6;
575 }
576
577 /* Workaround for a 440MX B-stepping erratum */
578 sc->sc_dmamap_flags = BUS_DMA_COHERENT;
579 if (d->id == PCIID_440MX) {
580 sc->sc_dmamap_flags |= BUS_DMA_NOCACHE;
581 aprint_normal_dev(self, "DMA bug workaround enabled\n");
582 }
583
584 /* Set up DMA lists. */
585 sc->pcmo.qptr = sc->pcmi.qptr = sc->mici.qptr = 0;
586 auich_alloc_cdata(sc);
587
588 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n",
589 sc->pcmo.dmalist, sc->pcmi.dmalist, sc->mici.dmalist));
590
591 /* Modem codecs are always the secondary codec on ICH */
592 sc->sc_codecnum = sc->sc_codectype == AC97_CODEC_TYPE_MODEM ? 1 : 0;
593
594 sc->host_if.arg = sc;
595 sc->host_if.attach = auich_attach_codec;
596 sc->host_if.read = auich_read_codec;
597 sc->host_if.write = auich_write_codec;
598 sc->host_if.reset = auich_reset_codec;
599 sc->host_if.flags = auich_flags_codec;
600 sc->host_if.spdif_event = auich_spdif_event;
601
602 subdev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
603 switch (subdev) {
604 case 0x202f161f: /* Gateway 7326GZ */
605 case 0x203a161f: /* Gateway 4028GZ */
606 case 0x204c161f: /* Kvazar-Micro Senator 3592XT */
607 case 0x8144104d: /* Sony VAIO PCG-TR* */
608 case 0x8197104d: /* Sony S1XP */
609 case 0x81c0104d: /* Sony VAIO type T */
610 case 0x81c5104d: /* Sony VAIO VGN-B1XP */
611 sc->sc_codecflags = AC97_HOST_INVERTED_EAMP;
612 break;
613 default:
614 sc->sc_codecflags = 0;
615 break;
616 }
617
618 if (ac97_attach_type(&sc->host_if, self, sc->sc_codectype) != 0)
619 return;
620 sc->codec_if->vtbl->unlock(sc->codec_if);
621
622 /* setup audio_format */
623 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) {
624 memcpy(sc->sc_audio_formats, auich_audio_formats, sizeof(auich_audio_formats));
625 if (!AC97_IS_4CH(sc->codec_if))
626 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_4CH]);
627 if (!AC97_IS_6CH(sc->codec_if))
628 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_6CH]);
629 if (AC97_IS_FIXED_RATE(sc->codec_if)) {
630 for (i = 0; i < AUICH_AUDIO_NFORMATS; i++) {
631 sc->sc_audio_formats[i].frequency_type = 1;
632 sc->sc_audio_formats[i].frequency[0] = 48000;
633 }
634 }
635 if (0 != auconv_create_encodings(sc->sc_audio_formats, AUICH_AUDIO_NFORMATS,
636 &sc->sc_encodings))
637 return;
638 if (0 != auconv_create_encodings(auich_spdif_formats, AUICH_SPDIF_NFORMATS,
639 &sc->sc_spdif_encodings))
640 return;
641 } else {
642 memcpy(sc->sc_modem_formats, auich_modem_formats, sizeof(auich_modem_formats));
643 if (0 != auconv_create_encodings(sc->sc_modem_formats, AUICH_MODEM_NFORMATS,
644 &sc->sc_encodings))
645 return;
646 }
647
648 /* Watch for power change */
649 if (!pmf_device_register(self, NULL, auich_resume))
650 aprint_error_dev(self, "couldn't establish power handler\n");
651
652 config_interrupts(self, auich_finish_attach);
653
654 /* sysctl setup */
655 if (AC97_IS_FIXED_RATE(sc->codec_if) &&
656 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO)
657 return;
658
659 err = sysctl_createv(&sc->sc_log, 0, NULL, NULL, 0,
660 CTLTYPE_NODE, "hw", NULL, NULL, 0, NULL, 0,
661 CTL_HW, CTL_EOL);
662 if (err != 0)
663 goto sysctl_err;
664 err = sysctl_createv(&sc->sc_log, 0, NULL, &node, 0,
665 CTLTYPE_NODE, device_xname(self), NULL, NULL, 0,
666 NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
667 if (err != 0)
668 goto sysctl_err;
669 node_mib = node->sysctl_num;
670
671 if (!AC97_IS_FIXED_RATE(sc->codec_if)) {
672 /* passing the sc address instead of &sc->sc_ac97_clock */
673 err = sysctl_createv(&sc->sc_log, 0, NULL, &node_ac97clock,
674 CTLFLAG_READWRITE,
675 CTLTYPE_INT, "ac97rate",
676 SYSCTL_DESCR("AC'97 codec link rate"),
677 auich_sysctl_verify, 0, sc, 0,
678 CTL_HW, node_mib, CTL_CREATE, CTL_EOL);
679 if (err != 0)
680 goto sysctl_err;
681 sc->sc_ac97_clock_mib = node_ac97clock->sysctl_num;
682 }
683
684 return;
685
686 sysctl_err:
687 printf("%s: failed to add sysctl nodes. (%d)\n",
688 device_xname(self), err);
689 return; /* failure of sysctl is not fatal. */
690 }
691
692 static int
693 auich_activate(device_t self, enum devact act)
694 {
695 struct auich_softc *sc = device_private(self);
696 int ret;
697
698 ret = 0;
699 switch (act) {
700 case DVACT_ACTIVATE:
701 return EOPNOTSUPP;
702 case DVACT_DEACTIVATE:
703 if (sc->sc_audiodev != NULL)
704 ret = config_deactivate(sc->sc_audiodev);
705 return ret;
706 }
707 return EOPNOTSUPP;
708 }
709
710 static void
711 auich_childdet(device_t self, device_t child)
712 {
713 struct auich_softc *sc = device_private(self);
714
715 KASSERT(sc->sc_audiodev == child);
716 sc->sc_audiodev = NULL;
717 }
718
719 static int
720 auich_detach(device_t self, int flags)
721 {
722 struct auich_softc *sc = device_private(self);
723
724 /* audio */
725 if (sc->sc_audiodev != NULL)
726 config_detach(sc->sc_audiodev, flags);
727
728 /* sysctl */
729 sysctl_teardown(&sc->sc_log);
730
731 /* audio_encoding_set */
732 auconv_delete_encodings(sc->sc_encodings);
733 auconv_delete_encodings(sc->sc_spdif_encodings);
734
735 /* ac97 */
736 if (sc->codec_if != NULL)
737 sc->codec_if->vtbl->detach(sc->codec_if);
738
739 /* PCI */
740 if (sc->sc_ih != NULL)
741 pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
742 if (sc->mix_size != 0)
743 bus_space_unmap(sc->iot, sc->mix_ioh, sc->mix_size);
744 if (sc->aud_size != 0)
745 bus_space_unmap(sc->iot, sc->aud_ioh, sc->aud_size);
746 return 0;
747 }
748
749 static int
750 auich_sysctl_verify(SYSCTLFN_ARGS)
751 {
752 int error, tmp;
753 struct sysctlnode node;
754 struct auich_softc *sc;
755
756 node = *rnode;
757 sc = rnode->sysctl_data;
758 if (node.sysctl_num == sc->sc_ac97_clock_mib) {
759 tmp = sc->sc_ac97_clock;
760 node.sysctl_data = &tmp;
761 error = sysctl_lookup(SYSCTLFN_CALL(&node));
762 if (error || newp == NULL)
763 return error;
764
765 if (tmp < 48000 || tmp > 96000)
766 return EINVAL;
767 sc->sc_ac97_clock = tmp;
768 }
769
770 return 0;
771 }
772
773 static void
774 auich_finish_attach(device_t self)
775 {
776 struct auich_softc *sc = device_private(self);
777
778 if (!AC97_IS_FIXED_RATE(sc->codec_if))
779 auich_calibrate(sc);
780
781 sc->sc_audiodev = audio_attach_mi(&auich_hw_if, sc, sc->sc_dev);
782
783 return;
784 }
785
786 #define ICH_CODECIO_INTERVAL 10
787 static int
788 auich_read_codec(void *v, uint8_t reg, uint16_t *val)
789 {
790 struct auich_softc *sc;
791 int i;
792 uint32_t status;
793
794 sc = v;
795 /* wait for an access semaphore */
796 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- &&
797 bus_space_read_1(sc->iot, sc->aud_ioh,
798 ICH_CAS + sc->sc_modem_offset) & 1;
799 DELAY(ICH_CODECIO_INTERVAL));
800
801 if (i > 0) {
802 *val = bus_space_read_2(sc->iot, sc->mix_ioh,
803 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET));
804 DPRINTF(ICH_DEBUG_CODECIO,
805 ("auich_read_codec(%x, %x)\n", reg, *val));
806 status = bus_space_read_4(sc->iot, sc->aud_ioh,
807 ICH_GSTS + sc->sc_modem_offset);
808 if (status & ICH_RCS) {
809 bus_space_write_4(sc->iot, sc->aud_ioh,
810 ICH_GSTS + sc->sc_modem_offset,
811 status & ~(ICH_SRI|ICH_PRI|ICH_GSCI));
812 *val = 0xffff;
813 DPRINTF(ICH_DEBUG_CODECIO,
814 ("%s: read_codec error\n", device_xname(sc->sc_dev)));
815 if (reg == AC97_REG_GPIO_STATUS)
816 auich_clear_cas(sc);
817 return -1;
818 }
819 if (reg == AC97_REG_GPIO_STATUS)
820 auich_clear_cas(sc);
821 return 0;
822 } else {
823 aprint_normal_dev(sc->sc_dev, "read_codec timeout\n");
824 if (reg == AC97_REG_GPIO_STATUS)
825 auich_clear_cas(sc);
826 return -1;
827 }
828 }
829
830 static int
831 auich_write_codec(void *v, uint8_t reg, uint16_t val)
832 {
833 struct auich_softc *sc;
834 int i;
835
836 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val));
837 sc = v;
838 /* wait for an access semaphore */
839 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- &&
840 bus_space_read_1(sc->iot, sc->aud_ioh,
841 ICH_CAS + sc->sc_modem_offset) & 1;
842 DELAY(ICH_CODECIO_INTERVAL));
843
844 if (i > 0) {
845 bus_space_write_2(sc->iot, sc->mix_ioh,
846 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET), val);
847 return 0;
848 } else {
849 aprint_normal_dev(sc->sc_dev, "write_codec timeout\n");
850 return -1;
851 }
852 }
853
854 static int
855 auich_attach_codec(void *v, struct ac97_codec_if *cif)
856 {
857 struct auich_softc *sc;
858
859 sc = v;
860 sc->codec_if = cif;
861
862 return 0;
863 }
864
865 static int
866 auich_reset_codec(void *v)
867 {
868 struct auich_softc *sc;
869 int i;
870 uint32_t control, status;
871
872 sc = v;
873 control = bus_space_read_4(sc->iot, sc->aud_ioh,
874 ICH_GCTRL + sc->sc_modem_offset);
875 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) {
876 control &= ~(ICH_ACLSO | sc->sc_pcm246_mask);
877 } else {
878 control &= ~ICH_ACLSO;
879 control |= ICH_GIE;
880 }
881 control |= (control & ICH_CRESET) ? ICH_WRESET : ICH_CRESET;
882 bus_space_write_4(sc->iot, sc->aud_ioh,
883 ICH_GCTRL + sc->sc_modem_offset, control);
884
885 for (i = 500000; i >= 0; i--) {
886 status = bus_space_read_4(sc->iot, sc->aud_ioh,
887 ICH_GSTS + sc->sc_modem_offset);
888 if (status & (ICH_PCR | ICH_SCR | ICH_S2CR))
889 break;
890 DELAY(1);
891 }
892 if (i <= 0) {
893 aprint_error_dev(sc->sc_dev, "auich_reset_codec: time out\n");
894 return ETIMEDOUT;
895 }
896 #ifdef AUICH_DEBUG
897 if (status & ICH_SCR)
898 printf("%s: The 2nd codec is ready.\n",
899 device_xname(sc->sc_dev));
900 if (status & ICH_S2CR)
901 printf("%s: The 3rd codec is ready.\n",
902 device_xname(sc->sc_dev));
903 #endif
904 return 0;
905 }
906
907 static enum ac97_host_flags
908 auich_flags_codec(void *v)
909 {
910 struct auich_softc *sc = v;
911 return sc->sc_codecflags;
912 }
913
914 static void
915 auich_spdif_event(void *addr, bool flag)
916 {
917 struct auich_softc *sc;
918
919 sc = addr;
920 sc->sc_spdif = flag;
921 }
922
923 static int
924 auich_open(void *addr, int flags)
925 {
926 struct auich_softc *sc;
927
928 sc = (struct auich_softc *)addr;
929 sc->codec_if->vtbl->lock(sc->codec_if);
930 return 0;
931 }
932
933 static void
934 auich_close(void *addr)
935 {
936 struct auich_softc *sc;
937
938 sc = (struct auich_softc *)addr;
939 sc->codec_if->vtbl->unlock(sc->codec_if);
940 }
941
942 static int
943 auich_query_encoding(void *v, struct audio_encoding *aep)
944 {
945 struct auich_softc *sc;
946
947 sc = (struct auich_softc *)v;
948 return auconv_query_encoding(
949 sc->sc_spdif ? sc->sc_spdif_encodings : sc->sc_encodings, aep);
950 }
951
952 static int
953 auich_set_rate(struct auich_softc *sc, int mode, u_long srate)
954 {
955 int ret;
956 u_int ratetmp;
957
958 sc->codec_if->vtbl->set_clock(sc->codec_if, sc->sc_ac97_clock);
959 ratetmp = srate;
960 if (mode == AUMODE_RECORD)
961 return sc->codec_if->vtbl->set_rate(sc->codec_if,
962 AC97_REG_PCM_LR_ADC_RATE, &ratetmp);
963 ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
964 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp);
965 if (ret)
966 return ret;
967 ratetmp = srate;
968 ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
969 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp);
970 if (ret)
971 return ret;
972 ratetmp = srate;
973 ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
974 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp);
975 return ret;
976 }
977
978 static int
979 auich_set_params(void *v, int setmode, int usemode,
980 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil,
981 stream_filter_list_t *rfil)
982 {
983 struct auich_softc *sc;
984 audio_params_t *p;
985 stream_filter_list_t *fil;
986 int mode, index;
987 uint32_t control;
988
989 sc = v;
990 for (mode = AUMODE_RECORD; mode != -1;
991 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
992 if ((setmode & mode) == 0)
993 continue;
994
995 p = mode == AUMODE_PLAY ? play : rec;
996 fil = mode == AUMODE_PLAY ? pfil : rfil;
997 if (p == NULL)
998 continue;
999
1000 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) {
1001 if (p->sample_rate < 8000 ||
1002 p->sample_rate > 48000)
1003 return EINVAL;
1004
1005 if (!sc->sc_spdif)
1006 index = auconv_set_converter(sc->sc_audio_formats,
1007 AUICH_AUDIO_NFORMATS, mode, p, TRUE, fil);
1008 else
1009 index = auconv_set_converter(auich_spdif_formats,
1010 AUICH_SPDIF_NFORMATS, mode, p, TRUE, fil);
1011 } else {
1012 if (p->sample_rate != 8000 && p->sample_rate != 16000)
1013 return EINVAL;
1014 index = auconv_set_converter(sc->sc_modem_formats,
1015 AUICH_MODEM_NFORMATS, mode, p, TRUE, fil);
1016 }
1017 if (index < 0)
1018 return EINVAL;
1019 if (fil->req_size > 0)
1020 p = &fil->filters[0].param;
1021 /* p represents HW encoding */
1022 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) {
1023 if (sc->sc_audio_formats[index].frequency_type != 1
1024 && auich_set_rate(sc, mode, p->sample_rate))
1025 return EINVAL;
1026 } else {
1027 if (sc->sc_modem_formats[index].frequency_type != 1
1028 && auich_set_rate(sc, mode, p->sample_rate))
1029 return EINVAL;
1030 auich_write_codec(sc, AC97_REG_LINE1_RATE,
1031 p->sample_rate);
1032 auich_write_codec(sc, AC97_REG_LINE1_LEVEL, 0);
1033 }
1034 if (mode == AUMODE_PLAY &&
1035 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) {
1036 control = bus_space_read_4(sc->iot, sc->aud_ioh,
1037 ICH_GCTRL + sc->sc_modem_offset);
1038 control &= ~sc->sc_pcm246_mask;
1039 if (p->channels == 4) {
1040 control |= sc->sc_pcm4;
1041 } else if (p->channels == 6) {
1042 control |= sc->sc_pcm6;
1043 }
1044 bus_space_write_4(sc->iot, sc->aud_ioh,
1045 ICH_GCTRL + sc->sc_modem_offset, control);
1046 }
1047 }
1048
1049 return 0;
1050 }
1051
1052 static int
1053 auich_round_blocksize(void *v, int blk, int mode,
1054 const audio_params_t *param)
1055 {
1056
1057 return blk & ~0x3f; /* keep good alignment */
1058 }
1059
1060 static void
1061 auich_halt_pipe(struct auich_softc *sc, int pipe)
1062 {
1063 int i;
1064 uint32_t status;
1065
1066 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 0);
1067 for (i = 0; i < 100; i++) {
1068 status = bus_space_read_4(sc->iot, sc->aud_ioh, pipe + ICH_STS);
1069 if (status & ICH_DCH)
1070 break;
1071 DELAY(1);
1072 }
1073 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, ICH_RR);
1074
1075 #if AUICH_DEBUG
1076 if (i > 0)
1077 printf("auich_halt_pipe: halt took %d cycles\n", i);
1078 #endif
1079 }
1080
1081 static int
1082 auich_halt_output(void *v)
1083 {
1084 struct auich_softc *sc;
1085
1086 sc = v;
1087 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", device_xname(sc->sc_dev)));
1088
1089 auich_halt_pipe(sc, ICH_PCMO);
1090 sc->pcmo.intr = NULL;
1091
1092 return 0;
1093 }
1094
1095 static int
1096 auich_halt_input(void *v)
1097 {
1098 struct auich_softc *sc;
1099
1100 sc = v;
1101 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_input\n", device_xname(sc->sc_dev)));
1102
1103 auich_halt_pipe(sc, ICH_PCMI);
1104 sc->pcmi.intr = NULL;
1105
1106 return 0;
1107 }
1108
1109 static int
1110 auich_getdev(void *v, struct audio_device *adp)
1111 {
1112 struct auich_softc *sc;
1113
1114 sc = v;
1115 *adp = sc->sc_audev;
1116 return 0;
1117 }
1118
1119 static int
1120 auich_set_port(void *v, mixer_ctrl_t *cp)
1121 {
1122 struct auich_softc *sc;
1123
1124 sc = v;
1125 return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp);
1126 }
1127
1128 static int
1129 auich_get_port(void *v, mixer_ctrl_t *cp)
1130 {
1131 struct auich_softc *sc;
1132
1133 sc = v;
1134 return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp);
1135 }
1136
1137 static int
1138 auich_query_devinfo(void *v, mixer_devinfo_t *dp)
1139 {
1140 struct auich_softc *sc;
1141
1142 sc = v;
1143 return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp);
1144 }
1145
1146 static void *
1147 auich_allocm(void *v, int direction, size_t size,
1148 struct malloc_type *pool, int flags)
1149 {
1150 struct auich_softc *sc;
1151 struct auich_dma *p;
1152 int error;
1153
1154 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX))
1155 return NULL;
1156
1157 p = malloc(sizeof(*p), pool, flags|M_ZERO);
1158 if (p == NULL)
1159 return NULL;
1160
1161 sc = v;
1162 error = auich_allocmem(sc, size, 0, p);
1163 if (error) {
1164 free(p, pool);
1165 return NULL;
1166 }
1167
1168 p->next = sc->sc_dmas;
1169 sc->sc_dmas = p;
1170
1171 return KERNADDR(p);
1172 }
1173
1174 static void
1175 auich_freem(void *v, void *ptr, struct malloc_type *pool)
1176 {
1177 struct auich_softc *sc;
1178 struct auich_dma *p, **pp;
1179
1180 sc = v;
1181 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
1182 if (KERNADDR(p) == ptr) {
1183 auich_freemem(sc, p);
1184 *pp = p->next;
1185 free(p, pool);
1186 return;
1187 }
1188 }
1189 }
1190
1191 static size_t
1192 auich_round_buffersize(void *v, int direction, size_t size)
1193 {
1194
1195 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX))
1196 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX;
1197
1198 return size;
1199 }
1200
1201 static paddr_t
1202 auich_mappage(void *v, void *mem, off_t off, int prot)
1203 {
1204 struct auich_softc *sc;
1205 struct auich_dma *p;
1206
1207 if (off < 0)
1208 return -1;
1209 sc = v;
1210 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next)
1211 continue;
1212 if (!p)
1213 return -1;
1214 return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs,
1215 off, prot, BUS_DMA_WAITOK);
1216 }
1217
1218 static int
1219 auich_get_props(void *v)
1220 {
1221 struct auich_softc *sc;
1222 int props;
1223
1224 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
1225 sc = v;
1226 /*
1227 * Even if the codec is fixed-rate, set_param() succeeds for any sample
1228 * rate because of aurateconv. Applications can't know what rate the
1229 * device can process in the case of mmap().
1230 */
1231 if (!AC97_IS_FIXED_RATE(sc->codec_if) ||
1232 sc->sc_codectype == AC97_CODEC_TYPE_MODEM)
1233 props |= AUDIO_PROP_MMAP;
1234 return props;
1235 }
1236
1237 static int
1238 auich_intr(void *v)
1239 {
1240 struct auich_softc *sc;
1241 int ret, gsts;
1242 #ifdef DIAGNOSTIC
1243 int csts;
1244 #endif
1245
1246 sc = v;
1247
1248 if (!device_has_power(sc->sc_dev))
1249 return (0);
1250
1251 ret = 0;
1252 #ifdef DIAGNOSTIC
1253 csts = pci_conf_read(sc->sc_pc, sc->sc_pt, PCI_COMMAND_STATUS_REG);
1254 if (csts & PCI_STATUS_MASTER_ABORT) {
1255 printf("auich_intr: PCI master abort\n");
1256 }
1257 #endif
1258
1259 gsts = bus_space_read_4(sc->iot, sc->aud_ioh,
1260 ICH_GSTS + sc->sc_modem_offset);
1261 DPRINTF(ICH_DEBUG_INTR, ("auich_intr: gsts=0x%x\n", gsts));
1262
1263 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_POINT) ||
1264 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MOINT)) {
1265 int sts;
1266
1267 sts = bus_space_read_2(sc->iot, sc->aud_ioh,
1268 ICH_PCMO + sc->sc_sts_reg);
1269 DPRINTF(ICH_DEBUG_INTR,
1270 ("auich_intr: osts=0x%x\n", sts));
1271
1272 if (sts & ICH_FIFOE)
1273 printf("%s: fifo underrun\n", device_xname(sc->sc_dev));
1274
1275 if (sts & ICH_BCIS)
1276 auich_intr_pipe(sc, ICH_PCMO, &sc->pcmo);
1277
1278 /* int ack */
1279 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO +
1280 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE));
1281 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO)
1282 bus_space_write_4(sc->iot, sc->aud_ioh,
1283 ICH_GSTS + sc->sc_modem_offset, ICH_POINT);
1284 else
1285 bus_space_write_4(sc->iot, sc->aud_ioh,
1286 ICH_GSTS + sc->sc_modem_offset, ICH_MOINT);
1287 ret++;
1288 }
1289
1290 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_PIINT) ||
1291 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MIINT)) {
1292 int sts;
1293
1294 sts = bus_space_read_2(sc->iot, sc->aud_ioh,
1295 ICH_PCMI + sc->sc_sts_reg);
1296 DPRINTF(ICH_DEBUG_INTR,
1297 ("auich_intr: ists=0x%x\n", sts));
1298
1299 if (sts & ICH_FIFOE)
1300 printf("%s: fifo overrun\n", device_xname(sc->sc_dev));
1301
1302 if (sts & ICH_BCIS)
1303 auich_intr_pipe(sc, ICH_PCMI, &sc->pcmi);
1304
1305 /* int ack */
1306 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI +
1307 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE));
1308 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO)
1309 bus_space_write_4(sc->iot, sc->aud_ioh,
1310 ICH_GSTS + sc->sc_modem_offset, ICH_PIINT);
1311 else
1312 bus_space_write_4(sc->iot, sc->aud_ioh,
1313 ICH_GSTS + sc->sc_modem_offset, ICH_MIINT);
1314 ret++;
1315 }
1316
1317 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_MINT) {
1318 int sts;
1319
1320 sts = bus_space_read_2(sc->iot, sc->aud_ioh,
1321 ICH_MICI + sc->sc_sts_reg);
1322 DPRINTF(ICH_DEBUG_INTR,
1323 ("auich_intr: ists=0x%x\n", sts));
1324
1325 if (sts & ICH_FIFOE)
1326 printf("%s: fifo overrun\n", device_xname(sc->sc_dev));
1327
1328 if (sts & ICH_BCIS)
1329 auich_intr_pipe(sc, ICH_MICI, &sc->mici);
1330
1331 /* int ack */
1332 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_MICI +
1333 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE));
1334 bus_space_write_4(sc->iot, sc->aud_ioh,
1335 ICH_GSTS + sc->sc_modem_offset, ICH_MINT);
1336 ret++;
1337 }
1338
1339 #ifdef AUICH_MODEM_DEBUG
1340 if (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_GSCI) {
1341 printf("%s: gsts=0x%x\n", device_xname(sc->sc_dev), gsts);
1342 /* int ack */
1343 bus_space_write_4(sc->iot, sc->aud_ioh,
1344 ICH_GSTS + sc->sc_modem_offset, ICH_GSCI);
1345 ret++;
1346 }
1347 #endif
1348
1349 return ret;
1350 }
1351
1352 static void
1353 auich_trigger_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring)
1354 {
1355 int blksize, qptr;
1356 struct auich_dmalist *q;
1357
1358 blksize = ring->blksize;
1359
1360 for (qptr = 0; qptr < ICH_DMALIST_MAX; qptr++) {
1361 q = &ring->dmalist[qptr];
1362 q->base = ring->p;
1363 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC;
1364
1365 ring->p += blksize;
1366 if (ring->p >= ring->end)
1367 ring->p = ring->start;
1368 }
1369 ring->qptr = 0;
1370
1371 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI,
1372 (qptr - 1) & ICH_LVI_MASK);
1373 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL,
1374 ICH_IOCE | ICH_FEIE | ICH_RPBM);
1375 }
1376
1377 static void
1378 auich_intr_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring)
1379 {
1380 int blksize, qptr, nqptr;
1381 struct auich_dmalist *q;
1382
1383 blksize = ring->blksize;
1384 qptr = ring->qptr;
1385 nqptr = bus_space_read_1(sc->iot, sc->aud_ioh, pipe + ICH_CIV);
1386
1387 while (qptr != nqptr) {
1388 q = &ring->dmalist[qptr];
1389 q->base = ring->p;
1390 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC;
1391
1392 DPRINTF(ICH_DEBUG_INTR,
1393 ("auich_intr: %p, %p = %x @ 0x%x\n",
1394 &ring->dmalist[qptr], q, q->len, q->base));
1395
1396 ring->p += blksize;
1397 if (ring->p >= ring->end)
1398 ring->p = ring->start;
1399
1400 qptr = (qptr + 1) & ICH_LVI_MASK;
1401 if (ring->intr)
1402 ring->intr(ring->arg);
1403 }
1404 ring->qptr = qptr;
1405
1406 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI,
1407 (qptr - 1) & ICH_LVI_MASK);
1408 }
1409
1410 static int
1411 auich_trigger_output(void *v, void *start, void *end, int blksize,
1412 void (*intr)(void *), void *arg, const audio_params_t *param)
1413 {
1414 struct auich_softc *sc;
1415 struct auich_dma *p;
1416 size_t size;
1417
1418 DPRINTF(ICH_DEBUG_DMA,
1419 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n",
1420 start, end, blksize, intr, arg, param));
1421 sc = v;
1422
1423 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
1424 continue;
1425 if (!p) {
1426 printf("auich_trigger_output: bad addr %p\n", start);
1427 return EINVAL;
1428 }
1429
1430 size = (size_t)((char *)end - (char *)start);
1431
1432 sc->pcmo.intr = intr;
1433 sc->pcmo.arg = arg;
1434 sc->pcmo.start = DMAADDR(p);
1435 sc->pcmo.p = sc->pcmo.start;
1436 sc->pcmo.end = sc->pcmo.start + size;
1437 sc->pcmo.blksize = blksize;
1438
1439 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR,
1440 sc->sc_cddma + ICH_PCMO_OFF(0));
1441 auich_trigger_pipe(sc, ICH_PCMO, &sc->pcmo);
1442
1443 return 0;
1444 }
1445
1446 static int
1447 auich_trigger_input(void *v, void *start, void *end, int blksize,
1448 void (*intr)(void *), void *arg, const audio_params_t *param)
1449 {
1450 struct auich_softc *sc;
1451 struct auich_dma *p;
1452 size_t size;
1453
1454 DPRINTF(ICH_DEBUG_DMA,
1455 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n",
1456 start, end, blksize, intr, arg, param));
1457 sc = v;
1458
1459 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
1460 continue;
1461 if (!p) {
1462 printf("auich_trigger_input: bad addr %p\n", start);
1463 return EINVAL;
1464 }
1465
1466 size = (size_t)((char *)end - (char *)start);
1467
1468 sc->pcmi.intr = intr;
1469 sc->pcmi.arg = arg;
1470 sc->pcmi.start = DMAADDR(p);
1471 sc->pcmi.p = sc->pcmi.start;
1472 sc->pcmi.end = sc->pcmi.start + size;
1473 sc->pcmi.blksize = blksize;
1474
1475 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR,
1476 sc->sc_cddma + ICH_PCMI_OFF(0));
1477 auich_trigger_pipe(sc, ICH_PCMI, &sc->pcmi);
1478
1479 return 0;
1480 }
1481
1482 static int
1483 auich_powerstate(void *v, int state)
1484 {
1485 return 0;
1486 }
1487
1488 static int
1489 auich_allocmem(struct auich_softc *sc, size_t size, size_t align,
1490 struct auich_dma *p)
1491 {
1492 int error;
1493
1494 p->size = size;
1495 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0,
1496 p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
1497 &p->nsegs, BUS_DMA_NOWAIT);
1498 if (error)
1499 return error;
1500
1501 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size,
1502 &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags);
1503 if (error)
1504 goto free;
1505
1506 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size,
1507 0, BUS_DMA_NOWAIT, &p->map);
1508 if (error)
1509 goto unmap;
1510
1511 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL,
1512 BUS_DMA_NOWAIT);
1513 if (error)
1514 goto destroy;
1515 return 0;
1516
1517 destroy:
1518 bus_dmamap_destroy(sc->dmat, p->map);
1519 unmap:
1520 bus_dmamem_unmap(sc->dmat, p->addr, p->size);
1521 free:
1522 bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
1523 return error;
1524 }
1525
1526 static int
1527 auich_freemem(struct auich_softc *sc, struct auich_dma *p)
1528 {
1529
1530 bus_dmamap_unload(sc->dmat, p->map);
1531 bus_dmamap_destroy(sc->dmat, p->map);
1532 bus_dmamem_unmap(sc->dmat, p->addr, p->size);
1533 bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
1534 return 0;
1535 }
1536
1537 static int
1538 auich_alloc_cdata(struct auich_softc *sc)
1539 {
1540 bus_dma_segment_t seg;
1541 int error, rseg;
1542
1543 /*
1544 * Allocate the control data structure, and create and load the
1545 * DMA map for it.
1546 */
1547 if ((error = bus_dmamem_alloc(sc->dmat,
1548 sizeof(struct auich_cdata),
1549 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) {
1550 aprint_error_dev(sc->sc_dev, "unable to allocate control data, error = %d\n", error);
1551 goto fail_0;
1552 }
1553
1554 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg,
1555 sizeof(struct auich_cdata),
1556 (void **) &sc->sc_cdata,
1557 sc->sc_dmamap_flags)) != 0) {
1558 aprint_error_dev(sc->sc_dev, "unable to map control data, error = %d\n", error);
1559 goto fail_1;
1560 }
1561
1562 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1,
1563 sizeof(struct auich_cdata), 0, 0,
1564 &sc->sc_cddmamap)) != 0) {
1565 aprint_error_dev(sc->sc_dev, "unable to create control data DMA map, "
1566 "error = %d\n", error);
1567 goto fail_2;
1568 }
1569
1570 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap,
1571 sc->sc_cdata, sizeof(struct auich_cdata),
1572 NULL, 0)) != 0) {
1573 aprint_error_dev(sc->sc_dev, "unable tp load control data DMA map, "
1574 "error = %d\n", error);
1575 goto fail_3;
1576 }
1577
1578 sc->pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo;
1579 sc->pcmi.dmalist = sc->sc_cdata->ic_dmalist_pcmi;
1580 sc->mici.dmalist = sc->sc_cdata->ic_dmalist_mici;
1581
1582 return 0;
1583
1584 fail_3:
1585 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap);
1586 fail_2:
1587 bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata,
1588 sizeof(struct auich_cdata));
1589 fail_1:
1590 bus_dmamem_free(sc->dmat, &seg, rseg);
1591 fail_0:
1592 return error;
1593 }
1594
1595 static bool
1596 auich_resume(device_t dv PMF_FN_ARGS)
1597 {
1598 struct auich_softc *sc = device_private(dv);
1599 pcireg_t v;
1600
1601 if (sc->sc_native_mode) {
1602 v = pci_conf_read(sc->sc_pc, sc->sc_pt, ICH_CFG);
1603 pci_conf_write(sc->sc_pc, sc->sc_pt, ICH_CFG,
1604 v | ICH_CFG_IOSE);
1605 }
1606
1607 auich_reset_codec(sc);
1608 DELAY(1000);
1609 (sc->codec_if->vtbl->restore_ports)(sc->codec_if);
1610
1611 return true;
1612 }
1613
1614 /*
1615 * Calibrate card (some boards are overclocked and need scaling)
1616 */
1617 static void
1618 auich_calibrate(struct auich_softc *sc)
1619 {
1620 struct timeval t1, t2;
1621 uint8_t ociv, nciv;
1622 uint64_t wait_us;
1623 uint32_t actual_48k_rate, bytes, ac97rate;
1624 void *temp_buffer;
1625 struct auich_dma *p;
1626 u_int rate;
1627
1628 /*
1629 * Grab audio from input for fixed interval and compare how
1630 * much we actually get with what we expect. Interval needs
1631 * to be sufficiently short that no interrupts are
1632 * generated.
1633 */
1634
1635 /* Force the codec to a known state first. */
1636 sc->codec_if->vtbl->set_clock(sc->codec_if, 48000);
1637 rate = sc->sc_ac97_clock = 48000;
1638 sc->codec_if->vtbl->set_rate(sc->codec_if, AC97_REG_PCM_LR_ADC_RATE,
1639 &rate);
1640
1641 /* Setup a buffer */
1642 bytes = 64000;
1643 temp_buffer = auich_allocm(sc, AUMODE_RECORD, bytes, M_DEVBUF, M_WAITOK);
1644
1645 for (p = sc->sc_dmas; p && KERNADDR(p) != temp_buffer; p = p->next)
1646 continue;
1647 if (p == NULL) {
1648 printf("auich_calibrate: bad address %p\n", temp_buffer);
1649 return;
1650 }
1651 sc->pcmi.dmalist[0].base = DMAADDR(p);
1652 sc->pcmi.dmalist[0].len = (bytes >> sc->sc_sample_shift);
1653
1654 /*
1655 * our data format is stereo, 16 bit so each sample is 4 bytes.
1656 * assuming we get 48000 samples per second, we get 192000 bytes/sec.
1657 * we're going to start recording with interrupts disabled and measure
1658 * the time taken for one block to complete. we know the block size,
1659 * we know the time in microseconds, we calculate the sample rate:
1660 *
1661 * actual_rate [bps] = bytes / (time [s] * 4)
1662 * actual_rate [bps] = (bytes * 1000000) / (time [us] * 4)
1663 * actual_rate [Hz] = (bytes * 250000) / time [us]
1664 */
1665
1666 /* prepare */
1667 ociv = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV);
1668 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR,
1669 sc->sc_cddma + ICH_PCMI_OFF(0));
1670 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI,
1671 (0 - 1) & ICH_LVI_MASK);
1672
1673 /* start */
1674 microtime(&t1);
1675 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RPBM);
1676
1677 /* wait */
1678 nciv = ociv;
1679 do {
1680 microtime(&t2);
1681 if (t2.tv_sec - t1.tv_sec > 1)
1682 break;
1683 nciv = bus_space_read_1(sc->iot, sc->aud_ioh,
1684 ICH_PCMI + ICH_CIV);
1685 } while (nciv == ociv);
1686 microtime(&t2);
1687
1688 /* stop */
1689 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 0);
1690
1691 /* reset */
1692 DELAY(100);
1693 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR);
1694
1695 /* turn time delta into us */
1696 wait_us = ((t2.tv_sec - t1.tv_sec) * 1000000) + t2.tv_usec - t1.tv_usec;
1697
1698 auich_freem(sc, temp_buffer, M_DEVBUF);
1699
1700 if (nciv == ociv) {
1701 printf("%s: ac97 link rate calibration timed out after %"
1702 PRIu64 " us\n", device_xname(sc->sc_dev), wait_us);
1703 return;
1704 }
1705
1706 actual_48k_rate = (bytes * UINT64_C(250000)) / wait_us;
1707
1708 if (actual_48k_rate < 50000)
1709 ac97rate = 48000;
1710 else
1711 ac97rate = ((actual_48k_rate + 500) / 1000) * 1000;
1712
1713 printf("%s: measured ac97 link rate at %d Hz",
1714 device_xname(sc->sc_dev), actual_48k_rate);
1715 if (ac97rate != actual_48k_rate)
1716 printf(", will use %d Hz", ac97rate);
1717 printf("\n");
1718
1719 sc->sc_ac97_clock = ac97rate;
1720 }
1721
1722 static void
1723 auich_clear_cas(struct auich_softc *sc)
1724 {
1725 /* Clear the codec access semaphore */
1726 (void)bus_space_read_2(sc->iot, sc->mix_ioh,
1727 AC97_REG_RESET * (sc->sc_codecnum * ICH_CODEC_OFFSET));
1728
1729 return;
1730 }
1731